Method for reducing the boron concentration in a semiconductor layer
Patent Information
- Application Number
- EP2024705494
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-02-16
- Filing Date
- 2024-02-16
- Publication Date
- 2025-12-24
AI Technical Summary
Semiconductor-on-insulator substrates used in photonic applications are contaminated with boron, leading to photon absorption and attenuation, which is difficult to completely eliminate despite using boron-depleted donor substrates and low-boron protective tools during manufacturing.
A method involving thermal oxidation cycles with a temperature gradient to segregate boron atoms into an oxide layer, followed by its removal, is implemented to reduce boron concentration in the semiconductor layer, ensuring a more uniform oxide thickness profile and effective boron reduction.
This process significantly reduces boron content in the semiconductor layer from initial concentrations above 10^15 at/cm^3 to below 5.10^14 at/cm^3, effectively mitigating contamination and enhancing the quality of photonic components by minimizing photon absorption.
Smart Images
Figure EP2024054034_22082024_PF_FP
Abstract
Description
[0001] Description
[0002] Title: Process for reducing the boron concentration of a semiconductor layer
[0003] Technical field
[0004] The present disclosure relates to a method of reducing the boron concentration of a semiconductor layer, as well as to a method of manufacturing a semiconductor-on-insulator substrate in which said method of reducing the boron concentration can be implemented to remedy contamination of said semiconductor layer by boron.
[0005] State of the art
[0006] Photonic applications use semiconductor-on-insulator substrates. Such substrates comprise, from their back side to their front side, a support substrate, an electrically insulating layer and a monocrystalline semiconductor layer, called the active layer.
[0007] Photonic devices, such as lasers, modulators, waveguides or multiplexers, may advantageously be formed at least in part in the active layer of a semiconductor-on-insulator substrate.
[0008] However, these applications are very sensitive to the presence of boron in the active layer. For example, for a waveguide, the presence of boron in the active layer induces the absorption of photons which causes an attenuation of an electromagnetic wave circulating in the active layer.
[0009] We therefore seek to reduce the boron content in the active layer.
[0010] In some cases, the boron concentration in the active layer may come from the material of the layer itself.
[0011] In particular, a semiconductor-on-insulator substrate may typically be formed by the Smart Cut™ process, comprising: forming a weakened region in a donor substrate to define a semiconductor layer intended to form the active layer, bonding the donor substrate to a support substrate via an electrically insulating layer, and detaching the donor substrate along the weakened region so as to transfer the semiconductor layer to the support substrate and the electrically insulating layer.
[0012] A first solution therefore consists of reducing the boron content in the donor substrate from which the active layer comes. To this end, one can choose an N-doped donor substrate, which has a lower boron content than the donor substrates conventionally used in the microelectronics industry, which are generally P-doped semiconductor substrates and which have a boron content of around 10 15 at / cm 3 or more. However, even by minimizing the boron content in the donor substrate, there is external contamination, linked in particular to the atmosphere to which the semiconductor-on-insulator substrate is subjected during its manufacture, as well as to the equipment used in the manufacturing processes, which is difficult to avoid.
[0013] For example, after transferring the semiconductor layer from the donor substrate to the support substrate, rapid thermal annealing (RTA) is generally used to smooth the surface of the transferred semiconductor layer. During this heat treatment, the edge of the semiconductor-on-insulator substrate is surrounded by an edge guard ring to uniform the temperature within the substrate. Such a tool is typically made of polycrystalline silicon, with a high boron content to increase its mechanical strength. Under the effect of the heat treatment temperature and ambient gases, the boron present in the tool reacts and contaminates the edge of the substrate surrounded by the tool.
[0014] Tests have been carried out with holding tools having a lower boron content, but, despite this measure, the boron content in the active layer of the semiconductor-on-insulator substrate remains higher than the desired maximum content.
[0015] Summary
[0016] An aim of the present disclosure is to further reduce the boron concentration of the active layer of a semiconductor-on-insulator type substrate, in particular for photonic applications.
[0017] For this purpose, a method is proposed for reducing the boron concentration of a semiconductor layer of a semiconductor-on-insulator type substrate, comprising:
[0018] - at least one heat treatment cycle, each cycle comprising a thermal oxidation of said semiconductor layer so as to form an oxide layer on the semiconductor layer, in which, by segregation of the boron, boron atoms from the semiconductor layer diffuse into the oxide layer so as to create a boron concentration deficit in the semiconductor layer at the interface with the oxide layer, and
[0019] - a removal of the oxide layer, the thermal oxidation comprising a rise in temperature under an inert atmosphere above a target thermal oxidation temperature followed by a fall in temperature to said target thermal oxidation temperature so as to form a temperature gradient in the substrate to generate a higher rate of formation of the oxide layer in the center of the semiconductor layer than at the edge.
[0020] Thus, thanks to the segregation phenomenon, the boron content in the semiconductor layer can be reduced in one or more heat treatment cycles. This process therefore makes it possible to compensate for boron contamination likely to occur during the manufacture of the semiconductor-on-insulator substrate. In addition, carrying out the thermal oxidation in two stages makes it possible to obtain a more uniform thickness profile of the oxide layer, the oxide growth rate obtained being higher in the center of the substrate than at its edge.
[0021] According to one implementation of the method, said at least one heat treatment cycle comprises, after thermal oxidation, annealing under an inert atmosphere for a duration suitable for standardizing the boron concentration in the semiconductor layer and / or increasing the diffusion of boron atoms towards the sacrificial oxide / semiconductor layer interface.
[0022] According to one implementation of the process, annealing is carried out at a temperature between 800°C and 1200°C.
[0023] Depending on one implementation of the process, the annealing time is between a few seconds and several hours, for example between two seconds and twenty hours.
[0024] According to one implementation of the process, thermal oxidation is carried out at a temperature between 800 and 1200°C under an oxidizing atmosphere.
[0025] According to one implementation of the method, thermal oxidation is carried out under controlled conditions to form the oxide layer with a thickness greater at the center of the semiconductor layer than at the edge of said semiconductor layer.
[0026] According to one implementation of the method, the semiconductor layer has a thickness of between 0.01 and 1 pm.
[0027] According to one implementation of the process, in each treatment cycle, thermal oxidation and annealing are carried out in the same furnace.
[0028] According to one implementation, the method comprises at least a first and a second processing cycle.
[0029] According to one implementation, the method comprises, between the first and second treatment cycles, removing the oxide layer formed during the first heat treatment cycle.
[0030] In one implementation, the second treatment cycle directly follows the first treatment cycle, with the oxide layer formed during the first and second treatment cycles being removed after the second treatment.
[0031] According to one implementation, the semiconductor layer has an initial boron concentration greater than or equal to 10 15 at / cm 3 .
[0032] According to one implementation, the semiconductor layer has, after removal of the oxide layer, a final boron content less than or equal to 5.10 14 at / cm 3 .
[0033] According to one implementation, the removal of the oxide layer is implemented by selective chemical etching. The present disclosure further relates to a method of manufacturing a semiconductor-on-insulator substrate, comprising:
[0034] - the formation of a weakening zone by implantation of ionic species in a donor substrate to delimit a semiconductor layer,
[0035] - the assembly of the donor substrate with a support substrate by means of an electrically insulating layer,
[0036] - detaching the donor substrate along the weakening zone to transfer the semiconductor layer onto the support substrate, so as to form the semiconductor-on-insulator type substrate,
[0037] - the implementation of the proposed method for reducing the boron concentration of the semiconductor layer.
[0038] According to one implementation, the manufacturing method comprises, after the transfer of the semiconductor layer onto the support substrate, at least one rapid heat treatment for smoothing the surface of said semiconductor layer, each rapid heat treatment being carried out before the implementation of the method for reducing the boron concentration of the semiconductor layer.
[0039] The present disclosure further relates to a method of manufacturing a photonic device, comprising manufacturing a semiconductor-on-insulator substrate according to the manufacturing method according to the present disclosure, and forming a passive photonic component in the semiconductor layer having a reduced boron concentration.
[0040] Brief description of the drawings
[0041] Other characteristics and advantages will emerge from the detailed description which follows, with reference to the attached drawings, in which:
[0042] - Figure 1 is a schematic sectional view of the formation of a weakening zone by implantation of ionic species in a donor substrate;
[0043] - Figure 2 is a schematic sectional view of the formation of an electrically insulating layer on a support substrate;
[0044] - figure 3 is a schematic sectional view of the bonding of the donor substrate of figure 1 to the support substrate of figure 2;
[0045] - Figure 4 is a schematic sectional view of the semiconductor-on-insulator substrate obtained after detachment from the donor substrate along the weakening zone;
[0046] - Figure 5 is a schematic sectional view of the thermal oxidation of the active layer of the semiconductor substrate on insulator of Figure 4;
[0047] - Figure 6 is a schematic sectional view of the semiconductor substrate of Figure 5 after removal of the oxide layer; - Figure 7a is a schematic illustration of a step of implantation of species in a semiconductor substrate
[0048] - Figure 7b is a schematic illustration of an embodiment comprising a thermal oxidation step;
[0049] - Figure 8 is a graph showing boron concentration curves as a function of depth in the semiconductor-on-insulator substrate, respectively following a standard manufacturing process comprising a rapid smoothing heat treatment (I), a manufacturing process based on a boron-depleted donor substrate and the use of an annular substrate protection tool during a rapid smoothing heat treatment designed to minimize boron contamination (II) and a process carried out under the same conditions as process (II) followed by the proposed boron concentration reduction process (III).
[0050] For reasons of readability of the figures, the different layers have not necessarily been represented to scale.
[0051] Detailed description of embodiments
[0052] Figures 1 to 4 represent, in a manner known from the state of the art, a Smart Cut™ manufacturing method for a semiconductor-on-insulator substrate, successively comprising at least the following steps: the implantation of ionic species in a first semiconductor substrate 10, called the donor substrate, so as to form a weakening zone 11, as shown in Figure 1, said weakening zone limiting a layer 12 to be transferred; the formation, on a second semiconductor substrate 20, called the receiver substrate, of an electrically insulating layer 21, in particular obtained by oxidation of a surface part of the substrate 20, as shown in Figure 2; the transfer of a layer 12 of the donor substrate 10 by bonding to the receiving substrate 20, via the electrically insulating layer 21, then by detachment of the donor substrate 10 along the weakening zone 11, as shown in FIGS. 3 and 4.A substrate 1 of the semiconductor on insulator type is thus obtained (see figure 4).
[0053] Advantageously, the substrate 1 is configured for photonic applications. Therefore, the thickness of the transferred layer 12 is preferably between 100 and 600 nm and the thickness of the electrically insulating layer is preferably between 200 nm and 3000 nm.
[0054] Alternatively, the electrically insulating layer 21 may be formed on the donor substrate 10 before the implantation step.
[0055] The present disclosure relates to a method for reducing the boron concentration of the semiconductor layer 12 of the substrate. In its general embodiment, this method involves, after the transfer step, a heat treatment cycle. This cycle comprises a step of thermal oxidation of the semiconductor layer 12, in order to form a sacrificial oxide layer 120 on the semiconductor layer, this step being represented in FIG. 5. During the oxidation, a segregation phenomenon takes place, during which boron atoms move from the semiconductor layer to the sacrificial oxide layer 120, thus reducing the boron concentration of the semiconductor layer 12. The heat treatment cycle also comprises a heat treatment step, carried out either after the oxidation step or simultaneously with it.This heat treatment step allows a redistribution of the boron atoms in the semiconductor layer 12. Finally, and with reference to FIG. 6, the sacrificial oxide layer 120 is removed so as to expose the semiconductor layer 12.
[0056] Thermal oxidation can be carried out at a temperature between 800 and 1200°C under an oxidizing atmosphere.
[0057] Advantageously, the method is carried out under conditions which already allow, in a known manner, a significant reduction in the boron content of the semiconductor substrate. In particular, an N-doped substrate with a reduced boron content can be used as the donor substrate. A low-boron annular protection tool can also be used.
[0058] According to one embodiment, the method may comprise several heat treatment cycles, in particular two heat treatment cycles. This allows better diffusion of the boron at the interface between the semiconductor layer 12 and the sacrificial oxide layer 120. The heat treatment cycles may then be carried out directly one after the other, removing the oxide layer 120 after the last heat treatment cycle, or removing the oxide layer 120 formed after each heat treatment cycle. Removing the oxide layer 120 after the last heat treatment cycle has the advantage of not requiring removal of the substrate from the furnace between the different heat treatment cycles, thus facilitating the industrialization of the method.
[0059] In order to further improve the diffusion of boron at the interface between the semiconductor layer 12 and the sacrificial oxide layer 120, the heat treatment step may be an annealing under an inert atmosphere. Such annealing may advantageously take place at a temperature suitable for uniformizing the boron concentration in the semiconductor layer 12 and / or increasing the diffusion of boron atoms towards the sacrificial oxide 120 / semiconductor layer 12 interface. Such annealing may advantageously be carried out at a temperature of between 800 and 1200°C, and last between a few seconds and several hours or even several tens of hours.
[0060] In order to minimize the time and material resources required to implement the proposed method, the heat treatment cycles and the heat treatment step can be carried out in a single furnace. Thus, only a single furnace is required to implement the method, and no removal of the substrate from the furnace is necessary before the step of removing the oxide layer 120.
[0061] Following the implantation step of the Smart Cut™ process, the inventors found that the implantation depth uniformity of the species is degraded. This implantation depth non-uniformity results in a thickness non-uniformity of the active layer, which adopts a typically concave or convex profile, which is detrimental to the quality of the components subsequently formed in this active layer. Such a concave profile is illustrated in Figure 7a. According to an embodiment illustrated in Figure 7b, the thermal oxidation is implemented under controlled conditions, so as to form the oxide layer with a greater thickness at the center of the semiconductor layer 12 than at its edges.Thus, this oxidation step consumes more material from the semiconductor layer 12 in the center than at the edge of the substrate, thus compensating, at least in part, for the thickness non-uniformity due to the implantation step of the semiconductor-on-insulator substrate manufacturing process.
[0062] In order to obtain such an oxide layer 120 with a thickness greater in the center than at its edges, the thermal oxidation can be carried out in two stages. The temperature is initially increased under an inert atmosphere, beyond a target thermal oxidation temperature, then the temperature is decreased to this target temperature. An oxidizing atmosphere is introduced during this second descent stage. This makes it possible to cool the substrate at its edges more quickly than at its center, so as to obtain a higher oxide growth rate in the center of the substrate than at its edges. This forms an oxide layer with a thickness profile more suited to improving the uniformity of the semiconductor layer 12 after deoxidation, than if we had formed an oxide layer with a simple rise to the target oxidation temperature.In the latter case, the thickness profile of the formed oxide layer will be similar to the initial profile of the thickness of the transferred semiconductor layer 12.
[0063] The semiconductor layer may, before implementing the proposed method, have an initial boron concentration greater than or equal to 10 15 at / cm 3 . Indeed, the P-doped substrates generally used in the manufacture of semiconductor substrates on insulators have a boron content of this order. Following the use of the process, the semiconductor layer is advantageously reduced to a boron content less than or equal to 5.10 14 at / cm 3 .
[0064] According to one embodiment, the removal of the oxide layer 120 is implemented by selective chemical etching, which is particularly suitable for the production of semiconductor substrates on insulators. This may in particular be etching with hydrofluoric acid. Alternatively, it may be dry reactive ion etching, which has both a good degree of anisotropy, making it possible to etch the substrate mainly in its thickness direction, and not significantly damage the substrate.
[0065] The present disclosure further relates to a method of manufacturing a semiconductor-on-insulator substrate, comprising:
[0066] - the formation of a weakening zone 11 by implantation of ionic species in a donor substrate 10 to delimit a semiconductor layer 12,
[0067] - the assembly of the donor substrate 10 with a support substrate 20 by means of an electrically insulating layer 21,
[0068] - detaching the donor substrate along the weakening zone 11 to transfer the semiconductor layer 12 onto the support substrate 20, so as to form the semiconductor-on-insulator type substrate 1.
[0069] - the implementation of the boron concentration reduction process described above.
[0070] One or more rapid thermal treatment (RTA) steps may be provided before implementing the boron concentration reduction process, so as to smooth the surface of the semiconductor layer 12.
[0071] Figure 8 shows boron concentration versus depth curves in the semiconductor-on-insulator substrate, respectively, following a standard fabrication process including rapid smoothing heat treatment (I), a fabrication process based on a boron-depleted donor substrate and the use of a substrate protection ring tool during rapid smoothing heat treatment designed to minimize boron contamination (II), and a process carried out under the same conditions as process (II) followed by the proposed boron concentration reduction process (III). It can be seen that the proposed fabrication process significantly reduces the boron content of the top layer of the resulting semiconductor substrate, with the top semiconductor layer corresponding to depths below 0.5 micrometers.In particular, the reduction in boron content obtained is particularly significant beyond approximately 0.1 micrometer thickness (the peak located between 0 and 0.04 pm depth is a measurement artifact). On the other hand, a peak in boron content is observed around 0.5 pm depth, which corresponds to the depth of the electrically insulating layer.
[0072] Finally, the present disclosure also relates to a method for manufacturing a photonic device, comprising the manufacturing of a semiconductor-on-insulator type substrate according to the method described above and the formation of a passive photonic component in the semiconductor layer 12. The passive photonic component thus obtained will therefore have a reduced boron concentration. It may be, for example, but not limited to, a waveguide, a modulator or a multiplexer.
Claims
Claims 1. Method for reducing the boron concentration of a semiconductor layer (12) of a semiconductor-on-insulator substrate (1), comprising: - at least one heat treatment cycle, each cycle comprising a thermal oxidation of said semiconductor layer (12) so as to form an oxide layer (120) on the semiconductor layer (12), in which, by segregation of the boron, boron atoms of the semiconductor layer (12) diffuse into the oxide layer (120) so as to create a boron concentration deficit in the semiconductor layer (12) at the interface with the oxide layer (120), and - a removal of the oxide layer (120), in which the thermal oxidation comprises a rise in temperature under an inert atmosphere above a target thermal oxidation temperature followed by a fall in temperature to said target thermal oxidation temperature so as to form a temperature gradient in the substrate to generate a rate of formation of the oxide layer (120) higher at the center of the semiconductor layer than at the edge.
2. Method according to the preceding claim, in which said at least one heat treatment cycle comprises, after thermal oxidation, annealing under an inert atmosphere for a duration suitable for standardizing the boron concentration in the semiconductor layer (12) and / or increasing the diffusion of boron atoms towards the sacrificial oxide (120) / semiconductor layer (12) interface.
3. Method according to claim 2, in which the annealing is carried out at a temperature between 800°C and 1200°C.
4. Method according to one of claims 1 to 3, in which the thermal oxidation is carried out at a temperature between 800 and 1200°C under an oxidizing atmosphere.
5. Method according to one of claims 1 to 4, in which the semiconductor layer (12) has a thickness of between 0.01 and 1 μm.
6. Method according to one of claims 2 to 5, in which, in each treatment cycle, the thermal oxidation and the annealing are carried out in the same furnace.
7. Method according to one of claims 1 to 6, comprising at least a first and a second treatment cycle.
8. Method according to claim 7, comprising, between the first and second treatment cycles, a removal of the oxide layer (120) formed during the first heat treatment cycle.
9. The method of claim 7, wherein the second treatment cycle directly follows the first treatment cycle, the oxide layer (120) formed during the first and second treatment cycles being removed after the second treatment.
10. Method according to one of claims 1 to 9, in which the semiconductor layer (12) has an initial boron concentration greater than or equal to 10 15 at / cm 3 .
11. Method according to claim 10, in which the semiconductor layer (12) has, after removal of the oxide layer (120), a final boron content less than or equal to 5.10 14 at / cm 3 .
12. Method according to one of claims 1 to 11, in which the removal of the oxide layer (120) is implemented by selective chemical etching.
13. Method for manufacturing a semiconductor-on-insulator type substrate (1), comprising: - the formation of a weakening zone (11) by implantation of ionic species in a donor substrate (10) to delimit a semi-conductor layer (12), - assembling the donor substrate (10) with a support substrate (20) via an electrically insulating layer (21), - detaching the donor substrate (10) along the weakening zone (11) to transfer the semiconductor layer (12) onto the support substrate (20), so as to form the semiconductor-on-insulator type substrate (1), - implementing the method for reducing the boron concentration of the semiconductor layer (12) according to one of claims 1 to 12.
14. Method according to claim 13, comprising, after the transfer of the semiconductor layer (12) onto the support substrate (20), at least one treatment rapid thermal smoothing of the surface of said semiconductor layer (12), each rapid thermal treatment being carried out before implementing the method of reducing the boron concentration of the semiconductor layer (12).
15. A method of manufacturing a photonic device, comprising manufacturing a semiconductor-on-insulator substrate according to the method of claim 13 or claim 14, and forming a passive photonic component in the semiconductor layer (12) having a reduced boron concentration.