Process for double layer transfer
Patent Information
- Authority / Receiving Office
- EP · EP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-17
- Publication Date
- 2026-04-01
AI Technical Summary
Existing remote epitaxy methods for producing thin semiconductor layers face issues such as contamination, degradation, and cracking due to the use of metallic stress layers and non-uniform stresses during detachment, which affect the quality and cost of the process.
A double layer transfer process involving a heterostructure with a two-dimensional material interlayer, a rigid substrate with a weakening plane formed by ion implantation, and a targeted bonding and separation process to transfer the epitaxial layer without metallic stress layers, ensuring integrity and avoiding cracking.
This method enables the transfer of semiconductor layers without cracking or degradation, reducing process costs and improving yield by eliminating the need for metallic stress layers and ensuring uniform stress application, thus preserving the quality of the epitaxial layer.
Smart Images
Figure EP2024063679_28112024_PF_FP_ABST
Abstract
Description
[0001] DESCRIPTION
[0002] TITLE: Double layer transfer process
[0003] TECHNICAL FIELD
[0004] The field of the invention is that of methods for manufacturing a stacked structure comprising a thin layer of semiconductor material adhering to a target substrate. The invention relates more particularly to methods which implement a 2D material-based layer transfer technique.
[0005] PRIOR ART
[0006] Remote epitaxy is a method for producing thin films of semiconductor material discussed for example in Kim, H., Chang, C.S., Lee, S. et al. Remote epitaxy. Nat Rev Methods Primers 2, 40 (2022), https: / / doi.org / 10.1038 / s43586-022-00122-w.
[0007] This method involves interposing, between a growth substrate and the semiconductor layer being grown epitaxially, a layer of two-dimensional material (2D material also called Van der Waals material) which has strong in-plane atomic bonds but weak out-of-plane Van der Waals interactions. This layer of 2D material behaves like a transparent pseudo-substrate: the crystalline structure of the epitaxial layer copies that of the growth substrate, as if the intermediate layer of 2D material did not exist. The advantage is that the epitaxial layer can be easily separated from the growth substrate due to the absence of covalent bonds between the growth substrate and the epitaxial layer. The substrate, which can be expensive, can thus be reused.
[0008] As explained in the article cited above, the separation at the level of the 2D material layer involves first depositing a stressor layer made of nickel on the epitaxial layer and then applying a thermally released adhesive film to the stressor layer. The stack consisting of the adhesive film, the nickel layer and the epitaxial layer can then be exfoliated from the growth substrate following a detachment caused at the level of the 2D material layer by the input of mechanical energy.
[0009] As reported in the article cited above, this sequence of steps has a number of drawbacks.
[0010] First, the deposition of a nickel layer induces contamination both at the level of the epitaxial layer that is in contact with the nickel layer and at the level of the growth substrate that is loaded into a metal deposition equipment. Additional protective layers can be deposited to limit contacts and interactions, and then removed. Thus, several additional steps must be implemented to solve this contamination problem, which affects the cost of the process, not to mention the impact of these additional steps on the quality of the epitaxial layer and its exfoliation.
[0011] Then, the deposition of the nickel layer is generally carried out by sputtering. The epitaxial layer is therefore subjected to ion bombardment which degrades its quality over a few nanometers or even a few tens of nanometers of thickness. Consequently, particularly when the epitaxial layer is thin and damage of a few tens of nanometers is then to be avoided, deposition of a protective layer may prove necessary to protect the epitaxial layer. Again, additional steps must be implemented, which impacts both the cost and the yield of the process.
[0012] In addition, stresses are applied to induce detachment at the 2D material layer. These stresses must be uniform throughout the detachment process and across the interface formed by the 2D material layer because small variations can result in fracture of the epitaxial layer in the case where these stresses exceed the mechanical failure limit of the epitaxial layer. The nickel layer helps, due to its thickness, to avoid such fracture during detachment but is not a panacea.
[0013] Finally, during this detachment, the epitaxial layer is subjected to bending which is likely to cause cracks. The subsequent handling of this layer for transfer to a target substrate is also carried out using the adhesive film which is flexible. This also results in a risk of cracks or fracture of the epitaxial layer.
[0014] STATEMENT OF THE INVENTION
[0015] The invention aims to propose a remote epitaxy technique which can overcome the aforementioned drawbacks and thus preserve the integrity of the epitaxial layer.
[0016] To this end, the invention proposes a double layer transfer method, comprising the steps of:
[0017] • providing a heterostructure comprising a growth substrate, an interlayer of two-dimensional material on the growth substrate and at least one epitaxial layer of semiconductor material formed on the interlayer;
[0018] • provision of a rigid substrate comprising a weakening plane formed by ion implantation through a first face of the rigid substrate, the weakening plane separating a thin layer from a solid portion of the rigid substrate;
[0019] • production of a first assembly by bonding the rigid substrate with the heterostructure, the first face of the rigid substrate and the at least one epitaxial layer of the heterostructure being at the bonding interface of the rigid substrate and the heterostructure;
[0020] • separation of the first assembly at the level of the intermediate layer of two-dimensional material so as to obtain a second assembly resulting from the transfer of the at least one epitaxial layer of the heterostructure to the rigid substrate;
[0021] • producing a third assembly by bonding the second assembly with a target substrate, the at least one epitaxial layer being at the bonding interface of the second assembly with the target substrate;
[0022] • separation of the third assembly along the weakening plane of the rigid substrate so as to obtain a fourth assembly resulting from the transfer of the at least one epitaxial layer and the thin layer of the third assembly to the target substrate.
[0023] Some preferred but non-limiting aspects of this method are as follows: the bonding of the rigid substrate with the heterostructure for the production of the first assembly is a bonding with surface activation; the bonding of the rigid substrate with the heterostructure for the production of the first assembly is a bonding by atomic diffusion; the separation of the first assembly at the intermediate layer of two-dimensional material comprises an input of mechanical and / or thermal energy; the input of thermal energy is carried out at a temperature lower than a separation temperature of the rigid substrate at the embrittlement plane; the growth substrate and the rigid substrate have coefficients of thermal expansion which differ by at least 0.3 ppm / K;the second assembly is subjected to one or more technological steps of manufacturing semiconductor structures, each carried out at a temperature lower than a separation temperature of the rigid substrate at the embrittlement plane; it further comprises the removal of the thin layer of the fourth assembly; it further comprises after the removal of the thin layer, an epitaxy of the semiconductor material on the at least one epitaxial layer; the at least one epitaxial layer of semiconductor material comprises a layer of polar material, for example a GaN layer; the target substrate is a polycrystalline SiC substrate, a polycrystalline AlN substrate, a high electrical resistivity Si substrate or a substrate carrying a semi-insulating SiC layer; the growth substrate is a (111) orientation silicon substrate. BRIEF DESCRIPTION OF THE DRAWINGS;
[0024] Other aspects, aims, advantages and characteristics of the invention will appear better on reading the following detailed description of preferred embodiments thereof, given by way of non-limiting example, and made with reference to the appended drawings in which Figures 1 to 12 represent a possible embodiment of a method according to the invention.
[0025] DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS
[0026] A dual layer transfer method is provided that combines the transfer of a semiconductor layer from a growth substrate to a rigid substrate using the two-dimensional (2D) material-based transfer technique and then the transfer of the semiconductor layer from the rigid substrate to a target substrate using the Smart Cut™ transfer technique.
[0027] In this double transfer, the use of the rigid substrate allows the first transfer to be carried out by detachment at the level of the two-dimensional material without causing cracks in the semiconductor layer and without requiring a metal stress layer. This use also allows the manipulation of the semiconductor layer in order to transfer it to the target substrate without cracks or fractures in the semiconductor layer.
[0028] The method according to the invention comprises a step of providing a heterostructure comprising a growth substrate, an interlayer of two-dimensional material on the growth substrate and one (or more) epitaxial layer(s) of semiconductor material formed on the interlayer.
[0029] This provision may be the consequence of the manufacture of the heterostructure within the framework of a possible embodiment of the method according to the invention.
[0030] With reference to Figure 1, in this embodiment the method comprises providing the growth substrate 1, which is for example a Si substrate (of orientation (111) in particular), sapphire or GaN.
[0031] With reference to Figure 2, in this embodiment the method then comprises the formation of the interlayer of two-dimensional material 2 on the growth substrate 1. This formation can be carried out after planarization of the surface of the growth substrate, for example by means of chemical-mechanical polishing. Cleaning of the surface of the growth substrate can also be carried out. This formation can comprise the deposition of the two-dimensional material 2 on the growth substrate 1. In a non-exhaustive manner, this deposition can be carried out by means of molecular beam epitaxy (MBE), chemical vapor deposition (CVD) or atomic layer epitaxy (ALD).
[0032] The two-dimensional material can be hexagonal boron nitride h-BN, graphene or more generally any 2D “Van der Waals” material allowing remote epitaxy. The two-dimensional material layer is thus made up of monoatomic sheets having weak interactions between them and whose number is limited to allow remote epitaxy of the semiconductor material layer. In one possible embodiment, the number of sheets can be less than three.
[0033] Referring to Figure 3, in this embodiment the method further comprises growing the epitaxial layer of semiconductor material 3 on the interlayer 2. This growth is generally carried out in two main steps: nucleation on the layer of two-dimensional material and standard growth of the epitaxial layer of semiconductor material. These two steps can be carried out at different growth temperatures, with nucleation being able to be carried out at a lower temperature than standard growth.
[0034] The thickness of the epitaxial layer 3 is typically between 100 nm and a few microns, preferably between 500 nm and 2 microns, particularly in the case of a GaN epitaxial layer. The epitaxial layer of semiconductor material may be a layer of polar material, for example a layer of GaN, AIN or SiC. Taking the case of a GaN or AIN layer, it has, by its polar character, the characteristic of having, on one face, a surface consisting mainly of nitrogen atoms (so-called N-type surface) and, on the other face, a surface consisting mainly of gallium atoms (so-called Ga-type surface) or aluminum atoms (Al-type surface). In this case, the Ga-type or Al-type surface is found at the interface with the two-dimensional material layer 2 while the N-type surface forms a free surface.The same is true for a SiC layer where we find a Si-type surface at the interface with the two-dimensional material layer 2 while a C-type surface forms a free surface.
[0035] In one possible embodiment, the method comprises the growth of several epitaxial layers forming a stack of crystalline layers. In the following, the example of a single epitaxial layer will be taken, it being understood that the invention is not limited to this scenario.
[0036] The method according to the invention further comprises a step of providing a rigid substrate which comprises a weakening plane formed by ion implantation through a first face of the rigid substrate. This weakening plane separates a thin layer from a solid part of the rigid substrate.
[0037] This provision may be the consequence of the preparation of the rigid substrate within the framework of a possible embodiment of the method according to the invention.
[0038] Referring to Figure 4, in this embodiment the method comprises providing the rigid substrate 4, preferably an inexpensive substrate, for example a silicon substrate, especially a silicon substrate of (111) crystal orientation.
[0039] Then with reference to Figure 5, in this embodiment the method comprises the implantation of ionic species through a face F of the rigid substrate 4 so as to form there a weakening plane 5 separating a thin layer 6 from a massive part of the rigid substrate. The implanted species typically comprise hydrogen and / or helium. A person skilled in the art is able to define the required implantation energy and dose.
[0040] Once the heterostructure and the implanted rigid substrate have been provided, the method according to the invention comprises, with reference to Figure 6, producing a first assembly by bonding the rigid substrate 4 with the heterostructure. This bonding is carried out so that the first face of the rigid substrate 4 and the epitaxial layer 3 of the heterostructure are at the bonding interface of the rigid substrate and the heterostructure. The bonding is carried out so as to obtain a binding energy at the bonding interface of the rigid substrate and the heterostructure greater than the binding energy of the Van der Waals interface between the two-dimensional material and the epitaxial layer.
[0041] Bonding can be carried out at room temperature. In one possible embodiment, it is carried out under reduced pressure. A heat treatment to strengthen the bonding can also be implemented, at a temperature lower than that of a heat treatment which would lead to the separation of the rigid substrate at the level of the weakening plane.
[0042] In a preferred embodiment making it possible to obtain a highly resistant bonding interface, the bonding of the rigid substrate with the heterostructure for the production of the first assembly is a bonding with surface activation (bonding called SAB for “Surface Activated Bonding”), a bonding by atomic diffusion (bonding called ADP for “Atomic Diffusion Bonding”) or even a hydrophilic bonding accompanied by annealing to strengthen the bonding.
[0043] With reference to Figure 7, the method then comprises the separation of the first assembly at the level of the interlayer of two-dimensional material 2 so as to obtain, as shown in Figure 8, a second assembly resulting from the transfer of the epitaxial layer 3 of the heterostructure to the rigid substrate 4.
[0044] This separation of the epitaxial layer 3 from the growth substrate 1 can be carried out by means of an input of mechanical and / or thermal energy at the level of the two-dimensional material layer 2. When carried out by means of an input of thermal energy in conjunction or not with an input of mechanical energy, the separation exploits a stress induced during heating or subsequent cooling due to a difference in thermal expansion coefficient between the growth substrate 1 and the rigid substrate 4. To do this, the growth substrate and the rigid substrate preferably have thermal expansion coefficients which differ by at least 0.3 ppm / K. The input of thermal energy is carried out at a temperature lower than that of a heat treatment which would lead to the separation of the rigid substrate at the level of the embrittlement plane.As an example of implementation, it is possible to use a growth substrate 1 in GaN (which has a thermal expansion coefficient of 5.6 ppm / K) and a rigid substrate 4 in Si (which has a thermal expansion coefficient of 2.6 ppm / K), carry out the first assembly by bonding at room temperature and then implement heating to induce a compressive stress in the GaN substrate.
[0045] It will be noted that it is advantageous to carry out the implantation in the rigid substrate before the bonding and detachment illustrated in Figures 6 and 7. This in fact makes it possible to preserve the integrity of the epitaxial layer 3 compared to a solution which would consist of carrying out the implantation in the rigid substrate after the detachment of Figure 7 in the epitaxial layer 3 and through it.
[0046] In a possible embodiment, after the detachment of Figure 7, the second assembly illustrated by Figure 8, and more particularly the epitaxial layer 3 transferred onto the rigid substrate 4, is subjected to one or more technological steps for manufacturing semiconductor structures. These steps may in particular consist of cleaning, polishing, deposition or etching. Each of these steps is carried out at a temperature lower than that of a heat treatment which would lead to the separation of the rigid substrate at the level of the embrittlement plane.
[0047] Following the obtaining of the second assembly illustrated by figure 8, the method comprises, with reference to figure 9, the production of a third assembly by bonding the second assembly with a target substrate 7, the epitaxial layer 3 being at the bonding interface of the second assembly with the target substrate. This bonding may be a hydrophilic bonding, possibly accompanied by an annealing to strengthen the bonding.
[0048] Then with reference to Figure 10, the method comprises the separation of the third assembly along the weakening plane 5 of the rigid substrate 4. As shown in Figure 11, this separation leads to obtaining a fourth assembly resulting from the transfer of the epitaxial layer 3 and the thin layer 6 of the third assembly to the target substrate 7. This separation is typically obtained by implementing a heat separation treatment at a temperature which can be between 200°C and 600°C for silicon.
[0049] It should be noted that the method according to the invention makes it possible to recycle the growth substrate and the rigid substrate for reuse in an identical method or for another purpose. As shown in Figure 12, the method can then comprise the removal of the thin layer 6 from the fourth assembly, for example by etching, so as to retain only the epitaxial layer 3 on the target substrate 7.
[0050] After removal of the thin layer 6, the method may also comprise a resumption of epitaxy on the epitaxial layer. It will be noted that when the epitaxial layer is a layer of polar material, the double transfer carried out by the invention advantageously makes it possible to expose the surface (for example of the Ga, Al or Si type) of the epitaxial layer allowing such a resumption of epitaxy of the semiconductor material on the epitaxial layer.
[0051] The target substrate 7 may be a polycrystalline SiC substrate or a polycrystalline AlN substrate. Or, the target substrate 7 may be a Si substrate with high electrical resistivity. Or, the target substrate may be a substrate carrying a semi-insulating SiC layer, for example, a Si substrate, possibly with high electrical resistivity, carrying such a semi-insulating SiC layer. The epitaxial layer 3 transferred onto a target substrate according to these examples may be a GaN layer. By semi-insulating material, we mean a material typically having an electrical resistivity greater than or equal to 10 5 Q / cm. A material with high electrical resistivity is a material typically having an electrical resistivity greater than or equal to 100 Q / cm.
Claims
CLAIMS 1. Double layer transfer method, comprising the steps of: • providing a heterostructure comprising a growth substrate (1), an interlayer of two-dimensional material (2) on the growth substrate and at least one epitaxial layer of semiconductor material (3) formed on the interlayer; • provision of a rigid substrate (4) comprising a weakening plane (5) formed by ion implantation through a first face (F) of the rigid substrate, the weakening plane separating a thin layer (6) from a solid part of the rigid substrate; • production of a first assembly by bonding the rigid substrate with the heterostructure, the first face (F) of the rigid substrate and the at least one epitaxial layer (3) of the heterostructure being at the bonding interface of the rigid substrate and the heterostructure; • separation of the first assembly at the level of the intermediate layer of two-dimensional material (2) so as to obtain a second assembly resulting from the transfer of the at least one epitaxial layer (3) of the heterostructure to the rigid substrate (4); • producing a third assembly by bonding the second assembly with a target substrate (7), the at least one epitaxial layer (3) being at the bonding interface of the second assembly with the target substrate; • separation of the third assembly along the weakening plane (5) of the rigid substrate (4) so as to obtain a fourth assembly resulting from the transfer of the at least one epitaxial layer (3) and the thin layer (6) of the third assembly to the target substrate (7).
2. Method according to claim 1, in which the bonding of the rigid substrate with the heterostructure for producing the first assembly is a bonding with surface activation.
3. Method according to claim 1, in which the bonding of the rigid substrate with the heterostructure for producing the first assembly is bonding by atomic diffusion.
4. Method according to one of claims 1 to 3, in which the separation of the first assembly at the level of the intermediate layer of two-dimensional material comprises an input of mechanical and / or thermal energy.
5. Method according to claim 4, in which the supply of thermal energy is carried out at a temperature lower than a separation temperature of the rigid substrate at the level of the embrittlement plane.
6. The method of claim 5, wherein the growth substrate and the rigid substrate have coefficients of thermal expansion that differ by at least 0.3 ppm / K.
7. Method according to one of claims 1 to 6, in which the second assembly is subjected to one or more technological steps of manufacturing semiconductor structures, each carried out at a temperature lower than a separation temperature of the rigid substrate at the level of the weakening plane.
8. Method according to one of claims 1 to 7, further comprising removing the thin layer (6) from the fourth assembly.
9. The method of claim 8, further comprising after removal of the thin layer, epitaxy of the semiconductor material on the at least one epitaxial layer.
10. Method according to one of claims 1 to 9, in which the at least one epitaxial layer of semiconductor material comprises a layer of polar material, for example a layer of GaN.
11. Method according to one of claims 1 to 10, wherein the target substrate is a polycrystalline SiC substrate, a polycrystalline AIN substrate, a high electrical resistivity Si substrate or a substrate carrying a semi-insulating SiC layer.
12. Method according to one of claims 1 to 11, in which the growth substrate is a silicon substrate of orientation (111).