Process for fabricating a device based on crystalline silicon carbide (SIC)

Abstract

The invention relates to a process for fabricating a device (1) based on crystalline SiC, and preferably monocrystalline SiC, the process combining: - using a buffer layer (3) that is specific, because of its refractory and inert aspects with respect to temperature and because its crystalline properties are close to those of SiC, to grow the device (1), and - performing laser lift off on the device (1) via sacrifice of the buffer layer (3), the latter having a thickness allowing functional absorption of laser lift-off radiation while remaining thin enough not to exhibit dislocations liable to propagate into the device (1) during its growth. Thermal budget is decreased, with respect to known methods, and the integrity of the device (1) is better preserved, at least relative to what would be observed if a thermal anneal, for example at a temperature above 400°C, were applied to lift off the device (1).

Description

[0001] "Method for manufacturing a crystalline silicon carbide (SiC) device"

[0002] TECHNICAL FIELD OF THE INVENTION

[0003] The present invention relates to the field of manufacturing substrates and other devices each comprising a crystalline layer, preferably monocrystalline, of silicon carbide (hereinafter "SiC"). Typically such substrates and devices (hereinafter referred to as "SiC substrates" and "SiC devices", respectively) form or are intended to form all or part of power components or devices integrating a transistor based on CMOS technology (for "Complementary Metal Oxide Semiconductor" according to English terminology).

[0004] STATE OF THE ART

[0005] SiC is a semiconductor material commonly used in industry, particularly for manufacturing power electronic devices.

[0006] A so-called initial SiC substrate is the most suitable for the growth, particularly epitaxial, of a monocrystalline layer based on SiC.

[0007] It would be possible to use other initial substrates, but this would pose various problems, including: a. The difficulty in ensuring epitaxial growth of SiC under a polytype useful for the fabricated SiC device (typically, the 4H polytype), b. The degradation of the quality of the crystalline structure of the grown SiC, in particular due to its difference in lattice parameters with the chosen initial substrate, and c. The presence of stresses generated in the chosen initial substrate and the SiC during and following its growth.

[0008] For these different reasons, the processes for growing a monocrystalline layer of SiC generally use initial substrates made of monocrystalline SiC; however, the cost of these initial substrates is high, as is the cost of existing SiC devices resulting from such processes.

[0009] In order to reduce the production costs associated with the manufacturing of SiC-based substrates and other devices, the manufacturing of SiCOI (SiC On Insulator) substrates using a technology known as SmartSiC™ has been developed by Soitec®. According to this technology, SiCOI substrates are made from a thin layer of SiC detached from an initial monocrystalline SiC substrate using a 'crystal ion cleavage' process (better known in English as 'Crystal Ion Slicing').

[0010] However, the SmartSiC™ process requires annealing to achieve the detachment / cleavage of the SiC monocrystalline layer and this prevents certain integrations, in particular by hybridization of said SiCOI type substrates with a device integrating a transistor based on CMOS technology (hereinafter referred to as a “CMOS device”). It is also impossible to perform SiC epitaxy on a substrate in which ion implantation according to the SmartSiC™ process has been carried out because such epitaxy assumes a thermal balance that would lead to the detachment of the epitaxial layer during its growth. One could consider performing the ion implantation provided by the SmartSiC™ process through already green SiC-based layers, therefore after growth, but this would certainly damage the properties of a SiC device through which the implantation would take place.It is probably for these reasons that the SmartSiC™ process is only used to produce so-called seed layers (or templates) intended for SiC growth. In addition, it is impossible to detach SiCOI substrates produced using the SmartSiC™ process, while transferring them to temperature-sensitive substrates or devices, such as a CMOS (Complementary Metal Oxide Semiconductor) substrate or device, because the detachment of SiCOI substrates at the ion implantation zone involves high-temperature annealing, typically at a temperature substantially equal to 1100°C.Finally, the cost of SiCOI substrates obtained by implementing the SmartSiC™ process, even if it is lower than the cost of SiC substrates obtained by other methods (for example, by grinding), is still not negligible.

[0011] It would therefore be desirable to propose a method for manufacturing substrates and other devices based on crystalline SiC, preferably monocrystalline, the implementation of which would be of reduced cost, in particular from an initial substrate in crystalline SiC, preferably monocrystalline, and / or compared to the SmartSiC™ method.

[0012] SUMMARY OF THE INVENTION

[0013] To achieve at least one of these objectives, according to a first aspect, a method is provided for manufacturing a device comprising at least one so-called layer of interest based on, or even consisting of, crystalline, preferably monocrystalline, silicon carbide (SiC), the manufacturing method comprising the following steps: a. Providing a so-called initial substrate based on, or even consisting of, crystalline, preferably monocrystalline SiC, then b. Growing by epitaxy, on the initial substrate, a so-called buffer layer based on a material having, in its crystalline, preferably monocrystalline, form: i. a lattice parameter equal, to within plus or minus 6%, preferably to within plus or minus 2%, to a lattice parameter of the crystalline, preferably monocrystalline, SiC from which the initial substrate is made, and ii.a melting temperature strictly greater than 1600°C, preferably greater than 2000°C, and even more preferably greater than or substantially equal to 2500°C, and iii. until the buffer layer has a thickness strictly greater than 2 nm, preferably greater than or equal to 4 nm, and strictly less than twice, preferably substantially equal to or less than, a critical thickness Ec beyond which defects or dislocations appear in the raw buffer layer, c. Growing by epitaxy, on the buffer layer, at least the layer of interest, to obtain a stack successively comprising the initial substrate, the buffer layer and at least the layer of interest, the stack extending from a rear face carried by the initial substrate to a front face opposite the rear face, and d. Providing a so-called receiver substrate, then e. Transferring the stack by its front face onto the receiver substrate, then f.Insolating the stack, preferably via its rear face, with laser radiation having a wavelength absorbed more by the buffer layer than by the crystalline SiC, preferably monocrystalline, from which the initial substrate is made, the laser radiation being configured to alter the buffer layer so as to detach the initial substrate from the rest of the stack by at least partially sacrificing the buffer layer, and thus obtaining a device comprising at least the layer of interest transferred onto the receiving substrate.

[0014] The manufacturing method as introduced above thus provides for combining: a. the use, as seed layer of SiC in crystalline form, preferably monocrystalline, of a specific buffer layer, to form the device of interest (the one which comprises at least the layer of interest based on, or even made of, crystalline silicon carbide (SiC), preferably monocrystalline, and b. the laser lift-off of the device of interest by sacrificing at least part of the buffer layer.

[0015] The thermal balance is reduced, compared to known methods, so that the integrity of the device of interest, as well as, where appropriate, that of the initial substrate, are relatively unaltered, at least relative to what would be observed if thermal annealing, for example at a temperature above 400°C, had to be applied to detach the device of interest.

[0016] It should be noted that it is clear from the above that the method as introduced above is preferably free from a thermal annealing step, in particular for detaching said device.

[0017] According to a second of its aspects, the invention relates to a use of the device manufactured by implementing the method as introduced above and comprising the growth, by epitaxy, of crystalline SiC, preferably monocrystalline, on the layer of interest of the device, the layer of interest consisting of a thin layer. In this case, the manufacturing method makes it possible to manufacture a device consisting of a thin layer of crystalline SiC, preferably monocrystalline, usable as a seed layer of a substrate based on crystalline SiC, preferably monocrystalline.

[0018] According to a third of its aspects, the invention relates to a use of the device manufactured by implementing the method as introduced above to obtain an epitaxial device based on SiC peeled off from the receiving substrate.

[0019] According to a fourth of its aspects, the invention relates to a use of the device manufactured by implementing the method as introduced above for assembling the manufactured device with a CMOS type device as a receiving substrate, where appropriate by electrically interconnecting the device and the CMOS type device with each other by respective contact recovery zones of the device and the CMOS type device, the CMOS type device being for example silicon-based.

[0020] BRIEF DESCRIPTION OF THE FIGURES

[0021] The aims, objects, as well as the characteristics and advantages of the invention will emerge more clearly from the detailed description of one mode of implementation thereof and of some variants which are illustrated by the following accompanying drawings in which:

[0022] Figures 1A to 1E represent different steps of an embodiment of the manufacturing method according to the first aspect of the invention.

[0023] Figures 2A and 2B represent different steps of a first variant of the implementation mode which is illustrated in Figures 1A to 1E.

[0024] Figures 3A and 3B represent different steps of a second variant of the implementation mode which is illustrated in Figures 1A to 1E.

[0025] Figures 4A and 4B represent different steps of a third variant of the implementation mode which is illustrated in Figures 1A to 1E.

[0026] Figure 5 represents a flowchart of another embodiment of the manufacturing method according to the first aspect of the invention relative to that illustrated in Figures 1A to 1E.

[0027] The drawings are given as examples and are not limiting of the invention. They constitute schematic representations of principle intended to facilitate the understanding of the invention and are not necessarily to the scale of practical applications. In particular, the relative thicknesses of the different layers illustrated in the drawings are not representative of reality.

[0028] DETAILED DESCRIPTION OF THE INVENTION

[0029] Before commencing a detailed review of embodiments of the invention, optional features which may optionally be used in combination or alternatively are set out below:

[0030] According to one example, the manufacturing method may further comprise, following the detachment of the initial substrate from the rest of the stack, a step consisting of recovering the initial substrate, and if necessary providing it again. The initial substrate may thus be reused, if necessary after at least one treatment, for example chosen from a chemical treatment and chemical mechanical polishing (or CMP for "chemical mechanical polishing" according to the English terminology). The possibility of recycling the initial substrate makes it possible to greatly reduce the costs associated with the manufacturing of a device based on crystalline SiC, preferably monocrystalline.

[0031] According to one example, the material from which the buffer layer is made may be chosen from: a. TiN, VN, ZrN, TaN, NbN, and HfN, or even MoN, WN and CrN, and b. TiC, VC, ZrC, TaC, NbC, and HfC, or even MoC, WC and CrC, c. Or a mixture of at least two of these chemical compounds.

[0032] According to an alternative example to the previous one, the material from which the buffer layer can be made is chosen from NbN, HfN and TiN, or a mixture of at least two of these chemical compounds.

[0033] According to an alternative example to the two previous ones, the material from which the buffer layer can be made is niobium nitride (NbN).

[0034] According to one example, the buffer layer can be grown by implementing at least one of: reactive sputtering, pulsed laser ablation (PLD), molecular beam epitaxy (MBE) or chemical vapor deposition (CVD).

[0035] According to one example, the thickness of the buffer layer may be between 1.5 and 15 nm, preferably between 3 and 12 nm, and will for example be substantially equal to 4 nm or 10 nm.

[0036] According to one example, the critical thickness of the buffer layer may be between 4 nm and 100 nm, preferably between 10 nm and 20 nm, and will typically be substantially equal to 15 nm.

[0037] According to one example, the step of epitaxial growth of said at least one layer of interest may comprise the implementation of chemical vapor deposition (or CVD).

[0038] According to one example, the device may consist of said layer of interest and form a germination layer (or “seed layer” in English).

[0039] According to an alternative example to the previous one, the step of epitaxial growth of said at least one layer of interest may comprise, in addition to the growth of said layer, the growth of other layers to form, together with said layer of interest, an epitaxial device based on SiC, comprising for example at least one of a power component and a radiofrequency component, such as a diode or a transistor, in particular a field effect transistor. According to this example, the growth of the different layers of the device may be carried out so that at least one of these layers or at least one zone of at least one of these layers is doped, of N type or of P type, where appropriate with different atoms from one layer to another or from one zone to another.Still according to this example, each layer may constitute all or part of a SiC-based component; in particular, it may not be homogeneous and may comprise, in addition to semiconductor elements, conductive elements, such as conductive tracks, forming for example a redistribution layer (or RDL for “Redistribution Layer” in English) and dielectric elements, for example based on an oxide of a semiconductor material, for example silicon oxide or an epoxy resin.

[0040] According to one example, the transfer of the stack by its front face onto the receiving substrate may comprise, or consist of, a step of bonding the stack by its front face onto the receiving substrate, the bonding step preferably being carried out by implementing a technique allowing the bonding to withstand conditions, in particular temperature, intended to be encountered during subsequent steps of manufacturing and / or processing and / or assembly of the device. The bonding of the stack, by its front face onto the receiving substrate, may then be carried out by means of at least one bonding layer.In addition or as an alternative, the SiC-based epitaxial device and the receiving substrate each comprising contact recovery zones flush with the face by which it is opposite the other, the step of bonding the stack by its front face on the receiving substrate may comprise at least one electrical contacting of a contact recovery zone of the SiC-based epitaxial device with a recovery zone of the receiving substrate, the bonding being for example hybrid.

[0041] According to one example, the receiving substrate may be chosen from: a. A polycrystalline SiC-based substrate, b. A substrate based on a material having a thermal expansion coefficient substantially equal to the thermal expansion coefficient of crystalline SiC, preferably monocrystalline, c. A substrate integrating a transistor, for example based on CMOS technology, d. A silicon-based substrate, e. A metal substrate, and f. Preferably, when the device is finalized before the insolation step, a substrate comprising a base plate, thermal grease and a heat sink.

[0042] According to one example, the material from which the buffer layer is formed may have an absorbance of at least 10%, preferably at least 20%, greater than an absorbance of a layer of crystalline SiC, preferably monocrystalline, of the same thickness as the buffer layer, for the chosen wavelength of the laser radiation and for the critical thickness Ec of the buffer layer.

[0043] For example, the wavelength of laser radiation can be in the visible or infrared range.

[0044] It is specified that, in the context of the present invention, the terms "on", "overcomes", "covers", "underlying", "facing" and their equivalents do not necessarily mean "in contact with". Thus, for example, the deposition of a first layer on a second layer does not necessarily mean that the two layers are in direct contact with each other, but means that the first layer at least partially covers the second layer by being either directly in contact with it, or by being separated from it by at least one other layer or at least one other element.

[0045] A layer can also be composed of several sub-layers of the same material or of different materials.

[0046] A layer based on a material A means a layer comprising this material A and possibly other materials.

[0047] A parameter that is "substantially equal to / greater than / less than" a given value means that this parameter is equal to / greater than / less than the given value, within plus or minus 20%, or even 10%, of this value. A parameter that is "substantially between" two given values ​​means that this parameter is at least equal to the smallest given value, within plus or minus 20%, or even 10%, of this value, and at most equal to the largest given value, within plus or minus 20%, or even 10%, of this value.

[0048] When the term "(mono)crystalline" is used, the fact of putting "mono" in parentheses indicates that, if the material thus qualified is preferably perfectly monocrystalline, its crystalline structure nevertheless includes, and relatively unavoidably, defects that the person skilled in the art will seek to reduce as much as possible, for a better quality result.

[0049] The term “critical thickness” of an epitaxially grown layer is understood to mean the thickness beyond which defects or dislocations appear in the green layer. This thickness can, for example, be determined as indicated in the article by Dai, Y., et al., entitled “Engineering of the Curie temperature of epitaxial Sr1-xBaxTiO3 films via strain” and published in 2016 in “Journal of Applied Physics”, vol. 120, p. 114101. The present invention is said to accommodate methods for measuring the critical thickness which would be more precise and / or which would come to be developed.

[0050] In the present description, a material is considered to be absorbent at a wavelength λ, when it absorbs at least 20% of light radiation of wavelength λ, preferably at least 50% and advantageously at least 70%. These absorption percentages are however given as an indication of one of the parameters to be taken into account to evaluate the capacity of a layer of a material to heat under laser exposure; other parameters are where appropriate to be considered such as the thickness of the layer (typically, when the thickness of the layer increases, its absorption also increases) or the power of the laser, which can influence in particular the absorption percentages indicated. A material can be considered to be transparent at a wavelength λ when it transmits at least 90% of light radiation of wavelength λ, preferably at least 95%.

[0051] Several embodiments of the invention implementing successive steps of the transfer method are described below. Unless explicitly stated, the terms "following" do not necessarily imply, even if this is generally preferred, that the steps follow one another immediately, intermediate steps being able to separate them.

[0052] Furthermore, the term "step" means the carrying out of a part of the process, and can designate a set of sub-steps.

[0053] Furthermore, the term "step" does not necessarily mean that the actions carried out during a step are simultaneous or immediately successive. Certain actions of a first step may in particular be followed by actions linked to a different step, and other actions of the first step may be repeated subsequently. Thus, the term "step" does not necessarily mean actions that are unitary and inseparable in time and in the sequence of phases of the process.

[0054] In the present patent application, the thickness of a layer is taken along a direction normal to the main plane of extension of the layer. The relative terms "on", "overlies", "under", "underlying", "intercalated" refer, unless otherwise stated, to positions taken along the direction normal to the main plane of extension of the layer.

[0055] The manufacturing method, according to an embodiment of the first aspect of the invention, is described below with reference to FIGS. 1 A to 1 E and 5. More particularly, it is a manufacturing method 100 of a device 1 comprising at least one layer 11 based on, or even made of, (mono)crystalline silicon carbide SiC.

[0056] The method 100 provides for the provision 110 of an initial substrate 2 based on, or even consisting of, (mono)crystalline SiC, and the provision 140 of a receiving substrate 5.

[0057] More particularly, the initial substrate 2 may consist of a wafer, or a part of such a wafer, made of (mono)crystalline silicon carbide SiC. This supply step 110 is therefore potentially consistent with the corresponding step of the SmartSiC™ process.

[0058] From the initial substrate 2, the method 100 comprises a step consisting of growing 120 by epitaxy and on the initial substrate 2, a specific buffer layer 3. More particularly, the buffer layer 3 is specific in that it is made from a material having, in its monocrystalline form: a. a lattice parameter equal, to within plus or minus 6%, preferably to within plus or minus 2%, to a lattice parameter of the (mono)crystalline SiC from which the initial substrate (2) is made, and b. a melting temperature strictly greater than 1600°C, preferably greater than 2000°C, and even more preferably greater than or substantially equal to 2500°C.

[0059] Thus, the material from which the buffer layer 3 is made gives the buffer layer 3: a. the ability to propagate the crystalline structure of (mono)crystalline SiC to a layer of interest 11 based on (mono)crystalline SiC, which, as we will see below, is intended to be grown 130 on the buffer layer 3, and b. refractory and inert aspects to significant temperature variations, to allow in particular the growth 130 by epitaxy of the layer of interest 11 based on (mono)crystalline SiC, without these variations inducing a change in the nature or nominal composition of the buffer layer 3.

[0060] The buffer layer 3 is more particularly raw 120 until it has a thickness strictly greater than 1.5 nm, preferably greater than or equal to 3 nm, and strictly less than twice, preferably substantially equal to or less than, a critical thickness Ec beyond which defects or dislocations appear in the raw buffer layer 3 120. In other words, if the thickness of the buffer layer remains less than its critical thickness, which depends mainly on its nature (composition) and its crystalline structure, it is ensured that the structure of the buffer layer 3 is consistent with the structure of the initial substrate 2. The buffer layer 3 can for example be raw 120 until it has a thickness substantially equal to 4 nm.

[0061] The thickness of the buffer layer 3 is thus bounded lower and upper. Typically, the thickness of the buffer layer 3 will be substantially between 1.5 nm and 15 nm, preferably between 3 and 12 nm, and will for example be substantially equal to 4 nm or 10 nm, and / or the buffer layer 3 will be made from a material for which the critical thickness Ec of the buffer layer 3 will be between 4 nm and 100 nm, preferably between 10 nm and 20 nm, and will typically be substantially equal to 15 nm.

[0062] On the one hand, the thickness of the buffer layer 3 must in fact be sufficient to allow functional absorption of laser radiation of a determined wavelength, so that the buffer layer 3 constitutes a sacrificial layer under exposure by said laser radiation.

[0063] On the other hand, the thickness of the buffer layer 3 must remain sufficiently low so as not to present defects and dislocations such that they would propagate to the layer of interest 11 during its growth, which would prevent the obtaining of a monocrystalline layer of interest 11 or at least would degrade the monocrystalline structure of said layer of interest 11, which is desired to be of the best possible quality.

[0064] Several materials can make it possible to confer these functionalities on the buffer layer 3. More particularly, the material from which the buffer layer 3 is made can be chosen from: a. TiN, VN, ZrN, TaN, NbN, and HfN, or even MoN, WN and CrN, and b. a mixture of at least two of these chemical compounds.

[0065] The table below compiles some important parameters in the context of the implementation of the manufacturing method 100, according to a first aspect of the invention, for different nitrides among those mentioned above. It can be noted first of all that each of these nitrides has refractory and inert properties at temperature, in particular because they all have a melting temperature greater than 2000°C. It can also be noted that the lattice parameter of each of these nitrides does not differ significantly from the lattice parameter of (mono)crystalline SiC; more particularly, all of these nitrides have a lattice parameter equal, to within plus or minus 6%, to the lattice parameter of (mono)crystalline SiC.Let us also note that the critical thickness Ec determined for each of these nitrides can be relatively low, and in particular less than or equal to a few nanometers, for some of them, which does not make them preferential candidates since a low critical thickness Ec induces a low thickness of the buffer layer 3 and therefore a low absorption of the laser radiation supposed to sacrifice it. It is therefore clear from the table below that the materials consisting of titanium nitride and niobium nitride are the best candidates among the nitrides mentioned in the table. Table.

[0066] Let us note here that, if the critical thickness Ec of a titanium nitride layer is only 4 nm, it is possible to grow a buffer layer 3 based on titanium nitride having a thickness greater than 4 nm, or even up to 8 nm, without defects or dislocations being created therein which are such that they would not allow the growth of a monocrystalline layer of interest 11 based on SiC from its exposed surface. In addition, the absorbance of a layer based on titanium nitride with a thickness substantially less than 8 nm is greater than the absorbance of a layer of the same nature but with a thickness substantially equal to 4 nm, and therefore greater than 22% (see table 1), which may be satisfactory.

[0067] Let us also note that it is possible to express the absorbance that the buffer layer 3 must have in relation to the absorbance that a layer of the same thickness in monocrystalline SiC would have, and to pose as preferential that the material from which the buffer layer 3 is formed has an absorbance of at least 10%, preferably at least 20%, greater than an absorbance of such a layer of monocrystalline SiC, for the chosen wavelength of the laser radiation and for the critical thickness Ec of the buffer layer 3. According to an alternative formulation, the absorption coefficient of the buffer layer 3 must be greater than the absorption coefficient of the SiC. Ideally, the buffer layer 3 must be able to be considered as absorbent at the wavelength of the laser radiation, while the stack 10 and the initial substrate 2 must be able to be considered as transparent at the wavelength of the laser radiation if they had the same thickness as the buffer layer 3.

[0068] If titanium nitride TiN and hafnium nitride HfN appear to be good candidates, fulfilling the specifications described above, they nevertheless present a difference in lattice parameters with monocrystalline SiC which induces a relatively low critical thickness; and it emerges from the table above that the best candidate, among the nitrides mentioned in the table, is niobium nitride NbN which presents both a high melting temperature, a lattice parameter very close to that of monocrystalline SiC, and therefore a significant critical thickness Ec suggesting the possibility of growing buffer layer 3 to a thickness substantially equal to 30 nm, at which buffer layer 3 would present an absorbance: a. greater than 54%, even though such absorbance is already very satisfactory, and b. such as to guarantee the sacrificial functionality of buffer layer 3 under laser exposure at a wavelength of 1200 nm.

[0069] Note that the absorbance measurements / data mentioned in the table above correspond to those obtained for laser radiation having a wavelength equal to 1200 nm, located in the infrared. Infrared laser radiation having other wavelengths can be considered, provided that they allow the buffer layer 3 to be sacrificed, preferably without degrading the integrity of the other layers. The same potentially applies to laser radiation whose wavelengths are located in the visible spectrum (typically between 380 and 750 nanometers).

[0070] Note also that the parameters discussed in the paragraphs above and consulted in the table are defined at room temperature, or even at room temperature and pressure.

[0071] As an alternative or in addition to the aforementioned nitrides, the buffer layer 3 may be made from certain carbides, and in particular from carbides chosen from TiC, VC, ZrC, TaC, NbC, and HfC, or even MoC, WC and CrC.

[0072] Furthermore, the buffer layer 3 can be grown by implementing any existing epitaxial growth technique suitable for the specific case, and in particular at least one of: reactive sputtering, pulsed laser ablation (PLD), molecular beam epitaxy (MBE) or chemical vapor deposition (CVD).

[0073] Still with reference to Figures 1A to 1E and 5, the manufacturing method 100 according to the illustrated embodiment comprises, following the epitaxial growth 120 of the buffer layer 3, a step consisting of growing 130 by epitaxy, on the buffer layer 3, at least the aforementioned layer of interest 11. The layer of interest 11 can be grown by implementing, in accordance with the ordinary skills of the person skilled in the art, any existing epitaxial growth technique suitable for the specific case, and typically a chemical vapor deposition (or CVD).

[0074] Let us note here that, if step 130 comprises at least the epitaxial growth of a thin layer of monocrystalline SiC as layer of interest 11, it may comprise other technological steps of microelectronics whether before and / or after the epitaxial growth of the thin layer 11. It is understood that, if the buffer layer 3 must be able to withstand temperatures, which can reach up to 1600°C or more, necessary for the epitaxial growth of the SiC, certain technological steps among those potentially included by step 130 of the manufacturing method 100 may require higher temperatures; the buffer layer 3, and in particular the material from which it is made, will then preferably be chosen to withstand these higher temperatures.

[0075] It is already understood here that the device 1 to be manufactured comprises at least the layer of interest 11 based on monocrystalline SiC, but that the device 1 may comprise other layers, based on the same semiconductor material or based on at least one other semiconductor material, so as to constitute for example an epitaxially grown device 1 based on SiC. And the growth of each layer based on a semiconductor material of the device 1 may be carried out so that it is, at least by zone, doped, of N type or of P type, where appropriate with atoms that are different from one layer to another or from one zone to another. Such an epitaxially grown device 1 based on SiC may thus comprise for example: a. at least one of a power component and a radiofrequency component, such as a diode or a transistor, in particular a field effect transistor, but also b.conductive elements, such as conductive tracks, forming for example a redistribution layer (or RDL for "Redistribution Layer" in English) and dielectric elements, for example based on an oxide of a semiconductor material, typically silicon oxide or an epoxy resin. We will return to this point later with reference to figures 3A, 3B, 4A and 4B.

[0076] When the device 1 to be manufactured is made up of the layer of interest 11 based on monocrystalline SiC, it can be considered as forming a seed layer, that is to say a layer on which it will be possible to grow by epitaxy other layers based on monocrystalline SiC, typically to obtain a substrate based on monocrystalline SiC. This is the embodiment illustrated in FIGS. 2A and 2B.

[0077] In any case, following the growth 130 of the device 1, or at least of a part of this device 1 which constitutes the layer of interest 11, a stack 10 is obtained which successively comprises the initial substrate 2, the buffer layer 3 and at least the layer of interest 11 of the device 1 to be manufactured, the stack 10 extending from a rear face 101 constituted by the initial substrate 2 to a front face 102 opposite the rear face 101, and constituted of at least a part of the device 1.

[0078] Still with reference to Figures 1A to 1E and 5, the manufacturing method 100 according to the illustrated embodiment comprises, following the growth 130 of the device 1, or at least of a part of this device 1 which constitutes the layer of interest 11, a step consisting of transferring 150 the stack 10 by its front face 102 onto the receiving substrate 5 provided 140.

[0079] More particularly, the transfer of the stack 10 by its front face 102 onto the receiving substrate 5 may comprise, or consist of, a step of bonding the stack 10 by its front face 102 onto the receiving substrate 5. The bonding step is preferably carried out by implementing a technique allowing the bonding to withstand the conditions, in particular temperature, already mentioned above which are intended to be encountered in particular during subsequent steps of manufacturing and / or processing and / or assembly of the device 1.

[0080] Let us note here that the receiving substrate 5 can be chosen from: a. A substrate based on polycrystalline SiC, the cost of which is much lower than a substrate based on monocrystalline SiC and which advantageously has a coefficient of thermal expansion close to monocrystalline SiC; b. A substrate based on a material having a coefficient of thermal expansion substantially equal to the coefficient of thermal expansion of (mono)crystalline SiC, or even the substrate based on (mono)crystalline SiC; c. A substrate integrating a transistor for example based on CMOS technology; d. A silicon-based substrate, potentially integrating a transistor for example based on CMOS technology; e. a metal substrate; at low cost, this type of substrate could, if necessary, have just a function of mechanical support, protection of transistors and / or heat dissipation; and f.preferably when the device 1 is finalized before the exposure step 160, a substrate comprising a base plate (by which the stack 10 is intended to be transferred onto the receiving substrate 5), thermal grease, and a heat sink; it could then be a so-called packaging substrate (or “packaging substrate” in English) and thus transfer the stack, by gluing, directly onto a packaging substrate.

[0081] As illustrated in Figures 1A to 1E, the bonding of the stack 10 by its front face 102 on the receiving substrate 5 can be carried out by means of one or more bonding layers 6, in accordance with the ordinary skills of the person skilled in the art. For example, a bonding layer 6 can be deposited on the front face 102 of the layer of interest 11, or more generally of the device 1, which is made from an adhesive, for example organic, such as BCB or SU-8, and a bonding layer 6 made from the same adhesive or a different adhesive can be deposited on the receiving surface of the receiving substrate 5, so that the transfer 150 consists of bonding the two bonding layers 6 together. In this context, it is understood that the receiving substrate 5 can constitute a transfer substrate or equivalently a temporary handle.There are many other alternative means to the previous example of bonding the stack 10 by its front face 102 to the receiving substrate 5; and examples include: direct bonding, eutectic bonding, etc. The appropriate bonding will be chosen by the person skilled in the art depending on the application, and in particular the need for electrical connection(s) or not, and / or temperature resistance. For example, if it is desired to resume SiC epitaxy after detachment of the stack 1 and transfer to the receiving substrate 5, direct bonding will be preferred, rather than bonding by SU-8 or BCB which does not withstand the temperature linked to SiC epitaxy.

[0082] Still with reference to Figures 1A to 1E and 5, the manufacturing method 100 according to the illustrated embodiment comprises, following the transfer 150 of the stack 10 onto the receiving substrate 5, a step consisting of exposing 160 the stack 10 with the aforementioned laser radiation, having a wavelength absorbed more by the buffer layer 3 than by the (mono)crystalline SiC from which the initial substrate 2 is made. The wavelength of the laser radiation will typically be chosen in the transparency range of the (mono)crystalline SiC and / or for example substantially equal to 1200 nm.

[0083] Preferably, and as illustrated in FIGS. 1A to 1E, the insolation 160 of the buffer layer 3 is preferably carried out by the rear face 101 of the stack 10, so that the layer of interest 11, and more generally the device 1 to be manufactured, is not directly exposed to the laser radiation, but rather the initial substrate 2 which is a priori concentrated in a substrate based on monocrystalline SiC, and therefore which is a priori free of functionalities potentially negatively affected by the aforementioned laser radiation.

[0084] Whether or not it is carried out by the rear face 101 of the stack 10, the insolation 160 must be configured to lead to the detachment of the initial substrate 2 from the rest of the stack 10 by at least partially sacrificing the buffer layer 3, and to the obtaining 170 of the device 1 comprising at least said layer of interest 11 and being transferred onto the receiving substrate 5, with or without bonding layer(s) 6.

[0085] The manufacturing method 100 as described above thus provides for laser lift-off of the device 1 of interest by at least partially sacrificing the buffer layer 3. More precisely, the energy of the laser radiation is absorbed by the buffer layer 3, which has the effect of heating it. Under the effect of this heating, the buffer layer 3 decomposes at least partially into liquid and gaseous form. The gaseous part dissipates while at least a part of the liquid part can remain in contact with the upper face of the initial substrate 2 and / or the lower face of the layer of interest 11. Potential residues, in particular liquid, of the buffer layer 3, can be cleaned during a subsequent step not shown in the figures. For example, this cleaning could comprise dry or wet etching and / or CMP steps.This makes it possible to completely remove the buffer layer residues 3 on the surface of the initial substrate 2 and / or the layer of interest 11, without altering the surface or the structure of the latter.

[0086] This step of detaching the layer of interest 11 by altering the buffer layer 3 requires, as already mentioned above, a buffer layer 3 of sufficient thickness to allow functional absorption of the exposed laser radiation 160, while remaining sufficiently weak so as not to present defects and dislocations such that they would propagate to the device 1 of interest during its growth, in particular during step 130.

[0087] The thermal balance of the manufacturing method 100 as described above is reduced, compared to known methods, and in particular relative to the SmartSiC™ method (whose debonding annealing is typically carried out at a temperature of 1100°C), so that the integrity of the device 1 of interest, as well as, where appropriate, that of the initial substrate 2, are relatively unaltered, at least relative to what would be observed if a thermal annealing, for example at a temperature above 400°C, or even above 1000°C, were to be applied to debond the device 1 of interest from the initial substrate 2. Note that it is clear from the above that the method 100 as introduced above is preferably free of a thermal annealing step, in particular to debond the device 1 of interest from the initial substrate 2.

[0088] Following the detachment 170 of the initial substrate 2 from the rest of the stack 10, the manufacturing method 100 according to the embodiment illustrated in FIG. 5 may comprise a step consisting of recovering 180 the initial substrate 2, and if necessary providing it 110 again. The initial substrate 2 may thus be reused, if necessary after at least one treatment, for example chosen from a chemical treatment and chemical mechanical polishing (or CMP for “chemical mechanical polishing” according to the English terminology). The possibility of recycling the initial substrate 2 makes it possible to greatly reduce the costs associated with the manufacturing of a device 1 based on (mono)crystalline SiC.

[0089] The manufacturing method 100 as described above with reference to Figures 1A to 1E and 5 can be used in different ways. Without claiming to be exhaustive, three different uses of the manufacturing method 100 according to the first aspect of the invention are illustrated in Figures 2A and 2B for the first, in Figures 3A and 3B for the second and in Figures 4A and 4B for the third.

[0090] The first use envisaged consists, as already discussed above, in reducing the device of interest 1 to only the layer of interest 11. In this case, the manufacturing method makes it possible to manufacture a device 1 consisting of a layer of interest 11 made of (mono)crystalline SiC which can be used as a seed layer, for example a substrate based on (mono)crystalline SiC. In this case, the receiving substrate can advantageously be based on polycrystalline SiC, and possibly be encapsulated (one or more layers deposited around or on the polycrystalline SiC); the cost of such a receiving substrate is much lower than a substrate based on monocrystalline SiC and advantageously has a coefficient of thermal expansion close to that of monocrystalline SiC.In this way, technological steps of microelectronics which would come to be applied to the device 1 following its transfer 150 onto the receiving substrate 5 would not necessarily involve too significant differences in expansion between the device 1 and the receiving substrate 5. Note that, for this first use, the bonding between the layer of interest 11 and the receiving substrate 5 must be chosen so as to withstand the temperatures necessarily reached to grow monocrystalline SiC, typically temperatures substantially equal to, or even slightly higher than, 1600°C.

[0091] With reference to Figures 3A and 3B, the second use envisaged aims to obtain, initially, an epitaxially grown device 1 based on SiC transferred onto the receiving substrate 5. It may then be advantageous for the manufacturing method 100 to comprise, following the detachment of the initial substrate 2 from the rest of the stack 10, a step (not shown) consisting of detaching the device 1 from the receiving substrate 5, where appropriate by sacrificing one or more bonding layers 6. For example, at least one bonding layer 6 may be based on a crosslinkable polymer, for example under UV radiation, so as to reduce its adhesion energy, and allow the detachment of the device of interest 1 from the receiving substrate 5.Note that, before this detachment, the manufacturing method 100 according to the first aspect of the invention may comprise technological steps of microelectronics aimed at completing, or even finalizing, the device of interest 1, the receiving substrate 5 then typically playing the role of a transfer substrate or equivalently of a temporary handle and the bonding interface 6 then having to withstand the conditions of implementation of said technological steps. The second use envisaged therefore aims to obtain, in a second step, an epitaxially grown device 1 based on SiC detached from any other component. It is then possible to bond the epitaxially grown device 1 based on SiC for example on a silicon-based substrate, in particular to process (or equivalently treat by microelectronic techniques) the exposed face of the epitaxially grown device 1 based on SiC.

[0092] With reference to Figures 4A and 4B, the third use envisaged consists of an integration of an epitaxially grown SiC-based device 1 as manufactured 100, by its assembly with a CMOS type device, in particular as a receiving substrate 5. Where appropriate, the assembly carries the electrical interconnection between the device 1 and the CMOS type device by respective contact recovery zones of the epitaxially grown SiC-based device 1 and the CMOS type device. The bonding layer(s) 6 as illustrated in Figure 4B then preferably comprise zones based on a dielectric material surrounding electrical contact recovery zones. Note that the CMOS type device is for example based on silicon, to show that it is then possible to assemble together devices based on different semiconductor materials.It should also be noted that this type of assembly, deemed to fall within the ordinary skills of the person skilled in the art, can advantageously in certain cases be carried out cold, for example by hybrid bonding. A transfer of an epitaxially grown SiC-based device 1 onto a CMOS type device is thus enabled by the implementation of the manufacturing method 100 described above. This possibility is not offered by the SmartSiC™ process, the detachment of which by Crystal Ion Slicing is necessarily carried out hot.

[0093] It is clear from the above that the manufacturing method 100 according to the first aspect of the invention allows at least one of: a. the provision of high-quality, low-cost monocrystalline SiC-based substrates, b. The low-cost production of monocrystalline SiC-based epitaxial devices, and c. The hybridization of monocrystalline SiC-based epitaxial devices on a CMOS type device, in particular silicon-based.

[0094] The invention is not limited to the embodiments previously described and extends to all embodiments covered by the invention.

Claims

CLAIMS 1. Method for manufacturing (100) a device (1) comprising at least one so-called layer of interest (11) based on, or even consisting of, crystalline silicon carbide (SiC), preferably monocrystalline, the manufacturing method (100) comprising the following steps: • Provide (110) a so-called initial substrate (2) based on, or even made up of, crystalline SiC, preferably monocrystalline, then • Growing (120) by epitaxy, on the initial substrate (2), a so-called buffer layer (3) based on a material having, in its crystalline form, preferably monocrystalline: i. a lattice parameter equal, to within plus or minus 6%, preferably to within plus or minus 2%, to a lattice parameter of the crystalline SiC, preferably monocrystalline, from which the initial substrate (2) is made, and ii. a melting temperature strictly greater than 1600°C, preferably greater than 2000°C, and even more preferably greater than or substantially equal to 2500°C, and until the buffer layer (3) has a thickness strictly greater than 2 nm, preferably greater than or equal to 4 nm, and strictly less than twice, preferably substantially equal to or less than, a critical thickness Ec beyond which defects or dislocations appear in the raw buffer layer (3) (120), • Growing (130) by epitaxy, on the buffer layer (3), at least the layer of interest (11), to obtain a stack (10) successively comprising the initial substrate (2), the buffer layer (3) and at least the layer of interest (11), the stack (10) extending from a rear face (101) carried by the initial substrate (2) to a front face (102) opposite the rear face (101), and • Provide (140) a substrate called receiver (5), then • Transfer (150) the stack (10) by its front face (102) onto the receiving substrate (5), then • Insolate (160) the stack (10), preferably by its rear face (101), with laser radiation having a wavelength more absorbed by the buffer layer (3) than by the crystalline SiC, preferably monocrystalline, from which the initial substrate (2) is made, the laser radiation being configured to alter the buffer layer (3) so as to detach the initial substrate (2) from the rest of the stack (10) by at least partially sacrificing the buffer layer (3), and thus obtain (170) a device (1) comprising at least the layer of interest (11) transferred onto the receiving substrate (5).

2. Method (100) according to the preceding claim, further comprising, following the detachment of the initial substrate (2) from the rest of the stack (10), a step consisting of recovering (180) the initial substrate (2), and if necessary providing it (110) again.

3. Method according to any one of the preceding claims, in which the material from which the buffer layer (3) is made is chosen from: • TiN, VN, ZrN, TaN, NbN, and HfN, or even MoN, WN and CrN, and • TiC, VC, ZrC, TaC, NbC, and HfC, even MoC, WC and CrC, Or a mixture of at least two of these chemical compounds.

4. Method according to any one of claims 1 to 2, in which the material from which the buffer layer (3) is made is chosen from NbN, HfN and TiN, or a mixture of at least two of these chemical compounds.

5. Method according to any one of claims 1 to 2, in which the material from which the buffer layer (3) is made is niobium nitride (NbN).

6. Method according to any one of the preceding claims, in which the thickness of the buffer layer (3) is between 1.5 and 15 nm, preferably between 3 and 12 nm, and will for example be substantially equal to 4 nm or 10 nm.

7. Method according to any one of the preceding claims, wherein the device (1) consists of said layer of interest (11) and forms a seed layer.

8. Method according to any one of claims 1 to 6, in which the step of epitaxial growth of said at least one layer of interest comprises, in addition to the growth of said layer (11), the growth of other layers to form, together with said layer of interest, an epitaxially grown device (1) based on SiC, comprising for example at least one of a power component and a radiofrequency component, such as a diode or a transistor, in particular a field effect transistor.

9. Method according to any one of the preceding claims, in which the transfer of the stack (10) by its front face (102) onto the receiving substrate (5) comprises, or consists of, a step of bonding the stack (10) by its front face (102) onto the receiving substrate (5), the bonding step preferably being carried out by implementing a technique allowing the bonding to withstand conditions, in particular temperature, intended to be encountered during subsequent steps of manufacturing and / or processing and / or assembly of the device (1).

10. Method according to the preceding claim, in which the bonding of the stack (10) by its front face (102) on the receiving substrate (5) is carried out by means of at least one bonding layer (6).

11. Method (100) according to claim 8 and claim 9, in which, the SiC-based epitaxially grown device (1) and the receiving substrate (5) each comprise contact recovery zones flush with the face by which it is opposite the other, the step of bonding the stack (10) by its front face (102) on the receiving substrate (5) comprises at least one electrical contacting of a contact recovery zone of the SiC-based epitaxially grown device (1) with a recovery zone of the receiving substrate (5), the bonding being for example hybrid.

12. Method according to any one of the preceding claims, in which the receiving substrate (5) is chosen from: • A substrate based on polycrystalline SiC, • A substrate based on a material having a coefficient of thermal expansion substantially equal to the coefficient of thermal expansion of crystalline SiC, preferably monocrystalline, • A substrate integrating a transistor, for example based on CMOS technology, • A silicon-based substrate, • A metal substrate, and • preferably when the device (1) is finalized before the insolation step (160), a substrate comprising a base plate, thermal grease and a heat sink.

13. Method according to any one of the preceding claims, in which the material from which the buffer layer (3) is formed has an absorbance of at least 10%, preferably at least 20%, higher than an absorbance of a layer of crystalline SiC, preferably monocrystalline, of the same thickness as the buffer layer, for the chosen wavelength of the laser radiation and for the critical thickness Ec of the buffer layer (3).

14. Use of the device (1) manufactured by implementing the method according to any one of claims 1 to 13 comprising the growth, by epitaxy, of crystalline SiC, preferably monocrystalline, on the layer of interest (11) of the device (1), the layer of interest (11) consisting of a thin layer.

15. Use of the method according to any one of claims 1 to 13 to obtain an epitaxially grown device (1) based on SiC detached from the receiving substrate (5).

16. Use of the method according to any one of claims 1 to 13 for assembling the device (1) manufactured with a CMOS type device as receiving substrate (5), where appropriate by electrically interconnecting the device (1) and the CMOS type device with each other by respective contact recovery zones of the device (1) and the CMOS type device, the CMOS type device being for example silicon-based.

Images