Optoelectronic device, array and method for processing the same

Abstract

The invention concerns an optoelectronic device, in particular a µLED, comprising a layer stack based on a phosphide material system comprising a p-doped side and an n-doped side, respectively with an active layer in between. The layer stack comprises a mesa structure exposing sidewalls of at least p-doped side and the active layer. A layer of the n-doped side extends in a lateral direction beyond sidewalls of the mesa structure of the layer stack. A dielectric layer covers a sidewall area of the p-doped layers and optionally a portion of a top surface of p-doped side. An n-doped regrowth layer covers at least a portion of the sidewall of the active layer and contacting the n-doped side. The device also comprises a p-contact on the top surface of p-doped side and an n-contact facing away from a main emission side contacting the n-doped layer particularly laterally displaced in regard to the mesa structure.

Description

[0001] OPTOELECTRONIC DEVICE , ARRAY AND METHOD FOR PROCESSING THE SAME

[0002] The present application claims priority of the German patent application DE 10 2023 122 921 . 4 dated August 25 , 2023 , the disclosure of which is incorporated herein by reference in its entirety . The present invention concerns an optoelectronic device , in particular a pLED based on phosphide material system like InGaAlP suitable to emit light in the red and orange spectrum . The invention also refers to a method for processing an optoelectronic device , in particular a pLED . The invention finally concerns an array of such devices on a common substrate .

[0003] BACKGROUND pLEDs are used for a variety of different light applications with its benefit of providing a relatively large brightness at relatively low current consumption and occupied space . pLEDs are optoelectronic devices that have a diameter of less than 70pm and particularly less than 20pm and even less than 10pm. Such pLEDs can be implemented on various base material systems , for example nitride and phosphide systems . The various base material systems can be characterized in their typical emission range . For example phosphide base material system like InP , InAlP or InGaAlP with various Al , Ga and In contents can be used for light emission in the orange to red spectrum .

[0004] However, charge carrier in phosphide material systems have a relatively large diffusion range of several pm . While this is not an issue for LEDs with large sizes , such behaviour creates an adverse effect at diameters of less than 70pm becoming worse with smaller sizes . Processing of optoelectronic devices usually generates a plurality of various states at the surface of semiconductor layers and in particular at the surface of the active layer . These states form so called non- radiative recombination centres , at which charge carrier are recombining non-radiatively . Due to their low ratio of the area of its active layer to its circumference , the above-mentioned pLEDs based on phosphide material system suffer from the generation of such non- radiative recombination centres . During processing of a plurality of optoelectronic devices , mesaetching of pLEDs is done to optically and electrically isolate the individual devices , or to isolate the pixels in an array . The mesaetching process causes the forming of non-radiative recombination centres at the mesa edges , which are typically defects or dangling bonds in the crystal structure . In operation of the device , current spreading in the doped layers above and below the active region and also through the active region contribute to charge carriers at the pixel edges , which can recombine non-radiatively, lowering the quantum efficiency of the device .

[0005] It is therefore an obj ect of the present application to provide optoelectronic devices and in particular pLEDs based on phosphide material systems that have an improved quantum efficiency .

[0006] SUMMARY OF THE INVENTION

[0007] This and other obj ects are addressed by the subj ect matter of the independent claims . Features and further aspects of the proposed principles are outlined in the dependent claims .

[0008] Various methods have been proposed to address the above-mentioned issue and to increase the quantum efficiency or reduce the density of nonradiate recombination centres . For phosphide material systems for example based on InAlP or InGaAlP and for material systems based on GaAs and AlGaAs , which are both usually used for yellow / red emission, there are two main methods in order to improve the quantum well intermixing . One is based on artificially creating a larger bandgap to form an electric potential preventing charge carriers from reaching the non-radiative recombination centres . This approach also referred to as quantum well intermixing ( QWI ) is usually be applied for larger pLEDs .

[0009] The other approach is based on passivation of the surface of the mesa edges by a regrowth process , widely considered to be a method of choice when approaching pm-sized device . A regrowth process is typically performed by structuring a first part of the device from the p-side and, subsequent apply a p-doped high-bandgap material on the mesa edges . Various p-doped contact layers are then deposited by one or more epitaxy steps .

[0010] However, it has been found by the inventors that a standard regrowth design for smallest emitter sizes is , for space reasons , limited to vertically contacted pLEDs ( top and back contact ) . Furthermore , parts of the mesa are on the same potential as the p-contact . This leads to partial undesired attraction of mobile charge carriers ( i . e . electrons ) to the mesa rather than the desired inj ection into the active region, inducing non-radiative recombination .

[0011] Hence , the inventors propose a revised design and process flow of a regrowth-based, horizontal pLED array with both contact types on one side . The proposed approach solves the issue of an unfavorable positive potential at the mesa sidewalls , effectively reducing undesired recombination at non-radiative recombination centres . Furthermore , the arrangement of contacts on one side , particularly on the non-emitting side of the pLED, the emitting side after growth substrate removal allows for a high degree of freedom in outcoupling structures with various materials , conductive and insulating, low and high refractive index etc . Various concepts for bonding the device on an IC wafer are possible , leading to further flexibility .

[0012] In some aspects of the proposed principle , the inventors suggest an optoelectronic device , in particular a pLED, comprising a layer stack based on one of a phosphide material system and an arsenide material system . The proposed concept is applicable for both material systems , as they share similar characteristics in regard to the above-mentioned issues .

[0013] The layer stack includes a plurality of differently doped layers forming an active layer in between a p-doped side and an n-doped side . The layer stack comprises a mesa structure that is the layer stack forms an island, whereas the mesa structure exposes sidewalls of at least p-doped side and the active layer . However , an n-doped or an undoped layer of the n-doped side extends in a lateral direction beyond sidewalls of the mesa structure of the layer stack . Hence , this layer comprises an exposed surface . In accordance with the proposed principle , a dielectric layer covers a sidewall area of the p-doped layers and optionally a portion of a top surface of p-doped side . The dielectric layer may comprise Si02 for example , although other materials like NbO2 , HFO2 and others are possible . The optoelectronic device further comprises an n-doped regrowth layer covering at least a portion of the sidewall of the active layer and contacting the n-doped side , whereas a main emission side of the optoelectronic device is adj acent to the n-doped layer of the n-doped side . Finally, a p-contact is arranged on the top surface of p-doped side , electrically contacting the p-doped side of the device . Likewise , an n-contact contacts the n-doped layer , particularly laterally displaced in regard to the mesa structure , but also faces away from the main emission side .

[0014] The resulting device constitutes a horizontal pLEDs with both contact on the side facing away from the main emission side . The charge carriers being inj ected onto the active layer from the p-doped and the n-doped side have a lesser likelihood to recombine at the non-radiative recombination centres because the regrown n-doped layer causes a negative potential to arise at the sidewalls of the device during its operation . The negative potential repels electrons , preventing them ( or at least reducing the probability) of being trapped at the non- radiative recombination centres .

[0015] In some aspects , the active layer may comprise a multiquantum well structure having a plurality of barrier layers and quantum well layers , respectively . The active layer may comprise two undoped small cladding layers , which can form a part of the active layer or the p- and n- doped side , respectively . The undoped cladding layer may comprise for example InAlGaP and are used to prevent an undesired diffusion of dopant material into the active layer . In some aspects , the doped layer may comprise one or more sublayers , which may comprise different materials and different dopant concentrations .

[0016] As stated, the layer stack is based on a phosphide material system or GaAs material system. Such system may include but are not limited to InP, A1P , GaP , InAlP GaAlP, InGaP, InAlGaP, GaAs and AlGaAs whereas different contents for Al , Ga and In are possible depending on the desired design and band gap . For example , a higher Al content may be used for barrier layers than for the respective quantum well layers in the above-mentioned multi quantum well structure . The higher Al content results in a higher bandgap .

[0017] In some further aspects , the n-doped regrowth layer covers the sidewall of the active layer and optionally at least a sidewall portion of an undoped cladding layer of the p-doped side adj acent to the active layer . Hence , the n-doped regrowth layer covers the active layer completely but may also cover the two cladding layer stacked on both sides of the active layer . In some further aspects , the n-doped regrowth layer may also cover a portion of the n-dope or undoped layer of the n-doped side extending in a lateral direction beyond sidewalls of the mesa structure . Hence , the regrowth layer extends therefore not only on the sidewalls , but also on the surface of the n-doped side .

[0018] In some aspects , the n-doped regrowth layer comprises low n-type high- A1 containing semiconductor material , for example InGaAlP / InAlP to match the n-doped or undoped layer of the doping concentration of the regrown n-doped side . In some aspects , the material of the n-doped regrown layer is the same as the material of the layer of the n-doped side forming the surface thereof . In some aspects , the concentration of the regrown layer may vary and particularly increase with larger distance to the sidewalls of the layer stack .

[0019] In some aspects , the regrowth layer may comprise several sub-layers , those sublayers comprising a different base material and / or different doping concentrations . However, it is possible to classify such sublayers as separate layers and not part of the regrowth layers . This distinction can be based on the process and the design or material choice . In some aspects , the optoelectronic device in accordance with the proposed principle further comprises an n-doped layer on a surface of the n- or undoped layer adj acent to the sidewalls of the mesa structure of the layer stack and at least a portion of the n-doped regrowth layer . This additional layer may be epitaxially deposited on the regrowth layer and is based on doped GaP and GaAs . The respective layers can be higher doped than the regrowth layer and be suited to have the material for the n-contact deposited thereupon .

[0020] Some aspects relate to the doping . For the n-doping of the regrowth layer as well as the additional layer deposited on the initial regrowth layer, one of Si and Te can be used . The dopant concentration may range from lel7 1 / cm3to approximately lel 9 1 / cm3. Similar concentrations are applied in some aspects to the p-doped and the n-doped side of the layer stack .

[0021] Those additionally layer or layers may extend also partially onto the dielectric material covering the sidewalls , but not cover the sidewall completely . In some further aspects , on or more reflective layers are arranged on portions of the sidewall , in particular on portions of the dielectric layer . Those reflective layers may be insulated but also connective . In some aspects , material of the n-contact can be reflective to further increase the light emission through the emission side .

[0022] In some aspects of the proposed principle , the mesa structure extends from a top surface of the p-doped side to the active layer, leaving sidewalls of n-doped layers of the n-doped side unexposed . In other words , any mesa-etch process may have stopped directly after the active layer, i . e . after the last quantum well layer or barrier layer of a multi-quantum well structure . However , this is not a must , in some aspects , the sidewalls may also expose the adj acent cladding layer or even expose a portion of an n-doped layer . A depth of the mesa structure , which is the extension of the exposed sidewalls is a tradeoff between arising grain boundaries due to the regrowth crystal angle change and the steepness of the side facets .

[0023] Consequently, in some aspects , the sidewalls of the layer stack may be inclined with an increasing diameter closer to the main emission side and the n-doped side . This inclination may follow the crystal structure . In some aspects , the n-contact is arranged on a surface portion of the n-doped layer adj acent to the mesa structure , in particular surrounding the mesa structure . In some aspects , the n- contact is arranged on highly doped layers , for example one of the above-mentioned additional layer, particularly of highly n-doped GaAs or GaP . The n-contact comprises a conductive material stud, for example a metal and the like . The metal is reflective in some aspects , further enhancing the brightness and overall efficiency of the device .

[0024] In some aspects , the proposed optoelectronic device further comprises an insulating material arranged in the space between the n-contact facing away from the main emission side and the covered mesa structure . The insulating material may include Si02 , but can also include SiN or any other reflective insulating material components . The insulating material can cover the space completely, thereby forming a substantial even top surface with a surface of the p-contact . In such configuration, the n-contact may be buried except for its top surface in the dielectric material .

[0025] The top surface of the n-contact is in some aspects even to a surface of the p-contact . In some aspects , the top surfaces of the n-contact and the p-contact form an even surface with the insulating material arranged in the space between the n-contact facing away from the main emission side and the covered mesa structure . This may simplify a later processing of the device and for instance placement on contact pads of a PCB, Chip , CMOS , or integrated circuit , IC and the like . Further processing like depositing conductive traces on such surface may be simplified . In some other instances , the top surfaces of the p-contact and the n-contact may surpass the top surface of the insulating material . In other words , the top surfaces of the p-contact and the n- contact may extend above the surface of the insulating material .

[0026] Some further aspects relate to structuring the emission side of the optoelectronic device and pLED . In some aspects , the main emission side is roughened to form an uneven surface , thereby increasing the outcoupling of light . In some further aspects , the material of the main emission side is structured, for example to form a p-lens opposite the active layer . Such p-lens can also be applied in later processing steps and comprise a different material than the adj acent semiconductor material of the device . Possible materials include but are not limited to one of a phosphide similar to the ones used for the layer stack, as well as GaP and the like . In some further aspects , the optoelectronic device may comprise a photonic structure on the main emission side , forming an optical bandgap . The photonic structure comprises a periodically structured surface . As a further alternative , a nano- outcoupling structure is applied to the n-doped side facing away from the contacts .

[0027] Some aspects concern an array with a plurality of optoelectronic devices in accordance with the proposed principle . The plurality of optoelectronic device may comprise a common layer on the main emission side . They may also comprise a common contact plane and a plurality of individual contacts . The individual contacts are arranged on a surface side of the array facing away from a main emission side . The array further includes an IC wafer with a plurality of contact that are located opposite the common contact plane and the plurality of contacts .

[0028] Some other aspects concern a method of processing an optoelectronic device . While the proposed method is applied here for a specific material system, the general principle can also be applied to optoelectronic devices , whose layer stack is based on nitride material systems . The present method proposes to provide a growth substrate . The growth substate may comprise one or more buffer layers of various materials and / or doping concentrations . The buffer layers are used to match the crystal structure for the subsequent epitaxial steps , but shall also provide an even and defect free surface . Furthermore , in some cases , the buffer layers may act as sacrificial layer in order to rebond the processed layer stack, thereby getting access to the main emission surface . In this regard, the buffer layer may also not be completely removed but provided with outcoupling structures and the like and thus remain on the device .

[0029] In a following process step , a layer stack based on a phosphide material system is epitaxially deposited . The layer stack comprises a plurality of differently doped layers forming a p-doped side and an n-doped side , respectively, with an active layer in between . The p-doped as well as the n-doped side may comprise various layers of different material , as well as different dopant concentrations . Each of those layer serve different purpose . Typical materials are AllnP either doped or undoped as barrier materials , n-doped InGaAlP layer for current spreading and other purposes . A p-doped GaP layer may act s current spreading and inj ection into the active layer .

[0030] The active layer may comprise in some aspects a multi-quantum well structure of alternating InGaAlP with various Al contents to form barrier and quantum well layers , respectively . The layers of the active layer are deposited periodically by changing for example the concentration of the Al-precursor . Two undoped cladding layers are deposited in some aspects on both sides of the active layer . The cladding layers prevent diffusion of dopants from the p-doped or the n-doped side into the active layer . The cladding may have a thickness of a few 100 nm or even less and comprise InGaAlP material similar to the active layer , however with different Al content to also enable carrier inj ection into the active layer .

[0031] Material of a hard mask, for example A12O3is deposited using atomic layer deposition or similar means on the surface of the p-doped side and subsequently structured to expose portions of the p-side thereof . Then, a mesa-etch process is performed from the p-doped side to etch exposed portions , thereby exposing sidewalls of the layer stack material . The mesa-etch is conducted such as to expose sidewalls of at least p-doped side and the active layer and expose a surface of an n- or undoped layer of the n-doped side , said surface extending in a lateral direction beyond sidewalls of the mesa structure of the layer stack .

[0032] In some aspects , the mesa-etch is done in a single step , but several steps can be used, particularly annealing or cleaning the surface of the active layer to reduce the non-radiation centres and dangling bonds . In some aspects , the hard mas k layer is partially under-etched for this purpose . Consequently, the hard mask may comprise a larger size than the size of the top surface of the p-doped size . Depending on the etch parameters and the desired design, the etching process may stop directly after the last portion of the active layer ( i . e . the last barrier or quantum well layer ) or go deeper into the cladding layer or even the n-doped side . The optimum depth is a trade-off between arising grain boundaries due to the regrowth crystal angle change and the steepness of the side facets .

[0033] After removing the material of the hard mas k, a dielectric layer is then deposited on a sidewall area of the p-doped layers and optionally a portion of a top surface of p-doped side . This can be conducted in some aspects , for example by depositing selective-area-growth ( SAG ) mask, e . g . SiO2 followed by a lithographic step and then etch removal of exposed part of the dielectric material to only cover the upper part of the layer stack . The dielectric layer may comprise SiO2 or some similar material . The dielectric layer shall in particular cover the sidewalls of a layer containing a high concentration of Al ( or high bandgap layers on the -doped side ) . This would reduce or even avoid and uncontrolled back etch when shaping the dielectric layer . The dielectric layer may therefore form a cap on the layer stack material after the hard mas k is removed .

[0034] In a subsequent step , an n-doped layer is regrown on at least a portion of the sidewall of the active layer and a portion of the surface of an n- or undoped layer of the n-doped side .

[0035] For this purpose , a n-doped material with a high concentration of Al , for example containing InGaAlP / InAlP is regrown to match the upper n- type layer arranged lateral to the exposed sidewall . The dopant concentration may gradually increase during the regrowth process . Alternatively or additionally, further layers with a high n-type dopant concentration, for example n-doped GaAs or n-doped GaP are deposited in some aspects . The dopants can be Si , Te for example . The regrowth material introduces a negative potential at the mesa sidewalls during operation, owing to the regrowth being n-type instead of p-type as in conventional designs . After finalizing the regrowth process , a p-contact is provided on the top surface of p-doped side . The dielectric material is removed for this purpose on the top surface and the contact material deposited on the surface . Further, an n-contact is provided facing away from a main emission side contacting the n-doped layer , particularly laterally displaced in regard to the mesa structure . The n- and p contact material can be deposited at the same time , i . e . if the material is the same .

[0036] In some aspects of the proposed method, the step of regrowing an n- doped layer comprises regrowing the n-doped layer to cover the sidewall of the active layer and optionally at least a sidewall portion of an undoped cladding layer of the p-doped side adj acent to the active layer . The material of the regrowth layer will electrically contact the layers of the n-doped side . The electric contact generates a potential adj acent to the surface of the active layer resulting in a repellent of the negative charge carriers , thereby reducing the likelihood of non-radiative recombination .

[0037] In some aspects , the n-doped regrowth layer comprises a first sublayer having the same base material as the n-doped layer . For example , InAlP or InAlGaP materials are suitable here . In some aspects , the sub layers are considered to be different layers not part of the regrowth layer . They can be deposited using additional lithographic steps , but also applied after the regrowth process is finished . Those sublayers of the regrowth layer or those layer additionally deposited after the regrowth layer may be n-doped . They are deposited such that its material extends onto the dielectric layer . The thickness of the layers may vary . However, in some instances the thickness of the regrowth layer corresponds to the thickness of the dielectric layer covering the sidewalls .

[0038] In some aspects , the step of regrowing the n-doped layer may comprise depositing a layer , particularly based on one of GaP and GaAs , on at least partially the surface of the n-doped or undoped layer of the n- doped side . Thickness , form and area coverage can vary for those layers in comparison to the n-doped layer directly adj acent to the active region . However, the n-contact is then formed on said layer and thus in electric contact thereof . The material of the n-contact may be reflective . However, other reflective layers can be deposited while being electrically isolated to one of the p-contact and the n-contact . Some reflective material as indicated increases the overall light emission, thereby increasing efficiency of the device .

[0039] In some aspects , an insulating material is deposited into the etched areas after the regrowth process is conducted . The insulating material thus faces away from the emission side of the layer stack . The insulating material may fill-up the space to the top surface of the layer stack and the p-doped side , respectively, thereby forming an even surface . In some instances , the insulating material fills the space completely and even extends above the top surfaces . This will create an even portion . The insulating material can then be structured, and recesses are formed in portions of the insulating material as to open surface portions of the p-doped side and the n-doped side . Those recesses are filled with a conductive material forming n- and p- contact , respectively . The size and form of those recesses may vary . In some aspects , the recesses for the n-contact may fully surround sidewalls of the layer stack . With a potentially reflective material as n-contacts , the brightness of the device can be enhanced .

[0040] In some aspects , the n-contact material is deposited adj acent to the mesa structure , in particular surrounding the mesa structure .

[0041] Some further aspects relate to additional process steps , once the layer stack . Those steps include removal of the growth substrate . In some aspects , a rebonding process is performed to bond the optoelectronic device to a temporary substrate . Then the growth substrate can be accessed and removed to expose an emission side . Alternatively, the device can be bonded with the contact side directly to an IC or another functional wafer . After rebonding and removal of the growth substrate or at least portions thereof , various steps are performed to structure the emission side of the device . For example , in some aspects , further layers are attached to the emission side to match refractive indices between the device and some further elements like plenses and the like . Due to the contacts being formed opposite the emission side , there is no shadowing or other adverse effects in regard to light forming and outcoupling . The contacts on the other side enable more space and no limits to conductivity and insulation .

[0042] In some aspects , an outcoupling structure is formed on the surface of the emission side . This is for example done by roughening the surface . In some aspects , the buffer layer or other semiconductor layer previously deposited as buffer or sacrificial layer are re-purposed for providing such outcoupling structure .

[0043] In some other aspects , optical elements are formed on the emission side , for example nanostructures or plenses . This is done by etching respective structures . In this regard, the optical elements are transparent to the light emitted by the device . In some aspects , the material of the optical element may include a phosphide system similar to the ones used in the layer stack, but with a higher bandgap ( i . e . high Al content ) to become transparent to the generated light . Alternatively, GaAs material can be used to form nanostructures or such plenses .

[0044] In some further aspects , a photonic structure having an optical band gap is formed on the main emission side . Similar to before , this can be achieved by structuring the surface of the emission side or applying another material layer on the emission side ( i . e . with adj usted refractive indices ) and subsequently forming periodic structures therein .

[0045] SHORT DESCRIPTION OF THE DRAWINGS

[0046] Further aspects and embodiments in accordance with the proposed principle will become apparent in relation to the various embodiments and examples described in detail in connection with the accompanying drawings , in which

[0047] Figure 1 shows a cut view of a conventional optoelectronic device ;

[0048] Figure 2 illustrates an exemplary cut view through optoelectronic devices in accordance with some aspects of the proposed principle ; Figure 3 shows an embodiment of an arrangement of optoelectronic devices in accordance with some aspects of the proposed principle ;

[0049] Figures 4A to 4 F illustrate some method steps of processing optoelectronic devices in accordance with some aspects of the proposed principle ;

[0050] Figures 5A and 5B illustrate further method steps of processing optoelectronic devices in accordance with some aspects of the proposed principle ;

[0051] Figure 6 shows another method step in accordance with some aspects of the proposed principle ;

[0052] Figures 7A and 7B show two embodiments of some method steps in a cut view of processing optoelectronic devices according to some aspects of the proposed principle ;

[0053] Figure 8 illustrates a top view of the method steps of Figures 7A and 7B ;

[0054] Figure 9A and 9B illustrate another embodiment of processing an optoelectronic device in a cut and top view according to aspects of the proposed principle ;

[0055] Figures 10 and 11 show two embodiments of optoelectronic devices with processes emission sides in accordance with some aspects of the proposed principle .

[0056] DETAILED DESCRIPTION

[0057] The following embodiments and examples disclose various aspects and their combinations according to the proposed principle . The embodiments and examples are not always to scale . Likewise , different elements can be displayed enlarged or reduced in size to emphasize individual aspects . It goes without saying that the individual aspects of the embodiments and examples shown in the figures can be combined with each other without further ado , without this contradicting the principle according to the invention . Some aspects show a regular structure or form . It should be noted that in practice slight differences and deviations from the ideal form may occur without , however , contradicting the inventive idea .

[0058] In addition, the individual figures and aspects are not necessarily shown in the correct size , nor do the proportions between individual elements have to be essentially correct . Some aspects are highlighted by showing them enlarged . However , terms such as "above" , "over" , "below" , "under" "larger" , "smaller" and the like are correctly represented with regard to the elements in the figures . So it is possible to deduce such relations between the elements based on the figures .

[0059] Figure 1 illustrates a cut view through a conventional optoelectronic device , which uses a regrowth process to cover the mesa-etched sidewalls of a layer stack in order to increase the quantum efficiency . The optoelectronic device according to Figure 1 is implemented as a so-called vertical pLED . The vertical pLED is an optoelectronic device comprising its electrical contacts on two opposing sides , and in particular with one electrical contact being arranged substantially close to or on the main light emission side . The pLED 1 of Figure 1 comprises a layer stack with a plurality of differently doped layers having an active layer 24 between . More particularly, the pLED according to the conventional approach comprises a layer stack based on a phosphide material system. Phosphide material systems are used to provide optoelectronic devices in the lower orange and red . However , as already initially indicated, phosphide material systems are characterized by a relatively large diffusion length in the range of a few micrometers for its charge carriers .

[0060] The optoelectronic device in accordance to Figure 1 comprises a first n-doped layer stack 21 made of InAlGaP acting the functional layer , for spreading the inj ected charge carriers inj ected through contact ring 60a . A slightly n-doped or an undoped Indium Aluminum Phosphide , InAlP barrier layer 22 is deposited on top of n-doped layer 21 . The layer 22 , if doped, may actually comprise a plurality of various dopant concentrations to transport the charge carriers towards the active layer 24 . The same may also apply if layer 22 is undoped .

[0061] Active layer 24 comprises a multi-quantum well structure with a plurality of alternating barrier and quantum well layers , respectively . Each of those layers comprises a base material system, for example InAlGaP, however with varying aluminum concentrations . More particularly, the barrier layers of the multi-quantum well structure comprise usually higher aluminum concentration than the respective quantum well layers , resulting in a larger bandgap for the barrier layers . The active layer 24 is encapsulated by two thin cladding layers

[0062] 23 and 25 , respectively . Each of those cladding layers are only a few tens of nanometers thick . The cladding layers 23 and 25 comprise an undoped InAlGaP material and are used to prevent undesired diffusion of dopants from the adj acent functional n-doped layers 22 and p-doped layer 26 , respectively, into the multi-quantum well structure .

[0063] On top of the second cladding layer 25 , a p-doped InAlP phosphide barrier layer 26 is deposited . The resulting layer stack is mesa-etched to form a plurality of inclined sidewalls , particularly inclined sidewalls of the cladding layer 25 , the multi quantum well structure

[0064] 24 as well as the second cladding layer 23 . In further processing steps of the device , the material of layers 26 , 27 and 28 are deposited in a regrowth process , thereby covering the exposed sidewalls of the cladding layers as well as the multi quantum well structure . Consequently, the sidewalls are covered by a p-doped material . Another current spreading layer 50 is deposited on top of layer 28 , on which the metal contact 61 is arranged . The outer surface of this device is covered by a transparent or opaque dielectric layer 51 .

[0065] The illustrated device manufactured with a standard regrowth design allowing for various emitter sizes but is often limited to vertically contacted pLED as illustrated . The sidewalls or side facets of the so- called emitter islands provided by the mesa-etching process comprise or see therefore a potential , which is substantially equal to the p- contact and p-doped material , e . g . of layers 26 , 27 , and 28 . As a result thereof , the p-biased potential may attract at least partially the electrons having a higher mobility than the holes within the cladding layers as well as the active layer 24 . The attractive force causes a trapping of the mobile charge carrier in non-radiative recombination centres at the side facets , dangling bonds and the like caused by the previous mesa-etching process . Although, some of those defects are recoverable by the subsequently performed growth process , the density of defects is still increased compared to the bulk material of the active layer 24 . Overall , the positive potential in operation of the device reduces the overall quantum efficiency .

[0066] To overcome this issue and provide an improved quantum efficiency for optoelectronic devices and pLEDs based on phosphide material systems , the inventors propose a different manufacturing method resulting in a slightly different device , in which a negative potential is formed at the mesa side facets and the flanks of the active layer 24 in operation of the device . As a result , the highly mobile electrons charge carriers are repelled by such negative potential , forcing them to stay away from the mesa side facets and the defects caused by the etching process .

[0067] Figure 2 illustrates an example of an array of a plurality of pLEDs having been processed on growth substrate 30 . Growth substrate 30 also comprises a buffer layer 31 in order to provide an even and effectively surface for the subsequent layer stack and functional layer based on a phosphide material system like InGaP or InAlGaP . Although the present example refers to the phosphide system, one should note that the illustrated embodiments are not limited thereto . GaAs and AlGaAs share similar characteristics in regard to the diffusion length and optoelectronic devices based on such material benefit therefrom by the proposed idea .

[0068] The optoelectronic devices each comprise a layer stack having a first n-doped functional layer 21 , followed by a slightly an n-doped or nondoped layer 22 . Layer 21 and 22 may be a common layer as indicated herein in case of a monolithic implementation . Similar to conventional devices as presented in Figure 1 , the layer stacks further comprise two cladding layers 23 and 25 with an active layer 24 formed as a multi-quantum well structure in between . Two p-doped layers 26 and 27 with different materials , i . e . InAlP or InAlGaP are arranged on the second cladding layer 25 .

[0069] The layer stacks are processed in subsequent steps to form a plurality of islands as depicted in Figure 2 , which are separated from each other . The mesa-etched side facets of those layer stacks are then overgrown using a plurality of two different re-growth processes . More particularly, a first dielectric material 51 extends from the top surface of the doped gallium phosphide , GaP layer 27 along portions of the sidewalls down to approximately the first cladding layer 25 . The dielectric material 51 does not cover the quantum well structure or the n-doped material as in the previous or conventional techniques . Rather , a slightly n-doped or undoped material 22 ' is regrown on the remaining exposed portions of the side facets , in particularly the active layer 24 and the cladding layer 23 .

[0070] In the present embodiment , the regrowth n-doped layer 22 ' also slightly extends onto the exposed lower portion of cladding layer 25 , directly adj acent to the active layer 24 . On top of that first regrown layer 22 ' an n-doped gallium phosphide , GaP contact and current inj ection layer 28 is regrown covering the regrown layer 22 ' completely on the sidewalls of the respective islands and as illustrated also on the top surface in between the created islands of the layer stack . The n-doped layer 28 comprises a larger dopant concentration than layer 22 ' and is used for current inj ection into adj acent layer stacks using a common n-contact material 62 .

[0071] The n-doped regrowth layer 28 also extends slightly on top of the dielectric material 51 . Dielectric material 51 comprises a silicon dioxide or a similar dielectric material , although the regrowth process can be controlled to avoid such growth . An additional isolating material 70 is deposited on the dielectric material 51 as well as on the regrown layers 22 ' and 28 , respectively . Recesses are formed therein and filled with a highly conductive material for contact purposes . A metal or similar material is used to provide individual p- contacts 61 as well as common n-contacts 62 . These devices can then be further processed by removing the buffer layer 31 as well as the growth substrate 30 , to gain access to the main emission side , which is through the functional layer 21 . Functional layer 21 as well as layers 22 are used for charge carrier inj ection into the active region 24 .

[0072] The optoelectronic devices processed in this manner form horizontal pLEDs , in which the respective contacts are located on the same side and in particular opposite the main emission direction . This , -among other aspects- provides the benefit that light emitted towards the emission site is not shadowed or reflected into the active layer . Consequently, the functional layer 21 as well as any other layer can be structured accordingly to improve the outcoupling of light through the surface . The optoelectronic devices as illustrated can either be separated and further processed as separate devices but also implemented as embedded in integrated modules .

[0073] Figure 3 illustrates a possible application, in which a plurality of pLEDs is further processed as a common module . The plurality of pLEDs 1 is arranged in a similar manner on a single wafer in an array like structure . The shape , processing and arrangement follows the one indicated in Figure 2 . The pLEDs are completely embedded in an insulating material 70 . Each pLED comprises a mesa-etched layer stack in which the exposed edge portions of active layer 24 are covered with a slightly n-doped regrowth layer 22 ' . The regrowth layer 22 ' is electrically connected to a common layer 22 also slightly n-doped, which is in electrical contact with a material 62 forming a common contact . The contacts 62 extend from layer 22 all the way up to a level corresponding to the top surface of further individual contacts 61 . The insulating material 70 , the top surfaces of contacts 61 and 60 to form an even surface with the contact areas at certain locations . The surface is subsequently bonded to a semiconductor wafer 2 processed separately and comprising a different base material , e . g . Si . Semiconductor wafer 2 comprises a plurality of contact areas on its surface , which are subsequently aligned and electrically connected and bonded to the contact areas 61 and 62 , respectively . This process referred to as waf er-to-waf er bonding is known in the art . Semiconductor wafer 2 comprises a plurality of integrated circuits 2a , which are connected to the contact 61 and 62 , respectively . The integrated circuits 2a may include but are not limited to driver circuitry for supplying a respective current individually to the optoelectronic devices . To this extent wafer 2 can provide all power circuitry, as well as controllers , drivers and the like to address the plurality of pLEDs individually .

[0074] The main emission sides on functional layer 22 for the respective devices are then further processed and layer 31 is arranged thereupon, upon which a plurality of optical elements 32 are provided . The optical elements 32 may provide different functionalities , including but not limited to directing the out-coupling light , supporting the out- coupling of light as well as providing optical barrier , color filter or angular direction . The optical elements can be set individually for certain optoelectronic device or as indicated in Figure 3 for a plurality of such devices .

[0075] The proposed process therefore provides a high degree of freedom both in the arrangement of the respective devices either as modules and embedded into a common structure or as separate devices , its contact and control circuitry as well as its outcoupling structure . The out- coupling structures are located, in this particular example , on the n- doped side , which comprises the same or a similar material as the regrowth layer 22 ' covering the mesa facets of active layer 24 .

[0076] Figures 4A to 4 F illustrate several steps of a method for processing an optoelectronic device and in particular a plurality of pLEDs in accordance with the proposed principle . It is understood that certainly variations and ranges to the concept , in particular in regard to the stacking of the various individual layers as well as the mesa-etching process , can be performed without deviating from the proposed principle . The present example is explained in regard to a phosphide material system. However, the same principle can be applied to arsenide material systems . The layer stack two is epitaxially deposited on a growth substrate 38 covered by a buffer layer 31 . The growth substrate 30 comprises GaAs or a similar substrate material as a wafer , on which one or more buffer layers 31 are deposited upon . The buffer layers create a good interface for the subsequent processes , having a virtually defect free surface . Furthermore , the buffer layer 31 may comprise a sacrificial layer, at which the layer stack two deposited thereupon can be separated .

[0077] Layer stack 2 comprises a first n-doped the functional layer 21 made of the phosphide material system. The dopant concentration for functional layer 21 is relatively high and may range between 5el7 1 / cm3to 2el 9 1 / cm3, for example . The dopant concentration may vary during deposition of the functional layer 21 . The functional n-doped layer 21 is used for carrier inj ection and carrier spreading into the subsequent layers .

[0078] A slightly n-doped or an undoped indium aluminum phosphide , InAlP barrier layer is deposited on top of the functional layer 21 . More particularly, in some instances , the slightly n-doped portion of the indium aluminum phosphide layer is directly adj acent to an undoped indium gallium aluminum phosphide , InGaAlP cladding layer 23 . Similar to previous functional layer 21 , the dopant concentration may vary throughout the deposition process of layer 22 , but is usually smaller than functional layer 21 . Cladding layer 23 is undoped and epitaxially deposited on the InAlP layer 22 and comprises a thickness of a few 10 nm .

[0079] Then, active layer 24 is deposited on the cladding layer 23 . Active layer 24 comprises a plurality of alternating barrier and quantum well layers . The number may range between 10 and 24 , although the number of barrier layers and quantum well layers may vary .

[0080] A quantum well layer of active layer 24 is deposited directly adj acent to cladding layer 23 , followed by a barrier layer . The material of the barrier layer as well as the quantum well layers both comprise indium gallium aluminum phosphide , InGaAlP . However, the aluminum content is varying between the barrier layers and the respective quantum well layers . More particularly, the aluminum concentration in the barrier layers is slightly larger than in the adj acent quantum well layers . All sublayer of active layer 24 are epitaxially deposited by changing the aluminum content throughout the deposition process . Although the respective layers may be undoped, it has been found that a small dopant concentration in the barrier layers may be beneficial in some instances . Consequently, in some aspects of the barrier layers may comprise a small dopant concentration either of n- or p-type . In some further aspects , the aluminum content between the barrier layers may also change to vary and adj ust the bandgap within the barrier layers throughout the deposition process of the active layer 24 .

[0081] Another undoped InGaAlP cladding layer 25 is deposited on top of the last quantum well layer of active layer 24 . Similar to cladding layer 23 , the thickness of cladding layer 25 may be in the range of a few 10 nm . On top of the cladding layer 25 a slightly p-doped or undoped indium aluminum phosphide , InAlP barrier layer 26 , followed by a highly p-doped gallium phosphide , GaP layer 27 is deposited . The last layer also acts as a potential contact and current spreading layer for the holes .

[0082] The various layers of the layer stack two are epitaxially deposited using well known techniques in the art . Gas-phase , or chemical vapor deposition using known techniques , pre-cursors and growth parameter are applied . In case the optoelectronic devices are based on arsenide material system, a similar approach is taken using respective dopants , thickness and other growth parameters . Dopant concentration may vary throughout the respective layers as well as the material composition is indicated herein in Figure 4a .

[0083] Following with the next process step, an aluminum dioxide , A12O3 layer 40 is deposited on top of the doped gallium aluminum phosphide , GaAlP layer 27 using an atomic layer deposition process for example . The dielectric layer acts as a hard mas k for the subsequent etching process and is subsequently structured to expose certain areas of the top surface of the p-doped gallium phosphide layer 27 . As an alternative for the A12O3 layer 40 , one may use NbOx , HfOx or a photo resist . The respective material depends on the subsequent etching process .

[0084] Following with Figure 4B, a Mesa-etching process is performed using a plasma etching a wet etching process to remove material under the exposed surface of the p-doped gallium phosphide layer 27 . With a larger wafer structure and the plurality of such hard mask portions 40 being arranged on the top surface , a so-called island etch is performed, wherein material of the p-doped gallium indium phosphide layer 27 , the barrier layer 26 as well as the active region 24 with the two adj acent cladding layers 25 and 23 are removed . This will expose side facets on the respective layer material . The depths of the etching process may stop directly after the last quantum well layer of active layer 24 , the cladding layer 23 or shortly after reaching the first portion of the indium aluminum phosphide barrier layer 22 .

[0085] Depending on the etching process , an annealing process or a second etching process may follow . If the first etching process is performed using a wet-etching process , one may isotropically etch the exposed surfaces . The etching and subsequent annealing or cleaning process results in the exposed side facets being inclined as illustrated in Figure 4B . The depth of the overall etching process is a trade-off between rising grain boundaries due to the angle a change of the growth process and the steepness of the side facets . Certain annealing and cleaning techniques , for example using KOH will result in a more stable and almost vertical angle of the exposed side facets .

[0086] Furthermore , depending on the respective process , a small under etch may occur , thereby exposing a bottom surface portion 41 of the hard mask layer 40 . The overall process will result in a truncated pyramid structure is shown in Figure 4B with a size in the range between 1 pm or below to about 15 pm. Consequently, the etched island structures comprise a size in the range of the diffusion length .

[0087] Depending on the deposition and etching process , side facets of this truncated pyramid may follow certain crystal direction, which provide , a better annealing and cleaning in subsequent processing steps . Furthermore , it has been found that etching along certain direction causes fewer dangling bonds and other defect , improving the quantum efficiency of the device . The exposed sidewalls 42 extend from the top of layer 27 all the way through the active layer and also to a small portion of the indium aluminum phosphide InAlP barrier layer 22 , as depicted . However, a portion of the indium aluminum phosphide barrier layer 22 remains intact , thereby providing an exposed top surface 22a thereof .

[0088] Hard mas k 40 is removed after the etching process , exposing also the surface of topmost layer 27 . Then, a highly selective area growth mas k is deposited using for example a SIO2 deposition process , resulting in a coverage of the top surface as well as the sidewalls surfaces of the islands with a SiO2 mas k layer 50 . Using certain lithographic processes , the mas k layer 50 is etched back to only cover portion of the respective islands and more particularly the side facets of layers 27 , 26 and 25 , respectively . The thickness of the SiO2 layer is in the range of 100 nm to 200 nm for example . The result of this process is illustrated in Figure 4D, in which the portion of the side facets 42a including the sidewalls of the active layer 24 , the cladding layer 23 , as well as the n-doped layer portions 22 are still exposed . In other words , mas k 51 extends only onto the sidewalls of the cladding layer 25 , but terminates shortly before the first quantum well layer of active layer 24 .

[0089] In accordance with the proposed principle , a regrowth process is then performed starting with a low duration of a dopant containing InGaAlP material layer . This regrowth is a highly selective area growth, which does not extend onto mas k 51 , but only onto the exposed side faces and the top surface of layer 22a .

[0090] The regrowth process includes a small dopant concentration matching or exceeding the dopant concentration in layer 22 . In some aspects , a very thin layer ( i . e . only a few nm) covering the sidewalls of active layer 24 is first regrown with almost no dopants , wherein the dopant concentration is subsequently increased with further regrowth process . As indicated in figure 4G, a regrowth layer 22 ' covers the exposed sidewalls and particularly of the lower portion of cladding layer 25 , the active layer 24 , as well as layer 23 and 22 , respectively . The regrowth material extends on the top surface portion 22a .

[0091] The dopant concentration in the regrowth layer generates a potential barrier, repelling the electron carriers from the sidewalls and the dangling bonds on the mesa facets of the active layer 24 . The thickness of the regrowth layer may be similar or slightly larger as the dielectric layer 51 .

[0092] In a subsequent step, a highly n-doped gallium phosphide , GaP or gallium arsenide , GaAs layer 28 is subsequently grown on the surface of layer 22 ' as well as the lower portion of dielectric layer 51 . Certain surface portions of dielectric layer 51 are still exposed, as indicated in Figure 4 F . The highly n-doped gallium phosphide , GaP layer comprises a dopant concentration in the range of 2el 8 1 / cm3to 2el 9 1 / cm3, wherein the dopant can be selected from either Si or Te for example . The highly doped layer 28 acts as a carrier inj ection layer into the subsequently re-grown layer 22 ' and the n-doped layer 21 . The smaller overhead 28 ' covering the lower portions of dielectric layer 51 ensures a substantially even current inj ection into the undoped layer 22 ' and 21 .

[0093] Figures 5A to 5B illustrates the next steps of the manufacturing process in accordance with the proposed principle . The Figures depict on an array or a plurality of optoelectronic devices .

[0094] After the mesa-etching and regrowth process , the respective top surfaces are covered with an insulating material 70 , which is equally distributed . The material 70 fills the spaces between the mesa-etched layer stacks as illustrated and extends above the top surface of dielectric material 51 on the top surface of layer 27 . The resulting structure is illustrated in Figure 5A . The even surface of insulating material 70 provides a higher flexibility in waf er-to-waf er bonding after the subsequent steps are performed . The even surface is then covered with a photographic mas k layer and structured to form a plurality of recesses . The recesses are located on the top surface of layer 27 or between the respective mesa-etched sidewalls of the optoelectronic devices . The recesses are etched into the insulating material 70 and through the dielectric layer 51 , thereby exposing the respective portions of the top surface of GaP layers 27 and 28 , respectively, as shown in Figure 5B .

[0095] The etching process is performed in this example in such a way that the recess exposing the top surface of layer 28 provides slightly inclined sidewalls with a decreasing diameter towards the layer 28 . The recesses are subsequently filled with gold or any other conductive material ( i . e . metal ) to form contacts 61 and 62 , respectively . Since gold is a highly reflective material , the inclined sidewalls of gold contact 62 further acts as a reflective barrier to provide light reflection towards the main emission surface being the interface between layer 21 and buffer layer 31 . Although, not illustrated herein, the contacts 61 and 62 and the recesses , respectively may have different shapes , sizes and dimensions .

[0096] The devices on wafer level processed in Figures 4 and 5 are now ready for a re-bonding process . For this purpose , the top surface of layer 70 is attached to a temporary substrate for rebonding purposes to remove the growth substrate 30 . In this particular embodiment , a portion of buffer layer 31 remains on the surface of layer 21 , forming an emission side . The surface is roughened to form an optical element 32 or outcoupling structure as illustrated in areas directly opposite the active layer 24 of the respective optoelectronic devices . In an alternative , the buffer layer 31 acts as a sacrificial layer and is removed completely before processing the exposed surface of layer 21 . Figure 6 illustrates the devices .

[0097] In this regard, the contact arrangement as well as the processing step of facilitating the contacts 61 and 62 can be implemented with a variety of different combinations . Figure 7A and 7B illustrate two possible options for an arrangement of such contacts 61 and 62 , respectively .

[0098] A small dielectric material section 70 is deposited covering the exposed surface portions of dielectric material 51 and layer 28 , respectively, in Figure 7A. Recesses are etched in layer 70 and layer 51 to expose top surface portions of layers 27 and 28 . These recesses are filled with contact material extending above the top surface of insulating material 70 . The contact 62 and 61 therefore form some kind of stops extending around the top surface but are not necessarily even or on the same height . Contacts 62 , in this regard, are structured in such way that they circumference the respective layer stack of the optoelectronic device . The result is illustrated in Figure 8 from a top view, wherein the top surface 61a forms a circular contact , while the common contact 62 provides a relatively large square like area circumferential of the optoelectronic devices indicated by a circle ( representing the island of the layer stack) and the insulating material 70 .

[0099] Figure 7B illustrates another example , in which insulating layer material 70 forms an even surface extending slightly above the top portion of dielectric layer 51 or the respective islands . Insulating layer material 70 recessed to form a circumferential recess as well as circular recesses on top of layer 27 . These recesses are filled to form contacts 62 and 61 , respectively . The resulting structure is similar to the one Figure 7A, when viewed from the top , is indicated in Figure 8 .

[0100] In another embodiment , the recesses etched in insulating layer 70 extends substantially laterally between two adj acent to electronic devices . This structure is indicated in Figures 9A in a cut view, as well as 9B in its respective top view . In this particular embodiment , the contact material forming contacts 61 and 62 extend layer a top surface of insulating layer 70 . However, the overall area of the material of common contact , 62 is significantly larger compared to the embodiments in Figure 7A and 7B . Furthermore , in this embodiment , the recesses are substantially vertical compared to the previous embodiment with inclined sidewalls for the contact material . Various combinations of these recess structuring can be accomplished without deviating from the proposed principle . Figures 10 and 11 illustrates a further embodiment of the processing method after the optoelectronic devices are bonded and the growth substrate is removed . Figure 10 illustrates a step in the process , in which the main emission surface is formed by the top surface of the functional layer 21 . A microlens 33 having either the same material as functional layer 21 or a different material is formed on a said top surface of layer 21 . In some aspects , the material functional layer 21 deposited previously can form the microlens by structuring the surface using an etching process , shaping the microlens . Is may also be possible to deposit the functional layer material directly in such way during the initial deposition process , i . e . in some respective recess in the buffer layer . However, other variants of forming such microlens are available . For example , the microlens 33 is processed separately, yet with the same material as functional layer 21 . In a subsequent step , a wafer-to wafer bonding process is facilitated after aligning the microlenses over the respective emission surfaces . In this regard, the microlenses may comprise a larger area than the actual main emission area on the surface of layer 21 simplifying the alignment process . Apart from microlenses as illustrated in figure 10 , other optical elements can be processed on such separate wafers and the attached to the emission surfaces of the devices . The microlens , or more general optical elements , may facilitate alignment of the light emission direction and provide further benefits to increase the overall efficiency of the device .

[0101] Figure 11 provides an alternative , in which the out-coupling structure is formed by a periodic surface , resulting in a photonic crystal . Photonic crystals are similar to nano out-coupling structures and provide an optical bandwidth to direct and collimate the emitted light generated in the active layer 24 . Similar to the previous embodiment , the photonic structure can be processed separately and then bonded to the functional layer 21 . However , it is also possible to structure the functional layer 21 directly . Adj usting the periodicity in x- an / or y- direction enables to adj ust the characteristics of the photonic structure , allowing for example certain collimation or directing the emitted light towards a certain direction .

[0102] The proposed approach offers certain freedom in choosing the out- coupling structures , wherein other semiconductor or dielectric material can be directly attached to the functional layer 27 . Likewise , the functional layer 21 can be structured to provide certain functions . As contacting the functional layer 21 occurs from the other side , any optical structure does adversely affect the contact and vice versa . The material used as optical elements can be doped or undoped and provide certain optical functions . As illustrated, photonic crystals , microlenses and the like can be applied either by a structuring the functional layer 27 or applying a further layer or the respective optical elements directly . This is possible due to the contacts being on the back side , which allows easy access to the exposed surface of the functional layer 21 .

[0103] LIST OF REFERENCES pLED, optoelectronic device layer stack ' wafer a integrated circuit 1 functional layer 2 layer 2a surface 2 ' regrowth layer 3 cladding layer 4 active layer 5 cladding layer 6 barrier layer 7 layer 8 regrowth layer 0 growth substrate 1 buffer layer 2 optical element 3 plens 0 mas k layer 1 dielectric material 1 , 62 contacts 2a top surface 0 insulating material

Claims

CLAIMS1 . Optoelectronic device , in particular a pLED, comprising : a layer stack based on a phosphide material system comprising a plurality of differently doped layers forming a p-doped side and an n-doped side , respectively with an active layer in between; wherein the layer stack comprises a mesa structure exposing sidewalls of at least p-doped side and the active layer ; whereas an n- or undoped layer of the n-doped side extends in a lateral direction beyond sidewalls of the mesa structure of the layer stack; a dielectric layer covering a sidewall area of the p-doped layers and optionally a portion of a top surface of p-doped side ; an n-doped regrowth layer covering at least a portion of the sidewall of the active layer and contacting the n-doped side ; wherein a main emission side of the optoelectronic device is adj acent to the n-doped layer of the n-doped side ; a p-contact on the top surface of p-doped side ; an n-contact facing away from the main emission side contacting the n-doped layer particularly laterally displaced in regard to the mesa structure .2 . Device according to claim 1 , wherein the n-doped regrowth layer covers the sidewall of the active layer and optionally at least a sidewall portion of an undoped cladding layer of the p-doped side adj acent to the active layer ; and / or the n-doped regrowth layer covers a portion of the n- or undoped layer of the n-doped side extending in a lateral direction beyond sidewalls of the mesa structure .3 . Device according to any of the preceding claims , wherein the mesa structure extends from a top surface of the p-doped side to the active layer , leaving sidewalls of n-doped layers of the n-doped side unexposed .4 . Device according to any of the preceding claims , wherein the n- doped regrowth layer comprises a first sublayer having the same base material as the n-doped layer, in particular InAlP .5 . Device according to any of the preceding claims , wherein n-doped regrowth layer comprises a sublayer that extends partially onto the dielectric layer .6 . Device according to any of the preceding claims , further comprising ; an n-doped layer, particularly based on one of GaP and GaAs , on a surface of the n- or undoped layer adj acent to the sidewalls of the mesa structure of the layer stack and at least a portion of the n-doped regrowth layer ; or one or more reflective layers arranged on portions of the sidewall , in particular on portions of the dielectric layer .7 . Device according to any of the preceding claims , wherein the n- contact is arranged on a surface portion of the n-doped layer adj acent to the mesa structure , in particular surrounding the mesa structure .8 . Device according to any of the preceding claims , further comprising an insulating material arranged in the space between the n-contact facing away from the main emission side and the covered mesa structure , said insulating material forming a substantial even top surface with a surface of the p-contact .9 . Device according to any of the preceding claims , wherein material of the n-contact extends at least to a height even on a top surface of the p-contact .10 . Device according to any of the preceding claims , wherein the main emission side comprises one of : an outcoupling structure , in particular a roughened surface ; an optical p-lens element , in particular comprising a material based on one of : o a phosphide material system;o a dielectric material , in particular one of Si02 , Nb2O3 and SiN; a photonic crystal forming an optical bandgap, in particular a periodically structured surface ; a nano-outcoupling structure .11 . Method of processing an optoelectronic device , in particular a pLed, comprising :Providing a growth substrate ;Epitaxially depositing a layer stack based on a phosphide material system comprising a plurality of differently doped layers forming a p-doped side and an n-doped side , respectively with an active layer in between;Providing a structured hard mas k on an exposed surface of the p— doped side ;Mesa-etching the layer stack exposing sidewalls of at least p- doped side and the active layer and exposing a surface of an n- or undoped layer of the n-doped side said surface extending in a lateral direction beyond sidewalls of the mesa structure of the layer stack;Depositing a dielectric layer covering a sidewall area of the p- doped layers and optionally a portion of a top surface of p-doped side ;Regrowing an n-doped layer on at least a portion of the sidewall of the active layer and a portion of the surface of an n- or undoped layer of the n-doped side ;Providing a p-contact on the top surface of p-doped side ;Providing an n-contact facing away from a main emission side contacting the n-doped layer particularly laterally displaced in regard to the mesa structure .12 . Method according to claim 11 , wherein the step of regrowing an n- doped layer comprises regrowing the n-doped layer to cover the sidewall of the active layer and optionally at least a sidewall portion of an undoped cladding layer of the p-doped side adj acent to the active layer .13 . Method according to one of claims 11 to 12 , wherein the n-doped regrowth layer comprises a first sublayer having the same base material as the n-doped layer; and / or wherein the n-doped regrowth layer comprises a sublayer that extends partially onto the dielectric layer .14 . Method according to one of claims 11 to 13 , wherein the step of regrowing an n-doped layer comprises :Depositing a layer , particularly based on one of GaP and GaAs , on at least partially the surface of the n- or undoped layer of the n-doped side , wherein the n-contact is formed on said layer ; orDepositing one or more reflective layers on portions of the sidewall , in particular on portions of the dielectric layer .15 . Method according to one of claims 11 to 14 , wherein the step of providing an n-contact comprises :Depositing n-contact material adj acent to the mesa structure , in particular surrounding the mesa structure .16 . Method according to one of claims 11 to 15 , further comprising :Depositing an insulating material in the space between the n- contact facing away from the main emission side and the covered mesa structure , wherein optionally said insulating material forming a substantial even top surface with a surface of the p- contact .17 . Method according to one of claims 11 to 16 , wherein the step of providing an n-contact comprises :Depositing an insulating material on the surface of the n-doped side ;Forming recesses in the insulating material , thereby exposing portions of the surface of the n-doped side ;Depositing a conductive material in said recesses to form the n- contact .18 . Method according to one of claims 11 to 17 , further comprising :Rebonding the optoelectronic device to a second substrate , in particular one of a temporary substrate , an integrated circuit wafer and a CMOS wafer;Removing the growth substrate to expose an emission side ;Providing at least one of : o an outcoupling structure , in particular a roughened surface ; o an optical p-lens element , in particular comprising a material based on one of :■ a phosphide material system;■ a dielectric material system, in particular one of SiO2 , Nb2O3 and SiN; o a photonic crystal forming an optical bandgap, in particular a periodically structured surface ; o a nano-outcoupling structure . on the main emission side , particularly by structuring the exposed emission side .19 . Array with a plurality of optoelectronic devices according to one of claims 1 to 10 , wherein a common contact plane and a plurality of individual contacts are arranged on a surface side of the array facing away from a main emission side .

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