Short circuit detection circuit

Abstract

Short-circuit detection circuit. This description relates to a short-circuit detection circuit (2100) for the output of a switched-mode power supply, formed in and on a monolithic semiconductor substrate having one face coated with a layer of gallium nitride. This circuit is adapted to drive a power transistor of the switched-mode power supply. Figure for the abstract: Fig. 21

Description

Title of the invention: Short circuit detection circuit technical field

[0001] This description relates generally to electronic systems and devices, and more particularly to electronic systems and devices formed from a Gallium Nitride (GaN) structure. This description relates more particularly to a power switch formed from a Gallium Nitride (GaN) structure and used in a switched-mode power supply. Previous technique

[0002] It is conventional to form electronic systems and devices from silicon substrates, but other semiconductor materials can be used. In particular, structures comprising Gallium Nitride (GaN) can be used.

[0003] It would be desirable to be able to improve, at least in part, certain aspects of electronic systems and devices formed from in and on structures comprising Gallium Nitride. Summary of the invention

[0004] There is a need for electronic systems and devices formed in and on structures comprising Gallium Nitride.

[0005] There is a need for electronic systems and devices comprising transistors formed in and on structures comprising Gallium Nitride.

[0006] An embodiment overcomes all or part of the drawbacks of known electronic systems and devices.

[0007] According to a first aspect, an embodiment provides for a pulse width modulation circuit of a switching power supply formed in and on a monolithic semiconductor substrate having one face covered with a layer of Gallium Nitride, said circuit being adapted to control a power transistor of said switching power supply.

[0008] According to one embodiment, the circuit includes a first comparator circuit of a first voltage representative of a drain current of said transistor and a feedback current of said switching power supply.

[0009] According to one embodiment, said first comparator circuit is adapted to make said transistor non-conducting if said first voltage is greater than a first threshold voltage.

[0010] According to one embodiment, the circuit further comprises a second comparator circuit for said first voltage representing the drain current of said transistor and a feedback current from said switching power supply.

[0011] According to one embodiment, said second comparator circuit is adapted to make said transistor non-conducting if said first voltage is less than a second threshold voltage.

[0012] According to one embodiment, the circuit further comprises a first filtering circuit allowing a result of said second comparator circuit to be taken into account only during a non-conducting phase of said power transistor.

[0013] According to one embodiment, the circuit further comprises a third comparator circuit of said first voltage representing the drain current of said transistor and a feedback current of said switching power supply.

[0014] According to one embodiment, said third comparator circuit is adapted to make said transistor non-conducting if said first voltage is greater than a third threshold voltage.

[0015] According to one embodiment, the circuit further comprises a second filtering circuit allowing a result of said third comparator circuit to be taken into account only during a non-conducting phase of said power transistor.

[0016] According to one embodiment, the circuit further comprises an oscillating circuit adapted to provide a clock voltage.

[0017] According to one embodiment, the circuit further comprises a logic circuit adapted to receive at least one clock voltage, and at least one comparison voltage.

[0018] According to one embodiment, the circuit further comprises a control circuit for said power transistor adapted to receive a control voltage for said logic circuit.

[0019] Another embodiment provides for a power switch comprising a power transistor adapted to receive a maximum voltage of 650 V between its drain and its source, and a pulse width modulation circuit described previously.

[0020] According to one embodiment, said power transistor is an e-mode type HEMT transistor.

[0021] Another embodiment provides for a switched-mode power supply including the power switch described above.

[0022] According to a second aspect, an embodiment provides for a short-circuit detection circuit of an output of a switching power supply, formed in and on a monolithic semiconductor substrate having one face covered with a layer of Gallium Nitride, said circuit being adapted to control a power transistor of said switching power supply.

[0023] According to one embodiment, the circuit comprises a comparator circuit of a first voltage representative of the drain current of said transistor and of a feedback current of said switching power supply.

[0024] According to one embodiment, said comparator circuit is adapted to make said transistor non-conducting if said first voltage is less than a second threshold voltage.

[0025] According to one embodiment, the circuit further comprises a first filtering circuit allowing a result of said comparator circuit to be taken into account only during a non-conducting phase of said power transistor.

[0026] According to one embodiment, the circuit further comprises an oscillating circuit adapted to provide a low-frequency clock voltage.

[0027] Another embodiment provides a pulse width modulation circuit including a short circuit detection circuit described above.

[0028] According to one embodiment, the circuit further comprises a logic circuit adapted to receive a comparison voltage supplied by said detection circuit.

[0029] According to one embodiment, the circuit further comprises a control circuit for said power transistor adapted to receive a control voltage for said logic circuit.

[0030] Another embodiment provides for a power switch comprising a power transistor adapted to receive a maximum voltage of 650 V between its drain and its source, and a pulse width modulation circuit described previously.

[0031] According to one embodiment, wherein said power transistor is an e-mode type HEMT transistor.

[0032] Another embodiment provides for a switched-mode power supply including the power switch described above. Brief description of the drawings

[0033] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0034] Fig. 1 represents, very schematically, a structure comprising Gallium Nitride;

[0035] [Fig.2] includes two views (A) and (B) illustrating a first type of transistor formed in and on a structure comprising Gallium Nitride;

[0036] Fig. 3 represents two views (A) and (B) illustrating a second type of transistor formed in a structure comprising Gallium Nitride;

[0037] [Fig. 4] represents, schematically and partially in block form, a part of a switched-mode power supply comprising an embodiment of an electronic device formed in and on a structure comprising Gallium Nitride;

[0038] [Fig.5] represents, schematically and in block form, a more detailed electrical diagram of an embodiment of a power switch of the switching power supply of [Fig.4];

[0039] [Fig.6] represents an example of an implementation of a logic circuit of the embodiment of [Fig.5];

[0040] [Fig.7] represents an embodiment of an oscillating circuit of the embodiment of [Fig.5];

[0041] [Fig.8] represents chronograms illustrating the operation of the oscillating circuit of [Fig.7];

[0042] [Fig.9] represents an example of the realization of a comparator circuit;

[0043] [Fig. 10] represents a first embodiment of a current comparator circuit of the embodiment of [Fig. 5];

[0044] [Fig. 1 1] represents timing diagrams illustrating the operation of the current comparator circuit of [Fig. 10];

[0045] [Fig. 12] represents a curve illustrating the operation of the current comparator circuit of [Fig. 10];

[0046] [Fig. 13] represents a second embodiment of a current comparator circuit of the embodiment of [Fig. 5];

[0047] [Fig. 14] represents timing diagrams illustrating the operation of the current comparator circuit of [Fig. 13], and in particular a slow-start operating mode of the comparator's trigger threshold;

[0048] [Fig. 15] represents an embodiment of a circuit for detecting an open output load of the embodiment of [Fig. 5];

[0049] [Fig. 16] represents timing diagrams illustrating the operation of the open output load detection circuit of [Fig. 15];

[0050] [Fig. 17] represents an embodiment of a filtering circuit of the embodiment of [Fig. 15];

[0051] [Fig. 18] represents timing diagrams illustrating the operation of the filtering circuit of [Fig. 17];

[0052] [Fig. 19] represents an embodiment of a circuit for generating a control signal for the filtering circuit of [Fig. 17];

[0053] [Fig.20] represents timing diagrams illustrating the operation of the generation circuit of [Fig. 19];

[0054] Figure 21 represents an embodiment of a short-circuit detection circuit at the output of the switched-mode power supply, comprising the embodiment of the [Fig.5];

[0055] [Fig.22] represents timing diagrams illustrating the operation of the short-circuit detection circuit of the output of [Fig.21];

[0056] [Fig.23] represents, in more detail, part of the embodiment of the circuit for detecting a short circuit at the output of [Fig.21];

[0057] [Fig.24] represents timing diagrams illustrating the operation of part of the embodiment of the output short-circuit detection circuit of [Fig.23], and in particular the principle of power limitation of the output short-circuit detection and the associated restarts;

[0058] [Fig.25] represents a first embodiment of a threshold voltage generation circuit of the embodiment of [Fig.5];

[0059] [Fig. 26] represents a second embodiment of a threshold voltage generation circuit of the embodiment of [Fig. 5]; and

[0060] [Fig.27] represents a more detailed example of the embodiment of [Fig.4]. Description of the implementation methods

[0061] The same elements have been designated by the same reference numerals in the different figures. In particular, structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0062] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.

[0063] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0064] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0065] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0066] Fig. 1 is a cross-sectional view very schematically representing a semiconducting structure 100 comprising Gallium Nitride.

[0067] The structure 100 is generally composed of a substrate 101 (Si) in a material se semiconductor, for example a silicon substrate, coated on one of its faces with a 102 (GaN) layer of Gallium Nitride (GaN). The 102 layer has a thickness between 0.5 and 5 pm.

[0068] When structure 100 is used as the basis of an electronic system or device, electronic components are formed in and on layer 102. Metallization levels can, in addition, be formed on layer 102.

[0069] Figure 2 comprises two views (A) and (B) illustrating a first type of transistor 200 formed in a structure comprising gallium nitride. View (A) shows an electrical diagram of the transistor 200, and view (B) shows a cross-sectional view of a structure 250 forming the transistor 200.

[0070] Transistor 200 is a high-mobility electron transistor (HEMT), also called a modulated-doping field-effect transistor (MODFET). Hereinafter, a high-mobility electron transistor is referred to as a HEMT.

[0071] A HEMT transistor, such as transistor 200, comprises a gate terminal, denoted G in [Fig.2], a source terminal, denoted S in [Fig.2], and a drain terminal, denoted D in [Fig.2].

[0072] Furthermore, transistor 200 is a depletion-mode HEMT, hereafter referred to as a d-mode HEMT, or d-mode transistor. Alternatively, transistor 200 is a normally-ON HEMT, or normally-ON HEMT, or normally-ON transistor. The circuit diagram of transistor 200 shown in view (A) is the circuit diagram that will be used in all subsequent figures to represent a d-mode or normally-ON transistor.

[0073] In practice, the transistor 200 can be obtained from a structure 250 formed from a structure of the type of structure 100 described in relation to [Fig. 1]. Thus, the structure 250 comprises a substrate 251 (Si) made of a conductive material, such as silicon, one face of which is covered by a layer 252 (GaN) of Gallium Nitride. The Gallium Nitride layer 252 is partially covered by a layer 253 (AlGaN) of Aluminum-Gallium Nitride. A connection terminal 254 forms the source contact S of transistor 200. The connection terminal 254 is formed on a portion of layer 252 that is not covered by layer 253. A connection terminal 255 forms the drain contact D of transistor 200. The connection terminal 255 is formed on a portion of layer 252 that is not covered by layer 253. A connection terminal 256 forms the gate contact G of transistor 200.The connection terminal 256 is formed on a portion of layer 253, and is located between the connection pads 254 and 255.

[0074] The operation of transistor 200 is as follows. When the gate G of the transistor If transistor 200 is left floating, or if a positive voltage is applied between its gate G and its source S, transistor 200 is conducting, hence its designation as a normally ON transistor. To "turn off" transistor 200, that is, to make it non-conducting, a negative voltage must be applied between its gate G and its source S.

[0075] Figure 3 includes two views (A) and (B) illustrating a second type of transistor 300 formed in a structure comprising gallium nitride. View (A) shows an electrical diagram of transistor 300, and view (B) shows a cross-sectional view of a structure 350 forming transistor 300.

[0076] Like the transistor 200 described in relation to [Fig. 2], the transistor 300 is a high-mobility electron transistor, or HEMT. The transistor 300 comprises a gate terminal, denoted G in [Fig. 3], a source terminal, denoted S in [Fig. 3], and a drain terminal, denoted D in [Fig. 3].

[0077] Furthermore, and unlike transistor 200 in [Fig. 2], transistor 300 is an enhancement-mode HEMT, hereafter referred to as an e-mode HEMT or simply an e-mode transistor. Alternatively, transistor 300 is a normally-off HEMT, or normally-off HEMT. The circuit diagram of transistor 300 shown in view (A) is the circuit diagram that will be used in all subsequent figures to represent an e-mode or normally-off transistor.

[0078] In practice, the transistor 300 can be obtained from a structure 350 formed from a structure of the type of structure 100 described in relation to [Fig. 1]. Thus, the structure 350 comprises a substrate 351 (Si) made of a conductive material, such as silicon, one face of which is covered by a layer 352 (GaN) of Gallium Nitride. The Gallium Nitride layer 352 is partially covered by a layer 353 (AlGaN) of Aluminum-Gallium Nitride. A connection terminal 354 forms the source contact S of transistor 300. The connection terminal 354 is formed on a portion of layer 352 that is not covered by layer 353. A connection terminal 355 forms the drain contact D of transistor 300. The connection terminal 355 is formed on a portion of layer 352 that is not covered by layer 353. A connection terminal 356 forms the gate contact G of transistor 300.The connection terminal 356 is formed between layer 352 and layer 353 and is arranged between the connection pads 354 and 355. In addition, a portion of the connection pad 354 covers the portion of layer 353 covering the connection pad 356 as shown in view (B) of [Fig.3].

[0079] The operation of transistor 300 is as follows. When the gate G of transistor 300 is left floating or a negative voltage is applied between its gate G and its source S, transistor 300 is not conducting, hence its designation as a normally OFF transistor. To "turn on" transistor 300, that is, to make it conductor, a positive voltage must be applied between its gate G and its source S.

[0080] The [Fig.4] illustrates, schematically and partially in block form, a part 400 of a simplified embodiment of a switching power supply.

[0081] Part 400, shown in [Fig.4], comprises a first input node IN400 and a second input node GNDin400. Part 400 receives an input voltage Vin400 between the two input nodes IN400 and GNDin400. The input node GNDin400 also receives a first reference voltage, for example, a first ground.

[0082] Part 400 includes, between the input nodes IN400 and GNDin400, a capacitor Cin400. According to one example, the capacitor Cin400 is a filtering capacitor.

[0083] Part 400 further comprises a first output node OUT401 and a second output node OUT402. Part 400 provides, between these two output nodes OUT401 and OUT402, an output voltage Vout400. According to an example, the output node OUT402 further provides a second reference voltage, for example, a second ground, different from the first reference voltage.

[0084] Part 400 includes, between the output nodes OUT401 and OUT402, a capacitor Cout400. According to one example, the capacitor Cout400 is a filtering capacitor.

[0085] Part 400 further includes a transformer 401 having two coils 402-IN and 402-OUT. Coil 402-IN is the input coil of the transformer; that is, one terminal of coil 402-IN is connected, preferably connected, to the first input node IN400, and a second terminal of coil 402-IN is connected, preferably connected, to a 403-DRAIN terminal described in more detail below. Coil 402-OUT is the output coil of the transformer; that is, one terminal of coil 402-OUT is connected to the first output node OUT401, and a second terminal of coil 402-OUT is connected, preferably connected, to the second output node OUT402. In [Fig. 4], the phase points of coils 402-IN and 402-OUT are indicated by black dots.

[0086] More specifically, the first terminal of the coil 402-OUT is connected to the output node OUT401 via a diode D401. In one example, the anode of diode D401 is connected, preferably connected, to the first terminal of the coil 402-OUT, and the cathode of diode D401 is connected, preferably connected, to the output node OUT401. In one example, diode D401 is a rectifier diode.

[0087] Part 400 further includes a power switch 403 according to one embodiment. The power switch includes at least three terminals: 403-DRAIN, 403-GND, and 403-IFB. As previously stated, terminal 403-DRAIN is connected, preferably connected, to the second terminal of coil 402-IN. The terminal 403-GND receives the first reference voltage, i.e., the same reference voltage as the input node GNDin400. Terminal 403-IFB receives a return current IFB400 which is a reflection of the output voltage Vout400.

[0088] According to one embodiment, the power switch 403 is formed, at least partially, in and on a structure of the type of structure 100 described in relation to [Fig. 1]. The power switch 403 comprises a switch 404, or transistor 404, and a control circuit 405 (CMD) for said switch.

[0089] Transistor 404 is an emit-mode HEMT power transistor, also known as an e-mode transistor or a normally-off transistor. In the following description, switch 404 is referred to as transistor 404. Transistor 404 comprises: - a drain terminal connected, preferably connected, to terminal 403-DRAIN; - a source terminal connected, preferably connected, to terminal 403-GND; and - a grid terminal receiving a 405-CMD control voltage supplied by the 405 control circuit.

[0090] According to one embodiment, the power transistor 404 is sized to withstand a maximum voltage of the order of 650 V at its drain terminal and its source terminal.

[0091] According to one embodiment, the switching power supply 400 operates in pulse-width modulation. This modulation is performed by the control circuit 405 of the power switch 403.

[0092] The control circuit 405 receives the IFB400 current as its control current. In other words, the control circuit is connected, preferably connected, to terminal 403-IFB. The control circuit 405 is also connected, preferably connected, to terminals 403-DRAIN and 403-GND. The control circuit 405 and its operation are described in more detail with reference to Figures 5 to 26. GND

[0093] Part 400 further includes a feedback circuit 406 receiving, at input, the output voltage Vout400, and providing, at output, the return current IFB400.

[0094] The switched-mode power supply described in relation to [Fig. 4] is an "off-line" type switched-mode power supply designed to receive, at the input (i.e., between nodes IN400 and GNDin400), an input voltage directly from the household electrical network. This input voltage can be rectified and / or filtered, for example, but its amplitude is not reduced. Thus, the input voltage Vin400 can have a very high amplitude, i.e., for example, less than 450 V.

[0095] A more detailed embodiment of a switching power supply of the type of the switching power supply comprising part 400 is described in detail in relation to [Fig.27].

[0096] [Fig.5] represents, schematically and in block form, a power switch 500 of the type of the power switch 403 described in relation to [Fig.4],

[0097] According to one embodiment, the power switch 500 is a monolithic component formed partly, preferably entirely, in and on a structure of the type of structure 100 described in relation to [Fig.1].

[0098] As described previously, the power switch 500 comprises the e-mode type transistor 404, the control circuit 405, and the terminals 403-DRAIN, 403-GND, and 403-IFB. The current at the drain of transistor 404 is denoted IDRAIN404. The voltage between terminal 403-IFB and terminal 403-GND is denoted Vsense500.

[0099] The control circuit 405 is, more particularly, a pulse width modulation circuit for controlling the opening and closing of the transistor 404. More particularly, the control circuit 405 provides a periodic or pseudo-periodic control voltage to the gate of the transistor 404.

[0100] The control circuit 405 includes an e-mode transistor 501 and a resistor R501. The transistor 501 and resistor R501 are connected in series, connecting the 403-Drain terminal to the 403-IFB terminal. More specifically, the transistor 501 has a drain terminal connected, preferably connected, to the 403-DRAIN terminal, and a source terminal connected, preferably connected, to one terminal of resistor R501. A second terminal of resistor R501 is connected, preferably connected, to the 403-IFB terminal. The gate terminal of the transistor 501 is connected, preferably connected, to an output terminal of a 503 logic circuit (LOGIC) described below.

[0101] The control circuit 405 further comprises a driver circuit 502, or close-range control circuit 502, adapted to provide a control potential to the gate of transistor 404. The driver circuit 502 receives at least one control potential from the logic circuit 503 described below. A person skilled in the art will be able to implement the driver circuit 502. By way of example, examples of implementations of such a driver circuit 502 are given in French patent application FR2210660.

[0102] The control circuit 405 further comprises the logic circuit 503 (LOGIC) adapted to control the driver circuit 502 and the transistor 501. The logic circuit 503 may be composed of logic gates described in more detail in relation to [Fig. 6], which allow the power transistor 404 to be controlled via the driver circuit 502. For this purpose, the logic circuit 503 receives, at least, different comparison voltages VCompIMAX505, VcompOV506, and VCompOP508, and a clock voltage CK500.

[0103] The control circuit 405 further comprises an oscillating circuit 504 (OSC) adapted to provide the CK500 clock voltage. A detailed example of a 504 oscillator circuit is described in relation to Figures 7 and 8.

[0104] The control circuit 405 further includes a comparator circuit 505 (C Comp) comprising an input (+) connected to terminal 403-IFB, and an inverting input (-) receiving a threshold voltage VthIMAX505. The comparator circuit 505 provides, at its output, the comparison voltage VCompIMAX505. The comparator circuit 505 allows verification that the output current of the power switch 500 does not exceed a maximum value. An example of an embodiment of a comparator circuit is described with reference to [Fig. 9]. Examples of embodiments of the comparator circuit 505 are described with reference to Figures 10 and 13, and their operation is described with reference to Figures 11, 12, and 14.

[0105] The control circuit 405 further includes a comparator circuit 506 (OV) and a filtering circuit 507 (Filt.). The comparator circuit 506 includes an input (+) connected to terminal 403-IFB, and an inverting input (-) receiving a threshold voltage VthOV506. The output of the comparator circuit 506 is preferably connected to an input of the filtering circuit 507. The filtering circuit provides the comparison voltage VCompOV506 at its output. The comparator circuit 506 and the filtering circuit 507 allow verification that the output of the power switch 500 is not short-circuited. The operation of these circuits is described with reference to Figures 21 to 24.

[0106] The control circuit 405 further includes a comparator circuit 508 (OP) and a filtering circuit 509 (Filt.). The comparator circuit 508 includes an input (+) connected to terminal 403-IFB, and an inverting input (-) receiving a threshold voltage VthOP508. The output of the comparator circuit 508 is preferably connected to an input of the filtering circuit 509. The filtering circuit provides the comparison voltage VCompOP508 at its output. The comparator circuit 508 and the filtering circuit 509 allow verification that the output of the power switch 500 is not an open circuit. The operation of these circuits is described with reference to Figures 15 to 20.

[0107] Circuits providing the threshold voltages VthIMAX505, VthOV506 and VthOP508 are described in relation to figures 25 and 26.

[0108] Fig. 6 represents an example of an embodiment of a logic circuit 600 of the type of the logic circuit 503 described in relation to Fig. 5. Fig. 6 also shows the driver circuit 502 (DRIVER), the power transistor 404, and the terminals 403-DRAIN (DRAIN) and 403-GND (GND), all described previously.

[0109] The 600 circuit includes a 601 RS-type flip-flop. The 601 flip-flop has three terminals, including a set terminal S, a reset terminal R, and an output terminal Q. When a rising edge is applied to the set terminal S, the output terminal Q provides a high signal, and when a When a rising edge is applied to the reset terminal R, the output terminal Q provides a low-state signal. A high-state signal is one whose amplitude value corresponds to a high binary state, that is, a binary state equal to "1". Similarly, a low-state signal is one whose amplitude value corresponds to a low binary state, that is, a binary state equal to "0".

[0110] The output terminal Q of the flip-flop 601 is connected, preferably connected to an input of the driver circuit 502 of the power transistor 404.

[0111] The circuit 600 further includes an OR logic gate 602 having two inputs and one output. The output of the logic gate 602 is connected, preferably connected, to the R terminal of the flip-flop 601. A first input of the logic gate 602 receives the output voltage VCompIMAX505 from the current comparator circuit 505 described in relation to [Fig. 5]. A second input of the logic gate 602 receives a monitoring voltage Ton-max to verify that the conduction cycle time of the power transistor 404 does not exceed a limit. In one example, the Ton-max602 voltage is provided by the oscillator circuit 504 described in relation to [Fig. 5].

[0112] The circuit 600 further includes an AND logic gate 603 comprising two inputs and one output. The output of the logic gate 603 is connected, preferably connected, to the initialization terminal of the flip-flop 601. A first terminal of the logic gate 603 receives the clock voltage CK500 supplied by the oscillating circuit 504 described in relation to [Fig. 5].

[0113] The circuit 600 further includes a NOR logic gate 604 having at least two inputs and one output. The output of logic gate 604 is connected, preferably connected, to the second input of logic gate 603. A first input of logic gate 604 receives the voltage VCompOP508 supplied by the filtering circuit 509 described in relation to [Fig. 5]. A second input of logic gate 604 receives the voltage VCompOV506 supplied by the filtering circuit 507 described in relation to [Fig. 5].

[0114] In addition, optionally, the logic gate 604 may include additional inputs receiving other voltages such as an OT604 voltage for detecting overheating, and / or a UV604 voltage for detecting a supply voltage of the control circuit 403 of the power transistor 404 that is too low.

[0115] Thus, the values ​​of the voltages CK500, VCompOP508, VcompOV506, VCompIMAX505 and Ton-max602, and optionally the values ​​of the voltages OT604 and UV604 have the ability to start and / or stop a conduction cycle of the power transistor 404.

[0116] Figure 7 represents an embodiment of an oscillating circuit 700 of the type of oscillating circuit 504 described in relation to [Fig.5].

[0117] The oscillating circuit 700 includes a comparator circuit 701 comprising two inputs and one output. A first input (+) of the comparator circuit 701 is connected, preferably connected, to a terminal 403_c_clk constituting a terminal of the power switch 403 described in relation to [Fig. 4]. A second input (-) of the comparator circuit 701 is an inverting input and is connected, preferably connected, to a node A700 for applying a threshold voltage Vth701 of the comparator circuit. The output of the comparator circuit 701 is connected, preferably connected, to a node B700. An example embodiment of the comparator circuit 701 is described in relation to [Fig. 9].

[0118] The oscillating circuit 700 further includes a delay element 702. The delay element 702 includes a connected input, preferably connected to node B700, and an output providing the clock voltage CK500.

[0119] The oscillating circuit 700 further comprises an inverting logic gate 703 and a NOR logic gate 704. An input of the logic gate 703 is connected, preferably connected, to node B700. An output of the logic gate 703 is connected, preferably connected, to a first input of the logic gate 704. A second input of the logic gate 704 is connected, preferably connected, to the output of the delay element 702. An output of the logic gate 704 provides the voltage Ton-max602 described in relation to [Fig. 6].

[0120] The oscillating circuit 700 further includes a voltage divider bridge for generating the threshold voltage Vth701. The voltage divider bridge has three resistors R701, R702, and R703. One terminal of resistor R701 is connected, preferably connected, to a node receiving a supply voltage VDD700, and a second terminal of resistor R701 is connected, preferably connected, to the inverting input of comparator circuit 701. One terminal of resistor R702 is connected, preferably connected, to the inverting input of comparator circuit 701, and a second terminal of resistor R702 is connected, preferably connected, to a node C700. One terminal of resistor R703 is connected, preferably connected, to node C700, and a second terminal of resistor R702 is connected, preferably connected, to terminal 403-700. In [Fig.7], the 403-700 terminal is represented by the mass symbol.

[0121] The oscillating circuit 700 further comprises an e-mode transistor T701 having a first conduction terminal connected, preferably connected, to node C700, and a second conduction terminal connected, preferably connected, to terminal 403-GND. The gate of transistor T701 is preferably connected to the output of the delay element 702.

[0122] The oscillating circuit 700 further comprises a T702 e-mode transistor and a resistor R704. A first conduction terminal of transistor T702 is connected, preferably connected, to a first terminal of resistor R704, and a second conduction terminal of transistor T702 is connected, preferably connected, to terminal 403-GND. A second conduction terminal of resistor R704 is connected, preferably connected, to a terminal 403_R_clk constituting another terminal of the power switch 403 described in relation to [Fig. 4].

[0123] The oscillating circuit 700 further comprises, finally, two resistors R705 and R706 and a capacitor C701. One terminal of resistor R705 is connected, preferably connected, to terminal 403_R_clk, and a second terminal of resistor R705 is connected, preferably connected, to terminal 403_c_clk. One terminal of resistor R706 is connected, preferably connected, to terminal 403_R_clk, and a second terminal of resistor R705 is connected, preferably connected, to the node receiving the supply voltage VDD700. One terminal of capacitor C701 is connected, preferably connected, to terminal 403_c_clk, and a second terminal of capacitor C701 is connected, preferably connected, to terminal 403-GND.

[0124] The operation of the oscillating circuit 700 is described in relation to [Fig.8].

[0125] Fig. 8 represents timing diagrams illustrating the operation of the oscillating circuit 700 described in relation to Fig. 7.

[0126] More specifically, [Fig.8] includes the following chronograms: - a chronogram representing the time evolution of the voltage C_clk_700 equal to the potential difference between terminal 403-c_clk and terminal 403-GND; - a timing diagram representing the time evolution of the CK500 clock voltage; and - a timing diagram representing the time evolution of the voltage Ton_max505.

[0127] The series RC circuit formed by the capacitor C701 and the resistor R706 is powered by the supply voltage VDD700. The voltage C_clk_700 is a periodic voltage which is compared continuously, by the comparator circuit 701, to the threshold voltage Vth701.

[0128] The CK500 clock voltage is a periodic voltage with positive pulses at regular intervals. The period of the CK500 clock voltage is determined by the charging time of capacitor C701. The duration of the positive pulses of the CK500 clock voltage is determined by the discharge time of capacitor C701 through resistors R706 and R705.

[0129] The Ton_max505 voltage is a periodic voltage exhibiting positive pulses at regular intervals. The period of the Ton_max505 voltage is equal to the period of the CK500 clock voltage. One period of the Ton_max505 voltage starts, in a low state, at the instant when the CK500 clock voltage presents a rising edge, that is, from the moment when a positive pulse of the clock voltage starts. The voltage Ton_max505 has a high state from a time fixed by the delay element 702. The period of the voltage Ton_max505 ends with a falling edge at the moment when the clock voltage CK500 has a new rising edge.

[0130] Fig.9 represents an example of an embodiment of a comparator circuit 900 that can be used in the embodiment of the power switch 400 described in relation to Fig.4.

[0131] The comparator circuit 900 comprises two supply nodes VSUPP900 and VREF900, two input nodes N900+ and N900-, and one output node OUT900. The supply node VSUPP900 receives a voltage higher than the voltage received by the node VREF900; for example, the supply node VSUPP receives a voltage of approximately 6 V and the node VREF900 receives a voltage of approximately 0 V. The input nodes N900+ and N900- receive the voltages to be compared. The node OUT900 provides the voltage representing the result of comparing the voltages received by the nodes N900+ and N900-.

[0132] The circuit 900 comprises, between nodes VSUPP900 and VREF900, and on a first branch, a d-mode transistor T901, a resistor R901, and a d-mode transistor T902. The drain of transistor T901 is connected, preferably connected, to node VSUPP900, and the source of transistor T901 is connected, preferably connected, to one terminal of resistor R901. The second terminal of resistor R901 is connected, preferably connected, to both the drain and gate of transistor T902. The source of transistor T902 is connected, preferably connected, to node VREF900.

[0133] The circuit 900 further comprises, between node VSUPP900 and the midpoint between resistor R901 and transistor T902, and on a second branch, a d-mode transistor T903 and a resistor R902. The drain of transistor T903 is connected, preferably connected, to node VSUPP900, and the source of transistor T903 is connected, preferably connected, to one terminal of resistor R902. The second terminal of resistor R902 is connected, preferably connected, to the midpoint between resistor R901 and transistor T902. According to one embodiment, transistors T901 and T902 may be e-mode transistors.

[0134] The circuit 900 comprises, between nodes VSUPP900 and VREF900, and on a third branch, a resistor R903, a d-mode transistor T904, and a d-mode transistor T905. One terminal of resistor R903 is connected, preferably connected, to node VSUPP900, and the second terminal of resistor R903 is connected, preferably connected, to the drain of transistor T904 and to the gate of transistor T903. The source of transistor T904 is connected, preferably connected, to the drain of transistor T905. The source of transistor T905 is connected, preferably connected to node VREF900. The gate of transistor T904 is connected, preferably connected, to node N900+.

[0135] The circuit 900 comprises, between nodes VSUPP900 and VREF900, and on a fourth branch, a resistor R904, a d-mode transistor T906, and transistor T905. One terminal of resistor R904 is connected, preferably connected, to node VSUPP900, and the second terminal of resistor R904 is connected, preferably connected, to the drain of transistor T906 and to the gate of transistor T901. The source of transistor T906 is connected, preferably connected, to the drain of transistor T905. The gate of transistor T906 is connected, preferably connected, to node N900-.

[0136] The circuit 900 comprises, between nodes VSUPP900 and VREF900, and on a fifth branch, an e-mode transistor T907 and an e-mode transistor T908. The drain of transistor T907 is connected, preferably connected, to node VSUPP900, and the source of transistor T907 is connected, preferably connected, to the drain of transistor T908. The source of transistor T908 is connected, preferably connected, to node VREF900. The gate of transistor T907 is connected, preferably connected, to the gate of transistor T903.

[0137] The circuit 900 comprises, between nodes VSUPP900 and VREF900, and on a sixth branch, a d-mode transistor T909 and a d-mode transistor T910. The drain of transistor T909 is connected, preferably connected, to node VSUPP900, and the source of transistor T909 is connected, preferably connected, to the drain of transistor T910. The source of transistor T910 is connected, preferably connected, to node VREF900. The gate of transistor T909 is connected, preferably connected, to the gate of transistor T901.

[0138] According to a first example, illustrated in [Fig.9], the gate of transistor T908 is connected, preferably connected, to the drain of transistor T910, and the gate of transistor T910 is connected, preferably connected, to the drain of transistor T908.

[0139] According to a second example, not illustrated in [Fig.9], the gates of transistors T908 and T910 are connected, preferably connected, to each other and to the drain of transistor T908.

[0140] Circuit 900 comprises, between nodes VSUPP900 and VREF900, and on a seventh and final branch, a resistor R905 and a d-mode transistor T911. One terminal of resistor R905 is connected, preferably connected, to node VSUPP900, and a second terminal of resistor R905 is connected, preferably connected, to the output node OUT900. The drain of transistor T911 is connected, preferably connected, to node OUT900, and the source of transistor T911 is connected, preferably connected, to node VREF900. The gate of transistor T911 is connected, preferably connected, to the drain of transistor T910.

[0141] Transistors T904 and T905 are differential input transistors. Resistors R901 and R902 are biasing resistors. Transistors T901, T902, T903, and T905 are biasing transistors. T907 and T909 are voltage-following transistors. T908 and T910 are current comparators. The seventh branch is an output branch.

[0142] The comparator circuit 900 operates as follows. When the gate voltage of transistor T906 becomes greater than the gate voltage of transistor T904, then the gate voltage of transistor T909 becomes less than the gate voltage of transistor T907, which causes the gate voltage of transistor T911 to become less than the threshold voltage of transistor T911. The output voltage VOUT900 is then related to the voltage VSUPP900.

[0143] Fig. 10 represents a first embodiment of a 1000 current comparator circuit of the embodiment of Fig. 5.

[0144] As explained in relation to [Fig. 5], the control circuit 405 of the power transistor 404 includes the comparator circuit 505. The circuit 1000 verifies whether the output current supplied by the switching power supply, which includes the power switch 403, exceeds a threshold value. The feedback current IFB400 described in relation to [Fig. 4] is a representation of the output current of the switching power supply and enables this comparison.

[0145] A lack of load results in an output voltage exceeding a limit value, also called output voltage overload. Such an increase in output voltage results in an increase in the IFB400 feedback current.

[0146] The comparator circuit 505 (C Comp) includes an input (+) connected to terminal 403-IFB, and an inverting input (-) receiving a threshold voltage VthIMAX505. The comparator circuit 505 provides, at output, the comparison voltage VCompIMAX505 to the logic circuit 503.

[0147] Terminal 403-IFB is further connected to a node receiving a supply voltage VDD1000 via a resistor R1001.

[0148] The operation of this current comparison is described in more detail with reference to Figures 11 and 12.

[0149] Fig. 11 represents timing diagrams illustrating the operation of the comparison carried out by the comparator circuit 505 of Fig. 10.

[0150] Fig. 11 includes, more specifically, the following chronograms: - a chronogram representing the temporal evolution of the IFB400 current; - a chronogram representing the evolution of the IDRAIN404 current; - a timing diagram representing the state, open (ON) or closed (OFF), of transistor 404; - a timing diagram representing the state, open (ON) or closed (OFF), of transistor 501; and - A timing diagram represents the temporal evolution of a voltage Vsense500 re showing the voltage between the non-inverting input (+) terminal of comparator circuit 505 and terminal 403-GND.

[0151] As previously stated, the power transistor 404 is driven by the driver circuit 502, which itself receives a control voltage from the logic circuit 503. During its operation, the power transistor 404 alternates between open and closed states, the frequency of which is defined by the frequency of the clock voltage CK500. More specifically, at each rising edge of the clock voltage CK500, the power transistor 404 enters a closed, or conducting, state, the minimum duration of which is defined by the duration of a high state of the clock voltage CK500. The current IDRAIN404 at the drain of the transistor 404 exhibits a positive peak when the transistor is turned on and then increases linearly as illustrated.

[0152] Transistor 501 is controlled by the falling edges of the clock voltage CK500.

[0153] During an opening phase, or a conduction phase, of the power transistor 404, the feedback current IFB is compared to a threshold current IFBMAX. To perform this comparison, the voltage Vsens500 is compared to the voltage VthIMAX505. The voltage VthIMAX505 is obtained using a circuit described below in relation to Figures 25 and 26. Furthermore, to optimize the comparison, the voltage Vsens500 has a component Vshift505 that depends on the resistors R501 and R1001 and the voltage VDD1000, which represents the internal offset voltage of the comparator circuit 505.

[0154] Fig. 11 presents two cases, a [Normal] case during which the feedback current IFB400 remains constant at a low value, for example zero, and a [Max] case during which the feedback current IFB400 exhibits an increase.

[0155] When the feedback current IFB400 increases, the voltage Vsense500 also increases, and also during an open state, or a non-conducting state of transistor 404. This increase is detected by the comparator circuit 505, then taken into account by the logic circuit 503, which receives the voltage VthIMAX505, and which shortens the following conduction phase(s) of transistor 404.

[0156] Fig. 12 represents a curve illustrating the evolution of the drain current IDRAIN404 as a function of the feedback current IFB400 during the beginning of a conduction phase.

[0157] The drain current IDRAIN404 is given by the following mathematical formula: [Math 1] IDRAIN404= -IFB400^^M4 - VDDIOOO*™^ + VthIMAX505*»™^

[0158] where Rdson404 represents the internal resistance of the power transistor 404 when it is conducting.

[0159] Figure 13 represents a second embodiment of a 1300 circuit current parser of the embodiment of [Fig.5] of the type of circuit 1000 described in relation to [Fig. 10].

[0160] Circuit 1300 has common elements with circuit 1000. These common elements are not described in detail again here, only the differences between circuits 1000 and 1300 are highlighted.

[0161] Like circuit 1000, circuit 1300 includes comparator circuit 505 and resistors R501 and R1001. Circuit 1300 also includes a component arrangement for setting the value of the VthIMAX505 voltage and for achieving a soft start.

[0162] The circuit 1300 therefore further comprises two resistors R1301 and R1302. One terminal of resistor R1301 is connected, preferably connected, to terminal 403-GND, and a second terminal of resistor R1301 is connected, preferably connected, to the inverting input terminal of comparator circuit 505. One terminal of resistor R1302 is connected, preferably connected, to the inverting input terminal of comparator circuit 505, and a second terminal of resistor R1301 is connected, preferably connected, to a terminal 403-SS which can be a terminal of the power switch 403. Resistors R1301 and R1302 allow the value of the voltage VthIMAX505 to be set.

[0163] The circuit 1300 further includes a resistor R1303 and a capacitor Cl301. One terminal of resistor R1303 is connected, preferably connected, to a node receiving a supply voltage VDD1300, and a second terminal of resistor R1301 is connected, preferably connected, to terminal 403-SS. In one example, the supply voltage VDD1300 is the same as the supply voltage VDD1000. One terminal of capacitor C1301 is connected, preferably connected, to terminal 403-GND, and a second terminal of capacitor Cl301 is connected, preferably connected, to a 403-GND terminal.

[0164] The operation of circuit 1300 is described in relation to [Fig. 14].

[0165] Figure 14 shows timing diagrams illustrating the operation of the current comparator circuit 1300 of Figure 13. Figure 14 illustrates, more particularly, a slow-start operating mode of the comparator circuit in which the trigger threshold of the comparator circuit is increased slowly.

[0166] Figure 14 represents, more specifically, the following chronograms: - a timing diagram representing the time evolution of the VDD1300 supply voltage; - a timing diagram representing the time evolution of a voltage SS 1300 taken between terminal 403-SS and terminal 403-GND; and - a timing diagram representing the time evolution of the IDRAIN404 current.

[0167] The SS 1300 voltage is a start-up control voltage for the switch power 403. When the power switch 403 starts, its power supply circuits providing the voltage VDD1300 start, and the voltage VDD1300 gradually increases, via the capacitor 1303. When the voltage SS 1300 increases in turn, it allows the value of the voltage VthIMAX505 to be limited at startup and therefore limits the value of the current IDRAIN404 during startup.

[0168] The [Fig. 15] represents an embodiment of a 1500 open output load detection circuit of the embodiment of the [Fig. 5].

[0169] As explained in relation to [Fig. 5], the control circuit 405 for the power transistor 404 includes the comparator circuit 508 and the filtering circuit 509, both of which detect a lack of load at the output of the switching power supply, which includes the power switch 403. A lack of load results in an output voltage exceeding a limit value. As previously stated, the output voltage of the switching power supply is represented by the feedback current IFB400. The detection circuit 1500 is therefore adapted to detect an increase in the feedback current IFB400.

[0170] The detection circuit 1500 comprises the comparator circuit 508 and the filtering circuit 509. The comparator circuit 508 is of the type of the 508 circuit, for example, of the type of comparator circuit 900 described in detail with reference to [Fig. 9]. The filtering circuit and its operation are described in detail with reference to Figures 17 to 20.

[0171] As previously stated, the comparator circuit 508 (OP) comprises a non-inverting input terminal (+) connected to terminal 403-IFB, and an inverting input terminal (-) receiving the threshold voltage VthOP508. In one embodiment, the threshold voltage VthIMAX505 is lower than the threshold voltage VthOP508. The comparator circuit 505 provides, at its output, a voltage to the filtering circuit 509, which in turn provides, at its output, the comparison voltage VCompOP508 to the logic circuit 503. The comparator circuit 508 allows for the detection of an excessive current surge.

[0172] The filtering circuit 509 is intended to take into account the result of the comparator circuit 508 only when the power transistor 403 is in an open state, i.e. a non-conducting state.

[0173] The detection circuit 1500 further comprises an inverter circuit 1501 and a transistor T1501. By way of example, the transistor T1501 is a d-mode transistor. The inverter circuit 1501 comprises an input terminal connected, preferably connected, to the input of the driver circuit 502, and an output terminal connected, preferably connected, to the gate terminal of the transistor T1501. A first conduction terminal of the transistor T1501 is connected, preferably connected, to a node N1501 connecting a terminal of the resistor R501 to a conduction terminal of the transistor 501. A second conduction terminal of the transistor T1501 is connected, preferably connected, at terminal 403-GND.

[0174] The operation of this current overload detection is described in relation to [Fig. 16].

[0175] Fig. 16 represents timing diagrams illustrating the operation of the open output load detection circuit of Fig. 15.

[0176] Fig. 16 represents, more particularly, the following timing diagrams: - a timing diagram representing the time evolution of the output voltage Vout400 of the switching power supply including the power switch 403; - a chronogram representing the temporal evolution of the IDRAIN404 current; - a timing diagram representing the time evolution of the voltage Vsense500; and - a timing diagram representing the time evolution of the voltage VCompOP508.

[0177] Fig. 16 presents two cases: the [Normal] case during which the switching power supply has an output load and during which the voltage Vout400 is constant, and an [OP] case during which the output load is removed, and during which the voltage Vout400 increases.

[0178] As the voltage Vout400 increases, the feedback current IFB400 also increases, and its inverse, the voltage Vsense500, increases accordingly. Initially, the voltage Vsense500 exceeds the threshold voltage VthIMAX505, and the conduction cycle time of the power transistor 404 is gradually reduced. When the voltage Vsense500 exceeds the threshold voltage VthOP508 and the power transistor is in an open state, the voltage VCompOP508 goes high, indicating that the output load is missing.

[0179] Figure 17 represents an embodiment of a filtering circuit 1700 of the detection circuit 1500 described in relation to Figure 15. Figure 17 shows the filtering circuit 1700 and the comparator circuit 508 (OP).

[0180] The filtering circuit 1700 includes an RS-type flip-flop 1701, that is, a flip-flop of the same type as the flip-flop 601 of the logic circuit 503. In other words, the flip-flop 1701 has three terminals, including a set terminal, a reset terminal, and an output terminal Q. The output terminal Q provides the comparison voltage VCompOP508.

[0181] The filtering circuit 1700 further comprises two AND logic gates 1702 and 1703, each comprising two input terminals and one output terminal. A first input terminal of logic gate 1702 is connected, preferably connected, to the output terminal of comparator circuit 508. The output voltage of comparator circuit 508 is hereafter referred to as VOP58. A second input terminal of logic gate 1702 is connected, preferably connected, to a node A1700. The output terminal of logic gate 1701 is connected, preferably connected, to the Set terminal of flip-flop 1701. A first input terminal of logic gate 1703 is connected, from preferably connected to node A1700. The output terminal of logic gate 1702 is connected, preferably connected, to the Reset terminal of flip-flop 1701.

[0182] The filtering circuit 1700 further includes an inverter circuit 1704. An input terminal of the inverter circuit 1704 is connected, preferably connected, to the output terminal of the comparator circuit 508. An output terminal of the inverter circuit 1704 is connected, preferably connected, to a second input terminal of the logic gate 1703.

[0183] The filtering circuit 1700 further comprises an inverter circuit 1705. An input terminal of the inverter circuit 1705 is connected, preferably connected, to a node providing a control voltage Ton_disl705. A circuit for generating the control voltage Ton_disl705 is described in detail with reference to [Fig. 19]. An output terminal of the inverter circuit 1705 is connected, preferably connected, to node A1700.

[0184] The operation of the filtering circuit is described in relation to [Fig. 18].

[0185] Figure 18 shows timing diagrams illustrating the operation of the circuit filtering 1700 of the [Fig. 17].

[0186] Figure 18 represents, more specifically, the following chronograms: - a chronogram representing the temporal evolution of the voltage Vsense500; - a chronogram representing the time evolution of the control voltage Ton_disl705; - a chronogram representing the temporal evolution of the VOP508 voltage; - a timing diagram representing the time evolution of a voltage VS 1701 taken at the Set input terminal of the 1701 flip-flop; - a timing diagram representing the time evolution of a voltage VR1701 taken at the Reset input terminal of the 1701 flip-flop; - a timing diagram representing the time evolution of the voltage VCompOP508.

[0187] When the voltage Vsense500 exceeds the threshold voltage VthOP508, the voltage VOP508 goes high. The control voltage Ton_disl705 is high whenever the driver circuit requests the power transistor 404 to switch to the closed state, i.e., the conducting state. The voltages VOP508 and Ton_disl705 are combined so that the comparison voltage VCompOP508 only takes into account the high states of the voltage VOP508 when the power transistor is open.

[0188] The [Fig. 19] represents an embodiment of a circuit 1900 for generating the control signal Ton_disl705 of the filtering circuit 1700 of the [Fig. 17].

[0189] The 1900 circuit includes a 1901 NOR logic gate comprising two input terminals and one output terminal. A first input terminal of the 1901 logic gate receives a voltage PwrGate404 corresponding to the voltage of command applied to the gate terminal of power transistor 404. A second input terminal of logic gate 1901 receives the clock voltage CK500.

[0190] The circuit 1900 further includes an inverter circuit comprising an input terminal connected, preferably connected, to the output terminal of the logic gate 1901.

[0191] The circuit 1900 further comprises an e-mode transistor T1901, a resistor R18901, and an e-mode transistor T1902. A first conduction terminal of transistor T1901 is connected, preferably connected, to a node providing a supply voltage VDD1900. A second conduction terminal of transistor T1901 is connected, preferably connected, to a first terminal of resistor R1901. The gate terminal of transistor T1901 is connected, preferably connected, to the output terminal of the inverter circuit 1902. A second terminal of resistor R1901 is connected, preferably connected, to a first conduction terminal of transistor T1902. A second conduction terminal of transistor T1902 is connected, preferably connected, to terminal 403-GND. The gate terminal of transistor T1902 is connected, preferably connected, to the output terminal of logic gate 1901.

[0192] The 1900 circuit further includes a capacitor C1901 connecting the middle node between transistor T1901 and resistor R191 and terminal 403-GND.

[0193] Finally, the 1900 circuit further includes an OR logic gate 1903 with two input terminals and one output terminal. A first input terminal of the logic gate 1903 is preferably connected to the midpoint between transistor T1901 and resistor R191 and terminal 403-GND. A second input terminal of the logic gate 1903 receives the clock voltage CK500. The output terminal of the logic gate 1903 provides the control voltage Ton_disl705.

[0194] Fig. 20 represents timing diagrams illustrating the operation of the 1900 circuit of Fig. 19.

[0195] Figure 20 represents, more specifically, the following chronograms: - a chronogram representing the temporal evolution of the IDRAIN404 current; - a chronogram representing the time evolution of the CK500 clock voltage; - a chronogram representing the temporal evolution of the PwrGate404 voltage; - a timing diagram representing the time evolution of a voltage VC1901 taken between the terminals of capacitor Cl901; and - a timing diagram representing the time evolution of the voltage Ton_disl705.

[0196] The control voltage Ton_disl705 is generated by the charging and discharging of capacitor Cl901. More specifically, a rising edge of the control voltage Ton_disl705 is triggered by a rising edge of the clock voltage CK500, and a falling edge of the control voltage Ton_disl705 is triggered by a drop in the voltage across capacitor C1901. More Specifically, when the VC1901 voltage decreases and becomes less than a limit voltage VC19011im, the Ton_disl705 control voltage exhibits a falling edge.

[0197] For this purpose, capacitor C1901 is charged at each rising edge of clock voltage CK500, and is discharged at each falling edge of voltage PwrGate404 or at each falling edge of clock voltage CK500.

[0198] Thus, the control voltage Ton_disl705 is representative of a conduction phase of the power transistor 404.

[0199] Fig. 21 represents an embodiment of a circuit 2100 for detecting a short circuit at the output of the switching power supply 400 of Fig. 4, i.e. a short circuit between nodes OUT401 and OUT402. The circuit 2100 is also called the output short circuit detection circuit.

[0200] As explained in relation to [Fig. 5], the control circuit 500 for the power transistor 404 includes the comparator circuit 506 and the filtering circuit 507, both of which detect a short circuit at the output of the switching power supply, i.e., a short circuit between nodes OUT401 and OUT402. A short circuit at the output results in a decrease in the output voltage Vout and therefore a decrease in the feedback current IFB7400. Indeed, as previously stated, the output voltage of the switching power supply is represented by the feedback current IFB400.

[0201] The detection circuit 2100 comprises the comparator circuit 506 and the filtering circuit 507. The comparator circuit 506 is of the type of the circuit 505, for example, of the type of the comparator circuit 900 described in detail in relation to [Fig. 9]. The filtering circuit 507 is of the type of the filtering circuit 1700 described in relation to Figures 17 to 20.

[0202] As previously stated, the comparator circuit 506 (OV) includes a non-inverting input terminal (+) connected to terminal 403-IFB, and an inverting input terminal (-) receiving the threshold voltage VthOV506. In one embodiment, the threshold voltage VthOV506 is lower than the threshold voltage VthIMAX505. The comparator circuit 506 provides an output voltage to the filtering circuit 507. The comparator circuit 506 allows detection of a decrease in the feedback current IFB400.

[0203] The purpose of the filtering circuit 507 is to take into account the result of the comparator circuit 506 only when the power transistor 403 is in an open state, i.e. a non-conducting state.

[0204] The detection circuit 2100 further comprises a low-frequency oscillating circuit 2101. The circuit 2101 provides an output voltage CKLF2101. The circuit 2101 can supply the voltage CKLF2101 to the logic circuit 503. An example embodiment of the circuit 2101 is described in relation to [Fig. 23].

[0205] The detection circuit 2100 further comprises an AND logic gate 2102 (AND) comprising two input terminals and one output terminal. A first input terminal of logic gate 2102 is connected, preferably connected, to an output of filter circuit 507. A second input terminal of logic gate 2102 is connected, preferably connected, to the output terminal of circuit 2101, and thus receives the voltage CKLF2101. The output terminal of logic gate 2102 provides the comparison voltage VCompOV506 to logic circuit 503 (LOGIC).

[0206] The operation of this short-circuit detection is described in relation to [Fig.22].

[0207] Fig. 22 represents timing diagrams illustrating the operation of the short-circuit detection circuit of output 2100 of Fig. 21.

[0208] Fig. 22 represents, more particularly, the following timing diagrams: - a timing diagram representing the time evolution of the output voltage Vout400 of the switching power supply including the power switch 403; - a chronogram representing the temporal evolution of the IDRAIN404 current; - a chronogram representing the temporal evolution of the Vsense500 voltage; and - a timing diagram representing the time evolution of the voltage VCompOV506.

[0209] The [Fig.22] presents two cases, the [Normal] case during which the switching power supply operates normally and during which the voltage Vout400 is constant, and a [OV] case during which a short circuit is detected at the output, and during which the voltage Vout400 decreases.

[0210] When the voltage Vout400 decreases, the feedback current IFB400 also decreases, and its counterpart, the voltage Vsense500, decreases accordingly. The voltage Vsense500 decreases until it reaches the threshold voltage VthOV506. The comparison voltage VCompOV506 then detects the voltage drop in Vsense500, and the conduction cycles of the power transistor 404 are stopped.

[0211] Fig. 23 represents an oscillating circuit 2300 which can be used as an oscillating circuit of the embodiment of the circuit 2100 described in relation to Fig. 21.

[0212] In [Fig.23] are represented the comparator 506, the filtering circuit 507, the logic circuit 503, the logic gate 2102, and the circuit 2300 described below.

[0213] The circuit 2300 includes a comparator circuit 2301 of the type of comparator circuits 505, 506, and 508 of [Fig. 5], and, for example, of the type of comparator circuit 900 described in detail in relation to [Fig. 9]. The comparator circuit 2301 includes a non-inverting input terminal and an inverting input terminal. The comparator circuit 2301 further includes an output terminal providing the voltage CKLF2101, and being connected, preferably connected, to the logic circuit 503.

[0214] The circuit 2300 further includes an inverter circuit 2302. The inverter circuit 2302 includes an input terminal receiving the voltage CKLF2101, and an output terminal connected, preferably connected, to an input terminal of the logic gate 2102.

[0215] The 2300 circuit further includes a first voltage divider comprising a resistor R2301, a resistor R2302, and a resistor R2303. The first voltage divider is connected to the inverting input terminal of the comparator circuit 2301. One terminal of resistor R2301 is connected, preferably connected, to a node providing a supply voltage VDD2300, and a second terminal of resistor R2301 is connected, preferably connected, to the inverting input terminal of the comparator circuit 2301. One terminal of resistor R2302 is connected, preferably connected, to the inverting input terminal of the comparator circuit 2301, and a second terminal of resistor R2302 is connected, preferably connected, to the first terminal of resistor R2303. A second terminal of resistor R2303 is connected, preferably connected, to terminal 403-GND.

[0216] The 2300 circuit further includes a resistor R2304 and a resistor R2305. Resistors R2304 and R2305 are pull-up resistors. More specifically, resistor R2304 is a pull-up resistor, and resistor R2305 is a pull-down resistor. For this reason, the value of resistor R2304 is higher than the value of resistor R2305. One terminal of resistor R2304 is connected, preferably connected, to the node providing the supply voltage VDD2300, and a second terminal of resistor R2304 is connected, preferably connected, to the non-inverting input terminal of comparator circuit 2301. One terminal of resistor R2305 is connected, preferably connected, to the non-inverting input terminal of comparator circuit 2301.

[0217] The 2300 circuit further comprises two transistors, T2301 and T2302. Both T2301 and T2302 are e-mode transistors. A first conduction terminal of transistor T2301 is connected, preferably connected, to the midpoint between resistors R2302 and R2303, and a second conduction terminal of transistor T2301 is connected, preferably connected, to terminal 403-GND. A first conduction terminal of transistor T2302 is connected, preferably connected, to a second terminal of resistor R2305, and a second conduction terminal of transistor T2301 is connected, preferably connected, to terminal 403-GND. The gate terminals of transistors T2301 and T2302 are connected, preferably connected, to the output terminal of comparator circuit 2301.

[0218] The circuit 2300 further includes a capacitor 2301 having a first terminal connected, preferably connected, to the node supplying the supply voltage VDD2300 and a second terminal connected, preferably connected, to a 403-Covld terminal. The 403-Covld terminal is itself connected, preferably connected, to the non-inverting terminal of the comparator circuit 2301.

[0219] The operation of circuit 2300 is similar to the operation of circuit oscillating 700 described in relation to figures 7 and 8.

[0220] Fig. 24 shows timing diagrams illustrating in more detail the operation of the short-circuit detection circuit 2100 described in relation to Figures 21 to 23. Fig. 24 illustrates in more detail the power limiting principle related to the detection of a short circuit at the output as well as the associated restart attempts.

[0221] Figure [Fig.2]4 represents, more specifically, the following chronograms: - a chronogram representing the temporal evolution of the IFB400 feedback current; - a chronogram representing the time evolution of the voltage taken at terminal 403-SS; - a chronogram representing the time evolution of the voltage taken at terminal 403-403-Covld; - a chronogram representing the temporal evolution of the IDRAIN404 current; - a timing diagram representing the time evolution of the output voltage VFilt207 of the filtering circuit 207; - a timing diagram representing the time evolution of the voltage CKLF2101; and - a timing diagram representing the time evolution of the voltage VCompOV506.

[0222] As previously stated, circuit 2100 monitors a current drop in the current IFB400, which corresponds to a voltage drop in the voltage Vsense500. Filtering circuit 207 allows the voltage drops in the voltage Vsense500 occurring during a non-conducting phase of the power transistor 404 to be taken into account. The low-frequency oscillator circuit 2101 allows the duration of a non-conducting phase of the power transistor 404 to be defined.

[0223] Fig. 25 represents a first example of the realization of a 2500 circuit for generating the threshold voltages used by the 500 control circuit described in relation to Fig. 5.

[0224] In [Fig.25] are represented the comparator circuits 505, 506 and 508, the power transistor 404 and the circuit 2500 described below.

[0225] The 2500 circuit is adapted to provide the threshold voltages VthIMAX505, VthOP508 and VthOV206 used by the comparator circuits 505, 506 and 508.

[0226] The 2500 circuit includes two resistors R2501 and R2502. One terminal of resistor R2501 is connected, preferably connected, to terminal 403-SS and is connected, preferably connected, to the inverting input terminal of comparator circuit 508. A second terminal of resistor R2501 is connected, preferably connected, to the inverting input terminal of comparator circuit 505. One terminal of resistor R2502 is connected, preferably connected, to the inverting input terminal of comparator circuit 505.

[0227] The 2500 circuit further comprises two e-mode transistors, T2501 and T2502. A first conduction terminal of transistor T2501 is connected, preferably connected, to a second terminal of resistor R2502, and a second conduction terminal of transistor T2501 is connected, preferably connected, to the inverting input terminal of comparator circuit 506. A first conduction terminal of transistor T2502 is connected, preferably connected, to the inverting input terminal of comparator circuit 506, and a second conduction terminal of transistor T2502 is connected, preferably connected, to terminal 403-GND, represented in [Fig. 25] by ground. The control terminals of transistors T2501 and T2502 are both connected, preferably connected, to a node providing a supply voltage VDD2500.

[0228] The 2500 circuit further includes a resistor R2503. One terminal of resistor R2503 is connected, preferably connected, to terminal 403-SS. A second terminal of resistor R2501 is connected, preferably connected, to the node providing the supply voltage VDD2500.

[0229] Fig. 26 represents a second example of an embodiment of a 2600 circuit for generating the threshold voltages used by the 500 control circuit described in relation to Fig. 5.

[0230] In [Fig.26] are represented the comparator circuits 505, 506 and 508, the power transistor 404 and the circuit 2600 described below.

[0231] The 2600 circuit is adapted to provide the threshold voltages VthIMAX505, VthOP508 and VthOV206 used by the comparator circuits 505, 506 and 508.

[0232] Circuit 2600 includes all the elements of circuit 2500 described in relation to [Fig. 25]. These elements are not described again here. Only the differences between circuits 2500 and 2600 are highlighted.

[0233] Thus, the 2600 circuit further comprises an e-mode transistor T2601 and a capacitor C2601. A first conduction terminal of transistor T2601 is connected, preferably connected, to terminal 403-SS. A second conduction terminal of transistor T2601 is connected, preferably connected, to terminal 403-GND, represented by ground in [Fig. 26]. A control terminal of transistor T2601 is connected, preferably connected, to the output of the short-circuit detection circuit. In other words, the control terminal of transistor 2601 receives the voltage VCompOV506. A first terminal of capacitor C2601 is connected, preferably connected, to terminal 403-SS, and a second terminal of capacitor C2601 is connected, preferably connected, to terminal 403-GND.

[0234] Fig. 27 represents an embodiment of a switching power supply 2700 comprising an example of the embodiment of the power switch 403 described in relation to Fig. 4.

[0235] The 2700 switching power supply includes a 2700IN input node and a node of output 2700OUT.

[0236] As described previously, the power switch 403 comprises a power transistor 404 and a control circuit 403 detailed in [Fig. 27]. As a reminder, the power switch 403 is formed in and on a structure of the type of structure 100 described in relation to [Fig. 1]. The control circuit 403 comprises elements already described, including: - the 502 pilot circuit; - the 503 logic circuit; - the oscillating circuit 504; - comparator circuits 505, 506, and 508; - the short-circuit detection circuit 2100; and - the 501 transistor.

[0237] The control circuit 403 includes several connection terminals, among which: - terminal 403-DRAIN (DRAIN); - terminal 403-GND (GND); - a terminal T AB; - terminal 403-IFB (IFB); -terminal 403-SS (SS); - a CLK_C terminal; - a CLK_R terminal; - a dV / dt_ctrl terminal; - a VDD terminal; - a DZ6V terminal; - a VCC terminal; and - a SUPPLY terminal.

[0238] The control circuit 403 further includes power supply circuits 2701 (REG) and 2702 (VCC_SUP). These circuits are designed to provide the supply voltage(s) to the other circuits of the control circuit 403. For example, circuit 2702 is connected to the SUPPLY terminal. For example, circuit 2701 is connected to the VCC terminal and to the DZ6V terminal.

[0239] The control circuit 403 further includes a detection circuit 2703 (UV) for a voltage drop in the supply voltage(s) provided by the supply circuits 2701 and 2702. This circuit 2703 is, for example, connected to the circuits 2701 and 2702, but also to the logic circuit 503.

[0240] The control circuit 403 further includes an overheat detection circuit 2704 (OT). In one example, the detection circuit 2704 is connected, preferably linked, to the logic circuit 503.

[0241] The control circuit 403 further includes electrostatic discharge protection circuits 2705. Each circuit 2705 is associated with a connection terminal of the control circuit 403.

[0242] A person skilled in the art will be able to implement circuits 2701, 2702, 2703, 2704 and 2705. By way of example, examples of implementation of some of these circuits are given in French patent application referenced FR2210660.

[0243] The control circuit 403 further includes electronic components which, in [Fig. 27], are not formed on a structure of the type of structure 100 described in relation to [Fig. 1]. Some of these components, such as the resistors and capacitors, could be formed on the same structure as the rest of the control circuit 403, but are not here to allow easier adaptation of the parameters of the switching power supply 2700.

[0244] Thus, the control circuit 403 includes a capacitor C2701, one terminal of which is connected, preferably connected to the input terminal 2700IN and to the SUPPLY terminal of the control circuit 403. A second terminal of the capacitor C2701 receives a reference voltage.

[0245] The control circuit 403 further includes a Zener diode DZ2701. The cathode of the Zener diode DZ2701 is connected, preferably connected, to a terminal providing a bias current dedicated to the Zener diode DZ2701. The anode of the Zener diode DZ2701 receives a reference voltage.

[0246] The control circuit 403 further includes a capacitor C2702, one terminal of which is connected, preferably connected, to the VDD terminal. A second terminal of capacitor C2701 receives a reference voltage.

[0247] The control circuit 403 further includes a resistor R2701 and a capacitor C2704. One terminal of resistor R2701 is connected, preferably connected, to terminal VDD, and a second terminal of resistor R2701 is connected, preferably connected, to one terminal of capacitor C2704 and to terminal 403-SS. A second terminal of capacitor C2705 receives a reference voltage.

[0248] The control circuit 403 further includes a resistor R2702, a capacitor C2705, and a resistor R2703. One terminal of resistor R2702 is connected, preferably connected, to terminal VDD, and a second terminal of resistor R2702 is connected, preferably connected, to one terminal of capacitor C2705 and to terminal CLK_C. A second terminal of capacitor C2705 receives a reference voltage. One terminal of resistor R2703 is connected, preferably connected, to terminal CLK_R. A second terminal of resistor R2703 is connected, preferably connected, to terminal CLK_C.

[0249] The control circuit 403 further includes a resistor R2704, one of which The first terminal is connected, preferably connected to the VDD terminal. A second terminal of resistor R2704 is connected, preferably connected, to the dV / dt_ctrl terminal.

[0250] The control circuit 403 further includes a resistor R2705, one terminal of which is connected, preferably connected, to terminal IFB. A second terminal of resistor R2705 receives a reference voltage.

[0251] The 2700 switching power supply further includes a transformer 2706 comprising one input coil and two output coils. A first terminal of the input coil is connected, preferably connected, to the input terminal 2700IN, and a second terminal of the input coil is connected, preferably connected, to the 403-DRIAN terminal. Both output coils include a first terminal receiving a reference voltage. A second terminal of the first output coil is connected to the output node 2700OUT via a diode D2702 described below. A second terminal of the second output coil is connected to the VCC terminal via a diode D2703 described below.

[0252] The 2700 switching power supply further includes a Zener diode DZ2702 and a diode D2701 connected back-to-back between the input terminal 2700IN and the 403-DRAIN terminal. More specifically, the anode of Zener diode DZ2702 is connected, preferably connected, to the input terminal 2700IN. The cathode of Zener diode DZ2702 is connected, preferably connected, to the cathode of diode D2701. The anode of diode D2701 is connected, preferably connected, to the 403-DRAIN terminal.

[0253] The 2700 switching power supply further includes diodes D2702 and D2703 and a capacitor C2706. The anode of diode D2702 is connected, preferably connected, to the first output diode of transformer 2706, and the cathode of diode D2702 is connected, preferably connected, to the output terminal 2700OUT. The anode of diode D2703 is connected, preferably connected, to the second output diode of transformer 2706, and the cathode of diode D2703 is connected, preferably connected, to the VCC terminal. One terminal of capacitor C2706 is connected, preferably connected, to the VCC terminal, and a second terminal of capacitor C2703 receives a reference voltage.

[0254] The 2700 switching power supply further includes a resistor R2706, an optocoupler 2707, and a Zener diode DZ2703. The optocoupler 2707 comprises a light-emitting diode (LED2707) and a bipolar optotransistor (OT2707). One terminal of resistor R2706 is connected, preferably connected, to the output terminal 2700OUT, and a second terminal of resistor R2706 is connected, preferably connected, to the anode of diode LED2707. The cathode of diode LED2707 is connected, preferably connected, to the cathode of Zener diode DZ2703. The anode of Zener diode DZ2703 receives a reference voltage. The collector of the OT2707 transistor is connected, preferably connected, to the VDD terminal, and the emitter of the OT2707 transistor is connected, preferably connected, to terminal 403-IFB. The optocoupler 2707 forms the basic component of the feedback circuit 406 described in relation to [Fig.4].

[0255] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.

[0256] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Output short-circuit detection circuit (2100) of a switching power supply (400), formed in and on a monolithic semiconductor substrate (101) having one face covered with a layer of Gallium Nitride (102), said circuit being adapted to drive a power transistor (404) of said switching power supply (400), said power transistor (404) being formed in and on said monolithic semiconductor substrate (101).

2. Circuit according to claim 1, comprising a comparator circuit (506) of a first voltage (Vsense500) representative of the drain current of said transistor (404) and of a feedback current (IFB400) of said switching power supply.

3. Circuit according to claim 2, wherein said comparator circuit (506) is adapted to make said transistor (404) non-conducting if said first voltage (Vsense500) is less than a second threshold voltage (VthOV506).

4. Circuit according to claim 2 or 3, further comprising a first filtering circuit (507) allowing a result of said comparator circuit (506) to be taken into account only during a non-conducting phase of said power transistor (404).

5. Circuit according to any one of claims 1 to 4, further comprising an oscillating circuit (2101) adapted to provide a low-frequency clock voltage.

6. Pulse width modulation circuit (405) comprising a short circuit detection circuit (2100) according to any one of claims 1 to 5.

7. Circuit according to claim 6, further comprising a logic circuit adapted to receive a comparison voltage supplied by said detection circuit (2100).

8. Circuit according to claim 7, further comprising a driver circuit (502) of said power transistor (404) adapted to receive a control voltage from said logic circuit (503).

9. Power switch (403; 500) comprising a power transistor (404) adapted to receive a maximum voltage of 650 V between its drain and its source, and a pulse-width modulation circuit (405) according to any one of claims 6 to 8.

10. Switch according to claim 9, wherein said transistor of power is a (404) type HEMT e-mode transistor.

11. Switching power supply (400; 2700) comprising the power switch (403; 500) according to claim 9 or 10.

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