Manufacturing process for a CMUT transducer

Abstract

Method for manufacturing a CMUT transducer. This description relates to a method for manufacturing a CMUT transducer, comprising the following steps: a) forming a first structure having a cavity (137) extending into a first layer of silicon oxide (133) coating one face of a first layer of silicon (131); b) forming a lower metallic electrode (141) of the transducer at the bottom of the cavity; c) forming a second structure having a second layer of silicon (105); d) after steps a), b), and c), transferring and fixing the second structure onto the first structure by molecular bonding, so as to close the cavity. Figure for the abstract: Fig. 1J

Description

Title of the invention: Method for manufacturing a CMUT transducer technical field

[0001] The present description relates in general to the field of ultrasonic transducers, and, more particularly, to that of capacitive ultrasonic membrane transducers, also called CMUT transducers (from the English "Capacitive Micro-machined Ultrasonic Transducer"). Previous technique

[0002] Conventionally, a CMUT transducer comprises a flexible membrane suspended above a cavity, a first electrode, called the lower electrode, located on the side of the cavity opposite the membrane, and a second electrode, called the upper electrode, located on the side of the cavity opposite the first electrode and mechanically attached to the flexible membrane. During operation, a direct current (DC) bias voltage is applied between the electrodes. When a suitable alternating current excitation voltage, superimposed on the DC bias voltage, is applied between the electrodes, the flexible membrane vibrates due to the change in the electrostatic force exerted between the electrodes, resulting in the emission of an ultrasonic acoustic wave.Conversely, when the transducer receives an ultrasonic acoustic wave, the flexible membrane vibrates under the effect of the variation in mechanical pressure, leading to the appearance, between the lower and upper electrodes of the transducer, of an alternating voltage superimposed on the DC bias voltage, due to the variation in capacitance between the electrodes.

[0003] A CMUT transducer is conventionally coupled to an electronic control circuit configured to, during an emission phase, apply between the electrodes of the transducer an alternating excitation voltage superimposed on a continuous bias voltage, so as to cause the emission of an ultrasonic acoustic wave by the transducer, and, during a reception phase, apply between the electrodes of the transducer a continuous bias voltage and read between said electrodes an alternating voltage generated under the effect of a received ultrasonic acoustic wave.

[0004] It would be desirable to have a method for manufacturing a CMUT transducer, this method at least partially overcoming some of the drawbacks of known methods for manufacturing a CMUT transducer. Summary of the invention

[0005] To this end, one embodiment provides a method for manufacturing a CMUT transducer, comprising the following steps: a) form a first structure comprising a cavity extending into a first layer of silicon oxide coating one face of a first layer of silicon; b) form a lower metallic electrode of the transducer at the bottom of the cavity; c) form a second structure comprising a second layer of silicon; d) after steps a), b) and c), transfer and fix the second structure onto the first structure by molecular bonding, so as to close the cavity.

[0006] According to one embodiment, the second structure comprises a second layer of silicon oxide coating one face of the second silicon layer, and, in step d), the second structure is fixed to the first structure by molecular bonding of the second silicon oxide layer to the first silicon oxide layer.

[0007] According to one embodiment, the process includes, before step d), a step of forming an upper metallic electrode of the transducer on and in contact with the face of the second silicon oxide layer opposite to the second silicon layer.

[0008] According to one embodiment, the second silicon layer is unintentionally doped or has a doping level of less than 1013 atoms / cm3.

[0009] According to one embodiment, the second silicon layer has an electrical resistivity greater than 100 Q.cm.

[0010] According to one embodiment, the process includes, before the formation of the upper metal electrode, a step of forming conductive vias through the second silicon layer, the upper metal electrode of the transducer then being formed in contact with the conductive vias.

[0011] According to one embodiment, the second silicon layer has a doping level greater than 1016 atoms / cm3 and forms a non-metallic upper electrode of the transducer.

[0012] According to one embodiment, the second silicon layer has an electrical resistivity of less than 0.2 Q.cm and forms a non-metallic upper electrode of the transducer.

[0013] According to one embodiment, in step d), annealing at a temperature between 700 and 1200°C, for example at a temperature of around 1100°C, is carried out after transferring the second structure onto the first structure.

[0014] According to one embodiment, the lower metal electrode of the transducer is made of a metal having a melting point greater than 1100°C, for example greater than 1500°C, for example greater than 1600°C.

[0015] According to one embodiment, the lower metallic electrode of the transducer is made of molybdenum, platinum, titanium, tantalum, hafnium, iridium or tungsten.

[0016] According to one embodiment, the process comprises, after step d), a step e) of forming a localized opening in the second silicon layer opposite of a peripheral part of the cavity, so as to expose a contact re-establishment region of the lower metallic electrode of the transducer, leading to the laterally reopening of the cavity.

[0017] According to one embodiment, the process comprises, after step e), a step of forming a sealing plug in a dielectric material, for example silicon oxide or silicon nitride, at the lateral opening of the cavity formed in step e).

[0018] According to one embodiment, the sealing plug is formed by physical vapor deposition, preferably at a pressure lower than atmospheric pressure. Brief description of the drawings

[0019] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0020] [Fig.1A], [Fig.1B], [Fig.1C], [Fig.1D], [Fig.1E], [Fig.1F], [Fig.1G], [Fig.1H], [Fig.11], [Fig.U], [Fig.1K], [Fig.1L], [Fig.1M], [Fig.1N] and [Fig. 10] illustrate steps of an example of a manufacturing process for a CMUT transducer according to an embodiment;

[0021] [Fig.2] illustrates an example of the electrode pattern of a CMUT transducer of the type described in relation to Figures IA to 10;

[0022] [Fig.3] is an enlarged perspective view of a portion of a CMUT transducer of the type described in relation to Figures IA to 10;

[0023] Figures 4A, 4B, 4C and 4D illustrate steps in another example of a manufacturing process for a CMUT transducer according to one embodiment; and

[0024] Fig. 5 illustrates yet another example of a method for manufacturing a CMUT transducer according to one embodiment. Description of the implementation methods

[0025] The same elements have been designated by the same reference numerals in the different figures. In particular, structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0026] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the various applications that the described transducers may have have have not been detailed, as the described embodiments are compatible with the usual applications of ultrasonic transducers, especially in ultrasonic imaging devices. Furthermore, the control circuits of the described transducers have not been detailed, the modes of The implementations described are compatible with all or most known CMUT transducer control circuits.

[0027] In this description, unless otherwise specified, a CMUT transducer is a device composed of one or more CMUT transduction elements arranged according to the application requirements. Each CMUT transduction element consists of one or more CMUT transduction cell elements electrically connected to each other, for example, in parallel. Each CMUT cell element comprises, for example, a single flexible membrane suspended above a cavity, and two opposing electrodes adapted to receive an electrical excitation signal to vibrate the membrane and / or to generate an electrical response signal in response to membrane vibration.

[0028] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0029] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0030] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0031] Figures IA to 10 illustrate steps in an example of a manufacturing process for a CMUT transducer according to one embodiment. Figures IA to 10 show the fabrication of a single elementary CMUT transducer cell. In practice, a large number of cells can be fabricated simultaneously from the same starting substrate.

[0032] Figures IA to 1F illustrate successive stages of realization of a structure 120 including in particular the flexible membrane and the upper electrode of the CMUT transducer.

[0033] Figure 1A illustrates a starting stack of the SOI (Semiconductor On Insulator) type, comprising a silicon support substrate 101, a silicon oxide layer 103 covering one face, the lower face in the orientation of Figure 1A, of the substrate 101, and a silicon layer 105 covering the face of the silicon oxide layer 103 opposite the substrate 101. By way of example, each of the layers 103 and 105 extends continuously and with a substantially uniform thickness over the entire surface of the substrate 101. In In this example, the substrate 101 is in contact, by its lower face, with the upper face of the layer 103, and the layer 105 is in contact, by its upper face, with the lower face of the layer 103. The substrate 101 corresponds for example to a silicon wafer or a portion of a silicon wafer.

[0034] The thickness of the substrate 101 is, for example, between 10 pm and 1 mm, for example between 400 and 800 pm. The thickness of the silicon oxide layer 103 is, for example, between 50 nm and 2 pm. The thickness of the silicon layer 105 is, for example, between 0.2 and 10 pm. The silicon layer 105 is preferably highly resistive. For example, the silicon layer 105 has a relatively low doping level, for example less than 10¹³ atoms / cm³. The layer 105 is, for example, unintentionally doped. For example, the layer 105 has an electrical resistivity greater than 100 Ω·cm.

[0035] In this example, the silicon layer 105 corresponds to the future flexible membrane of the transducer.

[0036] Figure 1B illustrates a step in the formation, for each elementary cell of the transducer, of one or more holes 107 in the silicon layer 105, for the purpose of forming one or more conductive vias for re-establishing contact on the upper electrode of the elementary cell of the transducer. In this example, several small holes 107 are formed in a peripheral region of each elementary cell of the transducer.

[0037] Fig. 1B, as well as Figures IC, 1D, 1E and 1F described below, each include a vertical cross-sectional view b) of the structure, and a partial horizontal cross-sectional view a) in a plane between the lower face and the upper face of the silicon layer 105, representing the peripheral region of hole formation 107.

[0038] In the example shown, nine holes 107 arranged in a matrix of three rows and three columns are formed for each elementary cell of the transducer. However, the embodiments described are not limited to this particular arrangement.

[0039] By way of example, the width of each hole 107 is between 0.5 and 100 pm. The holes have, for example, in top view, a circular, square, rectangular or polygonal shape.

[0040] The holes 107 are formed from the lower face of the layer 105 and open into the silicon oxide layer 103 or onto the lower face of the silicon oxide layer 103.

[0041] The holes 107 are for example formed by photolithography and engraving.

[0042] Fig. 1C illustrates a step in the formation of a silicon oxide layer 109 on the lower face of the structure of Fig. 1A. The layer 109 is formed, for example, by thermal oxidation of the silicon layer 105. Thus, the layer 109 forms, for example, with a substantially constant thickness, on the lower face of the layer 105 and on the side walls of the holes 107. The thickness of layer 109 is for example between 1 and 20 pm.

[0043] Figure 1D illustrates a step of filling the holes 107 with metal to form conductive vias 111. The metal used to fill the holes 107 preferably has a high melting point, for example above 1100°C, above 1500°C, or above 1600°C. As a preferred example, the metal used to fill the holes 107 is molybdenum (Mo). As an alternative, the metal may be platinum (Pt), titanium (Ti), tantalum (Ta), hafnium (Hf), iridium (Ir), or tungsten (W).The deposition of the metal in the holes 107 can be carried out by physical vapor phase deposition, for example by sputter deposition, by electron beam evaporation and electroplating, or by electroless plating after the formation of a localized metallic primer layer on the bottom and lateral walls of the holes 107 (for example by full plate deposition followed by localized etching).

[0044] Figure 1E illustrates a localized etching step, for example by photolithography, of a portion of the thickness of the silicon oxide layer 109, so as to form in the layer 109, in each elementary cell of the transducer, a recess 113 intended to receive the upper electrode of the elementary cell. In this example, a portion of the thickness of the layer 109 is retained at the bottom of the recess 113 so as to electrically isolate the future upper electrode from the silicon layer 105.

[0045] In this example, the recess 113 is located primarily in a central portion (viewed from below) of the structure, intended to be positioned opposite the future cavity of the transducer's elementary cell. The recess 113 also extends opposite the peripheral portion comprising the vias 111, to allow for the resumption of an electrical connection to the upper electrode via the vias 111.

[0046] Figure 1F illustrates a step in the formation of an upper electrode 115 of the transducer, located in the recess 113. In this example, the electrode 115 is metallic. The electrode 115 is formed, for example, by full-plate deposition followed by localized etching of a metallic layer. In this example, the electrode 115 is entirely located within the recess 113 and has a thickness less than or equal to the depth of the recess 113. Thus, in this example, the lower face of the upper electrode 115 is recessed relative to the lower face of the portions of the silicon oxide layer 109 not etched in the step of Figure 1E, or is flush with the lower face of the portions of the silicon oxide layer 109 not etched in the step of Figure 1E. The electrode 115 extends, for example, over substantially the entire surface of the recess 113 and is in contact, by its upper face, with the lower face of the metal vias 111.

[0047] The metal used to form the electrode preferably has a high melting point, for example above 1100°C, above 1500°C, or above 1600°C. The metal used to form the electrode 115 may be the same as or different from the metal used to form the vias 111. As a preferred example, the metal used to form the electrode 115 is molybdenum (Mo). As an alternative, the metal may be platinum (Pt), titanium (Ti), tantalum (Ta), hafnium (Hf), iridium (Ir), or tungsten (W).

[0048] Reference 120 designates the structure obtained at the end of this step, including in particular the upper electrode 115 and the future flexible membrane 105 of the CMUT transducer, as well as conductive vias 115 passing through the membrane 105 and allowing the electrode 115 to be connected to an external control circuit.

[0049] View (a) of [Fig.2] illustrates the shape, in this example, in view from below, of the upper electrode 115 of the transducer, corresponding substantially to the shape of the recess 113 formed in the step of [Fig.1E].

[0050] Figures IG to II illustrate successive stages of realization of a structure 150 including in particular the lower electrode of the CMUT transducer.

[0051] Figure 1G illustrates an oxidation step of a silicon substrate or layer 131. The substrate 131 corresponds, for example, to a silicon wafer or a portion thereof. The substrate 131 has, for example, the same lateral dimensions as the substrate 101. The thickness of the substrate 131 is, for example, between 10 pm and 1 mm, for example, between 400 and 800 pm. The substrate 131 is preferably highly resistive. By way of example, the substrate 131 has a relatively low doping level, for example, less than 10¹³ atoms / cm³. The substrate 131 is, for example, unintentionally doped.

[0052] In this step, a layer of silicon oxide 133 is formed on and in contact with the upper face of the substrate 131. The thickness of the silicon oxide layer 133 is, for example, between 100 nm and 800 nm. In the example shown, a layer of silicon oxide 135 is also formed on and in contact with the lower face of the substrate 131 during this step.

[0053] Fig. 1H illustrates a localized etching step, for example by photolithography and etching, of a part of the thickness of the silicon oxide layer 133, so as to form in the layer 133, in each elementary cell of the transducer, a recess 137 intended to receive the lower electrode of the elementary cell and defining the cavity of the elementary cell.

[0054] In this example, two successive engravings are implemented to form the recess 137, so as to obtain two distinct engraving depths in distinct regions of the recess 137. More specifically, during the first etching, a first layer of the layer 133 is removed from the entire surface of the recess 137, and, during the second etching, one or more island-shaped portions 139 of the insulating layer 133 are left intact (i.e., unetched) in a central part of the transducer cavity. The portions 139 form mechanical stop pads to prevent a possible short circuit between the lower and upper electrodes of the transducer in the event of sagging of the flexible membrane.

[0055] In this example, part of the thickness of the layer 133 is retained at the bottom of the recess 137 so as to electrically isolate the future lower electrode from the silicon substrate 131.

[0056] In this example, the recess 137 is located primarily in a central portion (in top view) of the structure, intended to be positioned opposite the future cavity of the transducer's elementary cell. The recess 137 also extends opposite a peripheral portion of the transducer, for example, located on the side of the cavity opposite the peripheral region comprising the vias 111, to allow for the re-establishment of electrical contact on the lower electrode of the transducer.

[0057] Figure II illustrates a step in the formation of a lower electrode 141 of the transducer, located in the recess 137. The electrode extends to the bottom of the recess 137 and is interrupted at the pads 139, i.e., it laterally surrounds the pads 139. The thickness of the electrode 141 is less than the height of the pads 139. Thus, the upper surface of the electrode 141 is recessed relative to the upper surface of the pads 139, which is itself recessed relative to the upper surface of the layer 133 outside the recess 137. In this example, the height of the CMUT transducer cavity is defined by the distance between the plane of the upper surface of the electrode 141 and the plane of the upper surface of the silicon oxide layer 133. The cavity height is, for example, between 10 nm and 1 pm.

[0058] In this example, the electrode 141 is metallic. The electrode 141 is formed, for example, by full-plate deposition followed by localized etching of a metallic layer. The metal used to form the electrode preferably has a high melting point, for example, above 1100°C, above 1500°C, or above 1600°C. The metal used to form the electrode 141 may be the same as, or different from, the metal used to form the lower electrode 115. As a preferred example, the metal used to form the electrode 141 is molybdenum (Mo). As an alternative, the metal may be platinum (Pt), titanium (Ti), tantalum (Ta), hafnium (Hf), iridium (Ir), or tungsten (W).

[0059] Reference numeral 150 designates the structure obtained at the end of this step, including in particular the lower electrode 141 and the recess 137 defining the future cavity of the transducer.

[0060] View (b) of [Fig.2] illustrates the shape, in this example, in top view, of the lower electrode 141 of the transducer.

[0061] Figures IJ to 10 are vertical cross-sectional views illustrating successive manufacturing stages of the transducer from structures 120 and 150 of Figures 1F and II.

[0062] [Fig. 1 J] illustrates a step of transferring and fixing the structure 120 of [Fig. 1F] onto the structure 150 of [Fig. II].

[0063] More particularly, during this step, the structure 120 of [Fig.1F] is fixed to the structure 150 by direct bonding or molecular bonding of the lower face of the silicon oxide layer 109 to and in contact with the upper face of the silicon oxide layer 133. This step is preferably carried out under vacuum.

[0064] The cavity 137 of the transducer is thus closed, the lower electrode 141 and upper electrode 115 being placed opposite each other inside the cavity, respectively on the side of the lower wall and on the side of the upper wall of the cavity.

[0065] To improve the quality of the bonding, the structure is preferably annealed at a relatively high temperature after the debonding. The annealing is carried out at a temperature below the melting point of the metals that make up the vias 111, the upper electrode 115 and the lower electrode 141, for example at a temperature between 700 and 1200°C, for example at a temperature of around 1100°C. This is referred to as fusion bonding.

[0066] At the end of this step, the transducer cavity is hermetically sealed.

[0067] Figure 1K illustrates a removal step, for example by grinding and / or engraving, of the The substrate 101 and the buried silicon oxide layer 103 are exposed on the upper face of the assembly. Following this step, the upper face of the silicon layer 105, forming the flexible membrane of the transducer, is exposed. The upper face of the vias 111 is also exposed and flush with the upper face of layer 105.

[0068] Figure 111 illustrates a step in the formation, for example by photolithography and etching, of a localized opening 143 in the silicon layer 105, directly above a peripheral contact area on the lower electrode 141 of the transducer. In the example shown, the etching is interrupted on the upper face of the silicon oxide layer 109.

[0069] Figure IM illustrates a localized removal step of the silicon oxide layer 109 at the bottom of the aperture 143, so as to expose the upper surface of the lower electrode 141 of the transducer in the peripheral contact re-establishment zone. During this step, a through-hole 145 is formed in the silicon oxide layer 109 at the bottom of the aperture 143. In a top view, the surface area of ​​the aperture 145 is, for example, smaller than the surface area of ​​the aperture 143.

[0070] During this step, the cavity 137 of the transducer, previously hermetically sealed in the step of [Fig.U], is locally reopened, that is to say that the cavity is put back into contact with the outside atmosphere.

[0071] Figure 1N illustrates a step in forming a seal or plug 147 of an electrically insulating material, for example silicon dioxide (SiO2) or silicon nitride (SiNx), on the side of the opening 145 in contact with the cavity 137, and around the junction area between the central part of the lower electrode 141 located in the transducer cavity, and the peripheral contact area of ​​the electrode 141, located outside the cavity. The seal 147 then plugs the lateral opening of the cavity formed in the step shown in Figure 1M. The seal material 147 is preferably deposited under vacuum, i.e., under a pressure lower than atmospheric pressure, so as to obtain a cavity with a pressure lower than atmospheric pressure.The material of the seal 147 is, for example, deposited by chemical vapor deposition, for example by PE-CVD (Plasma Enhanced Chemical Vapor Deposition). As an example, the material is first deposited as a full plate, over the entire upper surface of the structure, then removed locally, for example by photolithography and etching, to be retained only in the vicinity of the lateral opening of the cavity formed in step [Fig.1M].

[0072] At the end of this step, the cavity 137 is again hermetically sealed, preferably under a pressure lower than atmospheric pressure.

[0073] Figure 3 is an enlarged perspective view illustrating in more detail the arrangement of the sealing joint 147 in the opening 143

[0074] Figure 10 illustrates a formation step, on the upper face side of the transducer, electrical connection pads 149 and 151 (not connected to each other) respectively on and in contact with the upper face of the conductive vias 111 and on and in contact with the upper face of the portion of the lower electrode 141 exposed in the step of [Fig.1M].

[0075] The pads 149 and 151 are thus connected respectively to the upper electrode 115 and the lower electrode 141 of the CMUT transducer and allow to polarize and / or excite electrically the transducer and / or to read electrical signals generated by the transducer.

[0076] The pads 149 are, for example, metallic, for example made of copper, aluminum, or an alloy based on one or more of these materials. In this example, the pad 149 does not extend over the flexible membrane 105 opposite the central part of the cavity 137 of the CMUT transducer.

[0077] An advantage of the method presented in relation to Figures IA to 10, 2 and 3 is that it allows the production of a CMUT transducer whose upper and lower electrodes Both electrodes are metallic, which minimizes access resistance. In particular, this reduces access resistance compared to CMUT transducers with silicon electrodes. The use of high-melting-point metals enables a fusion bonding assembly process, resulting in a highly robust and reliable transducer. Electrical connection of all the transducer electrodes to an external device can then be made on the same side of the transducer, for example, by wire bonding.

[0078] In the example shown, the use of a plurality of small conductive vias 111 surmounted by a connection pad 149 to connect the upper electrode 115 to the outside, advantageously makes it possible to obtain a stable and robust contact resumption structure.

[0079] Figures 4A to 4D are vertical sectional views illustrating steps of another example of a manufacturing process for a CMUT transducer according to one embodiment.

[0080] The method shown in Figures 4A to 4D differs from the method described above primarily in that, in the example shown in Figures 4A to 4D, the CMUT transducer does not include an upper metallic electrode inside the cavity. In this example, the silicon layer 105 forming the flexible membrane of the transducer is heavily doped and also forms the upper electrode of the transducer.

[0081] Figure 4A illustrates a structure corresponding to an SOI-type stacking, similar to that of Figure 1A. In this example, the silicon 105 layer is heavily doped. For example, the doping level of the silicon 105 layer is greater than 10¹⁶ atoms / cm³, for example, greater than or equal to 10¹⁸ atoms / cm³. For example, the 105 layer has an electrical resistivity of less than 0.2 Ω·cm².

[0082] [Fig.4B] illustrates another structure identical or similar to the structure of [Fig. II] and made in substantially the same way.

[0083] Fig. 4C illustrates a step of transferring and fixing the stack of Fig. 4A onto the structure of Fig. 4B.

[0084] More specifically, during this step, the structure of [Fig. 4A] is attached to the structure of [Fig. 4B] by direct bonding or molecular bonding. In this example, the bonding is a direct silicon-on-silicon oxide bond. More specifically, the lower face of the silicon layer 105 is bonded by direct bonding to and in contact with the upper face of the silicon oxide layer 133.

[0085] This hermetically seals the cavity 137 of the CMUT transducer.

[0086] To improve the quality of the bonding, the bonding is preferably a fusion bonding, that is to say that annealing of the structure at a relatively high temperature is planned after the transfer, for example at a temperature between 700 and 1200°C, by example at a temperature of around 1100°C.

[0087] The following steps are for example identical or similar to the steps described in relation to Figures 1K, IL, IM, IN and 10. It should be noted that in this example, the doped silicon constituting the membrane can optionally be etched to electrically isolate portions of the membrane.

[0088] Figure 4D illustrates the structure obtained after these steps. As illustrated in Figure 4D, in this example, the electrical connection pad 149 of the structure of Figure 10 is replaced by a metallic layer 401 extending over and in contact with the upper face of the silicon layer 105. The layer 401 extends, for example, over the entire surface of the flexible membrane 105 opposite the central part of the cavity 137 of the CMUT transducer.

[0089] Fig. 5 is a vertical cross-sectional view illustrating yet another example of a manufacturing process for a CMUT transducer according to one embodiment.

[0090] Fig. 5 represents the final structure obtained at the end of the process.

[0091] The process of [Fig.5] differs from the process of Figures 4A to 4D mainly in that, in the example of [Fig.5] a silicon oxide layer 501 is formed on and in contact with the lower face of the silicon layer 105. The layer 501 is formed for example between the step of [Fig.4A] and the step of [Fig.4C], for example by thermal oxidation of the lower face of the layer 105 of the stack of [Fig.4A].

[0092] The bonding implemented in the step of [Fig. 4B] is then a direct silicon oxide-on-silicon oxide bond. More particularly, the lower face of the silicon oxide layer 501 is bonded by direct bonding, preferably by fusion bonding, to and in contact with the upper face of the silicon oxide layer 133.

[0093] The remainder of the process is identical or similar to what has been described previously.

[0094] Thus, in this example, the silicon oxide layer 501 extends over the entire The lower surface of the flexible membrane 105 is positioned opposite the lower electrode 141 of the CMUT transducer. This prevents any direct electrical contact between the upper electrode (i.e., layer 105) and the lower electrode 141 in the event of collapse of the CMUT transducer membrane.

[0095] This allows, in particular, the transducer to operate in a so-called collapsed mode. In this operating mode, a continuous bias voltage is applied between the lower and upper electrodes of the transducer such that the flexible membrane collapses, so that the lower face of the silicon oxide layer 501 remains permanently in contact with the upper face of the lower electrode 141 in a central part of the cavity 137 of the CMUT transducer. In this case, the stop pads 139 formed in the cavity 137 can be omitted.

[0096] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art. In particular, the embodiments described are not limited to the examples of materials and dimensions mentioned in the description.

[0097] In addition, in the examples described above, the cavity of the CMUT transducer is defined by structuring (recess 137) of the silicon oxide layer 133 coating the upper face of the substrate 131. As an alternative, the cavity can be defined by structuring a silicon oxide layer formed on the side of the lower face of the silicon layer 105 forming the flexible membrane of the transducer.

Claims

Demands

1. A method for manufacturing a CMUT transducer, comprising the following steps: a) forming a first structure (150) having a cavity (137) extending into a first layer of silicon oxide (133) coating one face of a first silicon layer (131); b) forming a lower metallic electrode (141) of the transducer at the bottom of the cavity; c) forming a second structure (120) having a second silicon layer (105); d) after steps a), b), and c), transferring and fixing the second structure (120) onto the first structure (150) by molecular bonding, so as to close the cavity, wherein the second structure (120) has a second layer of silicon oxide (109) coating one face of the second silicon layer (105), and wherein, in step d),The second structure (120) is fixed to the first structure (150) by molecular bonding of the second silicon oxide layer (109) to the first silicon oxide layer (133), the process comprising, prior to step d), a step of forming an upper metallic electrode (115) of the transducer on and in contact with the face of the second silicon oxide layer (109) opposite the second silicon layer (105), the process further comprising, prior to the formation of the upper metallic electrode (115), a step of forming conductive vias (111) through the second silicon layer (105), the upper metallic electrode (115) of the transducer then being formed in contact with the conductive vias (111).

2. A method according to claim 1, wherein the second silicon layer (105) is unintentionally doped or has a doping level of less than 1013 atoms / cm3.

3. Method according to claim 1 or 2, wherein the second silicon layer (105) has an electrical resistivity greater than 100 Q.cm.

4. A method according to any one of claims 1 to 3, wherein, in step d), an annealing at a temperature between 700 and 1200°C, for example at a temperature of around 1100°C, is carried out work after the transfer of the second structure (120) onto the first structure (150).

5. A method according to any one of claims 1 to 4, wherein the lower metal electrode (141) of the transducer is made of a metal having a melting temperature greater than 1100°C, for example greater than 1500°C, for example greater than 1600°C.

6. A method according to any one of claims 1 to 5, wherein the lower metal electrode (141) of the transducer is made of molybdenum, platinum, titanium, tantalum, hafnium, iridium or tungsten.

7. A method according to any one of claims 1 to 6, comprising, after step d), a step e) of forming an opening (143) located in the second silicon layer (105) opposite a peripheral part of the cavity (137), so as to expose a contact re-establishment region of the lower metal electrode (141) of the transducer, leading to laterally reopening the cavity (137).

8. A method according to claim 7, comprising, after step e), a step of forming a sealing plug (147) of a dielectric material, for example silicon oxide or silicon nitride, at the lateral opening of the cavity formed in step e).

9. A method according to claim 8, wherein the sealing plug (147) is formed by physical vapor deposition, preferably at a pressure lower than atmospheric pressure.

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