METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE COMPRISING A REINFORCED BRIDGE STRUCTURE AND INTEGRATED CIRCUIT

Abstract

The present invention relates to a method for manufacturing a semiconductor device (10) comprising the following successive steps: obtaining (E1) a semiconductor substrate (1) comprising on its surface at least one pair of ohmic contacts (2) and a gate contact (3), the ohmic contacts forming fingers separated from each other (2A) (2B); deposition (E2) of a bridge support (4) made of a first polymer material covering the gate contact (3) and intended to support an electrical connection bridge (5D, 5E); deposition (E3) by electrodeposition of connection surfaces (5A, 5B, 5C) of the ohmic contacts (2) and the gate contact (3), and of bridges (5D, 5E) covering said support and electrically connecting the ohmic contacts (2) to the respective connection surface (5A, 5B); said connection surfaces (5A, 5B); and said bridges (5D, 5E) being formed by the same metallic layer (5). Figure 1.

Description

Title of the invention: METHOD FOR MANUFACTURING A SEMICONDUCTIVE DEVICE COMPRISING A REINFORCED BRIDGE STRUCTURE, AND INTEGRATED CIRCUIT

[0001] The field of the invention relates to a method for manufacturing semiconductors, in particular HFET transistors comprising a 3D multi-finger structure and bridges.

[0002] In the semiconductor industry, a Heterojunction Field Effect Transistor (HFET), also known as a High Electron Mobility Transistor (HEMT), is a type of field-effect transistor that uses a heteroepitaxial junction between two semiconductors with different band gaps to create a region of high electron mobility. This high electron mobility region is typically formed by a layer of AlGaN (aluminum gallium nitride) deposited on a layer of GaN (gallium nitride) on a silicon carbide (SiC) substrate. HFETs are widely used in high-frequency and high-power applications due to their high electron mobility, low noise, low distortion, and high radiation resistance. HFETs can be fabricated with multi-finger structures, also known as interdigitated gate structures.These multi-finger structures are often used to increase the active area of ​​the device, thereby increasing current capacity. Multi-finger structures consist of a series of alternating fingers of source and drain electrodes arranged perpendicular to the current direction in the active region of the device. This design allows for increased current density without increasing the overall size of the device.

[0003] Locating the gate control contact (G) in the same plane as the drain (D) and the source (S) would result in a G / S and G / D short circuit. One existing approach is to isolate the two planes with a thin dielectric passivation layer of the SiN or SiO2 type. The viability of this solution is not guaranteed because the dielectric layer may contain localized structural defects that can create contact areas between the two planes; this risk is all the greater when the components are fabricated over a large surface area. Furthermore, since SiN and SiO2 materials, commonly used in field-effect transistor technology, have a high dielectric constant, they generate parasitic capacitive effects.

[0004] Another approach is the use of the so-called "air-bridge" 3D structure, which consists of microfabricating an air-bridge contact that implies that the insulation between G / S and G / D is an air gap with a dielectric constant of 1. Such a structure is described in the scientific publication by Michael H. Willemann, entitled “Polymer-Supported Bridges for Multi-Finger AlGaN / GaN Heterojunction Field Effect Transistors (HFETs)”, Virginia Polytechnic Institute and State University, 2007. In the field of HFETs, due to the thinness of the metal layer, this type of structure is particularly fragile when using chemical etching techniques to extract the support structure. Furthermore, these structures are not suitable for direct contact cooling or for packaging by embedding them in a PCB (Printed Circuit Board).

[0005] Furthermore, in response to these problems, this document describes the fabrication of a polymer bridge support structure that facilitates the addition of front-side cooling elements. This process includes the steps of depositing ohmic contacts, grid contacts, and pads prior to depositing the polymer bridge structure. However, the presented structure is problematic because the bonding zones of the metallic layer at the edge of the support structure exhibit a discontinuity in thickness, which weakens the bridge, locally increases electrical resistance, and results in low thermal conductivity of the support structure.

[0006] Furthermore, patent document EP-A1-3951848 is known, for example, and describes a manufacturing solution for an air bridge for a multi-finger semiconductor that improves resistance to surface pressure. The bridge structure is designed according to a planar geometry, optionally featuring a surface cavity in the bridge area, so as to distribute the surface pressure across the plane and prevent its concentration at the bridge structure. In this embodiment, a bridge electrically connects two source pads and the pads to their respective electrodes forming the fingers.To obtain this planar geometry of the bridge, this process requires, prior to the fabrication of the bridge, the deposition of the fingers and pads to be interconnected onto the substrate, dimensioning them to thicknesses necessarily greater than the grid contacts. Next, a polymer bridge support, precisely leveled to the height of these contacts, is deposited. Then, the bridge is deposited in a flat plane, and finally, the bridge structure is removed using a solvent. This technique is problematic because it requires precise control of the thickness of the polymer support between the electrodes. This polymer is generally manufactured by spreading a resin using the "spin coating" technique, and this process is not suitable for controlling the thickness in the gaps between the electrodes. Furthermore, the metal connection between a bridge and pads, and between a bridge and fingers, can exhibit weaknesses and structural discontinuities that may affect the bridge's performance. Electrical conductivity. This is particularly critical for power electronics applications. Furthermore, an overhead bridge presents a vulnerability for chips intended for packaging by encapsulation. This type of packaging, by its very nature, is incompatible with suspended 3D structures because it involves applying high pressure through high-temperature pressing on the chip.

[0007] There is therefore a need to address the aforementioned problems. One objective of the invention is to propose a manufacturing technique for a multi-finger semiconductor chip comprising a reinforced bridge structure. Another objective of the invention is to improve the mechanical strength of the chips during packaging by embedding them in PCBs.

[0008] More specifically, the invention relates to a method for manufacturing a semiconductor device comprising the following successive steps of obtaining a semiconductor substrate comprising on the surface at least one pair of ohmic contacts and a gate contact, the ohmic contacts forming fingers separated from each other and of depositing a bridge support made of a first polymer material covering the gate contact and intended for the support of an electrical connection bridge. According to the invention, the process further comprises the electrodeposition of connection surfaces for the ohmic contacts and the grid contact, and of bridges covering said support and electrically connecting the ohmic contacts to the respective connection surface, said connection surfaces and said bridges being formed by the same metallic layer.

[0009] The method according to the invention may include the following additional features, alone or in combination:

[0010] - After the deposition of the metallic layer, the deposition of a first layer of sivation carried out in a second polymer material encapsulating at least the bridge support and said bridges and comprising openings of the connection surfaces.

[0011] - The first material is a polyimide.

[0012] - The second material is a polyimide.

[0013] - The metallic layer is made of copper and has a thickness greater than 4 µm, of preference between 6 pm and 10 um.

[0014] - The deposition of the bridge support includes at least one heat treatment step of the bridge support pattern.

[0015] - The deposition of a second passivation layer on the surface of the grid contact before the bridge support is installed.

[0016] - The deposition of a resin on the surface of the bridge support before the deposition of the layer Talcic, then the removal of the resin after the deposition of the metallic layer so as to to create an empty space between the bridge and the bridge support in anticipation of burying the semiconductor device.

[0017] - The embedding of the semiconductor device between at least two layers of printed circuit board.

[0018] According to the invention, an integrated circuit is further envisaged comprising a semiconductor device obtained from any of the embodiments of the manufacturing process according to the invention comprising a semiconductor substrate comprising on its surface at least one pair of ohmic contacts and a gate contact, the ohmic contacts forming fingers separated from each other, a bridge support made of a first polymer material covering the gate contact and intended for the support of an electrical connection bridge, connection surfaces of the ohmic contacts and of the gate contact, bridges covering said support and electrically connecting the ohmic contacts to the respective connection surface, in which said connection surfaces and said bridges are formed by the same metallic layer obtained by electrodeposition, and in which the semiconductor device is embedded between at least two layers of printed circuit board.

[0019] The integrated circuit according to the invention may include the following additional features, alone or in combination:

[0020] - Said bridges have an arched shape and extend from the connecting surfaces right up to the surface of the ohmic contacts.

[0021] - A first passivation layer made of a second material in polymer encapsulating at least the bridge support and said bridges, and comprising openings on the surface of the connection surfaces.

[0022] - The first material is a polyimide.

[0023] - The second material is a polyimide.

[0024] - A second passivation layer between the grid contact and the bridge support.

[0025] One of the advantages of the invention is that it offers a 3D structure compatible with PCB embedding and power electronics applications. Furthermore, the manufacturing process can be adapted to reinforce chips with passivation layers or to optimize the bridge support density to limit the capacitive effects of the polymer in contact with the gate control lines of a transistor.

[0026] Other features and advantages of the present invention will become more apparent upon reading the following detailed description, which includes embodiments of the invention given by way of non-limiting examples and illustrated by the accompanying drawings, in which:

[0027] [Fig.1] represents the steps of a process for manufacturing a semiconductor device according to the invention.

[0028] [Fig.2] represents a conditioning step for a manufacturing process of a semiconductor device according to the invention.

[0029] [Fig.3] represents an example of burial conditioning for a manufacturing process of a semiconductor device according to the invention.

[0030] [Fig.4] represents examples of embodiments of the semiconductor device according to the invention.

[0031] The manufacturing process according to the invention finds a primary application in the fabrication of a heterostructured field-effect transistor, for example, of the HFET or HEMT type. More specifically, the process aims to reinforce a bridge structure by depositing beneath it a microstructured support made of insulating material that is thermally compatible with microfabrication and embedding techniques, as well as with the operation of the chip in the field of power electronics. Throughout the following description, the same elements are identified with the same reference numerals.

[0032] Figure 1 illustrates a method for manufacturing a semiconductor device according to the invention. A first step 11 of the method is obtaining a semiconductor substrate comprising, on its surface, ohmic contacts 2, including at least one pair of ohmic contacts 2A and 2B, and a gate contact 3. The ohmic contacts 2 form a series of alternating fingers, separated from one another, forming the source and drain electrodes arranged perpendicular to the direction of the current in the active region of the device. This design makes it possible to increase the current density without increasing the overall size of the device. Furthermore, these structures make it possible to reduce signal losses and interference effects, thereby improving the linearity and stability of the transistors.

[0033] In this example, in the active region between the ohmic contacts 2, the grid contact 3 extends by means of two branches 3A and 3B arranged on either side of the ohmic contacts 2 in the same plane of the substrate as the ohmic contacts 2, perpendicular to the ohmic contacts 2. These two branches 3A and 3B are connected by grid contact lines that extend, parallel to the ohmic contacts 2, in each active region between two ohmic contacts 2A and 2B. This arrangement therefore requires the fabrication of conductive bridges of a so-called 3D structure to electrically connect the source and drain ohmic contacts 2 to their respective pads.

[0034] A pad is a plate or connection surface, a metallic contact area or metallic interface on an electronic chip that is used to electrically connect the chip to a printed circuit board or other electronic components. A pad can be round, square, rectangular, or any other more complex shape.

[0035] In this non-limiting embodiment, the ohmic contacts 2 are made of a multi-layered metal structure. The ohmic contacts 2 connect the source and drain electrodes to the transistor substrate 1 to allow current to flow through the heterostructure junction. The gate contact 3 controls the current flowing in the channel between the ohmic contacts 2.

[0036] More specifically, according to a non-limiting embodiment, obtaining the substrate El 1 comprises a step of depositing the layer of semiconductor material, such as AIGaN or GaN, onto the substrate using a crystal growth technique. The ohmic contacts 2 are then obtained by sandwiching layers of Titanium, Gold, and Palladium (Ti / Au / Pd) to form the ohmic contacts 2. The gate contacts 3 are obtained by sandwiching layers of Nickel and Gold, for example. Those skilled in the art will adapt the step of obtaining the substrate El 1 according to the desired application and the required properties of the transistor.

[0037] These layers are generally obtained by vacuum evaporation techniques, for example. Obtaining the substrate also involves, in a manner known to those skilled in the art, lithography, etching, development, and cleaning steps. The metal deposition, lithography, and etching steps can be repeated depending on the number of metal layers and thickness required. The reference published by Michael H. Willemann, entitled “Polymer-Supported Bridges for Multi-Finger AlGaN / GaN Heterojunction Field Effect Transistors (HFETs),” Virginia Polytechnic Institute and State University, 2007, describes a technique for manufacturing ohmic contacts comprising layers of titanium, aluminum, nickel, and gold.

[0038] The manufacturing process according to the invention then comprises a step E2 of depositing at least one bridge support 4 made of a first polymer material covering the grid contact 3. A bridge support 4 is intended to support and reinforce one or more electrical connection bridges between ohmic contacts 2 and their respective pads. In this non-limiting example, the two arms 3A and 3B of the grid contact are covered by two portions 4A and 4B, respectively, of the bridge support 4. At this stage of the manufacturing process, the bridge support 4 forms a raised surface on the substrate 1 above the grid contacts 3 in the area where bridges are to be deposited. The bridge support 4 forms a raised surface above the upper faces of the ohmic contacts 2 and the surface of the substrate 1.

[0039] Preferably, the first polymer material is a polyimide. Polyimide is a synthetic organic polymer used in this application for its thermal properties. Polyimide has very low thermal conductivity, which means it is an effective thermal insulator. Its typical thermal conductivity ranges from 0.1 to 0.4 W / mK at room temperature. Polyimide also has excellent resistance to It is heat resistant. It can withstand high temperatures up to 500°C without degrading or softening. This high thermal property allows polyimide to be used in power electronics applications such as films for integrated circuits, where it can withstand high operating temperatures. Furthermore, polyimide has a low coefficient of thermal expansion, meaning it expands very little when exposed to temperature changes.

[0040] The E2 deposition phase of the bridge support 4 comprises photolithography steps over the gate contacts 3. In this non-limiting example, the bridge support 4 is a polyimide containing photosensitive compounds to develop the desired pattern. This type of compound also has the advantage of providing higher dielectric strength than a photoresistive compound. However, the possibility of using a photoresistive polymer is not excluded. Furthermore, the polymer is a polyimide that can be loaded with other materials, for example, diamond microparticles. The loading must not affect the thermal, mechanical, and dielectric properties of the polymer. It is envisaged that the bridge support 4 could be made of a polymer other than polyimide, provided that it retains properties suitable for the target application and a technique for embedding the semiconductor device.

[0041] According to a preferred deposition technique for a photosensitive polymer, the deposition phase E2 of the bridge support 4 comprises a first pretreatment step of the component surface by solvent cleaning using a solution of acetone, isopropanol, deionized water, and nitrogen drying, followed by dehydration at a temperature of at least 100°C. This first step may also include chemical treatment using an oxidizing and corrosive acid solution and rinsing, or oxygen plasma treatment. Subsequently, the deposition phase E2 comprises a second step of deposition by centrifugation of the polyimide resin onto the substrate containing the components being manufactured. The rotation speed depends on the viscosity of the polyimide resin and the target thickness. The deposition phase E2 then comprises a third step of heat treatment on a hot plate. This treatment aims to evaporate the solvent(s) from the polyimide resin.The E2 deposition phase then includes a fourth step of UV exposure using a mask aligner and through the photolithography mask, which forms the pattern that structures the bridge support 4. The E2 deposition phase then includes a fifth post-exposure development step that reveals the polyimide patterns. The E2 deposition phase then includes a sixth rinsing step and a seventh heat treatment step of the patterns in the bridge support 4. This final heat treatment step aims to stabilize the polyimide. The choice of temperature and the duration of the heat treatments determine, in particular, the target thickness of the bridge support 4.

[0042] At this E2 stage of the manufacturing process, the pads and metallic thickenings of the ohmic contacts have not yet been deposited. The polymer is therefore deposited by centrifugation onto a gap-free surface, which facilitates control of the target thickness. Furthermore, the final heat treatment stage also rounds the edges of the bridge support 4 at its upper part. Rounding the edges improves the continuity of the bridge thickness at the edges of the support 4, which strengthens the mechanical strength and the electrical and thermal behavior of the bridge. The specific E2 polymer deposition phases may vary depending on the type used (photosensitive or photoresistant), which those skilled in the art will be able to adapt.

[0043] Next, the manufacturing process includes a deposition step E3 by electrodeposition of pads 5A and 5B of the ohmic contacts 2 and pad 5C of the gate contact, and of bridges 5D and 5E electrically connecting each ohmic contact 2 to the respective pad 5A and 5B. Pads 5A, 5B, and 5C and said bridges 5D and 5E are formed from the same metallic layer of uniform thickness during the same electrodeposition phase. The metallization serves to thicken the metallic layer of the ohmic contacts 2 and the gate contact 3 at the pad due to the power application for which the transistor is intended. The metallic layer has a thickness greater than 4 µm, preferably between 6 µm and 10 µm. The electrodeposited metal is, for example, copper. The bridges have a substantially arched or convex shape resulting from the shape of the relief and the thickness of the bridge supports on the surface of the substrate.The arched shape maintains the continuity of the metallic layer between the pads and the fingers. This continuity reinforces the structure.

[0044] Electrodeposition is a technique known to those skilled in the art, comprising surface preparation steps, including the integration of a carrier layer, also called a germination layer, and contacting the substrate with an electrolyte followed by polarization allowing the electrodeposition of copper.

[0045] Furthermore, obtaining a single metallic layer forming the bridges 5D and 5E and the pads 5A, 5B, and 5C improves the mechanical strength of the bridge structure and ensures structural continuity between the pads 5A and 5B and the ohmic contacts 2. Mechanical strength is particularly important in anticipation of packaging by burial, which involves rolling steps at high temperature and high pressure. In addition, electrodeposition has the advantage of uniformly and reliably thickening the edges of the polyimide bridge support 4. Electrodeposition also has the advantage of being a less expensive technique compared to vacuum techniques.

[0046] The profiles of bridge support 4 and bridges 5D and 5E visible in [Fig. 1] are provided This is a non-limiting example and depends on the transistor's structure and the arrangement of the ohmic contacts 2 and the gate contact 3. Other variations are possible; in particular, bridges can be provided to electrically connect pads separated by a gate contact. The number of fingers and bridges for the ohmic contacts 2 can be two, three, four, five, or more. A bridge can be provided for each finger, but this is not mandatory. In this non-limiting example, all the source and drain ohmic contacts 2 are connected to their respective pads 5A and 5B by bridges 5D and 5E. For other types of transistor architectures, only some of the contacts are electrically connected to their pads by bridges. For example, only the source contacts may be connected to their pads by bridges, or only the drain contacts may be connected to their pads by bridges.

[0047] Once the deposition step E3 is completed, the manufacturing process makes it possible to obtain a semiconductor device 10, designated as an integrated circuit component or chip, also called a "wafer" for a set of chips, comprising one or more multi-finger transistors comprising a bridge structure reinforced by the support 4 made of polymer.

[0048] In [Fig. 2], an additional step E4 of the manufacturing process is described, which consists of encapsulating at least the bridge supports and the bridges of the semiconductor device under a second layer 6 of a second polymer material acting as a protective film. Preferably, the entire surface of the chip 10 is covered by this layer 6. The polymer is, for example, polyimide, identical to the polymer used for the bridge support. It is envisaged that the polymer 6 could be a different material from the bridge support. The resin can be separate, or it can contain a filler adapted to the desired protection. The polymer layer 6 flattens the structure of the semiconductor device by smoothing out the surface reliefs of the chip caused by the presence of the bridges and allows for a reinforced multi-layered structure.The protective layer 6 helps to distribute the pressure during lamination, limiting the risk of crushing the bridges, and to protect the chip thermally.

[0049] The protective layer 6 is deposited by centrifugation and includes heat treatment, exposure, development, and rinsing steps similar to those performed during the E2 deposition of the bridge support. These steps are adapted according to the characteristics of the polymer used.

[0050] Furthermore, as can be seen in [Fig.2], the protective layer has a surface profile having openings 6A, 6B and 6C at the level of the drain, source and gate pads obtained by the photolithography steps and allowing the electrical connection of the chip to a printed circuit board or any type of interface electrical. The protective layer 6 is deposited before the wafer is cut, the last step before obtaining the individual semiconductor devices.

[0051] Figure 3 illustrates a packaging step E5 by embedding an encapsulated chip 10. It is envisaged that embedding can be performed on a chip 10 without the encapsulation layer. Encapsulation is the preferred manufacturing method for embedding. The manufacturing process includes high-temperature, high-pressure lamination steps of the chip between layers comprising at least one PCB layer 8A. One or more additional layers of epoxy foil 7A may be provided. In a non-limiting embodiment, as illustrated in Figure 3, the integrated circuit 9 comprises a first PCB layer 8A and an epoxy foil 7A on the upper surface side of the chip 10 where the pads are accessible, the chip being encapsulated under a polymer film, a second epoxy foil layer 7B on the lower surface side, and a second PCB layer 8B.The integrated circuit 9 obtained after the embedding steps has electrical interfaces on the surface of a PCB layer. The PCB layers correspond to the metallization contact layers that connect the source, drain, and gate pads to the contact pads on the surface of the integrated circuit. The PCB contact layers improve the electrical performance of devices by reducing contact resistance and improving the reliability of electrical connections. The PCB contact layers can also improve heat dissipation, allowing the chip to be connected to a heat sink to enhance high-power performance.

[0052] Furthermore, the manufacturing process may include additional steps before the metallization step E3, for example, for depositing a passivation layer between a bridge support and a grid contact, or for depositing a resin layer between the metallization layer of a bridge and the bridge support. The process may also include, following the metallization step E3, a step for removing this resin layer, for example.

[0053] In [Fig. 4], several embodiments of the bridge support structure are illustrated and shown in a cross-sectional view in the longitudinal plane of the bridge. In each of these embodiments, given by way of non-limiting example, the semiconductor device 10 obtained by the manufacturing process according to the invention comprises source and drain ohmic contacts arranged in a central active region and are arranged in a multi-finger configuration separated from each other by a gate control channel, each finger being connected to a pad. In each channel, in the same plane as the source and drain ohmic contacts, a gate control line is disposed and is connected to two gate contact branches disposed on either side of the active region, each branch being connected to the pad of grid. Each grid control arm is arranged perpendicular to the ohmic contact lines and is covered by a polyimide bridge support so as to allow the passage of a finger connecting bridge over the grid control arms.

[0054] It should be noted that for each of these variants, the semiconductor device is embedded between at least two layers of PCB (not shown in [Fig.4]) to form an integrated circuit with a reinforced sandwich structure.

[0055] In a first variant 41, the sandwich structure on the substrate 1 is formed by the grid contact 3B, the polyimide bridge support 4B, and the bridge 5E formed by the copper metallization layer. This variant is advantageous due to its ease of implementation. However, the polyimide is susceptible to capacitive effects under the action of rolling compression.

[0056] In a second embodiment 42, the sandwich structure, formed by the grid contact 3B, the polyimide bridge support 4B, and the bridge 5E formed by the copper metallization layer, includes a void space V0 having a desired thickness at the end of the metallization step of the process. This void space V0 is obtained, for example, by a step of depositing a photosensitive resin distinct from a polyimide over the polyimide bridge support, a post-exposure development step in alkaline solution before the copper metallization of the bridge 5E, and then by a step of removing this resin with a solvent after the metallization of the bridge 5E. The void space V0 is required in anticipation of the chip being embedded by lamination. The distance V0 before lamination allows the density of the polyimide to be adjusted, since it is a deformable and compressible material.Depending on its density obtained after rolling, the resulting dielectric properties of the polyimide in terms of dielectric constant and dissipation factor will vary. The V0 space allows for obtaining an optimal post-rolling density to reduce the capacitive effect of the polyimide layer.

[0057] In a third embodiment 43, the manufacturing process includes a step of depositing a passivation layer 11 before the deposit of the polyimide bridge support 4. The sandwich structure is formed by the gate contact 3B, the passivation layer 11, the polyimide bridge support 4B, and the bridge 5E formed by the copper metallization layer. The passivation layer serves to limit the capacitive effects induced by the polyimide on the transistors under the effect of rolling compression.

[0058] In a fourth variant 44, the manufacturing process includes the addition of the passivation layer 11 and the steps necessary for the formation of a void space V0 between the polyimide 4B and the bridge 5E. The sandwich structure is formed by the grid contact 3B, the passivation layer 11, the polyimide bridge support 4B, the void space V0, and the bridge 5E formed by the copper metallization layer. The layer of Passivation is sufficient to reduce the capacitive effects induced by the polyimide. However, the void space VO before rolling allows the polyimide density to be adjusted to obtain optimal mechanical characteristics of the sandwich structure.

[0059] The manufacturing process according to the invention applies to so-called IILV and IILN semiconductors containing elements such as gallium arsenide (GaAs), indium phosphide (InP), nitrogen (N), gallium nitride (GaN), indium-gallium nitride (InGaN), and aluminum-gallium nitride (AlGaN). The semiconductor devices concerned are, for example, HMET or HEFT multi-finger transistor chips, which can be embedded in PCB layers or encapsulated by a polymer film. Each source and drain electrode may have two or more fingers.

[0060] The semiconductor devices obtained by this process are advantageous because the pads and bridges are formed from a single metallic layer obtained by electrodeposition. The bridge supports are retained when the devices are embedded in PCB layers. The metallic layer, preferably copper, is a metallic thickening layer suitable for power electronics applications and has a thickness greater than 4 µm, preferably between 6 µm and 10 µm. Because the bridges are formed by electrodeposition, their thickness is uniform over the entire surface of the metallized layer forming the pads, ohmic contacts, and bridges. In particular, this technique solves the problems of metallization homogeneity at the edges of the bridge supports compared to other vacuum evaporation-type techniques and ensures the continuity of the metallic layer.The bridge supports of the semiconductor device and the encapsulation layer are preferably made of polyimide. However, they can be made of separate or different polymers. In addition, bridges can be provided to connect two pads to each other.

[0061] The invention applies to the fields of manufacturing semiconductor devices for optoelectronic applications such as LEDs, semiconductor lasers and photodetectors, for power electronics systems, in particular for applications of electrified vehicles, photovoltaic systems and energy storage systems equipped with semiconductor devices obtained by a manufacturing process according to the invention.

[0062] The invention is described above by way of example. It is understood that a person skilled in the art is able to carry out different variant embodiments of the invention by combining, for example, the different features above taken alone or in combination, without departing from the scope of the invention.

Claims

Claims

1. A method of manufacturing a semiconductor device (10) comprising the following successive steps: - obtaining (El) a semiconductor substrate (1) comprising on the surface at least one pair of ohmic contacts (2) and a gate contact (3), the ohmic contacts (2) forming fingers separated from each other (2A) (2B), - depositing (E2) a bridge support (4) made of a first polymer material covering the gate contact (3) and intended to support an electrical connection bridge (5D, 5E), characterized in that it further comprises: - depositing (E3) by electrodeposition of connection surfaces (5A, 5B, 5C) of the ohmic contacts (2) and of the gate contact (3), and of bridges (5D, 5E) covering said support and electrically connecting the ohmic contacts (2) to the respective connection surface (5A, 5B), said connection surfaces (5A, 5B) and said bridges (5D, 5E) being formed by the same metal layer (5).

2. Manufacturing method according to claim 1, further comprising after the deposition (E3) of the metal layer (5), the deposition of a first passivation layer (6) made of a second polymer material encapsulating at least the bridge support (4) and said bridges (5D, 5E) and comprising openings (6A, 6B, 6C) of the connection surfaces (5A, 5B, 5C).

3. A manufacturing method according to claim 1 or 2, wherein the first material is a polyimide.

4. Manufacturing method according to any one of claims 1 to 3, wherein the metal layer (5) is made of copper and has a thickness greater than 4 pm, preferably between 6 pm and 10 um.

5. Manufacturing method according to any one of claims 1 to 4, in which the deposition (E2) of the bridge support (4) comprises at least one step of heat treatment of the pattern of the bridge support (4).

6. A manufacturing method according to any one of claims 1 to 5, further comprising burying the semiconductor device (10) between at least two printed circuit board layers (8A, 8B).

7. Integrated circuit comprising a semiconductor device (10) obtained from the manufacturing method according to claim 6 comprising: - a semiconductor substrate (1) comprising on the surface at least one pair of ohmic contacts (2) and a gate contact (3), the ohmic contacts (2) forming fingers separated from each other (2A) (2B), - a bridge support (4) made of a first polymer material covering the gate contact (3) and intended to support an electrical connection bridge (5D, 5E), - connection surfaces (5A, 5B, 5C) of the ohmic contacts (2) and of the gate contact (3), - bridges (5D, 5E) covering said support and electrically connecting the ohmic contacts (2) to the respective connection surface (5D, 5E), characterized in that said connection surfaces (5A, 5B, 5C) and said bridges (5D, 5E) are formed by the same metal layer (5) obtained by electrodeposition, - and in which the semiconductor device (10) is buried between at least two circuit board layers printed (8A, 8B).

8. Integrated circuit (9) according to claim 7, wherein said bridges (5D, 5E) have an arcuate shape and extend from the connection surfaces (5A, 5B) to the surface of the ohmic contacts (2A, 2B).

9. Integrated circuit (9) according to claim 7 or 8, further comprising a first passivation layer (6) made of a second polymer material encapsulating at least the bridge support (4) and said bridges (5D, 5E) and comprising openings (6A, 6B, 6C) of the connection surfaces (5A, 5B, 5C).

10. An integrated circuit (9) according to any one of claims 7 to 9 wherein the first material is a polyimide.

Images