Electronic device for capturing infrared radiation and displaying images

Abstract

Electronic Device for Infrared Radiation Capture and Image Display This description relates to an electronic device (100) for capturing and displaying images comprising a plurality of pixels (PIX) formed in and on a semiconductor substrate (101), each pixel comprising: – a detection element (103) for infrared radiation (105), located on the side of a first face (101F) of the semiconductor substrate (101); – an emission element (107) for visible light (109), located on the side of a second face (101R) of the semiconductor substrate opposite the first face; and – a circuit located in and on the semiconductor substrate and connecting the detection element to the emission element. Figure for the abstract: Fig. 1

Description

Title of the invention: Electronic device for capturing infrared radiation and displaying images. Technical field

[0001] This description relates generally to electronic devices, and in particular to electronic devices for capturing and displaying images. Previous technique

[0002] Electronic devices capable of implementing image capture and display functions have been proposed. Such devices typically include an image sensor, comprising an image capture pixel array, and an image display, comprising an image display pixel array distinct from the image capture pixels.Depending on the application, the image capture and display pixel arrays of the device may be located on one side of the same face of a semiconductor substrate, for example in the case of a mobile phone, smartwatch or tablet computer including a display screen incorporating an image sensor for acquiring a user's fingerprints, or may be located on opposite sides of the semiconductor substrate, for example in the case of a head-mounted display, head-up display or smart glasses including one or more display screens intended to be placed each in front of a user's eye and one or more outward-facing image sensors.

[0003] Existing electronic image capture and display devices, however, suffer from various drawbacks. In particular, in these devices, the pixels of the image sensor are typically connected to a control circuit and a readout circuit, and the pixels of the image display are connected to a control circuit different from the control and readout circuits for the pixels of the image sensor. These circuits, which are, for example, located on the periphery of the pixel arrays of the sensor and the image display, implement addressing functions for the pixel arrays to which they are respectively connected, and the images acquired by the sensor are, for example, stored in a memory circuit before being displayed, possibly after processing. This introduces an undesirable latency between the acquisition of an image by the sensor and the display of the corresponding image by the display.Furthermore, existing electronic image capture and display devices are complex, bulky, heavy, energy-intensive, and expensive to manufacture. Summary of the invention

[0004] It would be desirable to overcome all or part of the drawbacks of existing electronic image capture and display devices. In particular, there is a need to reduce the weight, size, complexity, energy consumption, manufacturing costs and / or latency of these devices.

[0005] To this end, one embodiment provides an electronic image capture and display device comprising a plurality of pixels formed in and on a semiconductor substrate, each pixel comprising: - an infrared radiation detection element, located on the side of a first face of the semiconductor substrate; - a visible light-emitting element, located on the side of a second face of the semiconductor substrate opposite the first face; and - a circuit located in and on the semiconductor substrate and connecting the sensing element to the emitting element.

[0006] According to one embodiment, the circuit comprises: - an acquisition circuit located in and on the semiconductor substrate and adapted to provide an acquisition signal representative of the intensity of the infrared radiation received by the pixel's detection element; and - a control circuit located in and on the semiconductor substrate and adapted to apply a control signal to the emitting element of the pixel.

[0007] According to one embodiment, the acquisition circuit and the control circuit are analog circuits.

[0008] According to one embodiment: - each detection element includes an inorganic photodetector; - each acquisition circuit includes a comparator having an inverting input connected to a conduction electrode of the photodetector; and - each control circuit includes an inverter having an input connected to an output of the comparator and an output connected to a gate of a MOS transistor, the MOS transistor having a conduction electrode connected to the emitting element.

[0009] According to one embodiment: - each detection element includes a single-photon avalanche diode; - each acquisition circuit includes a Schmitt flip-flop with an input connected to a conduction electrode of the single-photon avalanche diode; and - each control circuit includes an inverter having an input connected to an output of the Schmitt flip-flop and an output connected to a gate of a MOS transistor, the MOS transistor having a conduction electrode connected to the emitting element.

[0010] According to one embodiment, the detection elements are located opposite the emission elements.

[0011] According to one embodiment, the detection elements and the emission elements are arranged respectively in first and second matrices, the first and second matrices having substantially identical steps.

[0012] According to one embodiment, each emission element comprises at least one light-emitting diode.

[0013] According to one embodiment, the light-emitting diode is controlled by a control signal having an average value substantially proportional to an intensity of the infrared radiation detected by the detection element.

[0014] According to one embodiment, the light-emitting diode is controlled by a control signal having pulses repeating at a frequency substantially proportional to an intensity of the infrared radiation detected by the detection element.

[0015] According to one embodiment, the device comprises as many detection elements as emission elements.

[0016] One embodiment provides an electronic device comprising: - a power supply circuit; and - at least one device as described above.

[0017] One embodiment provides a method for manufacturing a device as described above, the method comprising a step of transferring, by molecular bonding, a structure comprising the detection elements and the circuits onto another structure comprising the emission elements. Brief description of the drawings

[0018] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0019] [Fig.1] is an isometric, schematic and partial view of an image capture and display device according to one embodiment;

[0020] [Fig.2] is an equivalent electrical diagram of a pixel of the device of [Fig.1] according to one embodiment;

[0021] [Fig.3] is an equivalent electrical diagram of a pixel of the device of [Fig.1] according to another embodiment;

[0022] [Fig.4] is a chronogram illustrating, schematically and partially, an example of the operation of the pixel of [Fig.3];

[0023] [Fig.5] is an equivalent electrical diagram of a pixel of the device of [Fig.1] according to yet another embodiment;

[0024] [Fig. 6] is a chronogram illustrating, schematically and partially, a example of pixel operation in [Fig.5];

[0025] [Fig.7A], [Fig.7B], [Fig.7C], [Fig.7D], [Fig.7E], [Fig.7F], [Fig.7G], [Fig.7H], [Fig.7I] and [Fig.7J] illustrate, by schematic and partial cross-sectional views, structures obtained at the end of steps in a manufacturing process of the device of [Fig.1] according to an embodiment;

[0026] [Fig.8] is a schematic and partial side view of an example implementation of the device in [Fig. 1] in an electronic device; and

[0027] Figure 9 is a schematic and partial side view of another example of the implementation of the device in Figure 1 in an electronic device. Description of embodiments

[0028] The same elements have been designated by the same reference numerals in the different figures. In particular, structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0029] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the various applications of the electronic image capture and display devices in this description will not be detailed, as the described embodiments are compatible with all or most applications that could benefit from an electronic image capture and display device, possibly with adaptations that are understandable to a person skilled in the art upon reading this description.

[0030] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements coupled together, this means that these two elements can be connected or linked through one or more other elements.

[0031] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0032] Unless otherwise specified, the expressions "approximately", "about", "substantially", and "in the order of" mean within 10%, preferably within 5%.

[0033] In the following description, the terms "insulating" and "conducting" mean, unless otherwise specified, electrically insulating and electrically conductive respectively.

[0034] The term "transmittance of a layer" refers to the ratio of the intensity of radiation exiting the layer to the intensity of radiation entering the layer. In the following description, a layer is said to be opaque to radiation when its transmittance for that radiation is strictly less than 40%, preferably less than or equal to 25%, and more preferably less than or equal to 10%. Conversely, a layer is said to be transparent to radiation when its transmittance for that radiation is greater than or equal to 40%, preferably greater than or equal to 75%, and more preferably greater than or equal to 90%. The preceding definitions of the terms opaque and transparent are not limited to the case of a single layer, but apply more generally to any element that may be exposed to radiation, for example, a substrate, a region, a stack of several layers, etc.

[0035] In this description, the term "visible light" refers to electromagnetic radiation with a wavelength between 400 nm and 700 nm. Furthermore, the term "infrared radiation" refers to electromagnetic radiation with a wavelength between 700 nm and 1 mm. In the infrared range, near-infrared radiation has a wavelength between 700 nm and 1.7 μm.

[0036] The [Fig.1] is an isometric, schematic and partial view of an image capture and display device 100 according to one embodiment.

[0037] According to this embodiment, the image capture and display device 100 comprises a plurality of PIX pixels formed in and on a semiconductor substrate 101.

[0038] Each pixel PIX of the device 100 comprises a detection element 103 for radiation 105 and, associated with the detection element 103, an emission element 107 for radiation 109. The detection elements 103 and emission elements 107 are respectively located on either side of the semiconductor substrate 101. More precisely, in the illustrated example, the detection elements 103 are located on the side of a face 101F of the substrate 101 and the emission elements 107 are located on the side of a face 101R of the substrate 101, opposite face 101F. For the sake of simplifying the drawing, each detection element 103 and each emission element 107 has been symbolized, in [Fig. 1], by a parallelepiped having, in top view, a perimeter of substantially square shape. This example is not exhaustive, however; each detection element 103 or emission element 107 may, alternatively, have any shape, for example cylindrical. For example, the detection element... 103 is of the inorganic type, that is to say that the detection element 103 is devoid of organic materials.

[0039] The term "active region" of an optoelectronic component, in particular an electroluminescent component of a display subpixel or a photodetector, refers to a region from which the majority of the electromagnetic radiation supplied by the optoelectronic component is emitted or the region from which the majority of the electromagnetic radiation received by the optoelectronic component is captured. An optoelectronic component is said to be inorganic when the active region of the optoelectronic component is made mostly, preferably entirely, of at least one inorganic material or a mixture of inorganic materials.

[0040] In the illustrated example, the PIX pixels of the device 100 are arranged in a matrix of rows and columns. More precisely, in this example, the detection elements 103 are arranged in a matrix of rows and columns. Similarly, the emission elements 107 are, in this example, arranged in a matrix of rows and columns. In each of these matrices, the rows are, for example, substantially orthogonal to the columns. This example is not, however, limiting; the rows may, alternatively, not be orthogonal to the columns.

[0041] By way of example, the device 100 comprises as many detection elements 103 as emission elements 107.

[0042] In the example shown, the emission element matrix 107 has a pitch, that is, a center-to-center distance between two adjacent emission elements 107, substantially equal to the pitch of the detection element matrix 103, that is, substantially equal to a center-to-center distance between two adjacent detection elements 103. Furthermore, in this example, the emission elements 107 are located opposite the detection elements 103. In the illustrated example, the center of each emission element 107 is located substantially directly above the center of the opposite detection element 103. The emission elements 107, for example, have, in a top view, lateral dimensions that are substantially equal, within manufacturing variations, to those of the detection elements 103.This example is not limiting, however, as the emission elements 107 may, as an alternative, have different lateral dimensions, for example larger or smaller, than those of the detection elements 103. The respective dimensions, for example the respective surfaces, of the detection elements 103 and emission elements 107 are chosen for example according to a desired sensitivity on the side of the detection elements 103 and / or an intensity to be achieved on the side of the emission elements 107.

[0043] By way of example, the radiation 105 captured by the detection elements 103 is infrared radiation, for example near-infrared radiation. By elsewhere, the radiation 109 emitted by the emission elements 107 is, for example, visible light.

[0044] The [Fig.2] is an equivalent electrical diagram of a pixel PIX of the device 100 of the [Fig.1] according to one embodiment.

[0045] In the example shown, the detection element 103 of the pixel PIX includes a photodetector 201 adapted to capture the radiation 105. The photodetector 201 is, for example, adapted to produce, under the effect of the incident radiation 105, a current Iph, also called photocurrent. The photocurrent Iph is, for example, substantially proportional to an intensity, or flux, of the radiation 105 captured by the photodetector 201. In the illustrated example, the photodetector 201 has a first conduction terminal, for example an anode electrode, connected to a node 203 for applying a reference potential, for example ground. The photodetector 201 further comprises, in this example, a second conduction terminal, for example a cathode electrode, connected to a circuit 205. By way of example, the photodetector 201 is a photosensitive diode, or photodiode.

[0046] In the illustrated example, the circuit 205 includes an acquisition circuit 207, also called a conditioner or conditioning circuit. The acquisition circuit 207 is, for example, adapted to provide an acquisition signal representative of the intensity of the radiation 105 captured by the photodetector 201. The acquisition signal produced by the acquisition circuit 207 is, for example, a function of the photocurrent Iph, for example, substantially proportional to the photocurrent Iph. Alternatively, the acquisition signal is a function of a voltage across the photodetector 201, for example, substantially proportional to this voltage.

[0047] The acquisition circuit 207 allows, for example, the amplification of the photocurrent Iph and the provision of a drive voltage for the emitting element 107. For these purposes, the acquisition circuit 207 includes, for example, an amplifier symbolized in [Fig. 2] by a transistor. As an example, the amplifier is of the CTIA type (from the English "Capacitive Trans-Impedance Amplifier").

[0048] In the example shown, the PIX pixel circuit 205 further includes a control circuit 209, or driving circuit. The control circuit 209 is, for example, adapted to apply a control signal to the transmitting element 107. The control signal provided by the control circuit 209 is, for example, a function of the acquisition signal, for example, substantially proportional to the acquisition signal.

[0049] In the example shown, the acquisition circuit 207 and the control circuit 209 each receive a calibration signal cal. The calibration signal cal makes it possible, for example, to compensate for manufacturing dispersions between the pixels PIX of the image capture and display device 100, for example manufacturing dispersions affecting the detection element 103 and / or the emission element 107 of the pixels PIX. In practice, the acquisition circuit 207 receives, for example, a calibration signal different from that received by the control circuit 209. The calibration signal cal has, for example, a determined value, for each pixel PIX, at the end of a calibration step subsequent to manufacturing steps of the image capture and display device 100. As an alternative, the calibration signal cal can be omitted.

[0050] In the illustrated example, the emitting element 107 of the PIX pixel includes a light-emitting diode 211 adapted to emit the radiation 109. The light-emitting diode 211 is, for example, more precisely adapted to emit the radiation 109 when it is traversed by a lied current, corresponding, for example, to the control signal applied by the control circuit 209. The lied current has, for example, an intensity substantially proportional to that of the photocurrent Iph, for example substantially proportional to the intensity of the radiation 105 captured by the photodetector 201. In the example illustrated in [Fig. 2], the light-emitting diode 211 has a first conduction terminal, for example an anode electrode, connected to the circuit 205, for example to an output of the control circuit 209.The light-emitting diode 211 further comprises, in this example, a second conduction terminal, for example a cathode electrode, connected to a node 213 for applying a potential -Vk, for example a low potential. The light-emitting diode 211 is, for example, an inorganic light-emitting diode. The diode 211 is, for example, of the micro-LED type, that is to say, it has micrometer dimensions.

[0051] In the case where the Lied current has an intensity substantially proportional to that of the photocurrent Iph, the acquisition circuit 207 and control circuit 209 are, for example, analog circuits. In this case, the circuit 205 is notably devoid of an analog-to-digital converter.

[0052] Figure 3 is an equivalent electrical circuit of a PIX pixel of the device 100 of Figure 1 according to another embodiment. The equivalent electrical circuit illustrated in Figure 3 corresponds more precisely to a case in which the circuit 205 of the PIX pixel is adapted to control the emitting element 107 by a pulsed signal.

[0053] The diagram in [Fig. 3] includes elements in common with the diagram in [Fig. 2]. These common elements will not be detailed again below. In particular, the detection element 103 and the emission element 107 of the diagram in [Fig. 3] are, for example, identical to those of the diagram in [Fig. 2].

[0054] In the example shown, the acquisition circuit 207 of the PIX pixel includes a comparator 301 having an inverting input (-) connected to a node 303 of the acquisition circuit 207, a non-inverting input (+) connected to a node 305 for applying a reference potential Vref, and an output connected to a node 307 of the acquisition circuit 207. In the illustrated example, the cathode of the photodetector 201 is connected to node 303. Nodes 303 and 307 of the acquisition circuit 207 constitute, for example, respectively, input and output terminals of the acquisition circuit 207. In the illustrated example, nodes 303 and 307 have potentials Vsn and Vo respectively.

[0055] In the example shown, the acquisition circuit 207 further includes a capacitive element 309, for example a capacitor, connecting node 303 to another node 311 for applying a reference potential, for example ground. The capacitor can be replaced or supplemented by a parasitic capacitance of node 303. In the illustrated example, the acquisition circuit 207 further includes a transistor 313, for example a MOS (Metal-Oxide-Semiconductor) transistor. In this example, the transistor 313 is more precisely an N-type MOS transistor (NMOS transistor). In the example shown, transistor 313 includes a conduction terminal, for example a source electrode, connected to node 303, another conduction terminal, for example a drain electrode, connected to a node 315 for applying a supply potential Vdd, and a control terminal, for example a gate electrode, connected to node 307.The potential Vdd, for example, is strictly greater than the potential Vref.

[0056] In the illustrated example, the control circuit 209 comprises an inverter 317 and a transistor 319. The inverter 317 comprises, for example, an input connected to node 307 of the acquisition circuit 207 and an output connected to a control terminal, for example, a gate electrode, of the transistor 319. The transistor 319 is, for example, more specifically a P-type MOS transistor (PMOS transistor). In the example shown, the PMOS transistor 319 comprises a conduction terminal, for example, a drain electrode, connected to the anode of the light-emitting diode 211 and another conduction terminal, for example, a source electrode, connected to a node 321 for applying a supply potential Va.

[0057] By way of example, the light-emitting diode 211 is controlled by a control signal having an average value substantially proportional to the intensity of the radiation 105.

[0058] Figure 4 is a timing diagram illustrating, schematically and partially, an example of the operation of the PIX pixel of Figure 3. The timing diagram of Figure 4 includes curves 401 and 403 illustrating an example of the evolution, as a function of time (t), of the potentials Vsn and Vo, respectively.

[0059] Between a time t0 and a time t1, subsequent to time t0, the photodetector 201 is exposed to radiation 105 and produces the photocurrent Iph. During this period, the photocurrent Iph is integrated by the capacitive element 309. The photogenerated charges The energy from photodetector 201 accumulates at node 303, causing a drop in the potential Vsn. In the illustrated example, the potential Vsn of node 303, between times t0 and tl, has a value between that of the potential Vdd and that of the potential Vref. Between times t0 and tl, the potential Vo of node 307, connected to the output of comparator 301, is, for example, at a low level.

[0060] At time t1, the potential Vsn reaches a value approximately equal to that of the reference potential Vref. This causes the output of comparator 301 to switch, thus transitioning the potential Vo from a low level to a high level. Transistor 313 is then switched on, which connects node 303 to node 315. The photogenerated charges accumulated at node 303 between times t0 and t1 are thus discharged to node 315. This tends to bring the potential Vsn back to a value approximately equal to that of the supply potential Vdd.

[0061] At a time t2, later than time t1, the potential Vsn again becomes greater than the potential Vref. This causes the output of comparator 301 to switch, resulting in a transition of the potential Vo from the high level to the low level. Curve 403 thus illustrates a pulse of the potential Vo between times t1 and t2.

[0062] Between time t2 and a time t3, subsequent to time t2, curve 403 illustrates several other pulses of the potential Vo similar to that present between times t1 and t2. These pulses result, as explained above, from successive charges and discharges of the capacitive element 309 when the photodetector 201 is subjected to radiation 105 and produces the photocurrent Iph. The pulses that make up curve 403 between times t0 and t3 are repeated, for example, periodically, for example at a frequency fh.

[0063] Between an instant t4, subsequent to the instant t3, and an instant t5, subsequent to the instant t4, the curve 403 illustrates further impulses of the potential Vo, for example analogous to the impulses present between the instants t0 and t3.

[0064] The potential pulses Vo between times t4 and t5 differ, for example, from the potential pulses Vo between times t0 and t3 in that they repeat periodically at a frequency fl strictly lower than the frequency fh. This arises, for example, from the fact that the photodetector 201 produces, during an LF phase between times t4 and t5, a weaker photocurrent Iph, for example resulting from a decrease in the intensity of the radiation 105, than during another HF phase between times t0 and t3.

[0065] In the example shown, the frequencies fh and fl are representative of the photocurrent Iph, for example, substantially proportional to the photocurrent Iph. The frequencies fh and fl are, for example, substantially proportional to the intensity, or flux, of the radiation 105 captured by the photodetector 201. The diode electroluminescent 211 is for example thus controlled by a periodic signal of frequency substantially proportional to the intensity of the radiation 105 captured by the photodetector 201.

[0066] By way of example, the sensitivity of the PIX pixel is adjusted by modifying the value of the reference potential Vref, which limits the range of variation of the potential Vsn. In the example shown, for the same radiation intensity value 105, the closer the value of the potential Vref is to that of the potential Vdd, the higher the frequency of variation of the potential Vo. Conversely, the further the value of the potential Vref is from that of the potential Vdd, the lower the frequency of variation of the potential Vo.

[0067] The embodiments of the PIX pixel circuit 205 are not limited to the examples of the detection circuit 207 and control circuit 209 shown, and a person skilled in the art can, based on the information in this description, provide detection and control circuits different from those shown in relation to Figures 3 and 4. By way of example, a counter or a frequency divider can be provided in the control circuit 209 to allow adjustment of the frequency of variation of the potential Vo for each PIX pixel independently of the other PIX pixels. The adjustment is then carried out, for example, at the factory, for example, after manufacturing steps of the device 100, and involves, for example, a step of storing calibration values ​​in memory circuits of the device 100, for example, ROM (Read-Only Memory) or flash memory circuits.This avoids the need for addressing circuits in device 100. Other types of circuits, for example logarithmic response circuits, could also be used.

[0068] Figure 5 is an equivalent electrical circuit of a PIX pixel of the device 100 of Figure 1 according to yet another embodiment. The equivalent electrical circuit illustrated in Figure 5 corresponds more precisely to a case in which the detection element 103 of the PIX pixel comprises a single-photon avalanche diode 501, also called a SPAD (Single-Photon Avalanche Diode). The diode 501 is adapted to detect photons of the 105 radiation. The circuit in Figure 5 corresponds, for example, to a case where the 105 radiation has a very low intensity.

[0069] In the example shown, the diode 501 has a first conduction terminal, for example an anode electrode, connected to a node 503 of the sensing element 103, and a second conduction terminal, for example a cathode electrode, connected to a node 505 for applying a potential Vsp.

[0070] In the illustrated example, the sensing element 103 further comprises a resistive element 507, for example a resistor, connecting node 503 to another node 509 applying a reference potential, for example ground. The resistive element 507 allows quenching of the avalanche phenomenon at each triggering of diode 501. In this example, the detection element 103 further includes a capacitive element 511, for example a capacitor, connecting node 503 to a node 513 applying a reference potential, for example ground.

[0071] In the example shown, the detection circuit 207 includes a Schmitt flip-flop 515 with inverted hysteresis. In this example, the Schmitt flip-flop 515 has an input connected to node 503 and an output connected to the input of the control circuit 209. In the illustrated example, the control circuit 209 of the PIX pixel in [Fig. 5] is identical or analogous to the control circuit 209 of the PIX pixel in [Fig. 3], the output of the Schmitt flip-flop 515 being connected to the input of the inverter 317.

[0072] In the example illustrated in [Fig.5], potentials Vsn' and Vo' are respectively present at node 503 and at the output of the Schmitt flip-flop 515.

[0073] As an alternative, the Schmitt flip-flop 515 can be replaced by a comparator having an adjustable threshold and / or counters allowing adjustment of the intensity range of the light-emitting diode 211 of the emitting element 107. This makes it possible, for example, to reduce or avoid the presence of parasitic pulses due to a dark current.

[0074] Furthermore, although not detailed in the drawing, circuit 205 of the diagram in [Fig.5] may also include sensitivity and / or saturation adjustment elements.

[0075] Figure 6 is a timing diagram illustrating, schematically and partially, an example of the operation of the PIX pixel of Figure 5. The timing diagram of Figure 6 includes curves 601 and 603 illustrating an example of the evolution, as a function of time (t), of the potential Vsn' present at node 503 and the current flowing through the light-emitting diode 211, respectively.

[0076] Between a time t0' and a time tl', subsequent to time t0', the potential Vsn' present at node 503 is equal to a minimum value Vmin. The current lied is, for example, at a low level, for example practically zero, between times t0' and tl'. This corresponds, for example, to a period during which no photon is detected by diode 501.

[0077] In the example shown, at time tl', at least one photon is detected by diode 501. The charges produced by the avalanche generated in diode 501 then accumulate across the terminals of the capacitive element 511, thus causing an increase in the potential Vsn' to a maximum value Vmax, strictly greater than the value Vmin. This causes a switching of the output potential Vo' of the flip-flop. Schmitt 515. The current flowing through the light-emitting diode 211 then switches from the low level to a high level.

[0078] Between time t1' and a time t2', subsequent to time t1', the avalanche phenomenon is extinguished by the action of resistor 507, and the capacitive element 511 discharges through resistor 507. This causes, between times t1' and t2', a switching of the output potential Vo' of the Schmitt flip-flop 515 to a low level. The current flowing through the LED 211 then switches from the high level to the low level by the action of inverter 317 and transistor 319.

[0079] Similar to curve 403 between times t2 and t3, curve 603 illustrates, between time t2' and a time t3' subsequent to time t2', several other pulses of the current similar to that present between times t1' and t2'. These pulses result, as explained above, from successive charges and discharges of the capacitive element 511 when the diode 501 captures at least one photon of the radiation 105. The pulses that make up curve 603 between times t0' and t3' are repeated, for example, periodically, for example at a frequency fh'.

[0080] Between an instant t4', subsequent to the instant t3', and an instant t5', subsequent to the instant t4', the curve 603 illustrates further impulses of the lied current, for example analogous to the impulses present between the instants t0' and t3'.

[0081] The pulses of the current between times t4' and t5' differ, for example, from the pulses of the current between times t0' and t3' in that they repeat periodically at a frequency fl' strictly lower than the frequency fh'. This arises, for example, from the fact that diode 501 captures, during an LF' phase between times t4' and t5', a smaller number of photons, for example resulting from a decrease in the intensity of the radiation 105, than during another HF' phase between times t0' and t3'.

[0082] In the example shown, the frequencies fh' and fl' represent the number of photons captured by the diode 501, for example, substantially proportional to the number of photons captured by the diode 501. The frequencies fh' and fl' are, for example, substantially proportional to the intensity, or flux, of the radiation 105 captured by the diode 501. The light-emitting diode 211 is, for example, thus controlled by a periodic signal with a frequency substantially proportional to the intensity of the radiation 105 captured by the diode 501.

[0083] In the examples set out above, the image capture and display device 100 is devoid of addressing circuits for the detection element matrices 103 and emission elements 107. The device 100 is further devoid of circuits and components for storing, or memorizing, images acquired by the detection elements 103 or images to be displayed by the emission elements 107.

[0084] One advantage of device 100 is that it has a lower weight, size, complexity, energy consumption, manufacturing costs and / or latency than existing image capture and display devices.

[0085] Fig. 7A, Fig. 7B, Fig. 7C, Fig. 7D, Fig. 7E, Fig. 7F, Fig. 7G, Fig. 7H, Fig. 71 and Fig. 7J illustrate, by schematic and partial cross-sectional views, structures obtained at the end of steps in a manufacturing process of device 100 of Fig. 1 according to an embodiment.

[0086] Fig. 7A illustrates more precisely a structure obtained at the end of a formation step, on a support substrate 701, of a stack of infrared photodetectors 703.

[0087] By way of example, the support substrate 701 is a wafer or a piece of wafer made of a semiconductor material.

[0088] The support substrate 701 is, for example, coated on one of its faces with a semiconductor layer 705. In the example shown, the semiconductor layer 705 is located on and in contact with a face 701T of the support substrate 701 (the upper face of the substrate 701, in the orientation of [Fig. 7A]). By way of example, the layer 705 is made of the same semiconductor material as the support substrate 701.

[0089] The semiconductor layer 705 is, for example, coated with another semiconductor layer 707, for example, a layer made of the same material as the layer 705. In the example shown, the semiconductor layer 707 is located on and in contact with a face of the semiconductor layer 705 opposite the support substrate 701. By way of example, the semiconductor layer 707 is doped with a first type of conductivity, for example, type N (N+ doping). The semiconductor layer 705 acts, for example, as a buffer layer between the support substrate 701 and the semiconductor layer 707.

[0090] The semiconductor layer 707 is, for example, coated with another semiconductor layer 709, for example, a layer made of a semiconductor material different from the material of the semiconductor layer 707. In the example shown, the semiconductor layer 709 is located on and in contact with a face of the semiconductor layer 707 opposite the support substrate 701. By way of example, the semiconductor layer 709 is doped with the first type of conductivity (N-type, in this example) and has a lower doping level than the semiconductor layer 707 (N-doping). The semiconductor layer 709 constitutes, for example, an active layer, also called an absorption or photoconversion layer, of the infrared photodetector stack 703. The semiconductor layer 707 is, for example, intended to form a common upper electrode for the infrared photodetectors 201 of the device 100.

[0091] The semiconductor layer 709 is, for example, coated with another semiconductor layer 711, for example, a layer of the same material as the semiconductor layer 707. In the example shown, the semiconductor layer 711 is located on and in contact with a face of the semiconductor layer 709 opposite the support substrate 701. By way of example, the semiconductor layer 711 is undoped.

[0092] In the illustrated example, the semiconductor layers 705, 707, 709 and 711 form the infrared photodetector stack 703.

[0093] The support substrate 701 and each layer 705, 707, 709, 711 of the stack 703 are, for example, made of inorganic semiconductor materials other than silicon, for example, III-V compounds comprising at least a first element from Group III, a second element from Group V, and optionally a third element, for example, a Group III element other than the first. By way of example, the support substrate 701 and the semiconductor layers 705, 707, and 711 are made of indium phosphide (InP). The semiconductor layer 709 is, for example, made of indium gallium arsenide (InGaAs).

[0094] By way of example, the layers 705, 707, 709 and 711 of the infrared photodetector stack 703 are formed, by successive epitaxial growth operations, from the face 701T of the support substrate 701.

[0095] Fig. 7B illustrates more precisely a structure obtained after a subsequent step of depositing an insulating layer 713 on the upper face side of the structure of Fig. 7A.

[0096] The insulating layer 713 covers the semiconductor layer 711. In the example shown, the insulating layer 713 is more precisely located on and in contact with a face of the semiconductor layer 711 opposite the support substrate 701. By way of example, the insulating layer 713 is made of an oxide, for example a silicon oxide (SiO2), or of a nitride, for example a silicon nitride (SiN).

[0097] Furthermore, during this step, through-holes are formed in the insulating layer 713. These openings are, for example, located directly above locations where the lower electrodes 715 of the infrared photodetectors 201 will later be formed. As an example, the openings are formed by photolithography and then etching of the insulating layer 713.

[0098] Furthermore, during this step, the lower electrodes 715 of the infrared photodetectors 201 are formed in the semiconductor layer 711. In this example, the lower electrodes 715 are formed within the thickness of the semiconductor layer 711, for example by doping regions of the semiconductor layer 711 located substantially above the openings previously formed in the insulating layer 713. As an example, doping is achieved by diffusion of an acceptor doping species, for example zinc atoms.

[0099] Furthermore, during this step, contact elements 717 are formed on and in contact with the lower electrodes 715. In the illustrated example, the contact elements 717 fill, i.e., completely fill, the openings previously formed in the insulating layer 713. In this example, the contact elements 717 also extend laterally on and in contact with the face of the insulating layer 713 opposite the support substrate 701 (the upper face of the insulating layer 713, in the orientation of [Fig. 7B]). By way of example, a conductive layer, for example a metallic layer, is first deposited on the upper face of the structure. The conductive layer is then, for example, structured, for example by photolithography and then etching, so as to obtain the contact elements 717.

[0100] Fig. 7C illustrates more precisely a structure obtained at the end of a further step of forming isolation trenches 719 in the stack of infrared photodetectors 703.

[0101] During this step, trenches are formed, for example, in the insulating layer 713 and in the infrared photodetector stack 703. In the example shown, the trenches extend vertically from a face of the insulating layer 713 opposite the support substrate 701 (the upper face of the insulating layer 713, in the orientation of [Fig. 7C]) to the semiconductor layer 707, through the semiconductor layers 711 and 709. In this example, the bottom of each trench is formed by a portion of the upper face of the semiconductor layer 707.

[0102] By way of example, through-holes are first formed in the insulating layer 713, for example by photolithography followed by etching. The semiconductor layers 711 and 709 of the infrared photodetector stack 703 are then, for example, etched directly above the openings previously formed in the insulating layer 713, so as to obtain the trenches.

[0103] Furthermore, during this step, the sides of the trenches are passivated by the deposition of an insulating layer 721, for example an oxide layer, coating the sides and the bottom of the trenches. An anisotropic etching operation is then, for example, carried out so as to remove parts of the insulating layer 721 coating the bottom of the trenches.

[0104] Furthermore, during this step, contact re-establishment elements 723 are formed in the trenches. In the illustrated example, the contact re-establishment elements 723 fill, that is, completely fill, the trenches previously formed in the insulating layer 713 and in the semiconducting layers 711 and 709. In this example, the contact re-establishment elements 723 also extend laterally over and in contact with the face of the insulating layer 713 opposite the support substrate 701 (the upper face of the insulating layer 713, in the orientation of [Fig. 7C]). For example, a conductive layer, for instance a metallic layer, is first deposited on the upper face of the structure. The conductive layer is then structured, for example by photolithography followed by etching, so as to obtain the contact elements 723.

[0105] During this step, the contact elements 723 are, for example, thinned, for example by CMP (from the English "Chemical and Mechanical Polishing") on the side of the upper face of the structure.

[0106] The contact resumption elements 717 and 723 constitute, for example, respectively anode and cathode electrodes of the infrared photodetectors 201 of the device 100.

[0107] Figure 7D illustrates more precisely a structure obtained after a step of forming an active stack of light-emitting diodes 751, or active LED stack, on the side of a face 753T of a substrate 753 (the upper face of the substrate 753, in the orientation of Figure 7D). The step described in relation to Figure 7D can be carried out interchangeably before, during, or after the steps previously described in relation to Figures 7A to 7C. The substrate 753 is transparent to the radiation 109 emitted by the light-emitting diodes 211, for example, transparent to visible light. By way of example, the substrate 753 is made of corundum (sapphire). In a case where substrate 753 is removed during a later step in the manufacturing process of device 100, substrate 753 may be made of a material opaque to visible light, for example silicon.

[0108] In the example shown, a semiconductor layer 755 doped with the first type of conductivity (type N, in this example) covers the face 753T of the substrate 753. The semiconductor layer 755 is, for example, more precisely located on and in contact with the face 753T.

[0109] In the example shown, the semiconductor layer 755 is coated with an active layer 757. The active layer 757 is, in this example, located on and in contact with a face of the semiconductor layer 755 opposite the substrate 753 (the upper face of the layer 755, in the orientation of [Fig. 7D]). By way of example, the layer 757 includes quantum boxes or wells.

[0110] In the illustrated example, the active layer 757 is coated with another semiconductor layer 759. In this example, the semiconductor layer 759 is located on and in contact with a face of the active layer 757 opposite the substrate 753 (the upper face of the layer 757, in the orientation of [Fig. 7D]). The semiconductor layer 759 is, for example, doped with a second type of conductivity opposite to the first type of conductivity. In this example, the 759 semiconductor layer is of type P.

[0111] In the illustrated example, the semiconductor layer 755, the active layer 757 and the semiconductor layer 759 form the stack of light-emitting diode 751.

[0112] By way of example, the semiconductor layer 755, the active layer 757 and the semiconductor layer 759 are formed successively by epitaxial growth from the face 753T of the substrate 753.

[0113] Fig.7E illustrates more precisely a structure obtained at the end of a step of forming light-emitting diodes 211 from the structure described above in relation to Fig.7D.

[0114] In the illustrated example, conduction electrodes 761 of the light-emitting diodes 211 are formed on the side of the face 753T of the substrate 753. The conduction electrodes 761 are, for example, more precisely, anode electrodes of the light-emitting diodes 211. In the example shown, the conduction electrodes 761 cover a face of the active stack of light-emitting diodes 751 opposite the substrate 753 (the upper face of the stack 751, in the orientation of [Fig. 7E]). The conduction electrodes 761 are, for example, located on and in contact with a face of the semiconductor layer 759 opposite the substrate 753 (the upper face of the layer 759, in the orientation of [Fig. 7E]). The conduction electrodes 761, for example, have any shape when viewed from above, for example rectangular, oval, square, circular, etc.For example, the 761 conduction electrodes are made of a conductive material, for example a metal or a metal alloy.

[0115] Furthermore, during this step, peripheral isolation trenches 763 are formed in the thickness of the active LED stack 751. In the example shown, each peripheral isolation trench 763 extends vertically in the thickness of the active LED stack 751, from the face of the semiconductor layer 759 opposite the substrate 753 and passes through the semiconductor layer 759 and the active layer 757. In this example, each peripheral isolation trench 763 is interrupted in the thickness of the semiconductor layer 755, i.e., the peripheral isolation trenches 763 do not open onto the face 753T of the substrate 753.

[0116] In the illustrated example, each peripheral insulation trench 763 has an annular shape surrounding, or bordering, a portion of the active layer 757 corresponding to an active region of the light-emitting diode 211. Each peripheral insulation trench 763 further surrounds the conduction electrode 761 of the light-emitting diode 211.

[0117] The peripheral insulation trenches 763 form, for example, in top view, a grid in which each square laterally delimits a light-emitting diode 211.

[0118] By way of example, each peripheral insulation trench 763 includes a conductive region 765 whose side walls, or flanks, are coated with an insulating layer 767, the insulating layer 767 being for example located on and in contact with the flanks of the conductive region 765.

[0119] Furthermore, at least one connecting element 769 (a single connecting element 769 in the example shown) of a common conducting electrode, for example a cathode electrode, of the light-emitting diodes 211 is formed during this step. By way of example, each connecting element 769 comprises a conducting region 771 whose lateral walls, or flanks, are coated with an insulating layer 773, the insulating layer 773 being, for example, situated on and in contact with the flanks of the conducting region 771.

[0120] Fig. 7F illustrates more precisely a structure obtained at the end of a subsequent formation step, on the side of face 753T of substrate 753, of contact resumption elements 775.

[0121] In the example shown, each contact element 775 is located on and in contact with one of the conduction electrodes 761, or on and in contact with the conductive region 771 of the contact element 769. In this example, insulating regions 777 extend laterally between the contact elements 775. In the illustrated example, the contact elements 775 are flush with the upper face of the insulating regions 777.

[0122] By way of example, the contact resumption elements 775 and the insulating regions 777 are produced by the implementation of a damascene technique.

[0123] [Fig.7G] illustrates more precisely a structure obtained at the end of a circuit formation step 205 of the PIX pixels of the device 100. The step described in relation to [Fig.7G] can be carried out indifferently before, during or after the steps previously described in relation to figures 7A to 7F.

[0124] In the example shown, the structure includes a support substrate 781. By way of example, the support substrate 781 is a wafer or a piece of wafer made of a semiconductor material, for example silicon.

[0125] The support substrate 781 is, for example, coated on one of its faces with an insulating layer 783. In the example shown, the insulating layer 783 is located on and in contact with a face 781T of the support substrate 781 (the upper face of the substrate 781, in the orientation of [Fig. 7G]). By way of example, the insulating layer 783 is made of an oxide, for example silicon dioxide.

[0126] The insulating layer 783 is, for example, coated with a semiconductor layer 785, for example a silicon layer. In the example shown, the semiconductor layer 785 is located on and in contact with a face of the insulating layer 783 opposite the support substrate 781.

[0127] By way of example, the support substrate 781, the insulating layer 783 and the semiconducting layer 785 are part of a SOI (Silicon On Insulator) type substrate. In this case, the insulating layer 783 corresponds to the buried oxide layer (BOX) of the SOI substrate.

[0128] In this example, the circuits 205 are located on the side of the face 781T of the semiconductor substrate 781. By way of example, the circuits 205 are formed in and on the semiconductor layer 785.

[0129] Although not detailed in [Fig. 7G] to avoid cluttering the drawing, the structure further includes, for example, an interconnect stack or network located on the semiconductor layer 785. The interconnect stack includes, for example, a stack of alternating conductive layers, such as metallic layers or metallization levels, and insulating layers. The interconnect stack includes, for example, conductive tracks formed in the conductive layers and conductive vias, such as metallic vias, interconnecting conductive tracks located in different conductive layers.

[0130] In the example shown, only a conductive layer 789 of the interconnect stack furthest from the support substrate 781, called the last metallization level, has been symbolized by hatched rectangles in [Fig. 7G]. In this example, the last metallization level is formed in an insulating layer 787 of the interconnect stack.

[0131] The semiconductor layer 785 of the structure illustrated in [Fig.7G] corresponds for example to the semiconductor substrate 101 of the device 100 of [Fig.l].

[0132] Although [Fig. 7G] illustrates an example in which the circuits 205 are formed in and on a SOI-type substrate, this example is not limiting. As an alternative, the circuits 205 may be formed in and on a bulk semiconductor substrate, for example identical or analogous to the support substrate 781 of [Fig. 7G].

[0133] Fig.7H illustrates more precisely a structure obtained as a result of a subsequent step of transferring the structure previously described in relation to Fig.7G onto the structure previously described in relation to Fig.7F.

[0134] By way of example, the structure previously described in relation to [Fig. 7G] is reversed with respect to the orientation of [Fig. 7G] and then brought into contact, by the faces of the insulating layer 787 and the conductive layer 789 opposite the supporting substrate 781 (the lower faces of layers 787 and 789, in the orientation of [Fig. 7H]), with the faces of the contact elements 775 and the insulating regions 777 opposite the substrate 753 (the upper faces of the contact elements 775 and the insulating regions 777, in the orientation of [Fig. 7H]). During this step, the structure comprising the substrate 753 and the active LED stack 751 is attached to the interconnect stack, which includes the insulating layer 787 and the conductive layer 789.

[0135] By way of example, the fixation is achieved by molecular bonding between the two surfaces brought into contact. The molecular bonding is, for example, more precisely of the hybrid type, each surface comprising conductive elements, for example metallic, and insulating elements, for example oxide.

[0136] The support substrate 781 is then, for example, removed. The support substrate 781 is, for example, completely removed, for example by grinding the side of the face 753T of the substrate 753. Using a SOI-type substrate has the advantage of facilitating the removal of the support substrate 781 during this step, for example by allowing it to stop on the insulating layer 783.

[0137] Fig. 71 illustrates more precisely a structure obtained at the end of a subsequent step of realization of conductive vias 791 and contact resumption elements 793.

[0138] In the example shown, the conductive vias 791 extend vertically from a face of the insulating layer 783 opposite the substrate 753 (the upper face of the layer 783, in the orientation of [Fig. 71]), through the insulating layer 783 and penetrate into the thickness of the semiconducting layer 785. Although this has not been detailed in [Fig. 71] in order not to clutter the drawing, the conductive vias 791 are, for example, connected to the circuits 205.

[0139] In the example shown, each contact element 793 is located on and in contact with one of the conducting vias 791. In this example, insulating regions 795 extend laterally between the contact elements 793. In the illustrated example, the contact elements 793 are flush with the upper face of the insulating regions 795.

[0140] By way of example, the contact resumption elements 793 and the insulating regions 795 are produced by the implementation of a damascene technique.

[0141] [Fig.7J] illustrates more precisely a structure obtained as a result of a subsequent step of transferring the structure previously described in relation to [Fig.7C] onto the structure previously described in relation to [Fig.71].

[0142] By way of example, the structure previously described in relation to [Fig. 7C] is reversed with respect to the orientation of [Fig. 7C] and then brought into contact, by the faces of the contact elements 717 and 723 opposite the support substrate 701 (the lower faces of the contact elements 717 and 723, in the orientation of [Fig. 7J]), with the faces of the contact elements 793 opposite the support substrate 753 (the upper faces of the contact elements 793, in the orientation of [Fig. 7J]). During this step, the structure comprising the support substrate 701 and the inorganic photodetector stack 703 is attached to the active LED stack 751.

[0143] By way of example, the fixation is achieved by molecular bonding between the two surfaces brought into contact. The molecular bonding is, for example, more precisely of the metal-on-metal type.

[0144] Furthermore, during this step, the support substrate 701 is removed. The support substrate 701 is, for example, completely removed, for example by grinding the side of face 753T of the support substrate 753.

[0145] Furthermore, during this step, lenses 797 are formed directly above each photodetector 201. In the example shown, the lenses 797 are located on and in contact with the face of the semiconductor layer 705 opposite the transparent substrate 753 (the upper face of the semiconductor layer 705, in the orientation of [Fig.7J]).

[0146] The method described above in relation to Figures 7A to 7J can be used to create a monolithic device, for example a microdisplay, combining an optical capture function in the infrared and a display of monochrome visible images. Alternatively, the method can be used to create larger devices. Such a device can comprise a plurality of elementary chips ("smart pixels") arranged, for example, in a matrix arrangement, on the same substrate. By way of example, the substrate is a flexible substrate, that is, a substrate capable of conforming to the shape of a rounded object. The elementary chips are mounted securely to the substrate and connected to electrical connection elements of the substrate for power.In this case, each chip comprises, for example, a photodetector 201, a light-emitting diode 211, and at least one of the circuits 205. Each chip corresponds, for example, to a macro-pixel of the device. The implementation of such a method is within the capabilities of a person skilled in the art, based on the indications in this description, and includes, for example, a step of cutting, or individualizing, the elementary chips fixed to a temporary support substrate, followed by steps of transferring the elementary chips onto the transfer substrate, the pitch of the elementary chips on the transfer substrate corresponding to an integer multiple strictly greater than 1 of the pitch of the elementary chips on the temporary support substrate.

[0147] Figure 8 is a schematic and partial side view of an example of the implementation of device 100 of Figure 1 in an electronic device 900. For example, the 900 device is a pair of connected glasses or a head-mounted display intended to be placed in front of a user's eyes, for example, an augmented reality or mixed reality headset or glasses.

[0148] Although only one device 100 placed opposite one eye 901 has been symbolized in [Fig. 8], the electronic device 900 may of course include another device 100 placed opposite the user's other eye. In the illustrated example, the majority of the radiation, for example visible light, reaching the eye 901 comes from the device 100.

[0149] In the example shown, the electronic device 900 includes, in addition to the image capture and display device 100, a power supply circuit 903 and focusing elements 905, for example two convex lenses, located on either side of the device 100. By way of example, the power supply circuit 903 includes a battery.

[0150] In the illustrated example, the focusing element 905 interposed between the device 100 and the eye 901 is adapted to focus, on the eye 901, the radiation 109 produced by the emission elements 107. Furthermore, in this example, the focusing element 905 located between the device 100 and the outside is adapted to focus the incident radiation 105 on the detection elements 103.

[0151] The electronic device 900 is for example devoid of addressing circuits and / or analog-to-digital converters.

[0152] Fig. 9 is a schematic and partial side view of another example of implementation of device 100 of Fig. 1 in an electronic device 1000. By way of example, device 1000 is a pair of glasses for assisting visually impaired persons, a pair of glasses for assisting a driver of a motor vehicle or a head-up display device, for example integrated into a motor vehicle such as a car, a truck, etc.

[0153] The electronic device 1000 is, for example, adapted to superimpose, onto an image of a scene seen by the eye 901, an image produced by the device 100, for example, an image of a contour or an intensified image of an object in the scene. In the case of an intensified image, the device 100 further includes, for example, an image processing circuit adapted to implement this function. By way of example, the device 1000 is used in image intensification or brightness amplification applications, or in vision applications in dimly lit environments, for example, night vision applications.

[0154] The electronic device 1000 of [Fig.9] includes elements in common with the electronic device 900 of [Fig.8]. These common elements will not be detailed again below.

[0155] The electronic device 1000 of [Fig. 9] differs from the electronic device 900 of [Fig. 8] in that, in device 1000, the device 100 is not placed opposite- eye 901. In the illustrated example, the majority of the radiation, for example visible light, reaching the eye 901 comes from the scene, and the majority of the incident radiation 105 reaches the eye 901 without being captured by the device 100.

[0156] In the illustrated example, the electronic device 1000 includes an optical waveguide 1001 comprising an input face arranged opposite the device 100, for example opposite the emitting elements 107, and an output face arranged opposite the eye 901. In this example, the optical waveguide 1001 is adapted to transmit, in the direction of the eye 901, the radiation 109 emitted by the device 100.

[0157] An advantage related to the integration of one or more devices 100 into the device 900 or 1000 is due to the fact that this allows these devices to have a weight, size, complexity, energy consumption, manufacturing costs and / or latency lower than those of similar devices incorporating image capture and display devices including reading and control circuits implementing sensor and display addressing functions to which they are connected, and in which the images acquired by the sensor are for example stored in a memory circuit before being displayed, possibly after processing.

[0158] Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will become apparent to those skilled in the art. In particular, although the described embodiments take as an example a case in which the arrays of sensing elements 103 and display elements 107 have a substantially identical pitch, those skilled in the art can predict, from the indications in this description, that the display element array 107 of the device 100 has a different, for example, larger, pitch than the sensing element array 103.

[0159] Finally, the practical implementation of the described embodiments and variants is within the reach of a person skilled in the art, based on the functional indications given above. In particular, the described embodiments are not limited to the specific examples of materials and dimensions mentioned in this description.

Claims

Demands

1. Electronic device (100) for capturing and displaying images comprising a plurality of pixels (PIX) formed in and on a semiconductor substrate (101; 785), each pixel comprising: - a detection element (103) for infrared radiation (105), located on the side of a first face (101F) of the semiconductor substrate (101); - an emission element (107) for visible light (109), located on the side of a second face (101R) of the semiconductor substrate opposite to the first face and comprising at least one light-emitting diode (211); and - a circuit (205) located in and on the semiconductor substrate and connecting the detection element to the emission element, in which said at least one light-emitting diode (211) is controlled by a control signal having pulses repeating at a frequency substantially proportional to an intensity of the infrared radiation (105) detected by the detection element (103).

2. Device (100) according to claim 1, wherein the circuit (205) comprises: - an acquisition circuit (207) located in and on the semiconductor substrate (101; 785) and adapted to provide an acquisition signal representative of an intensity of the infrared radiation (105) received by the detection element (103) of the pixel (PIX); and - a control circuit (209) located in and on the semiconductor substrate and adapted to apply a control signal to the emission element (107) of the pixel.

3. Device (100) according to claim 2, wherein the acquisition circuit (207) and the control circuit (209) are analog circuits.

4. Device (100) according to claim 2, wherein: - each detection element (103) comprises an inorganic photodetector (201); - each acquisition circuit (207) comprises a comparator (301) having an inverting input connected to a conduction electrode of the photodetector; and - each control circuit (209) includes an inverter (317) having an input connected to an output of the comparator and an output connected to a gate of a MOS transistor (319), the MOS transistor having a conduction electrode connected to the emission element (107).

5. Device (100) according to claim 2, wherein: - each sensing element (103) comprises a single-photon avalanche diode (501); - each acquisition circuit (207) comprises a Schmitt flip-flop (515) having an input connected to a conduction electrode of the single-photon avalanche diode; and - each control circuit (209) comprises an inverter (317) having an input connected to an output of the Schmitt flip-flop and an output connected to a gate of a MOS transistor (319), the MOS transistor comprising a conduction electrode connected to the emitting element (107).

6. Device (100) according to any one of claims 1 to 5, wherein the sensing elements (103) are located opposite the emitting elements (107).

7. Device (100) according to any one of claims 1 to 6, wherein the sensing elements (103) and the emitting elements (107) are arranged respectively in first and second matrices, the first and second matrices having substantially identical pitches.

8. Device (100) according to any one of claims 1 to 7, comprising as many detection elements (103) as emission elements (107).

9. Electronic device (900; 1000) comprising: - a power supply circuit (903); and - at least one device (100) according to any one of claims 1 to 8.

10. Method of manufacturing a device (100) according to any one of claims 1 to 8, comprising a step of transferring, by molecular bonding, a structure comprising the sensing elements (103) and the circuits (205) onto another structure comprising the emitting elements (107).

Images