PROCEDURE OF TREATMENT OF A SUBSTRATE PRESENTING A SURFACE INTO A SEMICONDUCTOR MATERIAL

Abstract

The present invention relates to a method for treating a substrate having a free surface of a semiconductor material, in particular a monocrystalline semiconductor material, comprising a method for stabilizing said surface against the formation of terraces and / or balls, said method comprising the formation in the gas phase, on said surface, of a layer of vitreous carbon (30) at a temperature (T1) greater than 700°C, preferably greater than 800°C, and strictly less than 1000°C, preferably less than 950°, and more preferably less than 900°C, and a heat treatment of said substrate after stabilization of said surface, in which the layer of vitreous carbon (30) limits the reorganization of the surface into a semiconductor material in the form of terraces, the deposition of the carbon layer (30) and the heat treatment being carried out in the same furnace. Figure for abstract: Fig. 3

Description

Title of the invention: METHOD FOR PROCESSING A SUBSTRATE HAVING A SURFACE MADE OF A SEMICONDUCTOR MATERIAL FIELD OF THE INVENTION

[0001] The present invention relates to a method for treating a substrate having a surface of a semiconductor material, in particular a monocrystalline semiconductor material. The treatment method comprises a step of stabilizing the surface and a heat treatment step. The invention further relates to a method for manufacturing a semiconductor structure comprising a step of stabilizing a surface of a semiconductor material, in particular a monocrystalline semiconductor material, and a step of heat treatment of said surface. STATE OF THE ART

[0002] Semiconductor materials, in particular silicon carbide (SiC), are widely used for the manufacture of power or radiofrequency electronic components. In some applications, substrates made of bulk monocrystalline SiC, substrates having a surface layer of monocrystalline SiC, or substrates comprising other semiconductor materials such as aluminum nitride (AIN), gallium nitride (GaN), alloys of these nitrides, indium phosphide (InP) or gallium arsenide (GaAs) are used. In some cases, the semiconductor substrates or the semiconductor layers are polycrystalline.

[0003] Substrates for electronic applications often require heat treatments during their manufacture, for example annealing to heal defects in the crystal lattice caused during implantation of ionic species or to modify the crystal structure of the substrate. Such treatments are often carried out at high temperatures of up to 2000°C.

[0004] However, the surface of the semiconductor materials considered is likely to become destabilised under the effect of a high temperature. This destabilisation may result in degradation of the surface, in particular by a modification of the morphology and / or the composition thereof.

[0005] In particular, as illustrated in [Fig.l], smooth SiC surfaces are sensitive to high temperature treatments, typically from about 1300°C. In the absence of adequate protection of said surface, the morphology reorganizes to minimize the surface energy, forming terraces. This effect is known by the English term "step bunching". The reorganization of the surface 222 is due to a diffusion of the atoms on the surface when it is exposed to high temperatures. It further depends on the atmosphere and pressure to which the surface is exposed. It also depends on the misorientation angle of the surface relative to a high symmetry axis of the semiconductor material crystal. Such misorientation is used to facilitate control of the 4H polytype of SiC during subsequent epitaxy of single-crystal SiC and to avoid polytype changes during the growth of single-crystal SiC. An angle of 4° is often chosen for such an epitaxial process. However, the greater this tilt angle, the higher the steps between the terraces.

[0006] Such disorientations can also appear spontaneously on a surface of polycrystalline SiC, the grain orientation of which is random.

[0007] The surfaces of other semiconductor materials may exhibit the same type of steps. On surfaces comprising GaN, gallium balls may appear on the surface during exposure to high temperature.

[0008] In order to obtain smooth surfaces, we therefore seek to avoid the formation of terraces or to remove them in a later step, and, where appropriate, to avoid the appearance of gallium balls or other material.

[0009] For example, mechanical or chemical-mechanical polishing (CMP) can be carried out after heat treatment. However, if the height of the terraces formed is too great, for example greater than 80 nm between two consecutive plates, the thickness to be removed is too great, which implies a long and laborious process. In addition, the remaining thickness is often too thin for the intended applications.

[0010] The article by J. Bao et al. proposes using very rapid annealing ramps to limit the appearance of terraces. This method requires very rapid temperature increases of approximately 400°C per minute and is therefore not compatible with industrial furnaces.

[0011] Alternatively, silane overpressure can be applied which limits the sublimation of silicon into the SiC, thus avoiding the formation of terraces. This method is described in the article by R. Zhang et al. However, it requires the introduction of a SiH4 gas and the equipment to create the overpressure. In addition, silicon droplets can appear on the SiC surface at temperatures above 1600°C.

[0012] Another possibility to avoid the formation of terraces is to use a protective layer, typically a carbon film about 1 μm thick. This technique involves the addition of additional steps in the formation process such as the deposition of a resin, the carbonization of said resin at a temperature between 600°C and 1000°C, and the use of additional equipment and entails a risk of contamination of the substrate and the furnace by the resin. In addition, the deposition of resin and the removal of a micrometric layer of carbon are steps long and expensive.

[0013] In some cases, the protective layer can also be formed from aluminum nitride (AIN). However, this material is difficult to remove, especially after heat treatment at a high temperature.

[0014] The presence of oxygen in the furnace atmosphere can limit the formation of terraces, however it risks forming surface wells incompatible with the resumption of epitaxy. In addition, high temperature furnaces typically include graphite elements sensitive to the presence of oxygen during annealing. Statement of the invention

[0015] An aim of the invention is to provide a method for treating a substrate having a surface of a semiconductor material, said method comprising a step of stabilizing said surface and a heat treatment step. The method aims to avoid the formation of terraces and / or balls during the heat treatment by a step that is simple to implement. The stabilization step must be easy to integrate into the method of manufacturing a substrate having a surface of a semiconductor material, and not present any risk of contamination of such a substrate.

[0016] To this end, the invention provides a method for treating a substrate having a free surface of a semiconductor material, in particular a monocrystalline semiconductor material, comprising a method for stabilizing said surface against the formation of terraces and / or balls, said method comprising • the formation in the gas phase, on said surface, of a layer of vitreous carbon at a temperature above 700°C, preferably above 800°C, and strictly below 1000°C, preferably below 950°, and more preferably below 900°C, and • a heat treatment of said substrate after stabilization of said surface, in which the glassy carbon layer limits the reorganization of the surface into a semiconductor material in the form of terraces,

[0017] the deposition of the carbon layer and the heat treatment being carried out in the same furnace.

[0018] The formation of the carbon layer at a temperature between 700°C and 1000°C results in a very low roughness of the surface of the semiconductor material compared to stabilization processes carried out at higher temperatures. In addition, under such conditions, the density and size of the carbon particles forming on the surface of the semiconductor material during the growth of the carbon layer and the subsequent annealing process can be reduced.

[0019] Preferably, the formation of the glassy carbon layer is carried out under a gas pressure between 0.1 and 100 kPa.

[0020] Advantageously, the formation of the carbon layer is carried out in a gas flow comprising a carbonaceous gas and a carrier gas, the carrier gas preferably being argon.

[0021] Advantageously, the carbon gas is propane.

[0022] Preferably, the formation of the glassy carbon layer is carried out at a partial pressure of the carbon gas of between 0.1 and 1 kPa.

[0023] The semiconductor material may be silicon carbide.

[0024] Advantageously, the carbon layer has a thickness less than or equal to 100 nm.

[0025] In some embodiments, the furnace comprises interior walls and support members configured to hold at least one substrate, said interior walls, said supports and the gas within the furnace having a same temperature.

[0026] Advantageously, the furnace has at least one interior wall made of carbon.

[0027] The oven may contain a plurality of substrates comprising a surface of said semiconductor material, said substrates being superimposed vertically, a vertical space being provided between two adjacent substrates, a carbon layer being formed on the surface of the semiconductor material of each of said substrates.

[0028] At least part of the heat treatment may be carried out at a temperature above 1500°C.

[0029] Preferably, the method further comprises, after the heat treatment, a step of removing the carbon layer by chemical-mechanical polishing and / or by reactive ion etching and / or by plasma etching.

[0030] The invention also relates to a method of manufacturing a semiconductor structure, comprising the following steps: • the formation of a weakening zone by implantation of ionic species in a donor substrate made of a semiconductor material, in particular a monocrystalline semiconductor material, • bonding said donor substrate to a support substrate, • detachment of the donor substrate along the weakening zone so as to transfer a layer of semiconductor material onto the support substrate, • a treatment method as described above, so as to heal the defects created in the layer of semiconductor material during the implantation of the ionic species, in which the carbon layer is formed on the free surface of the layer of semiconductor material transferred onto the support substrate. DESCRIPTION OF FIGURES

[0031] [Fig.l] illustrates the formation of terraces on one face of a monocrystalline semiconductor material.

[0032] [Fig.2] illustrates a substrate comprising a portion of a monocrystalline semiconductor material on its front face.

[0033] [Fig.3] illustrates the substrate of [Fig.2] after deposition of a carbon layer.

[0034] [Fig.4] illustrates the substrate of [Fig.3] after ablation of the carbon layer.

[0035] Figures 5A to 5C illustrate the manufacture of a substrate comprising a portion in a monocrystalline semiconductor material on its front face.

[0036] [Fig.6A] shows an example of a thermal profile used for a first embodiment of a method according to the invention.

[0037] [Fig.6B] shows an example of a thermal profile used for a second embodiment of a method according to the invention.

[0038] [Fig.7A] is an atomic force microscopy (AFM) image illustrating the roughness induced by terraces on the surface of a substrate that has undergone heat treatment at 1500°C without the application of a carbon layer.

[0039] [Fig.7B] is an atomic force microscopy image illustrating the surface roughness of a substrate having undergone a heat treatment at 1500°C with a layer of glassy carbon according to the invention.

[0040] [Fig.8A] is an AFM image showing the surface roughness of a carbon layer obtained by deposition at 900°C for 10 min after carrying out annealing at 1700°C.

[0041] [Fig.8B] is an AFM image showing the surface roughness of a carbon layer obtained by deposition at 1000°C for 10 min after carrying out annealing at 1700°C.

[0042] [Fig.9] illustrates an annealing furnace suitable for forming a carbon layer according to a preferred embodiment of the invention. DETAILED DESCRIPTION OF THE INVENTION

[0043] [Fig. 2] illustrates a substrate 10 comprising a support substrate 11 and a portion 20 made of a monocrystalline or polycrystalline semiconductor material on its front face. The support substrate 11 may be any type of support substrate suitable for the deposition or transfer of a portion 20 made of a monocrystalline or polycrystalline semiconductor material, for example a support substrate made of a polycrystalline semiconductor material.

[0044] Alternatively, the substrate 10 may be a solid substrate made of a monocrystalline or polycrystalline semiconductor material, i.e. the support substrate 11 and the portion 20 together constitute a single portion made of a semiconductor material. monocrystalline or massive polycrystalline.

[0045] Preferably, the portion 20 on the front face of the substrate is made of a monocrystalline semiconductor material. However, the semiconductor material which forms the front face of the substrate 10, and which therefore composes either the portion 20 (in the case of a substrate 10 comprising a support substrate 11 and a portion 20) or the substrate 10 (in the case of a solid substrate) is also likely to be a polycrystalline material.

[0046] In the remainder of the description, since the case of a substrate 10 comprising a support substrate 11 and a monocrystalline portion 20 is detailed, the material which composes the portion 20 will be designated by the expression “monocrystalline semiconductor material” to distinguish it from the material composing the support substrate 11. However, the method described below is also applicable to the case of a polycrystalline semiconductor material, each grain then being capable of being considered as a monocrystal.

[0047] According to a preferred embodiment, the monocrystalline semiconductor material is silicon carbide.

[0048] According to other embodiments, the monocrystalline semiconductor material is chosen from: aluminum nitride (AIN), gallium nitride (GaN), alloys of these nitrides AlxGa(i_x)N, x being a number between 0 and 1, indium phosphide (InP) or gallium arsenide (GaAs).

[0049] Typically, the surface 200 of the portion 20 made of a single-crystal semiconductor material or, where appropriate, of the substrate made of a bulk single-crystal semiconductor material, is slightly off-axis. For example, if the semiconductor material is SiC, the surface may be off-axis relative to the crystal structure of the SiC to facilitate control of the 4H polytype during growth.

[0050] In the case of a polycrystalline semiconductor material, some of the grains may exhibit such an offset relative to the crystalline structure of the SiC. For example, following the cutting or polishing of the substrate 10 so as to reveal a specific face of the substrate 10, grains whose orientation is randomly oriented relative to this face will exhibit an offset. Formation of the protective layer

[0051] A layer of vitreous carbon 30 is subsequently formed, with reference to [Fig. 3], on the surface 200 of the portion 20 made of a monocrystalline semiconductor material. The layer of vitreous carbon is continuous and covers the entire surface to be protected, i.e. the front face of the monocrystalline material. Typically, the layer of vitreous carbon 30 is deposited on all the free surfaces of the substrate and therefore simultaneously covers the front face and the rear face of the substrate. This makes it possible to simultaneously protect the rear face against the formation of terraces and, in the case of a silicon carbide substrate, against evaporation of the silicon during the heat treatment.

[0052] Said carbon layer protects the surface of the substrate against the formation of terraces during heating to a high temperature. It thus stabilizes the crystalline structure of the surface. The carbon layer is removed after completion of the high-temperature treatments to obtain a clean surface of the monocrystalline semiconductor material with good crystalline quality. The thickness of the carbon layer is preferably less than 100 nm to allow easy removal at the end of a high-temperature process.

[0053] The glassy character of the carbon layer is obtained from a carbon thickness of a few nanometers; for a lower thickness, the carbon is in the form of one or two monolayers of graphene. When the thickness is sufficient to obtain glassy carbon, the protective layer has a long-distance scale, unorganized three-dimensional structure, which is stable in the entire range of temperatures to which the surface is exposed during the process, and which allows total coverage of the substrate surface. The uniformity of a glassy carbon layer is easier to control over the extent of the substrate surface.

[0054] Advantageously, the formation of the glassy carbon layer is carried out in a furnace which will be described later. The carbon layer is formed in the gaseous phase, that is to say that the carbon is present in the furnace in a gaseous form. The substrate is heated in the furnace to a deposition temperature of the protective layer, and the gaseous phase of carbon is transformed into solid carbon by a reaction with the hot surface of the substrate.

[0055] The temperature and gas pressure in the furnace are chosen to avoid degradation of the surface to be protected during the deposition of the carbon layer. The temperature in the furnace is, during the formation of the carbon layer, greater than 700°C and strictly less than 1000°C, advantageously less than 950°C. Preferably, the temperature during the formation of the carbon layer is between 800°C and 900°C to protect the surface of the substrate effectively.

[0056] Temperatures below 800°C cause the process to slow down. For temperatures below 700°C, the slowdown is such that it impairs the efficiency of the process.

[0057] During the formation of the carbon layer and the subsequent heat treatment, an appearance of carbon particles is often observed on the surface of the substrate. The density and size of said carbon particles is considerably reduced at a carbon layer formation temperature strictly below 1000°C and more advantageously below 900°C. Higher temperatures, in particular from 1000°C, cause an appearance of particles of a significant size, which can be up to approximately 60 nm. These particles form on the surface of the substrate during the formation of the carbon layer and the subsequent heat treatment. A carbon layer formation temperature of 1000°C or higher therefore increases the roughness of the substrate surface.

[0058] A polishing step, for example chemical-mechanical polishing for the removal of the carbon layer, is easier to implement and involves less risk of scratching the surface when the number and size of such particles are reduced.

[0059] In addition, by reducing the density and size of the carbon particles on the surface, the risk of contamination of other substrates or components by such particles is reduced, for example in an electronic component production environment.

[0060] Reducing the surface roughness also makes it easier to control the thickness of the deposited carbon layer.

[0061] The temperature range between 700 and 950°C, preferably between 800 and 900°C, thus makes it possible to easily control the thickness of the carbon layer deposited by an efficient process, avoiding the appearance of carbon particles having a size and density that is too large for the manufacture of power and radiofrequency electronic components.

[0062] Advantageously, the carbon source is a carbonaceous gas, for example propane (C3H8). Alternatively, the carrier gas may be methane (CH4) or ethane (C2H6). The use of propane as the carrier gas allows the carbon layer to be formed more quickly due to the C-C bond of the carbon atoms being easier to break than the C-H bonds in methane and ethane.

[0063] The carbon gas is mixed with a carrier gas, for example argon or a mixture of argon and hydrogen. The carrier gas is a neutral gas which does not participate in the chemical reaction of layer formation. Typically, the mixing of the gases is carried out in the furnace enclosure at the deposition temperature. The gas flow rate can be easily controlled and adjusted to the deposition conditions of the carbon layer.

[0064] Typically, the deposition of the carbon layer is carried out under a gas pressure of between 0.1 and 100 kPa (between 1 mbar and 1 bar), which is easy to maintain in an industrial furnace. The partial pressure of the carbon gas is typically adjusted to a value of between 0.1 and 1 kPa (between 1 mbar and 10 mbar). Such a concentration makes it possible to avoid saturation of the furnace atmosphere, which allows better control of the thickness of the deposited carbon layer.

[0065] Advantageously, the thickness of the protective carbon layer is less than 100 nm, for example between 50 nm and 100 nm. The time required to obtain such a layer depends on the temperature and the partial pressure of the carbon gas and is typically between two seconds and two hours. The temperature during the formation of the layer, the pressure and type of carbon gas and the duration of the step make it possible to adjust the thickness of the deposited carbon layer.

[0066] The carbon layer can be characterized by surface analysis techniques, for example by atomic force microscopy (AFM), X-ray reflectometry (XRR), Raman spectroscopy or low energy electron microscopy (LEEM).

[0067] The carbon layer is stable at least up to a temperature of 2000°C and makes it possible to limit the formation of terraces while the substrate is exposed to a temperature higher than the terrace formation temperature.

[0068] High temperature steps requiring the protective layer

[0069] After the formation of the carbon layer, further steps may be carried out on the substrate at a temperature higher than the terrace formation temperature. Such steps are, for example, annealing in order to heal defects in the crystal lattice caused during implantation of ionic species, to modify the crystal structure of the substrate, or for the activation of dopants. During these steps, the surface of the monocrystalline semiconductor material is protected by the carbon layer and the formation of terraces on said surface is avoided. The annealing steps are carried out at temperatures between 1300°C and 1900°C, typically higher than 1500°C.

[0070] The formation of the carbon layer and the heat treatment are carried out in the same furnace, which is advantageously a furnace traditionally used for carrying out batch annealing of substrates.

[0071] A furnace rising to temperatures above 1500° generally includes graphite elements due to the good stability of this material at high temperatures. In any case, the formation of the carbon layer in such a furnace only causes the deposition of a very thin layer of carbon which does not affect the operation of these elements made of the same material as the layer. Removing the protective layer

[0072] At the end of the annealing steps, the temperature is lowered to a temperature below the terrace formation temperature, i.e. below 1300°C.

[0073] In some embodiments, the removal may be performed in the same furnace in which the steps of forming the protective carbon layer and / or the high-temperature steps were performed. In this case, the temperature is lowered to a temperature for ablation of the carbon layer, for example about 900°C. The carbon layer can then be removed because the temperature is low enough that no terrace formation occurs on the surface of the semiconductor material. The low thickness of the carbon layer promotes rapid removal without residue on the substrate.

[0074] The removal of the carbon layer can be carried out by a reactive plasma, for example an oxygen plasma according to the reaction:

[0075] C(solid)+O2(gaseous) CO2(gaseous)

[0076] In other embodiments, the substrate is cooled after the heat treatment step and transferred to another enclosure or device for removal of the carbon layer. Such a transfer is necessary, for example, if elements of the furnace are made of unprotected graphite or other materials that can be damaged by contact with the reactive plasma, and the ablation of the carbon layer is carried out by plasma.

[0077] Alternatively, the carbon layer can be removed by reactive ion etching (RIE), for example by oxygen ions or a mixture of oxygen and sulfur hexafluoride after transfer to a suitable enclosure.

[0078] In order to remove any carbon residues and / or to ensure good quality of the surface of the monocrystalline semiconductor material, a suitable chemical-mechanical polishing step can be carried out after removal of the carbon layer.

[0079] In some cases, the carbon layer is removed during a finishing step of the substrate after removal from the furnace, for example during a chemical-mechanical polishing or mechanical polishing step.

[0080] At the end of the removal step, with reference to [Fig. 4], the substrate 11 is finalized and the carbon layer is removed. The substrate 11 and the free surface of the monocrystalline semiconductor material can now be used for the epitaxial growth of a layer of a monocrystalline semiconductor material (identical or different from that of the substrate 11) and / or the manufacture of a power or radiofrequency electronic component.

[0081] In some cases, the carbon layer on the back side of the substrate is removed with the layer on the front side. In other embodiments, the glassy carbon layer arranged on the back side of the substrate is retained at this step and during the fabrication of an electronic device on the front side to protect the back side during these steps. In this case, the carbon layer on the back side is removed before or during a step of thinning the substrate, for example by grinding.

[0082] Sequence of a process for manufacturing a semiconductor structure

[0083] A method of manufacturing a semiconductor structure for electronic applications, having a surface made of monocrystalline silicon carbide, will now be described.

[0084] A donor substrate 220 is provided, preferably made of monocrystalline silicon carbide, from which the surface layer of monocrystalline silicon carbide will be formed. With reference to [Fig.5A], as shown schematically by the arrows, an implantation of ionic species, such as hydrogen and / or helium, so as to form a weakening zone 21 in the donor substrate 220. Said weakening zone 21 defines a layer 20 of monocrystalline silicon carbide to be transferred.

[0085] With reference to [Fig.5B], the donor substrate 220 thus implanted is bonded to a base substrate 11. The donor substrate can be bonded directly to the base substrate as illustrated in [Fig.5B], or via one or more intermediate layers which can be applied to the donor substrate and / or to the base substrate before bonding (not shown).

[0086] With reference to [Fig.5C], the donor substrate 220 is then detached along the weakening zone 21, which leads to the transfer of the monocrystalline silicon carbide layer onto the base substrate 11, thus forming the support substrate 10 as shown in [Fig.2]. The detached portion 221 of the donor substrate can be reused for the transfer of other monocrystalline silicon carbide layers onto other base substrates.

[0087] A method of treating the substrate 10 is then carried out, successively comprising a step of stabilizing the surface by forming a protective layer of glassy carbon, a high-temperature annealing intended to heal the defects created in the layer of monocrystalline silicon carbide during the implantation of the ionic species, and subsequently removing the protective layer of carbon.

[0088] The process comprising the formation of the carbon layer and the heat treatment is carried out in the same furnace. This avoids transferring the substrate from a deposition chamber dedicated to the deposition of the protective layer to an annealing furnace, and thus provides a simpler, faster process while minimizing the risk of contamination of the substrate.

[0089] [Fig.6A] illustrates a temperature profile for one embodiment of such a process as a function of time. Three main sequences of the process can be distinguished, which correspond to the formation of a protective carbon layer (SI), high-temperature annealing (S2), i.e. above the temperature at which the formation of terraces begins, and a step of removing the protective layer (S3).

[0090] The gas injected at the top of the furnace is evacuated under a flow of the carrier gas from the bottom of the furnace during all sequences of the process.

[0091] The first sequence SI begins at a time t0. The substrate is at room temperature which is typically about 20°C or at a temperature lower than the terrace formation temperature. The substrate is introduced into the deposition chamber. The substrate is started to be heated to a temperature T1 for deposition of the glassy carbon layer. The deposition temperature T1 is greater than 700°C and strictly less than 1000°C. Thus, T1 is lower than the temperature at which terrace formation begins which is about 1300°C at a pressure of 101 kPa (1 atm), or even about 1200 or 1100°C at lower pressures. The temperature Tl is also lower than the temperature of about 1000°C which can cause an increase in surface roughness.

[0092] From a time tl, a gas flow comprising a carbon gas and a carrier gas is injected into the furnace.

[0093] The deposition of the carbon layer begins at a time t1. The duration of the formation of the carbon layer is typically between two seconds and two hours until time t2. During this time, the deposition temperature T1 is kept constant. The pressure in the furnace is maintained between 0.1 and 100 kPa (between 1 mbar and 1 bar).

[0094] The flow rate of the injected gases depends on the volume of the chamber and is controlled to obtain a partial pressure of the carbonaceous gas of between 0.1 and 1 kPa (between 1 mbar and 10 mbar). The deposition temperature T1 and the flow rate of the carbonaceous gas can be adjusted to obtain a carbon layer with a desired thickness and homogeneity adapted for optimal protection during the following sequence, and for a sufficiently short time to optimize the process in terms of duration and cost.

[0095] The carbon gas supply is stopped at the end of the SL sequence. The carbon gas residues are evacuated under the flow of the carrier gas.

[0096] When the deposition of the carbon layer is completed at a time t2, the second sequence S2 is carried out. The second sequence S2 comprises heating from the deposition temperature T1 to an annealing temperature T2 and a temperature plateau of a duration which is for example between 30 and 120 min. The annealing temperature T2 and the duration of the treatment are chosen according to the state and the substrate before the current process, and the crystalline structure of the substrate envisaged. Typically, the annealing is carried out at a temperature T2 above 1500°C, for example between 1600°C and 1900°C.

[0097] The heat treatment of the second sequence is carried out in the same furnace as the formation of the carbon layer of the first sequence.

[0098] At the end of sequence S2, the substrate is cooled to preserve the crystalline properties obtained during annealing. At a time t3, the substrate reaches a third temperature T3 of 900°C.

[0099] In certain embodiments, with reference to [Fig.6A], a third sequence S3 is carried out directly during which the protective carbon layer is removed by oxidation, as described previously. During this step, oxygen can be injected into the furnace to create a reactive plasma.

[0100] During this step, the temperature T3 = 900°C is kept constant. The duration of the removal is typically between 10 and 120 s at a stripping rate of approximately 100 nm per minute. The total duration of the sequence S3 also includes stabilization of the furnace and is typically between five minutes and one hour. When, at time t4, the carbon layer is completely removed, the furnace is cooled in order to remove the substrate.

[0101] [Fig.6B] illustrates a temperature profile for an embodiment in which the step of removing the carbon layer is carried out outside the furnace. Sequences S1 and S2 are carried out as described above. At the end of sequence S2, the substrate is cooled to a temperature close to room temperature allowing the furnace to be opened and the substrate to be removed. The removal of the carbon layer is carried out during sequence S3' outside the furnace. In this case, a transfer step is carried out from the annealing furnace to a protective layer removal enclosure or to a polishing device at time t3. When the substrate treatment method comprises a transfer step, the different sequences can be carried out separately in time.Depending on the technique for ablation of the glassy carbon layer implemented, sequence S3 may include heating to a temperature below the terrace formation temperature or be carried out at room temperature.

[0102] Effect of the protective layer on the formation of terraces

[0103] Figures 7A and 7B are atomic force microscopy (AFM) images on a 30x30 pm2 surface of two respective substrates each having a single crystal silicon carbide surface.

[0104] [Fig.7A] is an AFM image of a substrate that has undergone heat treatment at 1500°C without application of a carbon layer. Terraces have formed on the surface of the substrate, visible as vertical lines on the AFM image. The root mean square (RMS) value of the surface roughness induced by the terraces is approximately 16 nm.

[0105] [Fig.7B] is an AFM image illustrating the surface roughness of a substrate of the same type, also heat-treated at 1500°C. The substrate of [Fig.7B] was protected by a glassy carbon layer formed at a temperature of 900°C and a pressure below 5 kPa (50 mbar) for 10 minutes before heat treatment. The carbon layer was formed in an atmosphere comprising argon as the carrier gas and propane as the carbon gas. The propane content in the mixture was less than 30%.

[0106] The image of the protected substrate does not show any parallel line structure indicating the presence of terraces. The root mean square value of the surface roughness is approximately 0.2 nm. The roughness of the substrate protected by the carbon layer is therefore considerably lower than the roughness of the substrate without a protective layer.

[0107] Effect of temperature during carbon layer formation

[0108] Figures 8A and 8B are AFM images on a 5x5 pm2 surface of two respective substrates having a monocrystalline silicon carbide surface. Each substrate has a protective carbon layer. The carbon layers were deposited at different temperatures. Each respective substrate was heat treated at 1500°C under identical conditions.

[0109] The substrate of [Fig.8A] is protected by a carbon layer deposited for 10 minutes at a temperature of 900°C, in accordance with a preferred embodiment of the invention. The curve below the AFM image shows the height profile of the enlarged portion of the image over a length 1 of 100 nm. In this area, the largest particles on the surface have a height h of about 1.5 nm.

[0110] The substrate of [Fig.8B] is protected by a carbon layer deposited for 10 minutes at a temperature of 1000°C, i.e. under conditions not covered by the invention. This image has a more granular structure than the image of [Fig.8A], indicating greater roughness of the surface. A height profile over a length 1 of 500 nm of this surface is shown below the AFM image. In this profile, larger grains can be seen, up to a height h of approximately 15 nm.

[0111] The carbon layer formed at 900°C therefore has a considerably lower roughness than the layer formed at 1000°C. Because the roughness increases with the temperature of the formation of the carbon layer, it is necessary to form the carbon layer at a temperature strictly lower than 1000°C. Presentation of the oven

[0112] In order to make a method for treating a plurality of substrates efficient and rapid, an annealing furnace is preferably used that can simultaneously treat a maximum number of substrates under identical conditions. Such a furnace is conventionally called a “batch anneal” furnace in the field of microelectronics.

[0113] [Fig.9] illustrates a furnace adapted to receive a quantity of between 120 and 150 substrates in an annealing chamber. The substrates 10 are positioned horizontally in the furnace and are superimposed vertically in order to treat a maximum number of substrates in the same flow 73 of hot gas. A free space is maintained between each substrate 10 and the adjacent substrates 10 to optimize the gas flow and facilitate the formation of the carbon layer. Typically, the vertical distance between two adjacent substrates is between 2 and 20 mm.

[0114] Such a furnace uses a “top flow” type configuration, that is to say that a gas flow is conveyed into the furnace from the top 71 and, after passing through the furnace, is discharged through an outlet 79 at the bottom of the furnace. Typically a carrier gas flow carries the carbonaceous gas (typically propane) for the formation of the carbonaceous layer. In some cases, other gases are added to the furnace, for example catalyst type gases to promote the decomposition of the carbonaceous gas.

[0115] All elements of the annealing chamber inside the furnace, i.e. the inner walls 75, the substrate holders for holding the substrates in a horizontal and vertically superimposed position, and the gas included in the annealing chamber are at the same temperature during use of the furnace, with the exception of the outer elements such as the outer wall 76 and the ends of the gas inlet pipes. By the same temperature, it is meant that the temperature difference between the top end 74 of the furnace and the bottom end 78 of the furnace is minimal, typically a few degrees Celsius, for example less than 3 degrees for a temperature in the furnace between 800 and 1200°C.

[0116] The substrates are heated mainly by conduction from the walls of the furnace. The gas flows are injected at the same temperature as the temperature inside the furnace.

[0117] An annealing furnace is not intended for the deposition of layers but for the application of a heat treatment of the substrates placed in the furnace. These furnaces are therefore optimized for a high temperature homogeneity of the substrates received therein, but not to allow an optimization of a material deposition, in particular to ensure a homogeneity of gas flow on the surface of the substrates. The superimposed positioning of the substrates is particularly detrimental to this homogeneity since the gases have more difficulty accessing the center of the substrates than the edges thereof. However, this type of furnace is nevertheless suitable for the deposition of carbon layers to protect the surface of a semiconductor material against the formation of terraces, in particular because the homogeneity of the thickness of the carbon layer is not a determining criterion as long as the entire surface to be protected is covered.The temporary use of the carbon layer does not require increased homogeneity of this layer. However, it is necessary to control the thickness so as to obtain a sufficient thickness over the entire surface area of ​​all the substrates contained in the furnace. The use of graphite elements inside the furnace is compatible with the deposition of the carbon layer because it is the same material and the thickness of the deposited layer is small compared to the dimensions of said elements.

[0118] Unlike an epitaxy chamber, such a furnace allows a large number of substrates to be treated simultaneously thanks to the vertically superimposed arrangement. In addition, such a furnace allows the carbon layer deposition and annealing steps to be carried out in the same chamber, which avoids a risk of contamination during a transfer between two different chambers. Transfer steps between a carbon layer deposition chamber and an annealing furnace are avoided, thus avoiding cooling between the respective steps, the need for labor for the transfer and thus a loss of time and efficiency. REFERENCES

[0119] R. Zhang et al. ”Growth of large Domains of Epitaxial Graphene on the C-face of SiC”, J. of App. Phys. 2012, 112 (10); doi:10.1063 / 1.4765666

[0120] J. Bao et al. “Sequential Control of Step-Bunching During Graphene Growth on SiC (0001)”, App. Phys. Lett. 2016, 109(8); doi:10.1063 / 1.4961630

Claims

Claims

1. A method of treating a substrate having a free surface of a semiconductor material, in particular a monocrystalline semiconductor material, comprising a method of stabilizing said surface against the formation of terraces and / or balls, said method comprising • the formation in the gas phase, on said surface, of a layer of vitreous carbon (30) at a temperature (Tl) greater than 700°C, preferably greater than 800°C, and strictly less than 1000°C, preferably less than 950°, and more preferably less than 900°C, and • a heat treatment of said substrate after stabilization of said surface, in which the layer of vitreous carbon (30) limits the reorganization of the surface into a semiconductor material in the form of terraces, the deposition of the carbon layer (30) and the heat treatment being carried out in the same furnace.

2. A treatment method according to any one of the preceding claims, wherein the formation of the glassy carbon layer (30) is carried out under a gas pressure of between 0.1 and 100 kPa (between 1 mbar and 1 bar).

3. A treatment method according to any preceding claim, wherein the formation of the carbon layer is carried out in a gas stream comprising a carbonaceous gas and a carrier gas, the carrier gas preferably being argon.

4. A treatment method according to claim 3, wherein the carbonaceous gas is propane.

5. A treatment method according to any one of claims 3 or 4 in combination with claim 2, wherein the formation of the glassy carbon layer (30) is carried out at a partial pressure of the carbon gas of between 0.1 and 1 kPa (between 1 mbar and 10 mbar).

6. A treatment method according to any preceding claim, wherein the semiconductor material is silicon carbide.

7. A treatment method according to any preceding claim, wherein the carbon layer (30) has a thickness less than or equal to 100 nm.

8. A treatment method according to any preceding claim, wherein the oven (70) comprises interior walls (75) and support members configured to hold at least one substrate (10), said interior walls (75), said supports and the gas inside the oven (70) having the same temperature.

9. A treatment method according to any one of the preceding claims, wherein the furnace (70) has at least one inner wall (75) made of carbon.

10. A processing method according to any preceding claim, wherein the furnace (70) contains a plurality of substrates comprising a surface of said semiconductor material, said substrates being vertically superimposed, a vertical space being provided between two adjacent substrates, a carbon layer (30) being formed on the surface of the semiconductor material of each of said substrates.

11. A treatment method according to any preceding claim, wherein at least part of the heat treatment is carried out at a temperature above 1500°C.

12. A treatment method according to any one of the preceding claims, further comprising, after the heat treatment, a step of removing the carbon layer (30) by chemical mechanical polishing (CMP) and / or by reactive ion etching and / or by plasma etching.

13. A method of manufacturing a semiconductor structure, comprising the following steps: • forming a weakening zone (21) by implanting ionic species in a donor substrate (220) made of a semiconductor material, in particular a monocrystalline semiconductor material, • bonding said donor substrate (220) to a support substrate (H), • detaching the donor substrate (220) along the weakening zone (21) so as to transfer a layer (20) of the semiconductor material onto the support substrate (11), • a treatment method according to one of claims 1 to 12, so as to heal the defects created in the layer of the semiconductor material (20) during the implantation of the species ionic, wherein the carbon layer (30) is formed on the free surface (200) of the layer (20) of the semiconductor material transferred onto the support substrate.

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