Method of connecting an electronic component to a conductive track coated with a bronze alloy and resulting electronic circuit.
By using a bronze alloy for conductive tracks on printed circuit boards, the method addresses the high cost and compatibility issues of precious metals, offering a robust and economical connection solution for smart cards and medical devices.
Patent Information
- Application Number
- FR2024005220
- Authority / Receiving Office
- FR · FR
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-05-22
- Publication Date
- 2025-11-28
AI Technical Summary
Existing methods for connecting electronic components to conductive tracks on printed circuit boards, particularly in smart cards, rely heavily on precious metals like gold, palladium, and nickel, which are expensive and unsuitable for certain applications due to magnetic properties or medical compatibility issues, limiting component choices and increasing costs.
A method involving electrolytic deposition of a bronze alloy comprising 25 to 70% copper, 25 to 60% tin, and 3 to 15% zinc on conductive tracks, followed by direct soldering or welding of electronic components, reducing the need for noble metals and enhancing mechanical and electrical properties.
The bronze alloy provides a cost-effective and robust connection suitable for various applications, including smart cards and medical devices, with improved mechanical strength, corrosion resistance, and low electrical resistance.
Smart Images

Figure 00000000_0000_ABST
Abstract
Description
Title of the invention: Method of connecting an electronic component to a conductive track coated with a bronze alloy and resulting electronic circuit. technical field
[0001] The invention relates to the field of printed circuit boards. For example, the invention relates to the field of printed circuit boards for connectors or antennas. For example, the invention relates to the field of printed circuit boards for smart card connectors or antennas. The invention also relates, for example, to the field of printed circuit boards for devices intended for medical applications (e.g., blood glucose detection) or for connecting objects via the internet (IoT or "Internet of Things"). State of the art
[0002] For example, printed circuit boards according to the invention may include conductive traces and / or electrical contact areas etched into a sheet of electrically conductive material previously deposited on a dielectric substrate, or circuits comprising one or more connection grids, each consisting of a sheet of electrically conductive material cut out and then co-laminated with a dielectric substrate. Such printed circuit boards are used, for example, for the production of contacts for electronic modules of smart cards, antennas for smart cards, mixed circuits comprising both contacts and an antenna, etc.
[0003] Taking smart cards as an example, these generally consist of a relatively rigid card body, for example made of plastic, which forms the bulk of the card, and into which is incorporated a separately manufactured electronic module. This electronic module includes a printed circuit board, which is generally flexible (that is, more flexible than the card body and particularly suitable for implementation in a reel-to-reel or roll-to-roll process). A chip (integrated circuit) is mounted on the printed circuit board. This chip is electrically connected to the printed circuit board. Furthermore, the module includes means for connecting the chip to a device for reading and / or writing data to the chip.These connection methods—or connectors—are, for example, formed by contacts consisting of conductive metallic tracks flush with the surface of the electronic module. In addition to the need for excellent mechanical strength, excellent corrosion resistance of the contacts, a good and robust electrical connection between the chip and the contacts, as well as good electrical conductivity between the contacts and... In smart card reading / writing devices, manufacturers often want to match the contact color to the card's color(s). To meet these requirements, contacts are typically coated with either a layer of gold, when a gold finish is desired, or a layer of silver or palladium, when a silver finish is desired. However, this type of coating has some drawbacks. For example, palladium is a relatively expensive metal; gold, also expensive, must be deposited on a nickel layer, which, on the one hand, has magnetic properties that are disadvantageous for radio frequency applications and / or applications requiring the absence of magnetic properties, and on the other hand, is problematic in the medical field if it needs to be placed in contact with or near the skin, etc.
[0004] Thus, it has been proposed to make smart card contacts by engraving patterns in a copper layer resting on a dielectric substrate, then by electrochemically depositing a bronze layer on these patterns (see for example, the patent application published under number FR3118067A1, or that published under number DE102006060801Al which recommends the use of a CuSnZn bronze with a tin content of 18% to obtain a gold appearance and which teaches that a gold layer - of 0.3 micrometers - is necessary to make a wire connection with gold wires).
[0005] Connection methods have been developed to connect an electronic component to tracks or contacts having surface layers containing gold or palladium. For example, these connection methods employ conductive wires (wire bonding) connecting a component to tracks or contacts. Alternatively, the component is a surface-mount device (SMD). However, surface mounting considerably limits the list of compatible components. Conversely, wire bonding technology allows for a wider choice of compatible components. Regardless of the connection technology, whether wire bonding or using a surface-mount component, the connection of the component to the tracks or contacts must be relatively robust and have low resistance.
[0006] An object of the invention is to produce electronic circuits in which precious metals, such as palladium and / or nickel and / or gold, are not or only minimally used, while nevertheless retaining electrical and mechanical properties of the connections between electronic components, such as smart card chips, and the conductive tracks and / or electrical contacts forming these electronic circuits, which are suitable, in particular, for example, for their use in modules contact for smart card (this application requires in particular to meet the specifications known as CQM (“Card Quality Management”).
[0007] To this end, a method for connecting an electronic component to at least one conductive track at least partially coated with a bronze alloy is shown below. This method includes, in particular: - a step of supplying a dielectric substrate having a first and a second principal face, with at least one sheet comprising an electrically conductive material, this sheet resting on one of these first and second principal faces, - at least one electrolytic deposition step of at least one layer of bronze on at least one area of this foil (i.e., the foil comprising the electrically conductive material), this area being configured to form said conductive track, and this bronze layer comprising, after deposition, 25 to 70% by weight of copper, 25 to 60% by weight of tin and 3 to 15% by weight of zinc, and - an electrical connection step of said component to said conductive track on which the bronze layer has been deposited, this step implementing a soldering step directly onto this bronze layer.
[0008] In this document, the adverb "directly" when specifying how the weld is made on the bronze layer should be understood as meaning "without an intermediate layer between the bronze layer and the welded material", this welded material being able, according to the envisaged embodiment of the process according to the invention, to be either a connecting wire or a welding material used to connect a surface mount component.
[0009] This process (as well as all the operations or steps described in this document) can advantageously be implemented from roll to roll (“reel-to-reel” in English).
[0010] The bronze layer advantageously replaces the layer(s) of noble metals or nickel used in prior art processes. The bronze layer is more economical than a palladium or gold layer. The absence of nickel is preferable for radio frequency applications and for certain medical applications.
[0011] The process mentioned above advantageously comprises one or more of the following features, considered independently of each other or in combination with one or more others:
[0012] - the welding step is carried out by thermosonic wedge welding bonding” in English) of a conductive wire on said bronze layer, this conductive wire being configured to electrically connect said at least one conductive track to said electronic component, and this wire comprising at least one of the metals from the list consisting of gold, copper, palladium and aluminium (and therefore possibly also alloys of these);
[0013] - the foil comprising a conductive material is a copper foil and the thickness of said at least one layer of bronze is between 0.2 micrometers and 5 micrometers;
[0014] - the copper foil has a surface on which said at least one bronze layer, this surface of the copper sheet having a roughness Rz less than or equal to 1 micrometer, for example between 0.5 and 0.6 micrometer;
[0015] - alternatively, the copper foil has a surface on which said is deposited less a layer of bronze, this surface of the copper foil having a roughness Rz greater than 1 micrometer and the thickness of said at least one layer of bronze is between 0.35 micrometers and 5 micrometers;
[0016] According to another aspect, an electronic circuit is described below. It comprises: - at least one dielectric substrate itself comprising a first and a second principal face, - at least one first sheet comprising an electrically conductive material which rests on one of the first and second principal faces of the substrate, at least one conductive track being formed in the first sheet, and at least one electronic component. In this electronic circuit, at least one area of said at least one trace comprises a bronze layer consisting of 25 to 70% by weight of copper, 25 to 60% by weight of tin, and 3 to 15% by weight of zinc. Furthermore, the electronic component is electrically connected to the bronze layer by means of at least one solder joint made directly onto the bronze layer.
[0017] This electronic circuit may also include one or more of the following features, considered independently of each other or in combination with one or more others:
[0018] - the electronic component is electrically connected to the bronze layer at with the aid of a conductive wire welded by thermosonic welding in a wedge on the bronze layer, this wire comprising at least one of the metals included in the list consisting of gold, copper, palladium and aluminium (and therefore possibly also alloys of these);
[0019] - said at least one sheet comprising a conductive material is a sheet of copper and the thickness of said at least one layer of bronze is between 0.2 micrometers and 5 micrometers;
[0020] - only a first layer comprising an electrically conductive material rests on the first principal face of the substrate (it is therefore a single-faced structure); in this case, said at least one area of said at least one track that includes a bronze layer is located at least at the bottom of a connecting well; optionally, a bronze layer is also located on the face of the first sheet (or front face) opposite to that corresponding to that forming the bottom of a connection well;
[0021] - a first sheet comprising an electrically conductive material rests on the first main face of the substrate and a second sheet comprising an electrically conductive material rests on the second main face of the substrate (it is therefore a double-sided structure); in this case, said at least one area of said at least one track which includes a layer of bronze may be located at least at the bottom of a connection well (therefore on the first sheet), or possibly on the second sheet, or both at least at the bottom of a connection well and on the second sheet, or both at least at the bottom of a connection well, on the face of the first sheet (or front face) opposite to that corresponding to that forming the bottom of a connection well and on the second sheet.
[0022] Other features and advantages of the invention will become apparent upon reading the detailed description and accompanying drawings, in which:
[0023] - [Fig. 1] schematically represents in perspective a smart card comprising a example of a module according to the invention;
[0024] - [Fig.2] schematically represents, viewed from above, a portion of an example of electronic circuit according to the invention, comprising several connectors for smart card module;
[0025] - [Fig.3] represents in cross-section, partially and schematically, a basic example single-sided electronic circuit for a smart card module connector such as that shown in [Fig.1];
[0026] - [Fig.4] represents in cross-section, partially and schematically, a basic example double-sided electronic circuit for a smart card module connector such as that shown in [Fig.1];
[0027] - [Fig.5] represents in cross-section, partially and schematically, an example of double-sided electronic circuit base such as that of [Fig.4], on which several layers are electrodeposited; as well as its single-sided variant, if we disregard the sheets and layers located under the dotted lines;
[0028] - [Fig.6] shows in cross-section, partially and schematically, another example of double-sided electronic circuit, comprising several electrodeposited layers; as well as its single-sided variant, if we disregard the sheets and layers located under the dotted lines; and
[0029] - [Fig.7] shows in cross-section, partially and schematically, an example of single-sided electronic circuit comprising a component connected according to a method according to the invention.
[0030] In this document, an example of an electronic circuit according to the invention is taken from the field of smart cards, but a person skilled in the art will know, without having to do so proof of inventive activity, transpose this example to other applications of electronic circuits and / or printed circuits (contacts for USB socket, antennas, devices for medical applications such as pressure sensors in contact with the skin, strips for detecting glucose or other compounds in the blood, electrodes for performing encephalograms, etc.).
[0031] An example of the application of an electronic circuit according to the invention is illustrated in [Fig. 1]. In this example, a smart card 1 comprises a module 2 with a connector 3. In this example, the smart card 1 is a bank card in ID-1 format. The module 2 is, for example, a bank-type module (also called an "EMV" module for Europay MasterCard Visa) conforming to ISO 7810 (for example, ISO 7810 published in 2019). The module 2 is generally made as a separate component that is inserted into a cavity in the card. This component comprises a dielectric substrate 4 (see [Fig. 2]), the thickness of which is, for example, between 25 and 150 micrometers. This dielectric substrate 4 is, for example, made of PET, polyimide, glass-epoxy, etc. (it is therefore generally flexible).Connector 3 is made on the dielectric substrate 4, to which a chip 50 is subsequently connected, by the face of the dielectric substrate 4 opposite to that containing connector 3.
[0032] Fig. 2 thus illustrates an example of an electronic circuit portion 5, with six connectors 3. Each connector 3 includes a contact area 8 formed of conductive areas 6. In the example illustrated here, eight of the conductive areas 6 are intended to form electrical contacts 7 (identified from Cl to C8 as defined by ISO 7816-2, (for example ISO 7816-2 published in 2007).
[0033] The connector 3 can be formed from a single-sided structure (with a sheet of conductive material on only one of the main faces of a dielectric substrate 4) or from a double-sided structure (with a sheet of conductive material on each of the two main faces of a dielectric substrate 4).
[0034] An example of a single-sided structural base is illustrated in [Fig. 3]. This single-sided structural base is, for example, produced according to the following process: a dielectric substrate 4 is provided, which is coated on one of its main faces with a layer of adhesive 9. Then, the dielectric substrate 4 with the adhesive layer 9 is perforated to create connection wells 14 and optionally a cavity 15 in which a chip 50 will later be housed. Alternatively, the chip 50 will be fixed to the dielectric substrate (see [Fig. 7]). The dielectric substrate 4 with the adhesive layer 9 is then complexed (laminated) with a first sheet 10 comprising a conductive material such as a sheet of copper, aluminum, or one of their alloys, or steel, etc., before optionally undergoing hot curing of the adhesive layer 9. Alternatively, it is possible to directly use a laminated (“clad” in English), but in this case, the connection wells 14 and / or the cavity 15 are formed for example using a laser configured to only perforate the dielectric substrate 4. In all cases, the bottom of the connection wells 14 and / or the cavity 15 is thus made up of an electrically conductive surface, on which layers of conductive material may be electrodeposited, possibly for the purpose of an electrical connection, for example using a connection technology with conductive wires 40.
[0035] A basic example of a double-sided structure is illustrated in [Fig. 4]. This double-sided structure is, for example, produced according to the following process: a dielectric substrate 4 is provided, already supporting, on one of its main faces (which will correspond to the rear face), a second sheet 11 comprising a conductive material such as a sheet of copper, aluminum, or one of their alloys, or steel, etc.; this is then a laminate, for example; the other of its main faces (which will correspond to the front face) is coated with a layer of adhesive 9; then, this laminate with the adhesive layer 9 is optionally perforated to create connection wells 14 and possibly a cavity 15. The laminate with the adhesive layer 9 is then complexed (laminated) with a first sheet 10 of conductive material.For example, the first layer 10 of conductive material is made of the same conductive material as the second layer 11 of conductive material, even if the respective thicknesses of the first 10 and second 11 layers may be different. It should be noted, however, that the first 10 and second 11 layers may be made of different electrically conductive materials. The bottom of the connection wells 14 and / or the cavity 15 thus consists of an electrically conductive surface, onto which layers of conductive material may be electrodeposited for electrical connection, for example, using a conductor wire connection technology 40.Alternatively, it is possible to use directly a double-sided laminate (“double-sided clad”), but in this case, the connection wells 14 and / or the cavity 15 are formed, for example, using a laser configured to perforate only the second sheet 11 of electrically conductive material and the dielectric substrate 4. Alternatively, a double-sided through-hole structure (not shown) can also be used, the walls of which can be made conductive to electrically connect the first 10 and second sheet 11.
[0036] For example, as shown in cross-section in Figures 5 to 7, a connector 3 (i.e. essentially a module 2 without a chip) has a multilayer structure formed of the dielectric substrate 4, an adhesive layer 9 (optional and not shown in Figures 5 to 7), and a first 10, and possibly a second 11, sheet made of an electrically conductive material. By For example, this electrically conductive material is made of copper or a copper alloy. In [Fig. 5], a dashed line indicates the boundary between a single-sided structure (with only the layers shown above the dashed line) and a double-sided structure (with all the layers above and below the dashed line).
[0037] The multilayer structure illustrated by the example in [Fig.5] is made, for example, from the base of the double-sided structure of [Fig.4]. According to this example, at least one layer of bronze 12A is deposited electrochemically on at least certain areas of the so-called front side (“front side” or “contact side” in English), that is to say on the face of the first sheet 10 (in which the contact areas 8 are made) intended to be connected to a smart card reader.
[0038] As will be described later, this structure is designed to receive a chip 50 on one side, referred to as the rear side (or "bonding side"). The chip 50 is connected to the rear of the contact pads 8, i.e., to the bottom of the connection wells 14 (see [Fig. 7]). A layer of bronze 12B is also electrochemically deposited on at least some areas of the surface at the rear of the contact pads 8, at the bottom of the connection wells 14. Alternatively, in the case of a double-sided structure with through holes (not shown), the chip 50 is connected to conductive tracks formed in a second sheet 11.
[0039] A layer of bronze 12C is deposited electrochemically on at least some areas of the second sheet 11. For example, some of these areas can be used to connect the ends of an antenna or the chip 50 itself if the connection wells 14 are made conductive and these areas of the second sheet 11 are connected to the connection wells (or at least one of them).
[0040] The bronze layer 12A on the surface of the contact areas 8 can be deposited at the same time as the bronze layer 12B at the bottom of the connection wells 14 and at the same time as the bronze layer 12C deposited on at least some areas of the second sheet 11. In this case, these three bronze layers 12A, 12B and 12C do not necessarily have exactly the same composition (this depends on the shapes of the areas covered by the bronze layers 12A, 12B and 12C and / or the local current density). Alternatively, selective deposition (using masking for example) can allow to have layers 12A, 12B and / or 12C of different compositions (for example for better adaptation to the required properties: solderability at the bottom of the connection wells 14 or on areas of the second sheet 11, mechanical strength and low contact resistance on the face intended to establish a connection with a card reader).
[0041] The bronze layer 12A, 12b or 12C can be used, for example, either to replace, at least on one side, noble or precious metals (gold, silver, palladium) in a multilayer structure such as that used for the production of smart card modules, or to replace, at least on one side, nickel in a multilayer structure such as that used in devices for medical or radio frequency applications, for example.
[0042] The bronze layers 12A, 12B, 12C comprise after deposition - 25 to 70%, advantageously 45 to 62% or even 35 to 70% by weight of copper, - 20 to 60%, and preferably 25 to 55%, by weight of tin and - 2 to 18%, advantageously 4 to 12%, by weight of zinc.
[0043] The bronze layer 12A, and / or 12B and / or 12C is deposited for example from a Miralloy® bath marketed by the company Umicore®, at a temperature close to or equal to 60°C, with a current density of 4A / dm2.
[0044] The table below summarizes examples of characteristic thicknesses of each of the layers of the structure illustrated by [Fig.5]. Front face Back face Adhesive 9: 10 to 25 µm Copper foil 10: 12 to 70 micrometers Copper foil 11: 12 to 70 micrometers Bronze layer 12A: 100 nanometers to 3 micrometers Bronze layer 12B: 50 nanometers to 5 micrometers Bronze layer 12C: 50 nanometers to 5 micrometers
[0045] As shown in [Fig. 6], other materials can be electrochemically deposited between the electrically conductive material and the bronze layer 12A or 12B. For example, at the electrical contacts 7, the front face successively receives a nickel layer 16, a nickel-phosphorus layer 17, a thin layer 18 in the form of a gold "flash" or primer, and a bronze layer 12, the composition of which is mentioned above. The bronze layer 12A on the electrical contacts 7 may optionally be at least partially covered by a protective layer 20. Although not shown in [Fig. 6], one or more of the layers 16, 17, 18 mentioned above may optionally be deposited at the bottom of the connection wells 14, before the bronze layer 12B.
[0046] Similarly, according to an alternative not shown, a layer of 12C bronze can be deposited on at least certain areas of the second sheet 11 (with or without a or several of the intermediate layers 16, 17, 18 mentioned above and may optionally receive a protective layer 20).
[0047] The bronze layer 12C deposited on at least certain areas of the second sheet 11 can therefore optionally be at least partially replaced by one or more other layers. For example, at least certain areas of the second sheet 11 can receive a layer of nickel 16, a layer of nickel-phosphorus 17, a thin layer 18 in the form of a "flash" or primer of one of the metals chosen from gold, silver and palladium, and finally a surface layer 19 comprising at least one of the metals chosen from gold, silver, palladium, rhodium and ruthenium.
[0048] The table below summarizes examples of respective thicknesses for each of the layers of the structure illustrated by [Fig.6]. Front face Back face Adhesive 9: 10 to 25 µm Copper foil 10: 12 to 70 micrometers Copper foil 11: 12 to 70 micrometers Nickel layer 16: 0.5 to 6 micrometers Nickel layer 16: 1 to 15 micrometers Nickel-Phosphorus layer 17: 0.05 to 0.6 micrometers Nickel-Phosphorus layer 17: 0.05-0.6 micrometers Thin layer 18: Gold or Silver or Palladium: 0 to 15 nanometers Thin layer 18: Gold or Silver or Palladium: 0 to 15 nanometers Bronze layer 12: 100 nanometers to 3 micrometers Surface layer 19 containing at least one of the following elements: Au, Ag, Pd, Rh or Ru: 10 nanometers to 1 micrometers (up to 3 micrometers for Ag) Protective layer 20 (optional)
[0049] According to a variant (single-sided structure) of the embodiment illustrated in [Fig. 6], the rear face of the dielectric substrate 4 is left bare (without the second layer 11 comprising an electrically conductive material and any layers (12C and 16 to 19) electrodeposited on it); on the other hand, at the bottom of the connection wells 14, we find a layer of bronze 12B.
[0050] According to unrepresented variants, one or more layers of electrically conductive materials are deposited electrochemically on at least certain areas of the bronze layer(s) 12A, 12C. For example, the front and rear faces receive a layer of bronze 12A, 12C, then one or more other layers such as one or more of the intermediate layers 16, 17, 18 mentioned above.
[0051] Optionally, the rear face receives, on the bronze layer 12B (therefore at the bottom of the connection wells 14), at least one layer comprising at least one metal from the following list: gold, silver, palladium, rhodium, ruthenium.
[0052] Many other variants can be envisaged, in particular by playing on the number, nature and respective thicknesses of the layers deposited above and / or below the bronze layers 12A and 12C, or even by replacing the latter.
[0053] In the embodiments presented above with their variants, when a protection treatment 20 is carried out, this may correspond, in a non-exhaustive manner, to the passage through;
[0054] - a bath of organic weldability preservative, such as benzotriazole or a imidazole (e.g. alkyl benzimidazole, aryl benzimidazole, etc.);
[0055] - a bath adapted to form a self-organizing monolayer, such as a mixture of polyethylene glycol ether and propylene glycol, or a mixture of octylphenoxyethanol and octadecane-l-thiol, or of sorbitan polyoxyethylene monooleate (Polysorbate 80, CAS number 9005-65-6), or a mixture of propoxylated ethoxylated (C12-18) alcohols (CAS number 69227-21-0) with poly(oxyethylene) lauryl ether (CAS number 9002-92-0) and 1-octadecanethiol (CAS 2885-00-9)
[0056] For example, a smart card module comprising a stack consisting of a dielectric substrate 4 covered with a copper foil 10 on which are electrodeposited a layer of nickel 16, a layer of nickel phosphorus 17, a gold flash 18 and a 0.5 micrometer bronze layer 12A comprising 45 to 50% by weight of copper, 40 to 45% by weight of tin and 6 to 11% by weight of zinc (structure of [Fig.5]), exhibits a contact resistance (CRM) of less than 500m0hm before and after being subjected to a 24h salt spray test, in accordance with ISO 10373.
[0057] As illustrated in [Fig. 7], after the various layers have been produced according to the variants mentioned above, at least one chip 50 is mounted on the back side using a method known to those skilled in the art (micro-assembly, eutectic bonding, Ultrasonic bonding, flip-chip bonding, thermosonic bonding, thermocompression bonding, flux dipping, simple bonding, chip stacking). Then, at least some of the connection pads 51 of the chip 50 are connected using conductive wires 40 to connection areas located at the bottom of the connection wells 14. The conductive wires 40 can be, for example, gold, copper, aluminum, silver, palladium wires, or an alloy of at least two of these metals (for example, a copper-palladium alloy). The connection of these conductive wires 40 to the connection pads 51 of the chip 50 can be achieved by wedge bonding or bail bonding. The connection of these conductive wires 40 on the connection areas located at the bottom of the connection wells 14 can be done for example by a wedge welding technology.For example, wedge-wedge technology (with wedge welding on both the chip side 50 and the connection well side 14) is used. In wedge welding, a piece of wire is held pinched under a connecting tool (called a wedge) on a connecting pad. Ultrasonic pressure and energy are applied for a specific period to form a connection. The shape and dimensions of this connection are determined by the geometry of the wedge. The footprint of a connection resulting from wedge welding is relatively small compared, for example, to ball welding. Furthermore, this wedge welding technology requires a lower temperature.
[0058] For example, thermosonic soldering is performed using a wedge tool. The tool is loaded with wire, and then ultrasonic pressure (force) and energy are applied to the wire and the pad on the chip to which the wire is soldered. The wire is thus soldered to the chip, and the tool can be withdrawn to form a strand up to the connection pad of the electronic circuit (for example, at the bottom of the connection wells 14). Ultrasonic pressure (force) and energy are again applied to the wire and the connection pad, which has a bronze coating. The wire is thus soldered to the connection pad, which has a bronze coating. The tool can then be withdrawn, and the wire cut.
[0059] To perform this type of weld on a connection pad having a bronze layer, parameters within the following ranges are used, for example (The respective value of these parameters depends in particular on the roughness of the bronze layer): - Ultrasonic energy (mA): between 30 and 300 mA - "Force": between 1 and 50g, - Time: between 1 and 200 ms, - Temperature: between 0° and 250°C.
[0060]
[0061]
[0062]
[0063] The pull-out strength of this type of solder joint meets the requirements for chip connection. To measure the pull-out strength, a loop is created between two solder points with the following parameters: First welding point: - Ultrasonic energy (mA): between 170 and 260 mA - Force: between 1 and 15g, - Time: 22ms, - Temperature: 150°C. Second welding point: - Ultrasonic energy (mA): between 190 and 270 mA - Force: between 6 and 19g, - Time: 30ms, - Temperature: 150°C. A tensile force is then applied to the loop. The following results are obtained in pull-out tests on the bronze layer (the results of the different tests are given in equivalent grams of force): Wire Material Wire Diameter Configuration Roughness of Copper Underlying Bronze Layer Tensile Test #1 Tensile Test #2 Tensile Test #3 Tensile Test 0% Tensile Test #5 Average Gold 25µm Both solder points on a 12B bronze layer in a 14 connection well Less than or equal to 0.25 µm 2.96 3.78 2.87 3.82 4.65 3.62 Gold 25µm Both solder points on a 12C bronze layer Less than or equal to 0.25 µm 4.13 4.76 3.23 5.28 3.76 4.23 Palladium Copper 20µm Both solder points on a 12B bronze layer in a 14 connection well Less than or equal to 0.25 µm 2.03 2.73 1.98 2.57 1.87 2.24 Copper palladium 20 µm The two solder points on a layer of 12C bronze less than or equal to 0.25 µm 3.05 2.87 2.92 3.56 3.86 3.25
[0064] The chip 50 and its connecting wires are then encapsulated according to one of the methods known to the person skilled in the art, and then the module is individualized before being integrated into a card.
[0065] Alternatively, the chip 50 can be connected to the bronze layer 12B or 12C, directly using a surface mount technology (SMT).
Claims
Demands
1. A method for connecting an electronic component (50) to at least one conductive track at least partially coated with a bronze alloy, said method comprising: - a step of supplying a dielectric substrate (4) having a first and a second principal face, with at least one foil (10) comprising an electrically conductive material resting on one of these first and second principal faces, - at least one step of electrolytically depositing at least one layer of bronze (12B) on at least one area of the foil (10) comprising said electrically conductive material, said at least one area of this foil (10) being configured to form said conductive track, said at least one layer of bronze (12B) comprising, after deposition, 25 to 70% by weight of copper, 25 to 60% by weight of tin and 3 to 15% by weight of zinc,- an electrical connection step of the component (50) to said conductive track on which said bronze layer (12B) has been deposited, this step implementing a soldering step directly onto this bronze layer (12B).
2. A method according to claim 1, wherein the welding step is carried out by thermosonic wedge welding of a conductive wire (40) onto said bronze layer (12B), said conductive wire (40) being configured to electrically connect said at least one conductive track to the electronic component (50), and said conductive wire (40) comprising at least one of the metals from the list consisting of gold, copper, palladium and aluminum.
3. A method according to claim 1 or 2, wherein the foil (10) comprising said conductive material is a copper foil and the thickness of said at least one bronze layer (12B) is between 0.2 micrometers and 5 micrometers.
4. Method according to claim 3, wherein the copper foil has a surface on which is deposited said at least one layer of bronze (12B), this surface of the copper foil having a roughness Rz less than or equal to 1 micrometer.
5. Method according to claim 3 or 4, wherein the copper foil has a surface on which is deposited said at least one layer of bronze 12B), this surface of the copper foil having a roughness Rz between 0.5 and 0.6 micrometers.
6. A method according to claim 3, wherein the copper foil has a surface on which said at least one layer of bronze (12B) is deposited, this surface of the copper foil having a roughness Rz greater than 1 micrometer and the thickness of said at least one layer of bronze (12B) is between 0.35 micrometers and 5 micrometers.
7. Electronic circuit comprising - at least one dielectric substrate (4) itself comprising a first and a second principal face, - at least one first sheet (10) comprising an electrically conductive material resting on one of the first and second principal faces of the substrate, at least one conductive track being formed in the first sheet, at least one area of said at least one track, comprising a bronze layer (12B) comprising 25 to 70% by weight of copper, 25 to 60% by weight of tin and 3 to 15% by weight of zinc, - at least one electronic component (50) electrically connected to the bronze layer by means of at least one solder joint made on the bronze layer (12B).
8. Electronic circuit according to claim 7, wherein the electronic component (50) is electrically connected to the bronze layer (12B) by means of a conductive wire (40) welded by thermosonic wedge welding on the bronze layer (12B), this wire comprising at least one of the metals included in the list consisting of gold, copper, palladium, and aluminum.
9. Electronic circuit according to claim 7 or 8, wherein said at least one foil (10) comprising said conductive material is a copper foil and the thickness of said at least one bronze layer (12B) is between 0.2 micrometers and 5 micrometers.
10. Electronic circuit according to any one of claims 7 to 9, wherein only a first sheet (10) comprising an electrically conductive material rests on the first principal face of the dielectric substrate (4).
11. Electronic circuit according to any one of claims 7 to 9, wherein a first sheet (10) comprising an electrically conductive material rests on the first main face of the dielectric substrate (4) and a second sheet (11) comprising an electrically conductive material rests on the second main face of the dielectric substrate (4), this second sheet (11) being at least partially also coated with a layer of bronze (12C).
Citation Information
Patent Citations
Chip card module manufacturing involves providing paper carrier with two sides, where structured starter layer with conductive particles is applied on one side of carrier
DE102006060801A1
Electrolyte composition and method for the deposition of quaternary copper alloys
EP1930478B1
Method for depositing a bronze alloy onto a printed circuit board and printed circuit board obtained by this method
FR3118067A1
Printed circuit board with a gold-substituting alloy layer and method for manufacturing such a printed circuit board
FR3141834A1
Transaction cards and associated methods
US20150178616A1