Direct chip bonding process
The described chip bonding process addresses the challenges of thin chip bonding by using a temporary substrate and protective layers to maintain surface cleanliness, achieving defect-free bonding for thin chips with improved surface quality.
Patent Information
- Application Number
- FR2024006560
- Authority / Receiving Office
- FR · FR
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-06-19
- Publication Date
- 2025-12-26
AI Technical Summary
Existing direct chip bonding processes face challenges with thin chips (less than 200 µm thick) due to increased roughness and difficulty in maintaining surface cleanliness, leading to bonding defects, especially when handling hybrid surfaces with materials like copper and silicon oxide.
A chip bonding process involving direct bonding with a temporary substrate, thinning the donor substrate, and using protective layers to maintain surface cleanliness, followed by separation and cutting to isolate chips, ensuring minimal contamination and defect-free bonding.
The process achieves defect-free bonding of thin chips (less than 300 µm) by protecting the front surface during thinning and cutting, resulting in high-quality bonds suitable for various substrate materials.
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Abstract
Description
Title of the invention: Method for direct bonding of chips technical field
[0001] This description relates generally to the field of microelectronics, and more particularly to electronic chip bonding processes. Previous technique
[0002] In microelectronics, direct bonding allows the assembly of components that have been individually prepared on different substrates. For example, it is possible to fabricate chips on a donor substrate and then bond them to a receiving substrate.
[0003] Direct bonding is a spontaneous bonding process that does not use a liquid adhesive. It is generally performed at room temperature, although it is possible to bond hot surfaces. It is generally performed at ambient pressure, but it is also possible to perform it under vacuum. Because it is a spontaneous bond, there is no need to exert force on the two surfaces to be bonded. However, slight local pressure can be used to initiate the bond from a specific point. The bond then propagates spontaneously along the surfaces with a bond wave.
[0004] Typically, a direct chip bonding process comprises the following steps ([Fig.1] views A) to D)): - to stick a donor substrate 10, in which chips 15 are formed, onto a manipulation device 20 comprising a rigid frame 21 and an adhesive tape 22, the rear face 12 of the substrate 10 being stuck to the adhesive tape 22, the front face 11 of the donor substrate 10 being accessible ([Fig.1] view A)), - cut the donor substrate 10 between the chips 15 to isolate them ([Fig.l] view B)), - clean the front face 11 of the chips 15 ([Fig.l] view C)), - to bond the front face 11 of the chips 15 to a receiving substrate 30 ([Fig. 1] view D)).
[0005] The step of cleaning the front face of the chips is essential since direct bonding is very demanding with regard to the cleanliness of the surface to be bonded. This surface must have the lowest possible organic and particulate contamination. It is, for example, possible to clean it by a combination of plasmas and aqueous solutions, which may or may not be combined with sound waves. The chips can then be released after exposing the adhesive tape to UV light. Such a process is, for example, described in the work of Sanchez et al. ("Chip to wafer direct bonding technologies for high density 3D integration", 2012, IEEE 62nd Electronic Components and Technology Conference, 1960-1964 and “Collective Die Direct Bonding for Photonic on Silicon”, 2018, ECS Trans., 86, 5, 223).
[0006] Silicon substrates from which chips are formed generally have thicknesses between 500 and 700 µm. However, for certain applications, it is necessary to bond very thin chips (typically less than 200 µm thick). Therefore, it is necessary to thin the substrate. Thinning the donor substrate can be achieved by abrasion (or lapping) using diamond wheels. While this technique allows for very homogeneous thicknesses, it increases the roughness of the substrate's front face. For a silicon substrate, the RMS roughness of the front face can exceed 100 nm, which is incompatible with direct bonding, for which the roughness must be less than 0.5 nm. It is also not easy to flatten the front face because the configuration of a board bonded to adhesive tape is not compatible with chemical polishing.
[0007] Moreover, for such thicknesses, the thin plate is no longer sufficiently rigid to be handled without care.
[0008] One solution would be to use a transfer step to thin the back face of the donor substrate according to the following steps ([Fig.2] views A) to G)): - to stick a donor substrate 10, in which chips 15 are formed, onto a first manipulation device 20 comprising a rigid frame 21 and an adhesive tape 22, the front face 11 of the donor substrate 10 being stuck to the adhesive tape and the rear face 12 of the donor substrate 10 being accessible ([Fig.2] view A)), - thin the rear face 12 of the donor substrate 10 ([Fig.2] view B)), - glue the donor substrate 10 onto a second handling device 23 comprising a rigid frame 24 and an adhesive tape 25, the rear face 12 of the donor substrate 10 being glued to the adhesive tape 25 ([Fig.2] view C)), - separate the donor substrate 10 from the first manipulation device 20, for example by exposing the adhesive tape 22 ([Fig.2] view D)), - cut the donor substrate 10 to isolate the chips 15 ([Fig.2] view E)), - clean the front face 11 of the chips 15 ([Fig.2] view F)), - stick the front face 11 of the chips onto a receiving substrate 30 ([Fig.2] view G)).
[0009] However, the front face 11 of the chips 15 came into contact with the adhesive from the tape 22 of the first handling device, making it very difficult to clean. The poor surface quality leads to numerous bonding defects. Such a process is even more problematic for hybrid direct bonding with a surface comprising copper and silicon oxide, since the copper is exposed from the beginning of the process. Summary of the invention
[0010] There is a need for a chip bonding process, the bonding having few or no defects, the process having to be able to be implemented for thin chips (typically for thicknesses less than 300 pm, or even less than 100 pm or 50 pm).
[0011] This goal is achieved by a process of bonding chips to a receiving substrate comprising the following steps: a) provide a donor substrate in which chips are formed, the donor substrate comprising a first front surface and a second rear surface, b) assemble the first surface of the donor substrate onto a temporary substrate by direct bonding, c) preferably, thin the donor substrate from the second surface, d) to adhere the assembly consisting of the donor substrate and the temporary substrate to a handling device comprising a rigid support and an adhesive film, the second surface of the donor substrate being adhered to the adhesive film, e) separate the temporary substrate from the donor substrate, f) cut the donor substrate in such a way as to isolate the chips, g) glue the chips onto the receiving substrate by direct gluing.
[0012] According to a particular embodiment, step f) is carried out between step b) and step d).
[0013] According to a particular embodiment, during step b), the first surface of the donor substrate is covered by a protective layer.
[0014] According to a particular embodiment, the protective layer is a layer of amorphous carbon, a layer of silicon or a layer of polymer, for example a layer of acrylate or one of its derivatives.
[0015] According to a particular embodiment, the first surface of the donor substrate is a surface comprising silicon oxide and copper.
[0016] According to a particular embodiment, the first surface of the donor substrate is a surface made of silicon, germanium, a III / V material, such as GaAs, InP or a II / VI material, such as CdHgTe.
[0017] According to a particular embodiment, a step of trimming the donor substrate is carried out before step b) or after step b).
[0018] According to a particular embodiment, the chips have a surface area between 0.5 x 0.5 mm2 and 20 x 20 mm2.
[0019] According to a particular embodiment, the chips have a thickness of less than 300pm, preferably less than 100pm, even more preferably less than 50pm.
[0020] According to a particular embodiment, step f) is carried out by plasma etching. Brief description of the drawings
[0021] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:
[0022] The [Fig.1] views A), B), C), D), previously described, schematically represents different stages of a chip bonding process according to the prior art;
[0023] the [Fig.2] views A), B), C), D), E), F), G), previously described, schematically represents different stages of another chip bonding process according to the prior art;
[0024] [Fig.3A], [Fig.3B], [Fig.3C], [Fig.3D], [Fig.3E], [Fig.3F], [Fig.3G] and [Fig.3H] schematically represent different stages of a chip bonding process according to a particular embodiment of the invention;
[0025] [Fig.4A], [Fig.4B], [Fig.4C], [Fig.4D], [Fig.4E], [Fig.4F], [Fig.4G] and [Fig.4H] schematically represent different stages of a chip bonding process according to another particular embodiment of the invention;
[0026] Fig. 5A, Fig. 5B, Fig. 5C, Fig. 5D, Fig. 5E, Fig. 5F, Fig. 5G and Fig. 5H schematically represent different stages of a chip bonding process according to another particular embodiment of the invention. Description of the implementation methods
[0027] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.
[0028] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.
[0029] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements coupled together, this means that these two elements can be connected or linked through one or more other elements.
[0030] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.
[0031] Unless otherwise specified, the expressions "approximately", "roughly", and "on the order of" mean at 10%, preferably at 5%.
[0032] By between X and Y, we mean that the bounds X and Y are included.
[0033] We will now describe in more detail the chip bonding process in referring to figures 3A to 3H, 4A to 4H and 5A to 5H attached.
[0034] The process comprises the following steps: a) provide a donor substrate 100 in which chips are formed, the donor substrate 100 comprising a first surface 101 on the front face and a second surface 102 on the rear face (figures 3A, 4A, 5A), b) assemble the first surface 101 of the donor substrate 100 onto a temporary substrate 200, by direct bonding (figures 3B, 4B, 5B), c) preferably, thin the donor substrate 100 from the second surface (figures 3D, 4D, 5D), d) to stick the assembly formed of the donor substrate 100 and the temporary substrate 200 onto a handling device 400 comprising a rigid support 401 and an adhesive film 402, the second surface 102 of the donor substrate 100 being stuck onto the adhesive film 402 (figures 3F, 4E, 5E), e) separate the temporary substrate 200 from the donor substrate 100 (figures 3G, 4F, 5F), f) cut the donor substrate 100 so as to isolate the chips 120 (figures 3E, 4G, 5G), g) stick the chips 120 onto the receiving substrate 300 by direct gluing (figures 3H, 4H, 5H).
[0035] According to a first embodiment, the different steps can be carried out in the order a), b), c), d), e), f) and g) as for example shown in Figures 4A to 4H and in Figures 5A to 5H.
[0036] According to a second embodiment, the different steps can be carried out in the order a), b), c), f), d) e) and f) as for example shown in figures 3A to 3H.
[0037] Implementing a direct bonding method to assemble the donor substrate 100 with the temporary substrate 200 protects the front surface 101 of the donor substrate 100, and therefore the chips 102, during the thinning and / or cutting steps. Once the chips 120 have been thinned, cut, and separated from the temporary substrate 200, they can be bonded to the receiving substrate 300 by another direct bonding method. In such a process, the chips 120 and the front surface of the donor substrate 100 are not in contact with the adhesive film 402. Since the front surface 101 of the chips is clean and relatively smooth, the resulting bond exhibits few or no defects.
[0038] Prior to step a), it is possible to carry out one or more pre-treatments on the donor substrate 100 and / or on the temporary substrate 200 so as to make them compatible with direct bonding.
[0039] The pretreatment can be chosen from the following pretreatments: thermal annealing, plasma, polishing and wet cleaning.
[0040] By way of example, it is possible to form an oxide layer on the surface of the temporary substrate 200 and / or to perform a polishing step on the temporary substrate 200 and / or on the donor substrate 100 to obtain a roughness compatible with direct bonding (typically a roughness less than 0.5 nm RMS). It is possible to implement processes that combine, for example, a plasma and an aqueous solution, in particular an oxygen plasma followed by CARO wet cleaning (mixture of H2SO4, H2O2) combined with SCI (mixture of H2O, NH3, H2O2). It is also possible to make the surface of the temporary substrate 200 hydrophobic with an HF-based solution if the substrate 200 is made of silicon, for example.
[0041] The donor substrate 100, provided in step a), comprises a first surface 101 (or first main surface) on its front face and a second surface 102 (or second main surface) on its rear face. The first surface 101 and the second surface 102 are parallel to each other. The first surface 101 on the front face corresponds to the surface that is to be prepared for direct bonding with the receiving substrate 300.
[0042] At the time of step a), chips 120 have already been formed in the donor substrate 100. The chips 120 are positioned on the front face of the donor substrate 100. After singularization, the chips will have a thickness ranging from a few microns to the total thickness of the plates (without thinning). The chips have a surface area, for example, ranging from 0.5 x 0.5 mm² to 20 x 20 mm².
[0043] The donor substrate 100 is, for example, a plate. The plate may have a diameter between 25 mm and 300 mm, preferably between 100 mm and 300 mm.
[0044] The donor substrate 100 can be a bulk substrate 110 made of semiconductor material. The donor substrate 100 is, for example, made of silicon, germanium, a III / V material, such as AsGa, InP or a II / VI material, such as CdHgTe.
[0046] The donor substrate 100 may comprise a support substrate covered, on its front face, by a thin dielectric layer, in particular an oxide layer (silicon oxide in particular). The thin oxide layer may be formed, for example, by deposition.
[0047] The donor substrate 100 can be a SOI (Silicon on Insulator) substrate, that is, a substrate comprising a support substrate successively covered by a thin layer of buried oxide and a layer of silicon. It can be a BSOI (Bonded Silicon On Insulator) substrate comprising a silicon film and a layer of silicon oxide.
[0048] The first surface of the donor substrate 100 can be a semiconductor material surface or an oxide surface, for example a silicon oxide surface.
[0049] According to a particular embodiment, the first surface 101 of the donor substrate 100 can be a hybrid surface, formed of several materials (at least two materials). Preferably, it is a Cu / SiO2 hybrid layer comprising a silicon oxide matrix in which copper portions (bubbles) have been formed. The copper bumps have, for example, 2 µm sides. Such bumps can be formed by a Damascus process
[0050] The first surface 101 of the donor substrate 100 can be a surface on which microelectronic devices such as CMOS ('Complementary metal-oxide-semiconductor'), interconnect levels and hybrid bonding levels have been made.
[0051] According to an alternative embodiment shown in Figures 5a to 5H, the first surface 101 of the donor substrate 100 can be covered by a protective layer 150.
[0052] According to a preferred embodiment, the protective layer 150 can be glued by direct bonding onto the donor substrate 100. This allows for intimate contact between the protective layer 150 and the donor substrate 100.
[0053] This embodiment can be carried out according to the following steps: i) to adhere to the donor substrate 100, a transfer substrate comprising a support and a protective layer 150, ii) remove the support from the transfer substrate, so as to form an assembly comprising the donor substrate 100 covered by the protective layer 150.
[0054] According to another embodiment, the protective layer 150 can be deposited on the donor substrate 100.
[0055] The polymer layer can have a thickness of between 20 and 50nm.
[0056] The protective layer 150 can be a silicon layer, a carbon layer amorphous or a polymer layer, for example.
[0057] The polymer is, for example, an acrylate or one of its derivatives, for example an acrylate having adamantane groups, in particular BARC. The polymer layer may have, for example, a thickness of 32 nm.
[0058] The temporary substrate 200 (or handle substrate) can be formed from a solid substrate. For example, it can be a plate with a diameter between 25 and 300 mm, preferably between 100 mm and 300 mm. The temporary substrate 200 must be the same size as the donor substrate 100. The temporary substrate 200 is, for example, made of silicon, germanium, a III / V material, such as AsGa, InP or a II / VI material, such as CdHgTe.
[0060] The temporary substrate 200 may comprise a support substrate covered by a thin dielectric layer. In particular, the thin layer is an oxide layer, for example a silicon oxide layer.
[0061] The temporary substrate 200 can be an SOI substrate.
[0062] During step b), the donor substrate 100 and the temporary substrate 200 are brought into contact to be assembled by direct gluing.
[0063] It is possible to achieve hydrophobic bonding, for example, by using a donor substrate 100 whose first surface 101 is made of silicon and a temporary substrate 200 whose surface to be bonded is made of silicon.
[0064] It is also possible to achieve hydrophobic-hydrophilic bonding with a silicon substrate 200 passivated by hydrogen bonds and a substrate 100 whose surface 101 is a hybrid surface with bare copper. With a hydrophobic surface involved in the bonding, the amount of water is limited, which is particularly advantageous for sensitive surfaces such as hybrid surfaces with bare copper.
[0065] It is also possible to achieve hydrophilic bonding, for example, with two oxide surfaces, particularly silicon oxide. The substrates 100, 200 to be bonded comprise, for example, a silicon support substrate covered by a thin layer of oxide on its front face.
[0066] One may also choose, for example, a donor substrate 100 whose front face surface 101 is a hybrid surface, in particular a surface comprising copper pads in a SiO2 matrix and a temporary substrate 200 having a silicon surface, for example a SOL-type substrate
[0067] Direct bonding can be carried out at atmospheric pressure (i.e. 1013.25 hPa) or under vacuum.
[0068] The assembly does not necessarily need to be consolidated by heat treatment. However, annealing, preferably at a temperature below 200°C, can be advantageously carried out.
[0069] The annealing step strengthens the adhesion. This adhesion is preferably less than 1 J / m² to ensure the removal of the temporary substrate 200 at the end of the process. The adhesion can be evaluated, for example, by the Maszara method (J. Appl. Phys. 64, 1988, 10).
[0070] In the case of a direct hydrophilic bonding which involves a silicon oxide surface, the annealing temperature will preferably be less than 150°C.
[0071] A step of trimming the donor substrate 100 can be carried out before or after the gluing step (step b), for example between steps b) and c) or after c) (figures 3C, 4C, 5C).
[0072] The contouring step can be carried out, for example, by photolithography / engraving, or by mechanical contouring using a diamond saw. The width of the contouring is, for example, between 1 and 5 mm. The depth of the contouring will chosen according to the final thickness of the donor substrate 100. The contouring makes it possible to overcome the fragility of the edge of the thinned plates and during thinning.
[0073] A thinning step is advantageously carried out (step c). Thinning is carried out from the back face of the donor substrate 100 to the desired thickness, for example, by abrasion / lapping and / or by chemical etching and / or chemical mechano-polishing (CMP).
[0074] The thinning step can be carried out in several substeps. It is possible to combine a mechanical abrasion method with chemical etching methods. In this case, the donor substrate 100 may include an etching stop layer. The donor substrate 100 can be thinned to a thickness on the order of a micrometer. Since the donor substrate 100 is perfectly held by direct bonding to the temporary substrate 200, it can be handled naturally by all microelectronic machines.
[0075] After the thinning step, cleaning steps can be carried out to limit particulate contamination, particularly in preparation for final disassembly. Advantageously, this cleaning can utilize conventional microelectronics equipment, which facilitates and optimizes this step.
[0076] Depending on the desired chip thicknesses 120, the thinning step may not be carried out.
[0077] During step d), the assembly formed from the donor substrate 100 and the temporary substrate 200 is glued onto a handling device 400 comprising a rigid frame 401 and an adhesive film 402. The second surface 102 of the donor substrate 100 is glued onto the adhesive tape 402 (in other words, the back face of the donor substrate 100 is glued).
[0078] In the very advantageous case where the chips 120 are cut before separating the temporary substrate 200 from the donor substrate 100 (in other words, in the case where step f is carried out before step d), as shown in Figures 3A to 3H), the assembly formed from the cut donor substrate 100 and the temporary substrate is glued onto the handling device 400.
[0079] The adhesion between the donor substrate 100 (cut or uncut) and the adhesive tape 102 is very strong (typically greater than 20 J / m²). The adhesion between the donor substrate 100 and the adhesive tape 102 is thus greater than the adhesion between the temporary substrate 200 and the donor substrate 100 (less than 1 J / m²).
[0080] Thus, during step e), by inserting a wedge / small blade between the temporary substrate 100 and the donor substrate 100, the weakest interface is dismantled, i.e. the interface between the temporary substrate 100 and the donor substrate 200.
[0081] It is possible to use well-known automatic dismantling machines for temporary bonding technologies. For example, the machines from the company EVG which A ring is used to encircle and lift the temporary substrate. A small blade / wedge can be used to initiate detachment. For example, Tazmo machines also use a blade to initiate detachment. The back of the temporary substrate 200 is clamped by vacuum onto a suction table, and the surface deforms to propagate detachment.
[0082] After disassembly, we obtain chips 120 already individualized and whose first surface 101 on the front face is directly compatible with direct bonding.
[0083] In step f), the chips 120 are separated from each other using a cutting / engraving method. This step can be carried out using a diamond saw, a laser, stealth cutting, or plasma etching, for example (particularly with the Bosch process). Plasma etching can be performed in a standard deep etching machine because the chips to be separated are held in place by the temporary substrate 200 or by the adhesive film 402. Furthermore, plasma etching preserves the temporary substrate 200 if it is still bonded to the donor substrate 100 when this step is performed. Since the chips 120 are not held in place by a metal frame, there is advantageously no need for a dedicated plasma etching machine. It is also possible to use a nanosecond or, better yet, picosecond ablation laser.
[0084] As shown in Figures 4A to 4H and 5A to 5H, the chips 120 can be cut after the separation of the temporary substrate 200 from the donor substrate 100.
[0085] If the front face of the chips is not protected during the cutting step (Figures 4A to 4H), it may be contaminated by particles from the cutting step. The chips will then be cleaned before carrying out step g).
[0086] As previously stated, it is possible to deposit a protective layer 150 on the donor substrate 100. After step f), the protective layer 150 is removed before the final bonding of the chips 120 to the recipient substrate 300 ([Fig. 5G]). Alternatively, it is possible to remove the protective layer 150 before step f).
[0087] The protective layer 150 can be removed, for example, by UV-ozone treatment or by means of a solution, in particular a tetramethylammonium hydroxide (TMAH) solution.
[0088] During step g), the cut chips, possibly thinned and / or possibly cleaned, can be glued onto the receiving substrate 300.
[0089] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.
[0090] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.
[0091] Illustrative and non-limiting examples
[0092] In the following examples 1 to 6, silicon wafers with a diameter of 200 mm were used. Example 7 is carried out on wafers with a diameter of 100 mm.
[0093] Example 1
[0094] A 500 nm thick silicon oxide deposit is made on a 725 pm silicon wafer. This wafer undergoes a mechano-chemical polishing process to make it compatible with a hydrophilic direct bonding process. This yields a 100% donor substrate ready for bonding.
[0095] A second silicon wafer 725 pm thick is cleaned to make it compatible with a hydrophilic direct bonding process. This yields a temporary substrate 200 ready for bonding.
[0096] The substrates 100 and 200 are joined by direct bonding. The donor substrate 100 is then thinned to a thickness of 300 µm by mechanical abrasion using a diamond wheel. Next, the donor substrate 100 is cut with a diamond saw to form 10 x 10 mm² chips. The cutting depth is 310 µm to ensure complete cutting of the donor substrate 100. The cut penetrates the temporary substrate 200 to a shallow depth (10 µm).
[0097] The resulting structure is then fixed to a rigid frame using Furukawa SP5207M- adhesive tape. 425. The thinned face of the donor substrate 100 is glued onto the tape. By inserting a corner into the bond, the handle 200 is separated from the donor substrate 100. This yields 10 x 10 mm² silicon chips 120 with a thickness of 300 µm, compatible with a direct bonding process.
[0098] Example 2:
[0099] The donor substrate 100 is a 725 pm silicon wafer, onto which a 500 nm thick silicon oxide deposit is made. This wafer undergoes a mechano-chemical polishing process to make it compatible with a direct bonding process.
[0100] The temporary substrate 200 is a second silicon wafer 725 pm thick, cleaned to make it compatible with a hydrophilic direct bonding process.
[0101] The donor substrate 100 and the temporary substrate 200 are joined by direct bonding. This assembly is annealed for 2 hours at 150°C. The donor substrate 100 is then thinned to a thickness of 200 µm by mechanical abrasion using a diamond wheel. The thinned donor substrate 100 is then trimmed with a saw. A diamond-coated disc with a width of 1.5 mm and a depth of 220 µm is used. The donor substrate 100 is then thinned by abrasion to a thickness of 50 µm. Particulate cleaning is then performed using a Megpie® from Prosys and a 1% diluted ammonia solution.
[0102] This structure is then fixed to a rigid frame using Furukawa SP5207M-425 adhesive tape. The thinned face of the donor substrate 100 is glued to the tape. By inserting a corner into the adhesive, the handle 200 is removed. 5 x 5 mm² chips are cut from the donor substrate 100 using a diamond saw. These 5 x 5 mm² chips, 50 µm thick, are compatible with a hydrophilic direct bonding process after ozone cleaning and Megpie treatment using a 1% ammonia solution.
[0103] Example 3:
[0104] On a 725 pm silicon BSOI substrate consisting of a 50 pm silicon film and a 400 nm silicon oxide layer, oxidation is carried out to form a 50 nm silicon oxide film. A 100 donor substrate is obtained.
[0105] A second silicon wafer, 725 pm thick, undergoes oxidation to form a 100 nm silicon oxide film on its surface. This provides a temporary substrate 200. Substrates 100 and 200 are cleaned to make them compatible with a hydrophilic direct bonding process.
[0106] The substrates 100 and 200 are joined by direct bonding. This assembly is annealed for 2 hours at 150°C. The donor substrate 100 is then thinned to 200 µm by mechanical abrasion using a diamond wheel. A 1.5 mm wide and 220 µm deep diamond saw cuts the thinned donor substrate 100. The donor substrate 100 is then thinned by abrasion to a thickness of 100 µm. Finally, the remaining silicon is etched with an aqueous HF / HNO3 solution containing 10% HF and 70% HNO3. The etching stops at the 400 nm silicon oxide layer, consuming it slightly. This oxide layer can be completely removed using HF. On donor substrate 100, 1 x 12 mm² chips are cut using a diamond saw. The cutting depth is 60 µm to ensure complete cutting of donor substrate 100.The cut penetrates the temporary substrate 200 to a reduced depth of 10 pm.
[0107] This structure is fixed to a rigid frame using Furukawa SP5207M-425 adhesive tape. The thinned face of the donor substrate 100 is bonded to the tape. By inserting a corner into the bond, the handle 200 is removed. This yields 1 x 12 mm² silicon chips with a thickness of 50 µm compatible with a process of direct hydrophilic bonding after ozone-based cleaning and Megpie using a 1% ammonia solution.
[0108] Example 4:
[0109] On a silicon wafer, copper pads measuring 2 µm on a side are produced in a SiO2 matrix using a Damascus process. This wafer is trimmed with a diamond saw to a width of 1.5 mm and a depth of 220 µm. It is then cleaned and mechano-chemically polished to make the donor substrate 100% compatible with a hydrophilic direct bonding process.
[0110] A 1 µm layer of SiO2 is deposited onto a temporary substrate 200 by chemical vapor deposition. The temporary substrate 200 is then chemically polished. The donor substrate 100 and the temporary substrate 200 are bonded directly. The donor substrate 100 is then thinned to 200 µm by mechanical abrasion. 3 x 3 mm² chips are cut from the donor substrate 100 using a diamond saw. The cutting depth is 210 µm to ensure complete removal of the donor substrate 100. The cut penetrates the temporary substrate 200 to a depth of 10 µm.
[0111] This structure is fixed to a rigid frame using Adwill D-650 adhesive tape. The thinned face of the donor substrate 100 is bonded to the tape. By inserting a corner into the bond, the handle 200 is removed. This yields 3 x 3 mm² silicon chips with a thickness of 200 µm, the surface of which consists of copper pads 2 µm on each side. This surface is compatible with a hydrophilic direct bonding process. An ozone-based cleaning and a Megpie using a solution of EKC PCMP 5650 diluted 1:20 in DI water can be added.
[0112] Example 5:
[0113] On a BSOI (donor substrate 100) silicon substrate of 725 pm which consists of a 50 pm silicon film and a 400 nm silicon oxide layer. Copper pads of 2 pm on a side are produced by a Damascus process in a SiO2 matrix.
[0114] A second silicon wafer (temporary substrate 200) of 725 pm thickness undergoes HF-based cleaning so as to have a hydrophobic surface passivated by Si-H hydrogen bonds.
[0115] The substrates 100 and 200 are joined by direct bonding. The donor substrate 100 is then thinned to 200 µm by mechanical abrasion using a diamond wheel. A 1.5 mm wide and 220 µm deep diamond saw cuts the thinned donor substrate 100. Finally, the remaining silicon is etched with an aqueous HF / HNO3 solution. The etching stops at the 400 nm silicon oxide layer. A photolithography step and An ionic etching process is used to etch the 400 nm oxide layer to create the cutting paths. The lithography resin is then removed, and a plasma etch using the Bosch process is used to separate the chips by etching the 50 µm silicon. The plasma etch stops within the oxide layer of the Damascus structures. An ionic etch is then used with a CHF3 plasma containing 20% CH4 at 10 torr and 1500 W to etch this oxide layer, stopping at the silicon of the 200 handle. This results in 50 µm silicon chips bonded to the 200 handle.
[0116] This structure is fixed to a rigid frame using Furukawa SP5207M-425 adhesive tape. The thinned face of the donor substrate 100 is glued to the tape. By inserting a corner into the bond, the handle 200 is removed. Silicon chips of 6 x 6 mm² with a thickness of 50 pm are obtained, compatible with a hybrid hydrophilic direct bonding process after ozone-based cleaning and a Megpie using a solution of EKC PCMP 5650 diluted 1:20 in DI water.
[0117] Example 6:
[0118] On a silicon wafer (donor substrate 100), copper pads measuring 2 µm on a side are produced in a SiO2 matrix using a Damascus process. This wafer is trimmed with a diamond saw to a width of 1.5 mm and a depth of 220 µm. It is then cleaned and chemically polished to make it compatible with a hydrophilic direct bonding process. Just before bonding, a 30 nm thick layer of amorphous carbon is deposited.
[0119] On a temporary substrate 200, 1 pm of SiO2 is formed by chemical vapor deposition. The substrate is then mechano-chemically polished. Just before bonding, a 30 nm thick layer of amorphous carbon is deposited.
[0120] The substrates 100 and 200 are joined by direct bonding. The donor substrate 100 is then thinned to a thickness of 200 µm by mechanical abrasion. 3 x 3 mm² chips are cut from the donor substrate 100 using a diamond saw. The cutting depth is 210 µm to ensure complete removal of the donor substrate 100. The cut penetrates the temporary substrate 200 to a depth of 10 µm.
[0121] This structure is fixed to a rigid frame using Adwill D-650 adhesive tape. The thinned face of the donor substrate 100 is bonded to the tape. By inserting a corner into the bond, the handle 200 is removed. This yields 3x3 mm² silicon chips with a thickness of 200 µm, the surface of which consists of copper pads 2 µm on a side. The amorphous carbon layer is removed by a 120 s UV / Ozone treatment (at 21 mW / cm² with a low-pressure quartz mercury lamp having a wavelength of 254 nm and 185 nm), which does not disturb the hybrid surface and, in particular, the underlying copper. This surface is compatible with a direct bonding process. hydrophilic. One can add an ozone-based cleaning and a Megpie using a solution of EKC PCMP 5650 diluted 1 to 20 in DI water.
[0122] Example 7:
[0123] On a 100 mm diameter and 650 µm thick InP (donor substrate 100) plate, a UV-ozone and Megpie cleaning process is performed with a 2% ammonia solution to make the surface compatible with direct bonding. A 20 nm silicon nitride and a 20 nm TEOS-based silicon oxide are deposited on this surface at 300 °C, followed by a 100 nm amorphous silicon deposition. A CMP (Cold Mount Processing Method) on this amorphous silicon layer makes it compatible with direct bonding. Treatment with a 1% HF (hydrogen peroxide) solution renders this surface hydrophobic by passivating the silicon surface through Si-H hydrogen bonds.
[0124] A silicon wafer (temporary substrate 200) 525 pm thick and 100 mm in diameter undergoes cleaning to make it compatible with a direct bonding process and an HF treatment makes it hydrophobic.
[0125] The 100 and 200 substrates are joined by direct hydrophobic bonding. This assembly is annealed for 2 hours at 100°C. The 100 µm donor substrate is then thinned to 200 µm by mechanical abrasion using a diamond wheel. A 400 nm TEOS oxide layer is then deposited. A photolithography step followed by ion etching is used to etch the 400 nm oxide layer to create the cutting paths. The lithography resin is removed, and plasma etching is used to single-chip designs by etching the 200 µm InP layers. The plasma etching stops within the oxide layer of the 100 donor substrate. This oxide layer and the amorphous silicon layer of the 100 donor substrate are then etched using standard, suitable plasmas. The resulting 200 µm InP chips are bonded to the 200 µm handle.
[0126] This structure is fixed to a rigid frame using Furukawa SP5207M-425 adhesive tape. The thinned face of the donor substrate 100 is bonded to the tape. By inserting a corner into the bond, the handle 200 is removed. This yields 3 x 3 mm² InP chips with a thickness of 200 µm. Using a deep silicon etching machine compatible with metal frames, the silicon is etched onto the surface of the chips. After UV / Ozone treatment and a Megpie treatment with a 1% ammonia solution, the surface of the chips is made compatible with a hydrophilic direct bonding process.
Claims
Demands
1. A method for bonding chips (120) to a receiving substrate (300) comprising the following steps: a) providing a donor substrate (100) in which chips (120) are formed, the donor substrate (100) comprising a first surface (101) on the front face and a second surface (102) on the back face, b) assembling the first surface (101) of the donor substrate (100) onto a temporary substrate (200) by direct bonding, c) preferably, thinning the donor substrate (100) from the second surface (102), d) bonding the assembly formed by the donor substrate (100) and the temporary substrate (200) onto a handling device (400) comprising a rigid support (401) and an adhesive film (402), the second surface (102) of the donor substrate (100) being bonded to the adhesive film (402), e) separating the temporary substrate (200) from the donor substrate (100), f) cut the donor substrate (100) so as to isolate the chips (120),g) glue the chips (120) onto the receiving substrate (300) by direct gluing.
2. A method according to claim 1, wherein step f) is carried out between step b) and step d).
3. A method according to any one of the preceding claims, wherein, in step b), the first surface (101) of the donor substrate (100) is covered by a protective layer (150).
4. A method according to the preceding claim, wherein the protective layer (150) is an amorphous carbon layer, a silicon layer or a polymer layer, for example an acrylate layer or one of its derivatives.
5. A method according to any one of claims 1 to 4, wherein the first surface (101) of the donor substrate (100) is a surface comprising silicon oxide and copper.
6. A method according to any one of claims 1 to 4, wherein the first surface (101) of the donor substrate (100) is a surface of silicon, germanium, a III / V material, such as GaAs, InP or a II / VI material, such as CdHgTe.
7. A method according to any one of the preceding claims, wherein a step of trimming the donor substrate (100) is carried out before step b) or after step b).
8. A method according to any one of the preceding claims, wherein the chips (120) have a surface area between 0.5 x 0.5 mm2 and 20 x 20 mm2.
9. A method according to any one of the preceding claims, wherein the chips (120) have a thickness of less than 300pm, preferably less than 100pm, even more preferably less than 50pm.
10. A method according to any one of the preceding claims, wherein step f) is carried out by plasma etching.
Citation Information
Patent Citations
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