Parallel-branch device

Abstract

Parallel Branch Device: A device (DEV2) comprises identical parallel branches (B1, B2, B3), each containing a semiconductor component (T1, T2, T3) controlled in the on state by a first state of a control signal (cmd1, cmd2, cmd3) and in the off state by a second state of the control signal. The component's resistance has a negative coefficient of variation with temperature. In each branch, a circuit (MES1, MES2, MES3) measures a value (val1, val2, val3) of a parameter. A control circuit (CTRL2) receives an indication of one or more on-state durations (D) and the measured values, and, during each on-state duration (D), provides the control signal to each branch in the first state for a duration modulated with respect to the on-state duration to keep the parameter value within the same range for all branches. Figure for the abbreviation: Fig. 2

Description

Title of the invention: Parallel branch device technical field

[0001] The present description relates generally to electronic circuits, and more particularly to electronic circuits comprising several identical parallel branches, each having a semiconductor component with a resistance in the on-state decreasing with temperature. Previous technique

[0002] In many known electronic systems, several identical semiconductor components are connected in parallel, each semiconductor component being implemented from a semiconductor material, for example in and on a portion of a layer of that semiconductor material.

[0003] The provision of several identical semiconductor components in parallel makes it possible, for example, to increase the maximum amount of current that can flow through these parallel components without increasing the dimensions of the identical semiconductor components. For example, the size of a semiconductor chip is limited by the manufacturing technology of the semiconductor components of that chip, and it may be complicated, or even impossible, to produce large chips due to, for example, limited manufacturing yields of semiconductor chip wafers and / or mechanical strength issues. As an example, power converters include transistors, each implemented by several transistors connected in parallel.

[0004] In some of these known systems, identical components that are connected in parallel each have a resistance in the on-state having a value that decreases as the temperature increases, which poses various problems. Summary of the invention

[0005] There is a need to overcome all or part of the disadvantages of devices comprising several identical semiconductor components connected in parallel and having a conductive resistance with a negative coefficient of variation with temperature, that is to say a conductive resistance value which decreases when the temperature increases and vice versa.

[0006] An embodiment overcomes all or part of the disadvantages of the known devices described above.

[0007] One embodiment provides a device comprising two terminals and identical branches connected in parallel between said two terminals, each branch comprising: - a semiconductor component having a control terminal configured to receive a binary control signal in a first binary state to control the conducting state of the component between the first and second conduction terminals of the component and in a second binary state to control the blocking state of the component between the first and second conduction terminals of the component, a resistance in the conducting state of the component having a negative coefficient of variation with temperature; - a measurement circuit for a value of a parameter of said branch, wherein the device further comprises a control circuit configured to: receive a first signal indicating one or more first durations during which the device must be controlled in the conducting state between its two terminals, receive the measured values, and during each first duration, to provide the component of each branch with the control signal in the first binary state for a duration modulated with respect to the first duration so as to maintain the value of the parameter of said branch in an identical range of values ​​for all branches.

[0008] According to one embodiment, in each branch, during each first duration, the control circuit is configured so that the modulated duration of the first state of the control signal of the branch component is less than or equal to the first duration.

[0009] According to one embodiment, in each branch, the value of the parameter is at least partly determined by the on-state resistance of the component of said branch.

[0010] According to one embodiment, in each branch, the semiconductor component is in series with at least one other element, for example a resistor.

[0011] According to one embodiment, each branch comprises only said component and the measurement circuit.

[0012] According to one embodiment, the control circuit is configured, for each branch, during each first duration, to modulate the duration of the first state of the control signal of the branch independently of the control signals of the other branches.

[0013] According to one embodiment, the control circuit is configured, for each branch, and during each first duration, to decrease the duration of the first state of the control signal of the branch compared to the first duration when the value of the parameter measured for this branch is representative of a decrease in the resistance to the conducting state of the component.

[0014] According to one embodiment, said parameter is a current flowing in the branch, between the conduction terminals of the branch component, or a temperature of said branch.

[0015] According to one embodiment, the semiconductor is diamond.

[0016] According to one embodiment, the component is a MOS transistor.

[0017] According to one embodiment, the control circuit is configured, at each first duration, so that, in each branch of a subset of said branches, the component of said branch is controlled in the passing state for exactly said first duration.

[0018] According to one embodiment, the control circuit is configured, during each first duration, and for each branch, to modulate the duration of the first state of the control signal of the branch component by periodically forcing the second state of the control signal for a second duration, preferably according to pulse width modulation.

[0019] According to one embodiment, the control circuit is configured, during each first duration, and for each branch, to modulate the duration of the first state of the control signal of the branch component by forcing the second state of the control signal for a second duration starting with the first duration and / or by forcing the second state of the control signal for a third duration ending with the first duration.

[0020] Another embodiment provides for an electronic system comprising a device as described above, in which said branches implement, between said two terminals, a system switch.

[0021] Another embodiment provides for an inverter comprising as described above, in which: the device implements an inverter switching switch; in each branch, the component is a switch configured to be current bidirectional in the on state and to allow positive current to flow only from a first conduction terminal of the component to a second conduction terminal of the component in the blocked state; the first signal indicates a plurality of first durations; and the control circuit is configured, during each first duration, and for each branch, so that the second duration and / or the third duration are non-zero, only if a current flowing between the two terminals is a positive current flowing from the first conduction terminals of the components to the second conduction terminals of the components. Brief description of the drawings

[0022] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0023] Fig. 1 represents an example of a parallel branch device comprising each branch a semiconductor component with a on-state resistance value which decreases as the temperature increases;

[0024] [Fig.2] represents an example of an embodiment of a parallel branch device comprising each branch a semiconductor component with a resistance in the on state a value which decreases as the temperature increases;

[0025] [Fig.3] represents an example of a control mode for semiconductor components in a device of the type of that in [Fig.2];

[0026] [Fig.4] represents, in more detail, the control method of [Fig.3];

[0027] Figure 5 represents an example of another method of controlling components semiconductors in a device of the type of that in [Fig.2];

[0028] [Fig. 6] shows, in more detail, the control method of [Fig. 5]; and

[0029] [Fig.7] represents an example of a more detailed embodiment of a circuit of the device of [Fig.2]. Description of the implementation methods

[0030] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0031] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.

[0032] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0033] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0034] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0035] Fig. 1 represents an example of a DEV1 device with parallel branches, each comprising a semiconductor component with a forward resistance having a value that decreases as the temperature of the component increases.

[0036] More specifically, the electronic device DEV 1 includes a component COMP1 and a circuit CTRL1 configured to control the component COMP1.

[0037] The COMP1 component comprises two terminals 100 and 102 and N identical branches Bi connected in parallel between the terminals 100 and 102, with N an integer strictly greater than 1 and i an integer index from 1 to N. The COMP1 component is configured so that a current I flows between its terminals 100 and 102.

[0038] In the example of [Fig.1], N is equal to 3 and the device DEV1 comprises three identical branches Bl, B2 and B3 connected in parallel between terminals 100 and 102. For example, each branch Bi has one end connected to terminal 100 and another end connected to terminal 102.

[0039] Each branch Bi comprises a semiconductor component Ti (T1, T2 and T3 in [Fig. 1]), that is to say, a component formed in and / or on a portion of a semiconductor layer, for example, made of diamond. Since the branches Bi are identical to each other, the Ti components are identical to each other except for manufacturing variations.

[0040] Each component Ti comprises two conduction terminals and one control terminal configured to receive a control signal, for example, a control voltage or current. The conducting or blocking state of each component Ti is determined by the control signal received at the control terminal of that component. Furthermore, when the component Ti is controlled to the conducting state, the value of the control signal determines a conducting resistance value of the component Ti between its two conduction terminals.

[0041] For example, the control signal received by each component Ti at its control terminal is a binary signal having a first state, corresponding for example to a first voltage level, controlling the conducting state of the component, and having a second state, corresponding for example to a second voltage level, controlling the blocking state of the component. For example, a change in the value of the first level of the control signal allows the resistance value in the conducting state of the component Ti receiving this control signal to be changed.

[0042] For example, one of the two conduction terminals of each component Ti is coupled, for example connected, to terminal 100, the other of the two conduction terminals of each component Ti being coupled, for example connected, to terminal 102. Each component Ti is configured, in the conducting state, so that a current li (II, 12 and 13 in [Fig.1]) flowing in the branch Bi flows between the two conduction terminals of the component Ti.

[0043] In the example in [Fig. 1], the branches Bi all receive the same control signal cmd, common to all branches Bi. In other words, all components Ti receive the cmd signal at their respective control terminals. This control, by a single control signal applied to all branches Bi, is the control method usually used in devices with N parallel and identical branches Bi. For example, in [Fig. 1], the cmd signal is supplied to the control terminal of each of the components T1, T2, and T3. As an example, when the cmd signal controls a conducting state of the components Ti, the value of the cmd signal determines the value of the conducting resistance of each of the components Ti.

[0044] The cmd control signal is provided by the CTRL1 control circuit of the DEV1 device. For example, the CTRL1 circuit receives an ON signal. The ON signal instructs the CTRL1 circuit to at least one duration (or period) D during which the components Ti must be controlled in the conducting state. In other words, the ON signal instructs the CTRL1 circuit to at least one duration D during which the COMP1 component, or the DEV1 device, must be in the conducting state between its terminals 100 and 102. Put another way, the ON signal instructs the CTRL1 circuit to at least one duration D during which the parallel connection of the Bi branches must be conducting. For example, the ON signal instructs the CTRL1 circuit to alternate between durations D and durations D', each duration (or period) D corresponding to a control of the components Ti in the conducting state, and each duration D' corresponding to a control of the components Ti in the blocking state.When the ON signal indicates several durations D to the CTRL1 circuit, these durations can have different values. For example, the ON signal is a binary signal having a first state indicating to the CTRL1 circuit that the components Ti should be controlled in the conducting state, and a second state indicating to the CTRL1 circuit that the components Ti should be controlled in the blocking state.

[0045] The topology of the DEV1 circuit of [Fig.1] with a common control (the cmd signal) applied to all the components Ti is that which is generally used in known devices comprising several components Ti which must be controlled to be selectively conducting simultaneously and blocked simultaneously.

[0046] This common-control topology is well-suited to identical components Ti having a forward resistance with a positive temperature coefficient, meaning that the forward resistance of component Ti increases as the temperature increases, and conversely, decreases as the temperature decreases. Indeed, the conduction losses in each component Ti are of the type Roni*Ii2, where Roni is the forward resistance of component Ti and li is the current flowing through it. Thus, for a given value of the cmd signal for which the components Ti are forward-biased, if the temperature of a component Ti increases, its resistance Roni increases, which leads to a corresponding decrease in the The current li flows through the component, thus reducing conduction losses (due to the predominance of the square of the current li over the resistance value Roni). This reduction in conduction losses leads to a decrease in temperature in the component Ti, which in turn reduces the resistance Roni, and so on. Therefore, the resistance Roni maintains a value that is essentially constant and determined by the value of the signal cmd when that signal is in its initial state.

[0047] On the other hand, this common control topology is not suitable for Ti components having a forward resistance with a negative coefficient of variation with temperature, that is to say that the value of the forward resistance of the Ti component decreases when the temperature increases, and, conversely, increases when the temperature decreases.

[0048] Indeed, although the Ti components are supposed to be identical to each other, for a given value of the cmd signal for which the Ti components are in the conducting state, the Ti components may have different values ​​of conducting resistance, for example, due to manufacturing variations and / or temperature differences between the Ti components. As a result, one of the Ti components may have a lower conducting resistance Roni than the other Ti components, even though all the components receive the same cmd signal. The current Li in the branch Bi containing the least resistive Ti component is then higher than the current Li in the Ti components of the other branches, hence there is a higher heat dissipation in this Ti component than in the Ti components of the other branches (due to the predominance of the square of the current Li over the resistance value Roni).This higher heating in this less resistive Ti component leads to a greater decrease in its on-state resistance compared to the on-state resistances of Ti components in other branches. In turn, this greater decrease in the resistivity of the Ti component relative to the other components results in a greater increase in the current through this Ti component compared to the other Ti components, and so on. This leads to premature aging of this Ti component compared to the Ti components in other branches, or even to its destruction.

[0049] To overcome the drawback described above of the DEV1 device, it is proposed here to control the Ti components independently, that is to say to provide different control signals to the respective Ti components, so as to optimize the paralleling of the Ti components.

[0050] More particularly, it is proposed here to control each component Ti independently of the other components Ti, so that a parameter of the component Ti (or of the branch Bi comprising this component Ti) which has a value dependent on the on-state resistance of the component Ti, has a value within a range of values identical for all Ti components. In other words, it is proposed here to control each Ti component independently of the other Ti components so that the value of the parameter for this Ti component does not deviate from, or diverge from, the values ​​of this parameter for the other Ti components.

[0051] In this description, unless otherwise indicated, the expression "range of values" means a range of values ​​extending from a minimum value to a maximum value, whether the minimum and maximum values ​​are equal to each other (the range then comprising a single value equal to the minimum and maximum values), or whether the minimum and maximum values ​​are different from each other (the range then comprising, in addition to these two minimum and maximum values, a plurality of values ​​between the minimum and maximum values).

[0052] In the remainder of this description, unless otherwise specified, the expression "parameter of a branch Bi" means "parameter of the component Ti of that branch Bi". For example, when the parameter is temperature, the temperature of branch Bi means the temperature of the component Ti of that branch Bi.

[0053] One embodiment provides, in each branch Bi, a circuit for measuring the parameter value for branch Bi, i.e., the parameter for component Ti of that branch Bi, and a control circuit configured to control each component Ti based on the measured values, so as to achieve the operation described above. For example, one embodiment provides that each component Ti receives a modulated cmdi control signal, independently for each component Ti, based on the parameter values ​​measured for the components Ti, for example, based on the parameter value measured for that component Ti.

[0054] For example, one embodiment provides that a control circuit is configured to: receive the parameter values ​​measured in each branch Bi, provide the cmdi control signal to each component Ti, and modulate the cmdi control signal of each Ti component so as to maintain the parameter value of each branch within an identical range of values ​​for all branches.

[0055] According to one embodiment, the control circuit is configured to modulate the cmdi control signal of each component Ti so as to modulate a duration of the on-state of the component Ti, in order to maintain the parameter value within the same range of values ​​for all branches. In other words, the control circuit is configured to modulate the cmdi control signal of each component Ti by modulating a duration of a state of the cmdi control signal corresponding to the on-state of the component Ti, in order to maintain the parameter value for that component Ti within the same range of values ​​for all branches.

[0056] According to one embodiment, the control circuit receives the ON signal described in relation to [Fig. 1] and the parameter values ​​measured in each branch. Furthermore, the control circuit provides the cmdi control signals to the components Ti. For a duration D indicated by the ON signal, for example, for each duration D indicated by the ON signal, the control circuit provides the component Ti of each branch Bi with the cmdi control signal in the first state (component Ti conducting) for a duration modulated with respect to this duration D indicated by the ON signal. By way of example, for each duration D, the control circuit forces, for a subset of the branches Bi comprising only a portion of the branches Bi, a zero modulation of the duration of the conducting state of the component Ti of each branch Bi of this subset with respect to the duration D, so that the components Ti of the branches Bi of this subset are conducting for exactly the duration D.Preferably, this subset of branches Bi, which does not include all branches Bi, comprises only one branch Bi. For example, when the control circuit is configured to force zero modulation in only a subset of branches Bi, the branch(es) Bi in this subset are the same for all durations D or can be selected at each duration D based on the parameter values ​​measured in the branches Bi. For example, the control circuit is configured to force zero modulation of the on-state duration in a subset of branches Bi when all branches Bi taken together correspond to, or implement, a switch in a switching voltage converter and the on state of this switch is controlled by the ON signal.

[0057] Fig. 2 represents an example of an embodiment of a DEV2 device with identical branches Bi connected in parallel with each other and each comprising a semiconductor component Ti with controllable on-state resistance and negative coefficient of variation with temperature.

[0058] The DEV2 electronic device comprises a COMP2 component and a circuit CTRL2 configured to control the COMP2 component.

[0059] Component COMP2 is similar to component COMP1 in [Fig. 1], and only the differences between these two components COMP1 and COMP2 are highlighted here. Thus, unless otherwise indicated, everything stated for component COMP1 applies to component COMP2.

[0060] In particular, component COMP2 differs from component COMP1 in that each branch Bi of component COMP2 includes a measurement circuit MESi (MES1, MES2 and MES3 in the example of [Fig.2] where N is equal to 3).

[0061] In each branch Bi, the MESi circuit is configured to measure a value of a parameter of branch Bi. For example, this parameter has a value that depends, at least in part, on the on-state resistance of the component Ti of branch Bi, by This example increases when the on-state resistance decreases, although the reverse is also possible. Each MESi circuit provides a signal vali (vall, val2 and val3 in [Fig.2]) indicating the measured value of this parameter for the branch Bi or the corresponding component Ti.

[0062] For example, the parameter measured in each branch is the current li flowing in branch Bi, and therefore in the component Ti of branch Bi, that is to say between the conduction terminals of this component Ti.

[0063] As an alternative example, the parameter measured in each branch Bi is the temperature of the branch Bi, or, put another way, the parameter measured in each branch Bi is the temperature in the component Ti of the branch Bi. Indeed, the temperature of the component Ti of the branch Bi depends on the current Li in the branch Bi and the value of the on-state resistance of the component Ti of the branch.

[0064] In the example of [Fig.2], each branch Bi comprises only the component Ti and the MESi circuit of branch Bi.

[0065] By way of example, when the parameter measured in each branch Bi is the current li in the branch Bi, the MESi circuit is connected in series with the component Ti.

[0066] Compared to the DEV1 device, the CTRL1 control circuit is replaced by the CTRL2 control circuit in the DEV2 device.

[0067] The CTRL2 circuit is configured to provide, to the component Ti of each branch Bi, a cmdi control signal (cmdl, cmd2, and cmd3 in [Fig. 2]) of the component Ti. For example, the cmdi signal is supplied to the control terminal of the corresponding component Ti. As an example, each cmdi signal is a binary signal having a first state that controls a conducting state of the corresponding component Ti, and a second state that controls a blocking state of the corresponding component Ti. For example, the first state of each cmdi signal corresponds to a first voltage level, for example, a high level, and the second state of each cmdi signal corresponds to a second voltage level, for example, a low level. In other examples, the first level of each cmdi signal corresponds to a low level and the second state of each cmdi signal corresponds to a high level.As an example, for each cmdi signal, the value of the cmdi signal when that signal is in its first state determines the value of the resistance in the on-state of the corresponding Ti component.

[0068] Compared to the CTRL1 circuit which provides the same cmd signal to all Ti components, the CTRL2 circuit provides a distinct cmdi signal to each Ti component, so that each Ti component is controlled independently of the other Ti components.

[0069] In the embodiment of [Fig. 2], the CTRL2 circuit is configured to receive the ON signal, like the CTRL1 circuit of [Fig. 1]. The ON signal indicates to the CTRL2 circuit at least a duration D during which the COMP2 component, or The DEV2 device must be controlled in a conducting state between its terminals 100 and 102. For example, the ON signal instructs the CRTL2 circuit to alternate between durations D and durations D', with each duration D controlling a conducting state between terminals 100 and 102, and each duration D' controlling a blocking state between terminals 100 and 102. When the ON signal instructs the CTRL2 circuit to use multiple durations D, these durations can have different values. For example, the ON signal represents a duty cycle value when the COMP2 component is controlled with pulse-width modulation. As another example, the ON signal indicates the start and end times of each duration D when the COMP2 component must be conducting.As yet another example, the ON signal is a binary signal with a first state indicating to the CTRL2 circuit that the COMP2 component should be switched on, and a second state indicating to the CTRL2 circuit that the COMP2 component should be switched off. For example, in the case of a binary ON signal, the first state of the ON signal corresponds to a first voltage level, for example, a high level, and the second state of the ON signal corresponds to a second voltage level, for example, a low level. In other examples, the first level of the ON signal corresponds to a low level and the second state of the ON signal corresponds to a high level.

[0070] The CTRL2 circuit receives the vali signals, that is to say it receives the values ​​measured in the Bi branches of the chosen parameter.

[0071] The CTRL2 circuit is configured to prevent the parameter of each branch Bi or component Ti from taking on values ​​that diverge between branches Bi when the COMP2 component is switched on, i.e., for a duration D indicated by the ON signal. To achieve this, during this duration D, the CTRL2 circuit is configured to modulate (or adapt or determine) each cmdi signal so that, in each branch Bi, the parameter value is maintained within a range of identical values ​​for all branches Bi.

[0072] More particularly, according to one embodiment, when the CTRL2 circuit receives, via the ON signal, an indication of a duration D during which the COMP2 component is to be switched on, the CTRL2 circuit provides, during this duration D, to the component Ti of each branch Bi, the corresponding cmdi signal which is in its first state (component Ti switching on) for a duration modulated with respect to this D. The modulation, by the CTRL2 circuit, of the duration of the first state of each cmdi signal with respect to the duration D indicated by the ON signal is performed on the basis of the measured values, so as to maintain the value of the parameter of each branch Bi within an identical range of values ​​for all branches. In practice, during a duration D indicated by the ON signal, for each cmdi signal, the modulated duration of the first state of this cmdi signal is less than or equal to this duration D. As an example, as previously stated, during each duration D, the control circuit forces, for only a subset of the branches Bi, a zero modulation of the duration of the on-state of the components Ti of the branches Bi of that subset with respect to the duration D, so that the components Ti of the branches of that subset are on for exactly the duration D. As an example, the control circuit is configured to force a zero modulation of the on-state duration in only some of the branches Bi, when component C0MP2 corresponds to or implements, between its terminals 100 and 102, a switch of a switching voltage converter and the on-state of that switch is controlled by the ON signal.

[0073] For example, during a duration D in which component COMP2 must be conducting, for each branch Bi, when the signal vali of branch Bi indicates a decrease in the resistance in the conducting state of component Ti of the branch, the circuit CTRL2 decreases (modulates down) the duration of the first state of the cmdi signal of component Ti with respect to this duration D, so as to increase, for example on average over the duration D or over a period of time comprising one or more durations D, the value of the resistance in the conducting state of component Ti, unless, for example, this branch Bi corresponds to a branch Bi of a subset of branches Bi for which the circuit CTRL2 forces a zero modulation of the duration of the first state of the cmdi signal with respect to this duration D. In this way, the value of the parameter for branch Bi, which depends on the resistance in the conducting state of component Ti of the branch, is maintained within the range of values ​​common to branches Bi.

[0074] By way of example, the Ti component of each Bi branch is a MOS transistor (from the English "Metal Oxide Semiconductor" - metal oxide semiconductor) formed in and / or on a portion of a semiconductor layer, for example in diamond.

[0075] Although the on-state resistance of circuit components is generally sought to reduce losses and power consumption, in the DEV2 device, the CTRL2 circuit increases the on-state resistance of one or more Ti components to prevent the parameter of the Bi branches comprising these Ti components from continuing to increase as described in relation to [Fig. 1], due to the negative coefficient of variation of the on-state resistance of the Ti components with temperature. Even though the on-state resistance of one or more Ti components is increased, this allows for a balancing of stresses between the Ti components, which allows, for example, an increase in their lifespan.For example, increasing the on-state resistance of a Ti component, for example on average over a time D or over several given time Ds, makes it possible to reduce the temperature, for example on average over this time D or over these several. durations D, and the temperature of such a Ti component directly affects its lifespan, for example reduces its lifespan when the temperature increases.

[0076] According to one embodiment, the range of values ​​which is common to all branches, and in which the CTRL2 circuit maintains the value of the parameter for each branch by modulating the cmdi control signals, is determined from a reference value valref.

[0077] For example, the range of values ​​shared between branches Bi is defined by a lower bound equal to valref less a given percentage of the value valref, and an upper bound equal to valref plus a given percentage of this value valref.

[0078] As an alternative example, the range of values ​​shared between the branches Bi comprises only one value, namely the value valref. In this case, the CTRL2 circuit controls the conducting state of the components Ti so that the parameter is equal to the value valref in each of the branches Bi.

[0079] As another alternative example, the range of values ​​shared between the branches Bi extends from a zero value to the value valref, or from a zero value to the value valref plus a given percentage of that value valref.

[0080] Optionally, the upper bound and / or lower bound of the range of values ​​is partly determined by the value valref and, furthermore, partly determined by a minimum value and / or a maximum value that each of the cmdi signals can take.

[0081] The value valref can be a value predetermined by the desired operation of the DEV2 circuit. For example, in the case where the observed parameter is the current li in each branch, the value valref is determined by the current I that the component COMP2 must allow to flow between its terminals 100 and 102 when the components Ti are in the conducting state, and the value valref is, for example, equal to I / N.

[0082] Rather than being a predefined value, the valref value can be a calculated value, for example by the CTRL2 circuit, from the parameter values ​​measured in the Bi branches. For example, the valref value is equal to the average of the values ​​measured in the Bi branches. For example, when the measured parameter is the temperature in each Bi branch, and therefore in each Ti component, the valref value is determined by the average of the measured temperatures.

[0083] Preferably, when the parameter observed in each branch Bi increases when the on-state resistance of the branch component Ti decreases, for example following an increase in the temperature of the branch Bi, the CTRL2 circuit is configured to increase the on-state resistance of the branch component Ti when the value of the parameter measured for this branch Bi increases.

[0084] The implementation of the on-state resistance control of each component Ti by the CTRL2 circuit such that an observed parameter has, in each branch Bi and for a duration D where the component C0MP2 is conducting, a value within a range of values ​​common to all branches Bi, is within the reach of the person of the trade from the functional indications given above.

[0085] In the DEV2 device above, the modulation of the duration of the first state of each cmdi signal with respect to a duration D which is implemented by the CTRL2 circuit can be implemented at each duration D indicated by the ON signal.

[0086] Alternatively, the modulation of the duration of the first state of each cmdi signal with respect to a corresponding duration D is implemented by the CTRL2 circuit only for some of the durations D indicated by the ON signal.

[0087] Different ways of modulating the duration of the first state of a cmdi signal with respect to a corresponding duration D indicated by the ON signal can be envisaged.

[0088] According to one embodiment, the control circuit is configured, for a duration D, and for each branch Bi, to modulate the duration of the first state of the cmdi control signal of the component Ti of that branch Bi by periodically forcing the second state of the cmdi control signal for a given duration. Preferably, for a duration D, when a cmdi control signal is by default in its first state and is periodically forced to its second state for a given duration, this corresponds to pulse-width modulation (PWM), or, in other words, the given periodic duration of forcing the cmdi signal to its second state is determined by pulse-width modulation, for example, based on a difference between the value of the parameter measured in branch Bi and the valref value of the parameter.For example, the periodic duration of forcing the cmdi signal to its second state can be zero, for instance, when the difference between the measured parameter value in branch Bi and the valref value is below a threshold or is, for example, zero. As an example, the periodic duration of forcing the cmdi signal to its second state can be zero when the cmdi signal controls the Ti component of a branch Bi that is part of the subset of branches Bi where the CTRL2 circuit is configured to force zero modulation of the on-state duration of the Ti components in the subset with respect to each duration D.For example, at each duration D, when the periodic duration of forcing a cmdi signal to its second state is not zero, for example because the difference between the value of the parameter measured for branch Bi and the reference value exceeds a threshold, for example outside the range of values ​​in which we seek to maintain the parameter, the value of this periodic duration of forcing the cmdi signal to its second state is: - constant and fixed by the user; or . - is variable and determined by the difference between the value of the parameter measured for this branch Bi and the reference value, for example by using a lookup table between the values ​​of the difference and the values ​​of the periodic duration of forcing or using a control loop taking as input the value of the deviation and providing as output the value of the periodic forcing duration, such a control loop including, for example, a proportional-integral controller.

[0089] Figure 3 illustrates a control mode where, for each duration D indicated by the ON signal, in each branch Bi, the cmdi signal is by default in its first state and is periodically forced to its second state, for example, for a duration determined by pulse-width modulation. In this example, the ON signal is a binary signal in a first state to indicate a duration D, and in a second state to indicate that the COMP2 component should be in the blocked state.

[0090] More specifically, [Fig. 3] represents, in an example of a DEV2 device where N equals 2, the evolution of the ON signal and the cmdi signals, i.e., cmdl and cmd2 in this example. In this example, the ON signal is a binary signal. In this example, the first state, respectively the second state, of the ON signal controlling the on state, respectively the off state, of the COMP2 component is a high state, respectively a low state. In this example, for each cmdi signal, the first state, respectively the second state, controlling the Ti component to the on state, respectively to the off state, is the high state, respectively the low state, of the cmdi signal.

[0091] At time t0, the ON signal is in its second state (COMP2 blocked). The cmdi signals are therefore also in their second states (Ti blocked).

[0092] At an instant following tl, the ON signal switches to its first state (COMP2 passing) for a duration D. Each cmdi signal then switches to its first state (Ti passing).

[0093] In this example, the measured parameter is the current li in each branch Bi. Furthermore, in this example, at time tl, the current 12 in branch B2 is greater than the current II in branch Bl, which indicates that the on-state resistance Ron2 is lower than the resistance Ronl.

[0094] Thus, from time tl, the CTRL2 circuit periodically forces the cmd2 signal to its low state for a duration DI. As an example, in [Fig.3], the difference between the measured value of the current II and the reference value valref of the current li in each branch is such that, from time tl, the CTRL2 circuit periodically forces the cmdl signal to its second state for a duration which is zero, from which it follows that the cmdl signal remains in its first state. As an alternative example, in [Fig.3], the CTRL2 control circuit is configured so that, at each duration D, for each branch of a subset of branches B1 and B2, the modulation of the duration of the on-state of the component of that branch with respect to the duration D is zero, and only branch Bl is part of this subset in the example of [Fig.3], from which it follows that the cmdl signal remains in its first state for exactly each duration D.

[0095] This modulation of the duration of the first state of the cmdl and cmd2 signals continues throughout the duration D of the first state of the ON signal, until a time t2 after time t1, when the ON signal is switched to its second state. At time t3, the cmdi signals are therefore switched to their second states.

[0096] At a time following t3, the ON signal is again switched to its first state for a new duration D.

[0097] The operation from time t3 is then the same as that described between times t1 and t2.

[0098] Figure 4 illustrates, in more detail, what happens after time t3, during the duration D starting with time t3.

[0099] At a time t31 later than time t3, and taken during the duration D beginning at time t3, the signal ON is in its first state (COMP2 passing), and the signals cmdl and cmd2 are by default in their first state (Tl and T2 passing).

[0100] The current I in component COMP2 is then divided into two currents II and 12 in the respective branches B1 and B2. Since resistance Ron2 is lower than resistance Ronl, current 12 is greater than current II.

[0101] During this duration D, at a time t32 after time t31, the circuit forces the signal cmd2 to its second state during the duration DI ending at time t32. As a result, the current 12 becomes zero and the current II increases. The increase in current II causes the component T1 to heat up, and therefore the resistance Ronl to decrease. Conversely, since the current 12 is zero, the component T2 cools down, which leads to an increase in the resistance Ron2.

[0102] Thus, at time t33, when the cmd2 signal is switched to its first state and both components T1 and T2 are simultaneously conducting, the resistance Ron2 has increased compared to time t31, and the resistance Ronl has decreased compared to time t31. Due to thermal inertia, this increase in resistance Ron2 and this decrease in resistance Ronl continue until a subsequent time t34, marking the beginning of a new period DI. As resistance Ron2 increases and resistance Ronl decreases from time t33, current II decreases and current 12 increases, and the values ​​of currents II and 12 converge towards the value valref.

[0103] The operation described between times t32 and t33 is repeated between time t34 of the start of a new duration Dl, and a following time t35 of the end of this duration DI.

[0104] After time t35, the resistance Ronl decreased compared to time t34, and the resistance Ron2 increased compared to time t34. Due to thermal inertia, this increase in resistance Ron2 and this decrease in resistance Ronl continue after time t35, until time t36, when currents II and 12 both become equal to the value valref. As an example, the balancing between the branches the parameter whose value is measured in each branch Bi can be done more slowly than illustrated in [Fig.4], for example, spread over several periods D, for example because thermal time constants are much longer, for example at least ten times longer, than electrical time constants.

[0105] In the example described above in relation to Figures 3 and 4, the parameter whose value is measured in each branch Bi is the current li. However, a person skilled in the art will be able to adapt this example to the case where another parameter dependent on the on-state resistance Roni of the components is used, such as the temperature in each branch Bi.

[0106] Furthermore, a person skilled in the art is able to adapt the above example to cases where the ON signal is not a binary signal, but, for example, a signal indicating, for each duration D, a start and end time of that duration D or a signal indicating a duty cycle value when the COMP2 component is controlled in pulse width modulation.

[0107] According to another embodiment, the control circuit is configured, during each duration D of a plurality of durations D, for example periodic, and for each branch Bi, to modulate the duration of the first state of the cmdi control signal of the component Ti of this branch Bi by forcing the second state of the cmdi control signal for a given duration starting with this duration D and / or for another given duration ending with this duration D. Preferably, during each duration D, when a cmdi control signal is not forced to its second state, it is by default in its first state.For example, for each duration D, the duration for which a cmdi signal is forced to its second state at the beginning of duration D and / or the duration for which a cmdi signal is forced to its second state at the end of duration D are calculated (or determined) based on the difference between the value valref and a measured value vali, for example, during a previous duration D, and can be either zero or zero, for example, when this difference is below a threshold, or even zero. As an alternative or complementary example, the CTRL2 circuit is configured, for each duration D and for each branch Bi of a subset of branches Bi, so that the duration for which a cmdi signal is forced to its second state at the beginning of duration D and the duration for which a cmdi signal is forced to its second state at the end of duration D are zero.For example, at each duration D, when the duration for which a cmdi signal is forced to its second state at the beginning of the duration D is not zero, for example because the difference between the value of the parameter measured for branch Bi and the reference value exceeds a threshold, for example outside the range of values ​​in which we seek to maintain the parameter, the value of this duration for which the cmdi signal is forced to its second state at the beginning of the duration D is: . - constant and set by the user; or - is variable and determined by the difference between the value of the parameter measured for this branch Bi and the reference value, for example by using a lookup table between the values ​​of the difference and the values ​​of the duration for which the cmdi signal is forced to its second state at the beginning of the duration D, or by using a control loop taking as input the value of the difference and providing as output the value of the duration for which the cmdi signal is forced to its second state at the beginning of the duration D, such a control loop including, for example, a proportional-integral controller.For example, at each duration D, when the duration for which a cmdi signal is forced to its second state at the end of the duration D is not zero, for example because the difference between the value of the parameter measured for branch Bi and the reference value exceeds a threshold, for example outside the range of values ​​in which we seek to maintain the parameter, the value of this duration for which the cmdi signal is forced to its second state at the end of the duration D is: . - constant and set by the user; or - is variable and determined by the difference between the value of the parameter measured for this branch Bi and the reference value, for example by using a lookup table between the values ​​of the difference and the values ​​of the duration for which the cmdi signal is forced to its second state at the end of the duration D, or by using a control loop taking as input the value of the difference and providing as output the value of the duration for which the cmdi signal is forced to its second state at the end of the duration D, such a control loop including, for example, a proportional-integral controller.

[0108] This other embodiment is analogous to the implementation of adaptive dead times to delay the switching to the first state of a cmdi signal by the beginning of the duration D and / or to anticipate the switching to the second state of the cmdi signal with respect to the end of the duration D.

[0109] Fig. 5 illustrates a control mode where, during each of a plurality of durations D, preferably periodic, indicated by the ON signal, in each branch Bi, the cmdi signal is by default in its first state and is forced to its second for a duration beginning with the duration D, and for another duration ending with that duration D.

[0110] More specifically, [Fig. 5] represents, in an example of a DEV2 device where N is equal to 2, the evolution of the cmdi signals, i.e., cmdi and cmd2 in this example. In this example, for each cmdi signal, the first state, respectively the second state, controlling the component Ti to the conducting state, respectively to the blocking state, is the high state, respectively the low state, of the cmdi signal.

[0111] At time t0, the ON signal indicates that the COMP2 component must be controlled in the blocked state. The cmdi signals are therefore also in their second states (Ti blocked).

[0112] The ON signal further indicates that a duration D begins at a time following t1 and ends at a time t4.

[0113] In this example, the measured parameter is the current li in each branch Bi. Furthermore, in this example, at time tl, the last measurement(s) of the current li in the branches Bi, for example one or more measurements taken during one or more durations D prior to time tl, indicate a value val2 of the current 12 in branch B2 greater than the value vall of the current II in branch Bl, which indicates that the on-state resistance Ron2 is lower than the resistance Ronl.

[0114] In this example, starting at time t1, the CTRL2 circuit forces the cmd2 signal to its low state for a duration D2 ending at a later time t2. In this example, starting at time t1, the CTRL2 circuit forces the cmdl signal to its second state for a duration of zero in the example of [Fig. 5], and the cmdl signal therefore switches to its first state at time t1 corresponding to the beginning of the duration D. By way of example, this duration is zero because of the value of the difference between the measured value of the current II and the reference value valref of the current li in each branch, or because the branch Bl belongs to a subset of the branches Bl and B2 where, for each branch of the subset, the CTRL2 circuit imposes that the modulation of the on-state duration of the component of that branch with respect to the duration D is zero.

[0115] At time t2, the duration D2 ends, and the signal cmd2 switches to its first state.

[0116] Before time t4, at a time t3 between times t2 and t4, the circuit CTRL2 forces the signal cmd2 to its low state for a duration D2' ending at time t4, corresponding to the end of duration D. The duration D2' may be equal to the duration D2. Furthermore, at a time between times t2 and t4, the circuit CTRL2 forces the signal cmd2 to its second state for a duration ending at time t4, which is zero in the example of [Fig. 5].For example, this duration is zero because of the value of the difference between the measured value of the current II and the reference value valref of the current li in each branch, or because the branch Bl belongs to a subset of branches B1 and B2 where, for each branch of the subset, the CTRL2 circuit imposes that the modulation of the on-state duration of the component of that branch with respect to the duration D is zero.

[0117] At time t4, the cmdi signals that are not already in their second states are switched to their second states.

[0118] The ON signal further indicates that a new duration D begins at a time t5 after time t4. The operation described in relation to times t1 and t2 is repeated at the respective times t5 and t6, updating the modulations of the The durations of the on-states of components Ti relative to the duration D starting at time t5 are based on the values ​​vali, for example, measured during a duration D starting at time tl. For example, the CTRL2 circuit forces the cmd2 signal to its second state for a duration D2 starting at time t5 and ending at time t6; this duration D2 is updated relative to the duration D2 starting at time tl and can therefore be different from the duration D2 starting at time tl.

[0119] Fig. 6 illustrates, in more detail, what happens between a time t3' between times t2 and t3, and a t6' later than time t6.

[0120] Between times t3' and t3, the resistance Ronl is higher than the resistance Ron2, from which it follows that the current 12 is higher than the current II.

[0121] During the time interval D2' between times t3 and t4, the current 12 is zero because T2 is blocked, and the current II increases. The increase in current II causes the component T1 to heat up, and therefore the resistance Ronl to decrease. Conversely, since the current 12 is zero, the component T2 cools down.

[0122] Similarly, during the time interval D2 between times t5 and t6, the current 12 is zero because T2 is blocked, the current II increases, and the increase in the current II causes the component Tl to heat up, and therefore the resistance Ronl to decrease, while the component T2 cools down.

[0123] Thus, after time t6, for example at time t6', the resistance Ronl has a lower value than at time t3', and, conversely, the value of the resistance Ron2 is higher than at time t3'. It follows that, at time t6', the current II is higher than at time t3', and that the current 12 is lower than at time t3'. The currents II and 12 therefore have values ​​closer to each other at time t6' than at time t3'. In other words, the operation described between time t3' and time t6' allows the values ​​of the currents II and 12 to converge towards the value valref.

[0124] In the example described above with reference to Figures 5 and 6, the parameter whose value is measured in each branch Bi is the current Li. In such an example, the modulation of the duration of the first state of a cmdi signal with respect to a given duration D is based on the difference between the value Valref and one or more values ​​Vali measured during one or more previous durations D, at one or more instants when the component Ti is conducting. A person skilled in the art will be able to adapt this example to the case where another parameter dependent on the on-state resistance Roni of the components is used, such as the temperature in each branch Bi.Furthermore, in the case where the measured parameter is temperature, the modulation of the duration of the first state of a cmdi signal with respect to a given duration D can be based on the difference between the value valref and one or more values ​​vali measured at one or more times prior to this duration D, for example at one or more times. where the component Ti is conducting for one or more durations D prior to this given duration D.

[0125] As is obvious to a person skilled in the art from the above description, the embodiment described in relation to the example in Figures 5 and 6 can be implemented provided that the ON signal indicates several successive durations D separated in pairs by a duration D', whereby the COMP2 component must be controlled in the blocked state. For example, the ON signal indicates that the durations are periodic, for example, because the COMP2 component is controlled by pulse-width modulation.

[0126] The case where the durations D are periodic, for example because the COMP2 component is controlled by pulse-width modulation, is considered here. In this case, the embodiment where the duration of the first state of each cmdi signal is modulated periodically during each duration D (Figures 3 and 4) leads to a greater number of switching of the Ti components, and these switching is implemented at a higher frequency than the frequency of the durations D, compared to the embodiment where the first state of each cmdi signal is modulated only at the beginning and / or end of each duration D (Figures 5 and 6).Thus, the embodiment where modulation takes place only at the beginning and / or end of several durations D allows for a simpler, less power-consuming implementation, with lower aging of the Ti components, and with less electromagnetic emissions than the embodiment where the modulation of the cmdi signals is periodic during each of these several durations D.

[0127] Note that in other unillustrated embodiments, for each cmdi signal, the modulation of the duration of the first state of the cmdi signal during a duration D can be implemented differently, for example by providing that the CTRL2 circuit forces, during the duration D, the cmdi signal to its second state for a duration which starts late relative to the beginning of the duration D and ends early relative to the end of the duration D, for example for a duration which is substantially in the middle of the duration D.For example, at each duration D, when the duration for which a cmdi signal is forced to its second state during duration D is not zero, for example because the difference between the value of the parameter measured for branch Bi and the reference value exceeds a threshold, for example outside the range of values ​​in which we seek to maintain the parameter, the value of this duration for which the cmdi signal is forced to its second state is: - constant and fixed by the user; or - is variable and determined by the difference between the value of the parameter measured for this branch Bi and the reference value, for example using a lookup table between the values ​​of the difference and the values ​​of the duration for which. The cmdi signal is forced to its second state at the end of duration D, or by using a control loop that takes as input the value of the deviation and provides as output the value of the duration for which the cmdi signal is forced to its second state at the end of duration D. Such a control loop might include, for example, a proportional-integral controller. More generally, when a non-zero modulation is applied, for a duration D, to the duration of the first state of a cmdi signal that is then strictly less than duration D, the value of the modulation—that is, the duration(s) for which the cmdi signal is forced to its second state during duration D—is either constant and set by the user, or variable and determined by the deviation between the measured value of the parameter for branch Bi and the reference value of the parameter.

[0128] Various embodiments of a DEV2 device have been described. For example, the COMP2 component of this DEV2 device can be used in a more complex electronic system such as, for example, a voltage converter, an inverter, or a solid-state relay. For example, in an electronic system comprising the DEV2 device, the COMP2 component of the DEV2 device is used as a switch between its two terminals 100 and 102, the on or off state of this COMP2 switch being controlled by the ON signal.

[0129] According to one embodiment, the DEV2 device is implemented in an inverter and the COMP2 component corresponds to a switching switch of the inverter.

[0130] According to one embodiment, the DEV2 device implements a switching switch for an inverter, and each component Ti is: - a MOS transistor having a body diode connected in antiparallel between its conduction terminals (drain and source), that is to say that the body diode has its anode on the source side, or - a MOS transistor with a diode connected in antiparallel between its conduction terminals (drain and source), that is to say, the body diode has its anode on the source side, or - an insulated gate bipolar transistor (IGBT) having a diode connected in antiparallel between its conduction terminals (collector and emitter), that is to say that the diode has its anode on the emitter side, or - more generally, a current-bidirectional switch in the conducting state, but current-unidirectional in the blocking state, that is to say that the switch is configured to allow a non-zero current to pass between its conduction terminals, only in one direction, when this switch is controlled in the blocking state, for example via a freewheel diode of the switch.

[0131] By way of example, a current-biased, bidirectional switch in the on state and current-unidirectional in the blocked state is configured such that: - when the switch is in the on state, a positive current can flow from a first conductive terminal to a second conductive terminal of the switch, and from the second conductive terminal to the first conductive terminal of the switch; and - When the switch is in the closed state, a positive current can flow only from the first conductive terminal to the second conductive terminal, but not from the second conductive terminal to the first conductive terminal. For example, in such a switch, when a positive current flows from the first conductive terminal to the second conductive terminal, the resistance encountered by this current is lower when the switch is in the open state than when it is in the closed state.

[0132] By way of example, a current-biased switch in the on state and a current-biased switch in the off state can also be viewed as a switch that provides a current-biased and voltage-biased switching function. By way of example, a current-biased switch in the on state and a current-biased switch in the off state can also be viewed as a switch capable of conducting a reverse current even when controlled in the off state (in quadrant III).

[0133] In an embodiment where each component Ti is a bidirectional current switch in the conducting state and a unidirectional current switch in the blocked state, we consider the case where, at each duration D, the modulation of the first state of each cmdi signal is implemented by forcing this cmdi signal to its second state for a duration ending with this duration D. In this case, when the COMP2 component is controlled to the conducting state during the duration D and the current I between terminals 100 and 102 corresponds to a positive current flowing from the second terminals to the first conduction terminals of the switches Ti, when a component Ti is forced to the blocked state before the end of the duration D, all the current li that was flowing in the corresponding branch Bi is distributed among the other branches Bi where the switches Ti are still conducting.It follows that, at the end of the duration D, when the switches Ti, still controlled in the conducting state, switch from a conducting state command (cmdi in the first state) to a blocking state command (cmdi in the second state), these switches Ti take on the full switching constraints at the end of the duration D. Similarly, when the current I flowing between terminals 100 and 102 corresponds to a positive current flowing from the first terminals to the second conduction terminals of the switches Ti, and when a component Ti is forced to the blocking state before the end of the duration D, that is, when its cmdi signal switches to the second state controlling the blocking state of this switch Ti, all the current li that was flowing in the corresponding branch Bi is distributed among the other branches Bi where . The switches Ti are still conducting. Indeed, switches Ti controlled in the conducting state have a lower resistance than switches Ti controlled in the blocking state, even though these blocked switches Ti are capable of allowing a positive current to flow from their first terminals to their second terminals, for example via freewheeling diodes or diodes in the switch bodies. However, at the end of the duration D, when the switches Ti, still controlled in the conducting state, switch from a conducting state (cmdi in the first state) to a blocking state (cmdi in the second state), and all switches Ti end up controlled in the blocking state, the current I can continue to flow between terminals 100 and 102, and is distributed evenly between the branches Bi, and the switching stresses are distributed between the branches.In other words, at the end of duration D, when the switches Ti, still controlled in the conducting state, switch from a conducting state command (cmdi in the first state) to a blocking state command (cmdi in the second state), these switches do not alone experience the switching constraints; these constraints remain distributed among the branches Bi. For example, the current I will change sign (or become zero) and will no longer flow through the switches Ti, all controlled in the blocking state, when another switch (not shown) in series with the component COMP2 switches to the conducting state, for example, after a period starting with the end of duration D to avoid short-circuiting the ends of an arm of an inverter comprising the component COMP2 and this other switch.

[0134] What has just been described above for the case where, at each duration D, the modulation of the first state of each cmdi signal is implemented by forcing this cmdi signal to its second state for a duration ending with this duration D (for example the duration D2' for the cmd2 signal in figures 5 and 6) is also true in the case where, at each duration D, the modulation of the first state of each cmdi signal is implemented by forcing this cmdi signal to its second state for a duration beginning with this duration D (for example the duration D2 for the cmd2 signal in figures 5 and 6).

[0135] Thus, according to an embodiment where the DEV2 device implements a switching switch for an inverter and where each component Ti is a bidirectional current switch in the on state and a unidirectional current switch in the off state, that is to say, a switch configured, when controlled in the off state, to allow a positive current to flow only from its first conduction terminal to its second conduction terminal, the CTRL2 circuit is configured, during each duration D, and for each branch Bi, to modulate the duration of the first state of the cmdi control signal of the component Ti of branch Bi by forcing the second state of the cmdi signal for a duration starting with the duration D and / or by forcing the second state of the cmdi control signal for a second duration. ending with the duration D, only if the current I flowing between the two terminals 100 and 102 is a positive current flowing in a direction from the first conduction terminals to the second conduction terminals of the components Ti.

[0136] By way of example, in an inverter, the case where the current I flowing between terminals 100 and 102 of component COMP2 is a positive current flowing in the direction from the first to the second conduction terminals of switches Ti occurs during half of each period of the fundamental of the output signal of the inverter.Preferably, the embodiment in which the duration of the first state of the cmdi control signal of the component Ti of each branch Bi is modulated by forcing the second state of the cmdi signal for a duration beginning with the duration D and / or by forcing the second state of the cmdi control signal for a second duration ending with the duration D, only if the current I flowing between the two terminals 100 and 102 is a positive current flowing in a direction from the first to the second conduction terminals of the components Ti, is implemented if the period of the fundamental of the output signal of the inverter is less, for example ten times less, than the thermal time constant of the system.

[0137] Figure 7 shows an example of a more detailed embodiment of the CTRL2 circuit. In the example in Figure 7, N is equal to 2.

[0138] In this example, the CTRL2 circuit includes a CALC calculation circuit. The CALC calculation circuit receives the measurement signals vali of the parameter in each of the branches Bi, namely the signals vall and val2 in this example where N equals 2. Based on the measurements of the parameter in the branches Bi, the CALC circuit determines the difference between the value of the parameter in each of the branches Bi and the reference value valref of the parameter. In other words, from the vali signals, i.e., the measured values ​​of the parameter, the CALC circuit determines, or detects, whether there is a conduction asymmetry between the components Ti.

[0139] As an example, the CALC circuit can be configured to calculate the valref value from the measured values ​​of the parameter in the Bi branches.

[0140] For each branch Bi, the CALC circuit is configured to provide a control correction signal cmdicorr (cmdlcorr and cmd2corr in the example in [Fig. 7]). This cmdicorr signal indicates how, for a duration D specified by the ON signal, the cmdi signal should be forced to its second state so as to bring the parameter value in branch Bi back into the parameter value range shared by all branches Bi. In other words, the cmdicorr signal indicates how, for a duration D of the COMP2 component's on state, the duration of the first state of the cmdi signal should be modulated to reduce, or even eliminate, a conduction asymmetry between the Ti components.

[0141] By way of example, each cmdicorr signal can be a PWM type signal having a duty cycle determined from the difference between the value of the parameter measured in branch Bi and the value valref, or even from the differences between the values ​​of the parameter measured in branches Bi.

[0142] By way of another example, each cmdicorr signal may be a signal indicating a value of a duration during which, from the beginning of a duration D, the cmdi signal must be maintained in its second state and / or a value of a duration during which, until the end of a duration D, the cmdi signal must be maintained in its second state.

[0143] The CTRL2 circuit further includes, for each branch Bi, a CORRi circuit (CORR1 and CORR2 in the example in [Fig.7]). Each CORRi circuit is configured to receive the ON signal and the cmdicorr signal, and to provide the corresponding cmdi signal.

[0144] By way of example, when each cmdicorr signal is a PWM type signal and the ON signal is a binary signal, each CORRi circuit implements, when the ON signal is in its first state, an XOR function between the ON signal and the cmdi signal, and the cmdi signal is determined by the result of this boolean operation.

[0145] By way of another example, where each cmdicorr signal represents a switching dead time value, that is, a value representing a duration during which, from the beginning of a on-state duration D of component COMP2, the cmdi signal must be maintained in its second state and / or a value representing a duration during which, until the end of a on-state duration D of component COMP2, the cmdi signal must be maintained in its second state, each CORRi circuit can be implemented by a timer circuit. In this case, for example, the ON signal indicates a duty cycle value of the periodic duration D. This corresponds, for example, to a case where component COMP2 is controlled by pulse-width modulation.

[0146] In the embodiments and variants described above, each of the identical parallel branches Bi comprises only the semiconductor component Ti and the corresponding measurement circuit MESi. In variant embodiments not shown, each of the identical branches Bi may further comprise one or more other elements, for example connected in series with the component Ti, for example one or more resistors.

[0147] In the embodiments and variants described above, the semiconductor component Ti, having a forward resistance with a negative temperature coefficient, exhibits a forward-biased state and a reverse-biased state. The forward resistance of the component is then the resistance of the component Ti, taken between its two conduction terminals, when the component is switched on.

[0148] Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will become apparent to them. In particular, those skilled in the art can foresee other implementations of the CTRL2 circuit than that described in relation to [Fig. 7], based on the functional indications given above. Furthermore, this description is not limited to the examples of embodiments and variants described where N is equal to 2 or 3, but applies to any value of the number N greater than or equal to 3.Furthermore, the parameter whose value depends on the on-state resistance of the components Ti, which is evaluated in each branch Bi so as to maintain, by means of the cmdi signals, its value within a range of values ​​common to all branches, is not limited to the examples given where this parameter is the current li or the temperature in each branch Bi.

[0149] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Device (DEV2) comprising two terminals (100; 102) and identical branches (B1, B2, B3) connected in parallel between said two terminals, each branch comprising: - a semiconductor component (T1, T2, T3) having a control terminal configured to receive a binary control signal (cmd1, cmd2, cmd3) in a first binary state to control the conducting state of the component between the first and second conduction terminals of the component and in a second binary state to control the blocking state of the component between the first and second conduction terminals of the component, a resistance in the conducting state of the component having a negative coefficient of variation with temperature;- a measurement circuit (MES1, MES2, MES3) of a value of a parameter of said branch, in which the device further includes a control circuit (CTRL2) configured to: receive a first signal (ON) indicating one or more first durations (D) during which the device is to be controlled in the conducting state between its two terminals, receive the measured values ​​(vall, val2, val3), and during each first duration (D), to provide the component of each branch with the control signal in the first binary state for a duration modulated with respect to the first duration so as to maintain the value of the parameter of said branch in an identical range of values ​​for all branches.;

2. Device according to claim 1, wherein, in each branch (B1, B2, B3), during each first duration (D), the control circuit (CTRL2) is configured so that the modulated duration of the first state of the control signal (cmdl, cmd2, cdm3) of the component (T1, T2, T3) of the branch is less than or equal to the first duration.

3. Device according to claim 1 or 2, wherein, in each branch (B1, B2, B3), the value of the parameter is at least partly determined by the on-state resistance of the component (T1, T2, T3) of said branch.

4. Device according to any one of claims 1 to 3, wherein, in each branch (B1, B2, B3), the semiconductor component (T1, T2, T3) is in series with at least one other element, for example a resistor.

5. Device according to any one of claims 1 to 3, wherein each branch (B1, B2, B3) comprises only said component (T1, T2, T3) and the measuring circuit (MES1, MES2, MES3).

6. Device according to any one of claims 1 to 5, wherein the control circuit (CTRL2) is configured, for each branch (B1, B2, B3), during each first duration (D), to modulate the duration of the first state of the control signal (cmd1, cmd2, cmd3) of the branch independently of the control signals of the other branches.

7. Device according to any one of claims 1 to 6, wherein the control circuit (CTRL2) is configured, for each branch, and during each first duration (D), to decrease the duration of the first state of the control signal (cmdl, cmd2, cmd3) of the branch (Bl, B2, B3) relative to the first duration (D) when the value of the parameter measured for that branch is representative of a decrease in the on-state resistance of the component.

8. Device according to any one of claims 1 to 7, wherein said parameter is a current (II, 12, 13) flowing in the branch (B1, B2, B3), between the conduction terminals of the component (T1, T2, T3) of the branch, or a temperature of said branch (B1, B2, B3).

9. Device according to any one of claims 1 to 8, wherein the semiconductor is diamond.

10. Device according to any one of claims 1 to 9, wherein the component (T1, T2, T3) is a MOS transistor.

11. Device according to any one of claims 1 to 10, wherein the control circuit (CTRL2) is configured, at each first duration, so that, in each branch (Bl) of a subset of said branches (Bl, B2), the component (Tl) of said branch (Bl) is controlled to the conducting state for exactly said first duration (D).

12. A device according to any one of claims 1 to 11, wherein the control circuit (CTRL2) is configured, during each first duration (D), and for each branch (B1, B2, B3), to modulate the duration of the first state of the control signal (cmdl, cmd2, cmd3) of the component (Tl, T2, T3) of the branch by periodically forcing the second state of the control signal for a second duration (Dl), preferably according to pulse-width modulation.

13. Device according to any one of claims 1 to 10, wherein the control circuit (CTRL2) is configured, during each first duration (D), and for each branch (B1, B2, B3), to modulate the duration of the first state of the control signal (cmd1, cmd2, cmd3) of the component (T1, T2, T3) of the branch by forcing the second state of the control signal for a second duration (D2) beginning with the first duration (D) and / or by forcing the second state of the control signal for a third duration (D21) ending with the first duration (D).

14. Electronic system comprising a device (DEV2) according to any one of claims 1 to 13, wherein said branches (B1, B2, B3) implement, between said two terminals (100; 102), a system switch.

15. An inverter comprising a device according to claim 12, wherein: the device implements an inverter switching switch; in each branch (B1, B2, B3), the component (T1, T2, T3) is a switch configured to be current-bidirectional in the on state and to allow a positive current to flow only from a first conduction terminal of the component to a second conduction terminal of the component in the off state; the first signal (ON) indicates a plurality of first durations (D); and the control circuit (CTRL2) is configured, during each first duration (D), and for each branch (B1, B2, B3), such that the second duration (D2) and / or the third duration (D2) are non-zero, only if a current (I) flowing between the two terminals (100; 102) is a positive current flowing from the first terminals of conduction of the components towards the second conduction terminals of the components.

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