Processing memory access transactions

GB2632331APending Publication Date: 2025-02-05IMAGINATION TECH LTD
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Patent Information

Application Number
GB2023011973
Authority / Receiving Office
GB · GB
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-04
Publication Date
2025-02-05

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Abstract

A memory attribute structure comprises one or more memory address entries. Each memory address entry comprising a respective memory address range mapped to a respective priority level. The memory attribute table is used when processing a memory access transaction through an execution path of a processing system. During said processing S01, a memory address of the memory access transaction is determined S02. The memory attribute structure is used to determine a priority level mapped to the determined memory address S03, and the memory access transaction is processed based on the determined priority level S06.
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Citation Information

Patent Citations

  • Address Space priority arbitration

    US20020065867A1

  • Memory system and method for improving read latency of a high-priority partition

    US9323657B1