A structure of an electronic device

Abstract

A structure (200) for an electronic device, comprising: a patterned two dimensional material layer structure (Figure 1, 210') on a substrate (205); and a patterned dielectric layer (235") having (i) a

Claims

1. A structure for an electronic device, the structure comprising:a patterned two-dimensional material layer structure on a substrate; anda patterned dielectric layer having (i) a first portion which is on and / or over the substrate adjacent an edge of the two-dimensional material layer structure, and (ii) a second portion which extends from the first portion over the two-dimensional material layer structure, and makes resting contact with a surface of the two-dimensional material layer structure thereby defining a cavity between at least the dielectric layer and the two-dimensional material layer structure;wherein the dielectric layer has a thickness of less than 250 nm.

2. The structure according to claim 1, wherein the length of the second portion of the dielectric layer that is in contact with the surface of the two-dimensional material layer is at least 500 nm, preferably at least 1 pm.

3. The structure according to claim 1 or claim 2, wherein the dielectric layer has a thickness of at least 5 nm.

4. The structure according to any preceding claim, wherein the dielectric layer has a thickness of less than 150 nm, preferably less than 100 nm.

5. The structure according to any preceding claim, wherein the first portion of the dielectric layer is on the substrate and the second portion of the dielectric layer extends 20 to 200 nm in height above the surface of the two-dimensional material layer structure, preferably 50 to 150 nm, whereby the cavity is defined between the second portion of the dielectric layer and the two-dimensional material layer structure.

6. The structure according to any preceding claim, wherein the first portion is on a support layer and the support layer is on the substrate adjacent the edge of the two-dimensional material layer structure, the support layer having a thickness of from 20 to 200 nm, preferably 50 to 150 nm, whereby the cavity is defined between the support layer, the second portion of the dielectric layer and the two-dimensional material layer structure.

7. The structure according to claim 6, wherein the support layer is formed of metal.

8. The structure according to claim 7, wherein the metal comprises ruthenium, rhodium,palladium, silver, osmium, iridium, platinum and / or gold, preferably gold.

9. The structure according to any preceding claim, wherein the cavity has a width of from 100 nm to 1 pm, preferably from 200 nm to 800 nm.

10. The structure according to any preceding claim, wherein the dielectric layer is formed of an inorganic oxide or nitride, preferably silicon oxide, silicon nitride, aluminium oxide, aluminium nitride and / or hafnium oxide.

11. The structure according to any preceding claim, wherein the two-dimensional material layer structure is provided on a non-metallic surface of the substrate, preferably wherein the substrate is sapphire or a rare earth oxide on silicon.

12. The structure according to any preceding claim, wherein the two-dimensional material layer structure is a two-dimensional material monolayer.

13. The structure according to any preceding claim, wherein the patterned two-dimensional material layer structure is substantially rectangular.

14. The structure according to any preceding claim, wherein the first portion of the dielectric layer consists of one or more first sub-portions, each of the first sub-portions either on or over the substrate adjacent an edge of the two-dimensional material layer structure whereby the first portion completely surrounds all edges of the patterned two-dimensional material layer structure, and wherein the second portion of the dielectric layer consists of one or more corresponding second sub-portions whereby the second sub-portions define a window to an exposed surface of the two-dimensional material layer structure.

15. The structure according to claim 14, wherein the exposed surface of the two-dimensional material layer structure has an area of at least 100 pm2, preferably at least 1,000 pm2.

16. The structure according to claim 14 or claim 15, wherein at least two first sub-portions of the dielectric layer are each on corresponding sub-portions of a support layer, each of said sub-portions of the support layer being in the form of a metal contact on portions of the surface of, and adjacent opposite edges of, the two-dimensional material layer structure, and preferably wherein each metal contact extends onto adjacent portions of the surface of the substrate.

17. The structure according to claim 16, wherein a remainder of the first sub-portions of the dielectric layer are on the substrate each adjacent a remaining edge of the two-dimensional material layer structure.

18. The structure according to any of claims 14 to 17, wherein the exposed surface of the two-dimensional material layer structure is functionalised with an analyte-receptor, preferably a bioreceptor.

19. An electronic device comprising the structure according to any preceding claim, preferably wherein the electronic device is a biosensor comprising the structure according to claim 18.

20. A method for forming the structure according to any of claims 1 to 18, or the electronic device according to claim 19, the method comprising:(I) providing a layer structure comprising:(a) a substrate;(b) a co-patterned stack of a metal layer on a two-dimensional material layer structure on the substrate; and(c) a patterned dielectric layer having a thickness of less than 250 nm;wherein (i) a first portion of the patterned dielectric layer is on and / or over the substrate adjacent an edge of the co-patterned stack, and (ii) a second portion of the patterned dielectric layer extends from the first portion onto a portion of the stack by a distance of at least 1 pm; and(II) etching at least a portion of the metal layer to expose a surface of the two-dimensional material layer structure and to undercut the patterned dielectric layer by a distance of at least 1 pm.

21. The method according to claim 20, wherein the step of etching comprises wet-etching.

22. The method according to claim 20 or claim 21, wherein the metal layer consists essentially ofruthenium, rhodium, palladium, silver, osmium, iridium, platinum and / or gold, preferably gold.

23. The method according to any of claims 20 to 22, wherein providing the layer structure comprises depositing the metal layer on and across the two-dimensional material layer structure, and then patterning the two-dimensional material layer structure and the metal layer simultaneously to form the stack.

24. The method according to any of claims 20 to 23, wherein providing the layer structure comprises directly forming the two-dimensional material layer structure on the substrate by CVD.

25. The method according to any of claims 20 to 24 for forming the electronic device according to claim 19, the method further comprising functionalising the exposed surface of the two-dimensional material layer structure with an analyte-receptor.

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