A high image rejection and harmonic rejection low-IF receiver

Abstract

A radio-frequency receiver for converting an RF input signal to an intermediate-frequency (IF) output signal is disclosed. The receiver comprises a first filter 410, which may be a polyphase filter, c

Description

TECHNICAL FIELD The invention relates to a radio-frequency receiver for converting a radio-frequency input signal at an input to a intermediate-frequency output at an output. BACKGROUND ART In communications and electronic engineering applications, an intermediate frequency (IF) is a frequency to which a carrier wave is shifted as an intermediate step in transmission or reception of a signal. The intermediate frequency is created by mixing the carrier signal with a local oscillator signal, resulting in a superheterodyne radio receiver, in which an incoming signal is shifted to an IF for amplification before final detection is done. Conversion to an intermediate frequency is useful for several reasons. When several stages of filters are used, they can all be set to a fixed frequency, which makes them easier to build and to tune. There are two signals that can enter the intermediate-frequency stages. As shown in Figure 1a, the two signals 101 are a desired signal Wwant and an unwanted signal Wimg. Both the desired signal Wwant and the unwanted signal Wimg are reduced to the same intermediate-frequency. The unwanted signal Wimg that can enter the intermediate-frequency stages is known as an image signal. The image signal is a signal on a frequency that differs from the frequency to which a superheterodyne radio receiver is tuned (e.g. a station frequency) by twice the intermediate frequency. The image frequency results in two stations being received at the same time, thus producing interference. In order to eliminate the unwanted image signal, an in-phase / quadrature (l / Q) mixer is conventionally used along with a polyphase filter. An l / Q mixer comprises two mixers that each multiply the input signal with a local oscillator (LO) signal, but one being 90° phase-shifted. The signals produced by the multiplication of the LO are known respectively as the in-phase and quadrature signals, labelled as “I” and “Q”. When using the l / Q mixer and polyphase filter, the unwanted image signal can only be completely cancelled out if I and Q are perfectly orthogonal (i.e. exactly 90° out of phase). Thus, a perfect l-Q matching (i.e. same gain and phase 90°) is critical for the image problem in RF downconverters (or receivers), such that there is no l-Q imbalance problem. If the image response is not suppressed sufficiently, image signals can be received and interfere with the wanted signal on the required channel. Therefore, it is an important aspect of the radio-frequency (RF) design of the receiver to achieve a high image rejection. Figure 1b shows an existing double quadrature topology 100 to self-correct the l-Q imbalance problem. An RF input signal is firstly converted into a pair of signal waves 103 and 104 in quadrature phase (e.g. 90° out of phase) by a polyphase filter 110. The signal wave 103 is split into two signal waves 105a and 105b and the signal wave 104 is split into two signal waves 106a and 106b. The double quadrature topology 100 includes four mixers, namely mixer 120a, 120b, 120c and 120d. The signal wave 105a is multiplied with a wave generated from a local oscillator (e.g. cosa)ct) at the mixer 120a to form a resultant wave 107a; the signal wave 105b is multiplied with a wave generated from a local oscillator (e.g. sinMct) at the mixer 120b to form a resultant wave 107b; the signal wave 106a is multiplied with a wave generated from a local oscillator (e.g. sino)ct) at the mixer 120c to form a resultant wave 108a; and the signal wave 106b is multiplied with a wave generated from a local oscillator (e.g. cos<z>ct) at the mixer 120d to form a resultant wave 108b. The double quadrature topology 100 further comprises a summation circuit 130a and a summation circuit 130b. The summation circuit 130a is configured to combine the resultant wave 107a with the resultant wave 108a, and the summation circuit 130a is configured to combine the resultant wave 107b with the resultant wave 108b. Harmonic rejection is another down-conversion problem. As shown in Figure 2a, a RF signal 201a (e.g. denoted as xi(t)) is multiplied by a periodic waveform x2(t) = kcosa)2tt provided by a local oscillator (LO) to generate a signal 201b (e.g. denoted as xout(t)). In the frequency domain, this operation is equivalent to convolving the spectrum of xi(t) with that of X2(t), which contains a signal with a central frequency at w2. However, the LO spectrum is generally not a perfect sine wave but a square-like wave. Its high order harmonic components all contribute to this mixing process. As shown in Figure 2a the spectrum 202 of LO also appears at 3&j2 and 5o>2 which are the third-order harmonics and fifth-order harmonics of LO, respectively. As a result, RF signals at 3oj2+<w / f and at 5o)2+^if are converted by the third-order harmonics and fifth-order harmonics of LO, respectively, wherein g)if is an intermediate frequency. In this case, a harmonic-rejection mixer is used to cancel such RF signals that fall outside of the desired signal band. Figure 2b shows a conventional harmonic rejection mixer to solve this problem. Three mixers 211, 212 and 213 are used respectively. The mixer 211 is used to multiply the input signal 221 (RF) with the LO waveform, LOzO; the mixer 212 is used to multiply the input signal 222 (V2RF) with the LO waveform, LOz45; the mixer 213 is used to multiply the input signal 223 (RF) with the LO waveform, LOz90. The three resultant signal waves are subsequently combined by a summation circuit 230. Although as discussed above, the unwanted image signal can be eliminated and the harmonic problem can be solved individually, we have appreciated that there is a desire to provide a single configuration for a receiver to achieve both image rejection and harmonic rejection. SUMMARY OF THE INVENTION The invention is defined by the independent claims, to which reference should now be made. Advantageous features are set out in the dependent claims. According to a first aspect of the present invention, there is provided a radio-frequency receiver for converting a radio-frequency input signal at an input to an intermediate-frequency output at an output. The radio-frequency receiver comprises: a first filter configured to convert a radio-frequency input signal to at least two converted input signal waves, wherein the at least two converted input signal waves are in quadrature phase; a signal processing circuitry configured to process the at least two converted input signal waves to at least two intermediate-frequency output signal waves, wherein the at least two intermediate-frequency output signal waves are in quadrature phase, the signal processing circuity comprising a plurality of mixers wherein each mixer is configured to generate a mixer output by mixing a converted input signal wave of the at least two converted input signal waves with a processing waveform, and to combine the mixer outputs in a voltage mode; and a second filter configured to combine the at least two intermediate-frequency output signal waves to at least one processed intermediate-frequency output signal. Optionally, each of the at least two converted input signal waves is in a differentialsignal form. Optionally, each of the at least two intermediate-frequency output signals is in a differential-signal form. Further, the at least one processed intermediate-frequency output signal is in a differential-signal form. The radio-frequency receiver optionally further comprises a plurality of local oscillators, wherein each mixer of the plurality of mixers is configured to multiply a converted input signal with a processing waveform provided by a local oscillator of the plurality of local oscillators. Optionally, each mixer of the plurality of mixers is configured to multiply a converted input signal with three processing waveforms provided by three respective local oscillators. Optionally, the three processing waveforms provided by the three respective local oscillators at a first mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 0°, 45° and 90°, respectively; the three processing waveforms provided by the three respective local oscillators at a second mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 270°, 315° and 0°, respectively, the three waveforms provided by the three respective local oscillators at a third mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 90°, 135° and 180°, respectively, and the three waveforms provided by the three respective local oscillators at a fourth mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 0°, 45° and 90°, respectively. Optionally, the signal processing circuitry further comprises a plurality of buffering means wherein each buffering means is configured to receive a converted input signal wave and to form a low output impedance before each mixer. Further, the buffering means is a voltage amplifier. Optionally, each mixer of the plurality of mixers comprises a resistor circuit. Further, each resistor circuit of the plurality of resistor circuits comprises at least three resistors in parallel connection wherein a resistance ratio of the at least three resistors is V2:1: V2 and a each resistor is coupled with a switching means. The signal processing circuit of the radio-frequency receiver further optionally comprises a capacitor at each output of intermediate-frequency output signals. Optionally, the first filter is a polyphase filter. Further, the second filter is a polyphase filter. The radio-frequency receiver further comprises a low-noise amplifier configured to amplify the input signal wave. According to a second aspect of the present invention, there is provided a method for converting a radio-frequency input signal to an intermediate-frequency output signal at a radio-frequency receiver. The method comprises: converting, by a first filter, the radiofrequency input signal to at least two converted input signal waves, wherein the at least two converted input signal waves are in quadrature phase; processing, by a signal processing circuitry, the at least two converted input signal waves to at least two intermediate-frequency output signal waves, wherein of the at least two intermediate-frequency output signal waves are in quadrature phase, and wherein the processing comprising: generating a mixer output by mixing, by each of a plurality of mixers, a converted input signal wave of the at least two converted input signal waves with a processing waveform, and combining the mixer outputs in a voltage mode; and combining, by a second filter, the at least two intermediate-frequency output signal waves to at least one processed intermediate-frequency output signal. BRIEF DESCRIPTION OF THE DRAWINGS Embodiments of the invention will now be described by way of example and in relation to the accompanying drawings, in which: Figure 1a is a schematic illustration of an image-signal problem in a radio-frequency receiver; Figure 1b is a schematic circuit diagram of a conventional method for image rejection; Figure 2a is a schematic illustration of a harmonic mixing problem in a radio-frequency receiver; Figure 2b is a schematic circuit diagram of a conventional method for harmonic rejection; Figure 3 is a schematic circuit diagram of a radio-frequency receiver 300 according to an aspect of the present invention; Figure 4 is a schematic circuit diagram of a radio-frequency receiver 400 according to an aspect of the present invention; Figure 5a shows a mixer 510 and its equivalent resistor circuit 520 according to an aspect of the present invention; Figure 5b shows a circuit connection among four mixers according to an aspect of the present invention; Figure 6 shows a circuit unit 610 including a mixer coupled with an amplifier and its equivalent circuit diagrams including sub-circuits 620, 630 and 640 according to an aspect of the present invention. DETAILED DESCRIPTION Figure 3 shows a radio-frequency (RF) receiver 300 that is able to both eliminate unwanted image signals in the input signal and solve the harmonic problem The receiver 300 comprises a first filter 310 at an input port of the receiver 300, a signal processing circuit 320 coupled to the filter 310 and a second filter 330 at an output port of the receiver 300. The first filter 310 is configured to convert a RF input signal to at least two converted input signal waves in quadrature phase. This means that the at least two converted input signal waves are in 90° out of phase to each other, including an in-phase signal wave and a quadrature signal wave. In some embodiments, the at least two converted input signal waves are both in a differential-signal form, in which each converted input voltage signal is transmitted using two complementary signals. The two complementary signals may have equal amplitude and opposite polarity relative to a common-mode voltage. The first filter 310 may be a polyphase filter. The signal processing circuitry 320 is configured to process the at least two converted input signal waves to at least two corresponding intermediate-frequency (IF) output signal waves, wherein the at least two IF output signal waves are in quadrature phase including an in-phase signal wave and a quadrature signal wave. In addition, the at least two IF output signal waves are in differentialsignal form. The second filter 330 is then configured to cancel the unwanted image signal and combine the two IF output signals which are in quadrature phase to a single processed IF output signal. The processed IF output signal may also be in a differential-signal form. As shown in Figure 3, an input RF signal 301 is received by the receiver 300 at an input port. In some embodiments, the receiver 300 includes a low-noise amplifier 340 at the front-end of the receiver circuit 300 to amplify a relatively low-power input signal without significantly degrading its signal-to-noise ratio. The input RF signal 301 is converted by the filter 310 to at least two RF input signals 302a and 302b. The two RF input signals are in quadrature phase, namely an in-phase signal and a quadrature signal. In some embodiments, each of the two RF input signals 302a and 302b is in a differential-signal form. The two RF input signals 302a and 302b are subsequently processed by the signal processing circuitry 320 in which the two RF input signals 302a and 302b are converted to two corresponding intermediate-frequency (IF) output signals 303a and 303b. The two IF output signals 303a and 303b are in quadrature phase. In some embodiments, each of the two IF output signals 303a and 303b is in a differential-signal form. The second filter 330 then receives the two IF output signals 303a and 303b and is configured to cancel the unwanted image signal and combine the two IF output signals to a processed single phase IF output signal 304 at an output port of the receiver 300. In some embodiments, the processed IF output signal 304 may also be in a differential-signal form. Figure 4 shows a schematic circuit diagram of a RF receiver 400 of the present invention. The RF receiver 400 comprises a first filter 410 at an input port of the receiver 400, a signal processing circuitry 420 coupled to the filter 410 and a second filter 430 at an output port of the receiver 400. The first filter 410 is configured to convert a RF input signal to at least two pairs of converted input signal waves in quadrature phase. This means that the at least two converted input signal waves are in 90° out of phase to each other, including an in-phase signal wave and a quadrature signal wave. The first filter 410 may be a polyphase quadrature filter. A polyphase quadrature filter is a filter which can generate the in-phase and quadrature signal waves from a single phase input signal. In some embodiments, each of the at least two converted input signal waves is in a differential-signal form. The signal processing circuitry 420 is configured to process the two converted input signal waves to at least two corresponding intermediate-frequency (IF) output signal waves. The two IF output signals are in a quadrature phase to each other The second filter 430 is then used to cancel the unwanted image signal and combine the two IF output signals to a single phase processed IF output signal. In some embodiments, the processed IF output signal wave is also in a differential-signal form. As shown in Figure 4, an input RF signal 401 is received by the receiver 400 at an input port. In some embodiments, the receiver 400 includes a low-noise amplifier 440 at the front-end of the receiver circuit 400 to amplify a relatively low-power input signal without significantly degrading its signal-to-noise ratio. The input RF signal 401 is converted into two RF input signals 402a and 402b by the filter 410, wherein the two RF input signals 402a and 402b are in quadrature phase. The two converted RF input signals 402a and 402b are subsequently processed by the signal processing circuitry 420 in which the two RF input signals 402a and 402b are converted to two intermediate-frequency (IF) output signals, namely IF output signals 403a and 403b. The IF output signals 403a and 403b are in quadrature phase to each other. The second filter 430 then receives the two IF output signals 403a and 403b, and converts them to a single-phase processed IF output signal 404 at an output port of the receiver 400. In some embodiments, the processed IF output signal 404 may also be in a differential-signal form. The signal processing circuitry 420 comprises a plurality of mixers wherein each converted input signal wave of the at least two converted input signal waves is processed by two mixers. Each mixer is configured to mix the corresponding converted input signal with a processing waveform. As shown in Figure 4, the signal processing circuitry 420 comprises four mixers, namely mixers 421a, 421b, 421c, and 421d. The mixers 421a and 421b are configured to receive the converted RF input signal 402a, and the mixers 421c and 421d are configured to receive the converted RF input signal 402b. Each mixer is configured to multiply a processing waveform with the corresponding RF input signal. In some embodiments, the processing waveform is provided by a plurality of local oscillators (LO) at each mixer. As shown in Figure 4, the mixer 421a is coupled with three LOs including LOo, LO45 and LO90, wherein LOo represents an oscillator providing a waveform having a wave with a phase shift of 0° phase shift, LO45 represents an oscillator providing a waveform having a wave with a phase shift of 45°, and LO90 represents an oscillator providing a waveform having a wave with a phase shift of 90°. The mixer 421 d is also coupled with LOo, LO45 and LO90. The mixer 421b is coupled with three LOs including LO270, LO315 and LOo, wherein LO270 represents an oscillator providing a waveform having a wave with a phase shift of 270°, LO315 represents an oscillator providing a waveform having a wave with a phase shift of 315°, and LOo represents an oscillator providing a waveform having a wave with a phase shift of 0°. The mixer 421c is coupled with LO90, LO135 and LOiso, wherein LO90 represents an oscillator providing a waveform having a wave with a phase shift of 90°, LO135 represents an oscillator providing a waveform having a wave with a phase shift of 135°, and LOiso represents an oscillator providing a waveform having a wave with a phase shift of 180°. The mixer 421d is coupled with three LOs including LOo, LO45 and LOgo- A frequency synthesizer is used to provide the required different phase frequencies for the LOs as described above. In order to do so, the frequency synthesizer is configured to operate at four times of the required frequency and a frequency divider is used to take in the waveform of four times of the required frequency and divide the frequency by 4. Figure 5a shows a mixer 520 which can be used as any mixer of the plurality of mixers 510 in the signal processing circuitry 420. The resistor circuit 520 includes at least three resistors, namely resistors 521, 522 and 523. The three resistors are arranged in a parallel connection to each other. Each of the three resistors is in series with a switching means 531, 532, and 533, such as a transistor. The switching means is a transistor wherein the gate of the transistor is controlled by a local oscillator. As shown in Figure 5a, the resistor 521 is in series with a transistor 531 wherein the gate of the transistor 531 is controlled by a local oscillator LOo; the resistor 522 is in series with a transistor 532 wherein the gate of the transistor 532 is controlled by a local oscillator LO45; and the resistor 523 is in series with a transistor 533 wherein the gate of the transistor 533 is controlled by a local oscillator LO90. In some embodiments, the ratio of resistance of the three resistors 521, 522 and 523 is - / 2:1: V2.This is to form a 1: / 2:1 mixer conversion gain which provides an optimised harmonic rejection. Such resistance matching provides a better harmonic rejection than other generator-type harmonic mixers. Figure 5b shows a schematic circuit diagram 540 of the connection among four of the mixers shown in Figure 5a. Referring back to Figure 4, the signal processing circuitry 420 of the RF receiver 400 may also include two buffer means for each RF input signal to form low output impedance before each RF input signal is received by each mixer. As shown in Figure 4, two voltage amplifiers 431a and 431b are provided between the first filter 410 and the four mixers 421a, 421b, 421c, and 421 d. Each voltage amplifier is configured like a unit-gain operational amplifier (OPAMP) buffer, such that the non-inverting input of the amplifier is configured to couple to an input port of a converted input signal wave of the at least two converted input signal waves, the inverting input of the amplifier is configured to couple to an output of the voltage amplifier and the output of the voltage amplifier is coupled to two mixers of the plurality of mixers. In detail, the voltage amplifier 431a is coupled to the mixer 421a, forming a first processing unit, and the voltage amplifier 431 a is also coupled to the mixer 421b, forming a second processing unit. The voltage amplifier 431b is coupled to the mixer 421c, forming a third processing unit, and the voltage amplifier 431b is also coupled to the mixer 421 d, forming a fourth processing unit. The converted input signal 402a is coupled to the first and second processing units and the converted input signal 402b is coupled to the third and fourth processing units. The processed signal waves after the mixers are combined to form IF output signals in a direct voltage mode. As shown in Figure 4, the signal wave processed from the first set of processing unit is combined with the signal wave processed from the third set of processing unit, forming an IF output signal 403a, and the signal wave processed from the second set of processing unit is combined with the signal wave processed from the fourth set of processing unit, forming an IF output signal 403b. The IF output signals 403a and 403b are in quadrature phase to each other. The filter 430 is therefore configured to cancel the unwanted image signal and combine the IF output signals 403a and 403b to form a processed single phase IF output signal 404at the output port of the RF receiver 400. Figure 6 shows a circuit unit 610 including an amplifier 617 coupled with a mixer and an equivalent circuit diagram including a sub-circuit 620, a sub-circuit 630, and a sub-circuit 640. Similar to the resistor circuit 520 shown in Figure 5a, the mixer of the circuit unit 610 includes three resistors in parallel connection namely resistors 611, 612 and 613, with resistances in a ratio of V2:1: V2. Resistors 611,612 and 613 are respectively in series with transistors 614, 615 and 616. The gate of each transistor is controlled by a LO. The gate of transistor 614 is controlled by a LO generating a signal wave with 0° phase shift (denoted as LOo); the gate of transistor 615 is controlled by a LO generating a signal wave with a 45° phase shift (denoted as LO45); the gate of transistor 616 is controlled by a LO generating a signal wave with a 90° phase shift (denoted as LO90). The equivalent circuit of the resistor 611 in series with the transistor 614 is an impedance 621 of V2Z; the equivalent circuit of the resistor 612 in series with the transistor 615 is an impedance 622 of Z; and the equivalent circuit of the resistor 613 in series with the transistor 616 is an impedance 623 of V2Z. The resultant equivalent circuit of the circuit unit 610 is shown in Figure 6 which is a combination of the sub-circuits 620, 630 and 640. This achieves a direct voltage mode connecting at the mixer output to form signal superposition without additional summation circuit. When an input RF voltage signal is input to the circuit unit 610, RF voltage signal is firstly amplified by the amplifier 617 and split into three branches of the circuit unit 610 namely a first branch comprising the resistor 611 in series with the transistor 614 controlled by LOo, a second branch comprising the resistor 612 in series with the transistor 615 controlled by LO45, and a third branch comprising the resistor 613 in series with the transistor 616 controlled by LO90. The RF voltage signal is input to each branch of the three branches, respectively. Due to superimposed characteristics of the overall circuit 610, the overall circuit 610 can be split into three sub-circuits, namely sub-circuits 620, 630, and 640. The configuration of the sub-circuit 620 means that RF signal is processed by LOo, and no signal is processed by LO45 and LO90. Due to low impedance characteristics at the amplifier 617, the input of the second and third branches can be viewed as a ground for alternating current (AC). Similarly, the configuration of the sub-circuit 630 means that RF signal is processed by LO45, and no signal is processed by LOo and LO90. Due to low impedance characteristics at the amplifier 617, the input of the first and third branches can be viewed as an AC ground, and the configuration of sub-circuit 640 means that the RF signal is processed by LO90, and no signal is processed by LOo and LO45. Due to low impedance characteristics at the amplifier 617, the input of the second and third branches can be viewed as an AC ground. Therefore, the overall circuit of the circuit unit 610 is the summation of the equivalent sub-circuits 620, 630 and 640. An overall output is therefore the summation of the components of the subcircuits 620, 630 and 640 (e.g. V01+V02+V03, wherein V01 is an equivalent voltage component of the sub-circuit 620, V02 is an equivalent voltage component of the sub-circuit 630, and V03 is an equivalent voltage component of the sub-circuit 640). Since the resistances in a ratio of V2:1: V2, the output signal V01, V02, and V03 have a ratio of 1: V2:1, the overall summation cancels the harmonic component in this voltage mode. This circuit configuration is repeated for each circuit unit for each mixer. By using such a circuit configuration, there is no need to use additional summation circuit anymore, which efficiently cancels the harmonic components in the voltage mode. Referring back to Figure 4, the RF receiver 400 further comprises a capacitor at each IF output node of the signal processing circuit 420. The capacitor at each IF output means that each IF output node provides a high impedance for the wanted signal band, hence making the processing unit operate as a harmonic-rejection mixer under a direct voltage mode as described above. In some embodiments, the second filter 430 of the RF receiver 400 is a polyphase filter. The polyphase filter is configured to rotate the quadrature signal and reject the image part down-converted signal and pass the wanted signal only. Although described separately, the features of the embodiments outlined above may be combined in different ways where appropriate. Various modifications to the embodiments described above are possible and will occur to those skilled in the art without departing from the scope of the invention which is defined by the following claims.

Claims

1. A radio-frequency receiver for converting a radio-frequency input signal at an input to an intermediate-frequency output at an output, the receiver comprising:a first filter configured to convert a radio-frequency input signal to at least two converted input signal waves, wherein the at least two converted input signal waves are in quadrature phase;a signal processing circuitry configured to process the at least two converted input signal waves to at least two intermediate-frequency output signal waves, wherein the at least two intermediate-frequency output signal waves are in quadrature phase, the signal processing circuity comprising a plurality of mixers wherein each mixer is configured to generate a mixer output by mixing a converted input signal wave of the at least two converted input signal waves with a processing waveform, and to combine the mixer outputs in a voltage mode; anda second filter configured to combine the at least two intermediate-frequency output signal waves to at least one processed intermediate-frequency output signal.

2. The radio-frequency receiver according to claim 1, wherein each of the at least two converted input signal waves is in a differential-signal form.

3. The radio-frequency receiver according to claim 1 or 2, wherein each of the at least two intermediate-frequency output signals is in a differential-signal form.

4. The radio-frequency receiver according to any preceding claim, wherein the at least one processed intermediate-frequency output signal is in a differential-signal form.

5. The radio-frequency receiver according to any preceding claim, further comprising a plurality of local oscillators, wherein each mixer of the plurality of mixers is configured to multiply a converted input signal with a processing waveform provided by a local oscillator of the plurality of local oscillators.

6. The radio-frequency receiver according to claim 5, wherein each mixer of the plurality of mixers is configured to multiply a converted input signal with three processing waveforms provided by three respective local oscillators.

7. The radio-frequency receiver according to claim 6, whereinthe three processing waveforms provided by the three respective local oscillators at a first mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 0°, 45° and 90°, respectively;the three processing waveforms provided by the three respective local oscillators at a second mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 270°, 315° and 0°, respectively;the three waveforms provided by the three respective local oscillators at a third mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 90°, 135° and 180°, respectively; andthe three waveforms provided by the three respective local oscillators at a third mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 0°, 45° and 90°, respectively.

8. The radio-frequency receiver according to any preceding claim, wherein the signal processing circuitry further comprises a plurality of buffering means wherein each buffering means is configured to receive a converted input signal wave and to form a low output impedance before each mixer.

9. The radio-frequency receiver according to claim 8, wherein the buffering means is a voltage amplifier.

10. The radio-frequency receiver according to any preceding claim, wherein each mixer of the plurality of mixers comprises a resistor circuit.

11. The radio-frequency receiver according to claim 10, wherein each resistor circuit of the plurality of resistor circuits comprises at least three resistors in parallel connection wherein a resistance ratio of the at least three resistors is ^2:1: V2 and a each resistor is coupled with a switching means.

12. The radio-frequency receiver according to any preceding claim, wherein the signal processing circuit further comprising a capacitor at each output of intermediatefrequency output signals.

13. The radio-frequency receiver according to any preceding claim, wherein the first filter is a polyphase filter.

14. The radio-frequency receiver according to any preceding claim, wherein the second filter is a polyphase filter.

15. The radio-frequency receiver according to any preceding claim, wherein the receiver further comprises a low-noise amplifier configured to amplify the input signal wave.

16. A method for converting a radio-frequency input signal to an intermediate-frequency output signal at a radio-frequency receiver, the method comprising:converting, by a first filter, the radio-frequency input signal to at least two converted input signal waves, wherein the at least two converted input signal waves are in quadrature phase;processing, by a signal processing circuitry, the at least two converted input signal waves to at least two intermediate-frequency output signal waves, wherein of the at least two intermediate-frequency output signal waves are in quadrature phase, and wherein the processing comprising: generating a mixer output by mixing, by each of a plurality of mixers, a converted input signal wave of the at least two converted input signal waves with a processing waveform, and combining the mixer outputs in a voltage mode; andcombining, by a second filter, the at least two intermediate-frequency output signal waves to at least one processed intermediate-frequency output signal.05 06 25AMENDMENTS TO THE CLAIMS HAVE BEEN FILED AS FOLLOWS:CLAIMS1. A radio-frequency receiver for converting a radio-frequency input signal at an input to an intermediate-frequency output at an output, the receiver comprising:5 a first filter configured to convert a radio-frequency input signal to at least twoconverted input signal waves, wherein the at least two converted input signal waves are in quadrature phase;a signal processing circuitry configured to process the at least two converted input signal waves to at least two intermediate-frequency output signal waves,10 wherein the at least two intermediate-frequency output signal waves are inquadrature phase, the signal processing circuity comprising:a plurality of mixers, wherein each mixer is configured to generate a mixer output by mixing a converted input signal wave of the at least two converted input signal waves with a processing waveform, and to combine the mixer outputs in a15 voltage mode, and wherein each mixer comprises a resistor circuit, and each resistorcircuit of the plurality of resistor circuits comprises at least three resistors in parallel connection wherein a resistance ratio of the at least three resistors is 72:1: 72 and each resistor is coupled with a switching means;a plurality of buffering means coupled with each respective mixer, wherein20 each buffering means is configured to receive a converted input signal wave and toform a low output impedance before each mixer; anda second filter configured to combine the at least two intermediate-frequency output signal waves to at least one processed intermediate-frequency output signal.25 2. The radio-frequency receiver according to claim 1, wherein each of the at least twoconverted input signal waves is in a differential-signal form.

3. The radio-frequency receiver according to claim 1 or 2, wherein each of the at least two intermediate-frequency output signals is in a differential-signal form.

304. The radio-frequency receiver according to any preceding claim, wherein the at least one processed intermediate-frequency output signal is in a differential-signal form.

5. The radio-frequency receiver according to any preceding claim, further comprising a 35 plurality of local oscillators, wherein each mixer of the plurality of mixers is configured05 06 25to multiply a converted input signal with a processing waveform provided by a local oscillator of the plurality of local oscillators.

6. The radio-frequency receiver according to claim 5, wherein each mixer of the plurality 5 of mixers is configured to multiply a converted input signal with three processingwaveforms provided by three respective local oscillators.

7. The radio-frequency receiver according to claim 6, whereinthe three processing waveforms provided by the three respective local10 oscillators at a first mixer of the plurality of mixers coupled to each converted inputsignal wave have a phase difference of 0°, 45° and 90°, respectively;the three processing waveforms provided by the three respective local oscillators at a second mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 270°, 315° and 0°, respectively;15 the three waveforms provided by the three respective local oscillators at athird mixer of the plurality of mixers coupled to each converted input signal wave have a phase difference of 90°, 135° and 180°, respectively; andthe three waveforms provided by the three respective local oscillators at a third mixer of the plurality of mixers coupled to each converted input signal wave20 have a phase difference of 0°, 45° and 90°, respectively.

8. The radio-frequency receiver according to claim 1, wherein the buffering means is a voltage amplifier.25 9. The radio-frequency receiver according to any preceding claim, wherein the signalprocessing circuit further comprising a capacitor at each output of intermediatefrequency output signals.

10. The radio-frequency receiver according to any preceding claim, wherein the first filter 30 is a polyphase filter.

11. The radio-frequency receiver according to any preceding claim, wherein the second filter is a polyphase filter.35 12. The radio-frequency receiver according to any preceding claim, wherein the receiverfurther comprises a low-noise amplifier configured to amplify the input signal wave.

13. A method for converting a radio-frequency input signal to an intermediate-frequency output signal at a radio-frequency receiver, the method comprising:converting, by a first filter, the radio-frequency input signal to at least two converted input signal waves, wherein the at least two converted input signal waves5 are in quadrature phase;processing, by a signal processing circuitry, the at least two converted input signal waves to at least two intermediate-frequency output signal waves, wherein of the at least two intermediate-frequency output signal waves are in quadrature phase, and wherein the processing comprising: generating a mixer output by mixing, by10 each of a plurality of mixers, a converted input signal wave of the at least twoconverted input signal waves with a processing waveform, and combining the mixer outputs in a voltage mode,wherein each mixer of the plurality of mixers comprises a resistor circuit, and each resistor circuit of the plurality of resistor circuits comprises at least three15 resistors in parallel connection wherein a resistance ratio of the at least threeresistors is V2:1: V2 and each resistor is coupled with a switching means;a plurality of buffering means coupled with each respective mixer wherein each buffering means is configured to receive a converted input signal wave and to form a low output impedance before each mixer; and20 combining, by a second filter, the at least two intermediate-frequency outputsignal waves to at least one processed intermediate-frequency output signal.05 06 252535

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