Data transmission method based on cloud service system, and cloud service system

Abstract

The invention discloses a data transmission method based on a cloud service system and the cloud service system, which can improve the data transmission speed and further improve the processing efficiency of tasks associated with data. The method comprises the following steps: when a first processor of a first computing node needs to send data to a second processor of a second computing node, the first processor of the first computing node can directly write the data into a first memory area distributed to the first processor in a first host machine; and writing the first instruction into a second memory area of the first host machine. The first host opportunity polls the second memory area, so that the first host opportunity can determine that the data is stored in the first memory area based on the polled second instruction. If so, the first host machine may notify a first SDI card of the first computing node to read the data from the allocated first memory region to send the data to a second processor of the second computing node.

Description

(19) State Intellectual Property Office (12) Invention Patent Application (10) Application Publication Number (43) Application Publication Date (21) Application Number 202410799293.8 (22) Application Date 2024.06.19 (66) Domestic Priority Data 202410650705.1 2024.05.21 CN (71) Applicant Huawei Cloud Computing Technology Co., Ltd. Address 550025, Guizhou Province, Guiyang City, Gui'an New District, Qianzhong Avenue, Xinggong Road, Huawei Cloud Data Center (72) Inventors Ouyang Changchun, Li Xiao, Gong Lei, Gong Siquan (74) Patent Agency Shenzhen Shenjia Intellectual Property Agency (General Partnership) 44285 Patent Attorney Chen Songhao (51) Int.Cl. G06F 12 / 02 (2006.01) G06F 9 / 50 (2006.01) (54) Invention Title: A Data Transmission Method and Cloud Service System Based on a Cloud Service System (57) Abstract: This application discloses a data transmission method and a cloud service system based on a cloud service system, which can improve the speed of data transmission and thus improve the processing efficiency of data-related tasks. The method of this application includes: when the first processor of the first computing node needs to send data to the second processor of the second computing node, the first processor of the first computing node can directly write the data into the first memory area allocated to the first processor in the first host machine, and write the first instruction into the second memory area of ​​the first host machine. Since the first host machine polls the second memory area, it can determine that the first memory area stores the data based on the second instruction obtained from the polling. Then, the first host machine can notify the first SDI card of the first computing node to read the data from the first memory area allocated to it, so as to send the data to the second processor of the second computing node. Claims 4 pages, Description 18 pages, Drawings 8 pages, CN 120994574 A 2025.11.21 CN 1 20 99 45 74 A 1. A data transmission method based on a cloud service system, characterized in that the cloud service system includes infrastructure providing cloud services, the infrastructure includes a first computing node and a second computing node, the first computing node includes a first host machine, a first processor, and a first software-defined infrastructure (SDI) card, the method comprising: the first processor writing data to be transmitted into a first memory area of ​​the first host machine, and writing a first instruction into a second memory area of ​​the first host machine, the first memory area being a memory area allocated by the first host machine to the first processor; the first host machine polling the second memory area to determine, based on the first instruction obtained from the polling, that the first memory area stores the data; the first host machine notifying the first SDI card to read the data from the first memory area;The first SDI card sends the data to the second computing node. 2. The method according to claim 1, wherein the first processor writes the data to be transmitted into the first memory region of the first host machine, comprising: the first processor generating the data to be transmitted and storing the data in a third memory region of the first processor; the first processor copying the data from the third memory region to the first memory region based on the address of the third memory region and the address of the first memory region of the first host machine. 3. The method according to claim 1 or 2, characterized in that the second computing node includes a second host, a second processor, and a second SDI card, wherein the first host notifies the first SDI card to read the data from the first memory region, and the first SDI card sending the data to the second computing node includes: the first host obtaining from a first mapping table the addresses of mutually bound third memory regions, the address of the first memory region, the address of the first SDI card, the address of the second SDI card, and the address of a fourth memory region of the second host, wherein the fourth memory region is a memory region allocated by the second host to the second processor; the first host providing the first SDI card with the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region based on the address of the first SDI card; the first SDI card reading the data from the first memory region based on the address of the first memory region; and the first SDI card sending the data and the address of the fourth memory region to the second SDI card based on the address of the second SDI card, wherein the address of the fourth memory region is used by the second SDI card to write the data into the fourth memory region. 4. The method according to claim 3, wherein the first host machine provides the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region to the first SDI card based on the address of the first SDI card, comprising: the first host machine writing a second instruction into the first register of the first SDI card based on the address of the first SDI card; the first SDI card polling the first register to obtain the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region provided by the first host machine based on the second instruction obtained from the polling. 5. The method according to claim 4, wherein the first instruction and the second instruction are store instructions. Claims 1 / 4 Page 2 CN 120994574 A 6. The method according to any one of claims 1 to 5, wherein the method further comprises:The second SDI card writes the data from the first SDI card into a fourth memory region of the second host machine, and instructs the second host machine to determine that the data has arrived in the fourth memory region; the second host machine writes the data from the fourth memory region into a second processor; the second processor processes the data to obtain a processing result. 7. The method according to claim 6, wherein the second SDI card writing the data from the first SDI card into the fourth memory region and instructing the second host machine to determine that the data has been stored in the fourth memory region comprises: the second SDI card writing the data into the fourth memory region based on the address of the fourth memory region, and providing the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card to the second host machine, so that the second host machine determines that the data has arrived in the fourth memory region of the second host machine. 8. The method according to claim 7, wherein the second host machine writing the data from the fourth memory region to the second processor comprises: the second host machine obtaining from a second mapping table the address of a fifth memory region of the second processor bound to the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card; and the second host machine copying the data from the fourth memory region to the fifth memory region based on the address of the fourth memory region and the address of the fifth memory region. 9. The method according to claim 8, wherein the second processor processing the data to obtain a processing result comprises: the second processor polling a second register of the second processor to determine that the data is stored in the fifth memory region based on a third instruction obtained from the polling, the third instruction being written to the second register by the second host machine; and the second processor obtaining the data from the fifth memory region based on the address of the fifth memory region and processing the data to obtain a processing result. 10. A cloud service system, characterized in that the cloud service system includes infrastructure for providing cloud services, the infrastructure including a first computing node and a second computing node, the first computing node including a first host machine, a first processor, and a first SDI card; the first processor is configured to write data to be transmitted into a first memory area of ​​the first host machine, and write a first instruction into a second memory area of ​​the first host machine, the first memory area being a memory area allocated by the first host machine to the first processor; the first host machine is configured to poll the second memory area to determine, based on the first instruction obtained from the polling, that the first memory area stores the data; the first host machine is further configured to notify the first SDI card to read the data from the first memory area;The first SDI card is used to send the data to the second computing node. 11. The cloud service system according to claim 10, wherein the first processor is used to: generate data to be transmitted and store the data in a third memory region of the first processor; copy the data from the third memory region to the first memory region based on the address of the third memory region and the address of the first memory region of the first host machine. 12. The cloud service system according to claim 10 or 11, characterized in that the second computing node comprises a host machine, a second processor, and a second SDI card; the first host machine is configured to: obtain from a first mapping table the addresses of mutually bound third memory regions, the first memory region, the first SDI card, the second SDI card, and the fourth memory region of the second host machine, wherein the fourth memory region is a memory region allocated by the second host machine to the second processor; and provide the first SDI card with the addresses of the first memory region, the second SDI card, and the fourth memory region based on the address of the first SDI card; the first SDI card is configured to: read the data from the first memory region based on the address of the first memory region; and send the data and the address of the fourth memory region to the second SDI card based on the address of the second SDI card, wherein the address of the fourth memory region is used for the second SDI card to write the data into the fourth memory region. 13. The cloud service system according to claim 12, wherein the first host machine is configured to write a second instruction into a first register of the first SDI card based on the address of the first SDI card; the first SDI is configured to poll the first register to obtain the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region provided by the first host machine based on the second instruction obtained from the polling. 14. The cloud service system according to claim 13, wherein the first instruction and the second instruction are store instructions. 15. The cloud service system according to any one of claims 10 to 14, wherein the second SDI card is configured to write the data from the first SDI card into a fourth memory region of the second host machine, and instruct the second host machine to determine that the data has arrived in the fourth memory region; the second host machine is configured to write the data from the fourth memory region into a second processor; the second processor is configured to process the data to obtain the processing result of the data. 16. The cloud service system according to claim 15, wherein the second SDI card is configured to...The address of the domain is used to write the data into the fourth memory region, and the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card are provided to the second host machine so that the second host machine can determine that the data has arrived in the fourth memory region of the second host machine. 17. The cloud service system according to claim 16, wherein the second host machine is configured to: obtain from the second mapping table the address of the fifth memory region of the second processor bound to the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card; copy the data from the fourth memory region to the fifth memory region based on the address of the fourth memory region and the address of the fifth memory region. 18. The cloud service system according to claim 17, wherein the second processor is configured to: poll the second register of the second processor to determine that the data is stored in the fifth memory region based on a third instruction obtained from the polling, wherein the third instruction is written to the second register by the second host machine; obtain the data from the fifth memory region based on the address of the fifth memory region, and process the data to obtain the processing result of the data. 19. A computing device cluster, characterized in that the computing device cluster comprises at least one computing device, each computing device comprising a processor and a memory: the memory is configured to store instructions; the processor is configured to, according to the instructions, cause the computing device cluster to perform the method of any one of claims 1 to 9. 20. A computer storage medium, characterized in that the computer storage medium stores one or more instructions, which, when executed by one or more computers, cause the one or more computers to perform the method of any one of claims 1 to 9. 21. A computer program product, characterized in that the computer program product stores instructions, which, when executed by a computer, cause the computer to perform the method of any one of claims 1 to 9. Claims 4 / 4 Page 5 CN 120994574 A Data Transmission Method and Cloud Service System Based on Cloud Service System

[0001] This application claims priority to Chinese Patent Application No. 202410650705.1, filed with the State Intellectual Property Office on May 21, 2024, entitled "A Computing Cluster and Model Training Method", the entire contents of which are incorporated herein by reference. Technical Field

[0002] The embodiments of this application relate to the field of cloud technology, and more particularly to a data transmission method and cloud service system based on a cloud service system. Background Art

[0003] With the rapid development of cloud technology, cloud providers have launched hypernode products to provide tenants with better cloud services. A hypernode typically contains multiple computing nodes, each of which may contain a host machine and multiple processors connected to the host machine. The processors of different computing nodes are connected via a high-speed bus, thus the hypernode possesses high-performance computing and network communication capabilities, enabling it to execute complex computing tasks.

[0004] In the cloud service system of related technologies, the source computing node may contain a source host machine, a source processor, and a source network interface card (NIC), while the destination computing node may contain a target host machine, a target processor, and a target NIC. When the source processor needs to send data to the destination processor, the source processor can first write the data into the memory of the source host machine. Then, the central processing unit (CPU) of the source host machine writes the data into the communication buffer of the source host machine. Then, the source NIC can read the data from the communication buffer and send the data to the destination NIC, which in turn sends it to the destination processor, allowing the destination processor to process the data and complete the task.

[0005] During the above data transmission process, multiple data writes are involved, and the CPU of the source host machine is also required. This will occupy a certain amount of CPU resources, which can easily affect the data transmission speed and thus lead to low task processing efficiency. Summary of the Invention

[0006] The embodiments of this application provide a data transmission method and a cloud service system based on a cloud service system, which can improve the data transmission speed and thus improve the processing efficiency of data-related tasks.

[0007] The first aspect of the embodiments of this application provides a data transmission method based on a cloud service system. The cloud service system includes infrastructure that provides cloud services. This infrastructure includes a first computing node and a second computing node. The first computing node includes a first host machine, a first processor, and a first software-defined infrastructure (SDI) card. The method includes:

[0008] In the first computing node, when the first processor has data to be transmitted, the first processor can directly write the data into a first memory area allocated to the first processor by the first host machine, and directly write a first instruction into a second memory area of ​​the first host machine.

[0009] Since the first host machine polls the second memory region, it can determine the role of the first instruction in the second memory region after polling, and thus determine that the first memory region stores the data based on that role.

[0010] After determining that the first memory region stores the data, the first host machine can notify the first SDI card to read the data from the first memory region. Then, the first SDI card can send the data to the second computing node. This completes the data specification page 1 / 18, 6 CN.120994574 A Transmission.

[0011] As can be seen from the above method: when the first processor of the first computing node needs to send data to the second processor of the second computing node, the first processor of the first computing node can directly write the data into the first memory area allocated to the first processor in the first host machine, and write the first instruction into the second memory area of ​​the first host machine. Since the first host machine will poll the second memory area, it can determine that the first memory area stores the data based on the second instruction obtained from the polling. Then, the first host machine can notify the first SDI card of the first computing node to read the data from the allocated first memory area, so as to send the data to the second processor of the second computing node. It can be seen that during the data transmission process, after the first processor writes the data into the first host machine, the first host machine does not need to participate in any writing operation. The first host machine only needs to sense the arrival of the data and notify the first SDI card to read the data directly from the first host machine, and then complete the data transmission. This can reduce the excessive occupation of the resources of the first host machine, improve the data transmission speed, and thus improve the processing efficiency of the data-related tasks.

[0012] In one possible implementation, the first processor writing the data to be transmitted into the first memory region of the first host machine includes: the first processor generating the data to be transmitted and storing the data in the third memory region of the first processor; the first processor copying the data from the third memory region to the first memory region based on the address of the third memory region and the address of the first memory region of the first host machine. In the aforementioned implementation, after the first processor generates the data to be transmitted, the first processor may first store the data in the third memory region of the first processor. Since the first processor has determined the address of the first memory region, the first processor may directly copy the data from the third memory region to the first memory region based on the address of the third memory region and the address of the first memory region of the first host machine. Thus, the first processor can directly copy the data to the first memory region of the first host machine without the participation of the CPU of the first host machine and without occupying the CPU resources in the first host machine.

[0013] In one possible implementation, the second computing node includes a second host, a second processor, and a second SDI card. The first host notifies the first SDI card to read data from a first memory region. The first SDI card sending data to the second computing node includes: the first host obtaining from a first mapping table the addresses of mutually bound third memory regions, the first memory region, the first SDI card, the second SDI card, and the fourth memory region of the second host, where the fourth memory region is a memory region allocated by the second host to the second processor; and the first host providing the first SDI card with the addresses of the first memory region, the second SDI card, and the fourth memory region based on the address of the first SDI card.The first SDI card reads data from the first memory region based on the address of the first memory region. The first SDI card then sends the data and the address of the fourth memory region to the second SDI card based on the address of the second SDI card. The address of the fourth memory region is used by the second SDI card to write data into the fourth memory region. In the aforementioned implementation, after determining that the first memory region stores the data, the first host machine can first obtain the addresses of the mutually bound third memory region, the first memory region, the first SDI card, the second SDI card, and the fourth memory region of the second host machine from its own first mapping table. Then, based on these mutually bound addresses, the first host machine can determine that the first SDI card is an SDI card bound to the first memory region. Therefore, the first host machine can provide the addresses of the first memory region, the second SDI card, and the fourth memory region to the first SDI card based on the address of the first SDI card, so that the first SDI card reads the data from the first memory region based on the address of the first memory region, and then sends the data and the address of the fourth memory region in the first task to the second SDI card based on the address of the second SDI card. Therefore, the first host machine only needs to query the first mapping table to determine which processor the data comes from and which processor it is sent to. Thus, the first host machine does not need to query multiple tables, reducing its resource overhead.

[0014] In one possible implementation, the first host machine provides the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region to the first SDI card based on the address of the first SDI card. This includes: the first host machine writing a second instruction into the first register of the first SDI card based on the address of the first SDI card; and the first SDI card polling the first register to obtain the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region provided by the first host machine based on the polled second instruction. In the aforementioned implementation, the first host machine can write the second instruction into the first register of the first SDI card based on the address of the first SDI card. Since the first SDI card polls the first register, it can obtain the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region provided by the first host machine based on the second instruction obtained from the polling. Therefore, the first host machine can quickly trigger the first SDI card to perform data transmission tasks by directly writing to the first register of the first SDI card.

[0015] In one possible implementation, the first instruction and the second instruction are store instructions.

[0016] In one possible implementation, the method further includes: the second SDI card writes data from the first SDI card into the fourth memory region of the second host machine, and instructs the second host machine to determine that the data has arrived in the fourth memory region; the second host machine...The data is written from the fourth memory area to the second processor; the second processor processes the data to obtain the processing result. In the aforementioned implementation, after receiving the data from the first SDI card, the second SDI card can write the data to the fourth memory area of ​​the second host machine and make the second host machine aware that the data has arrived in the fourth memory area. After the second host machine perceives that the data has arrived in the fourth memory area, since the fourth memory area is the memory area allocated to the second processor of the second computing node, the second host machine can directly write the data from the fourth memory area to the second processor so that the second processor can process the data and obtain the processing result, thereby meeting the tenant's data processing needs.

[0017] In one possible implementation, the second SDI card writing the data from the first SDI card to the fourth memory area and making the second host machine determine that the data has been stored in the fourth memory area includes: the second SDI card writing the data to the fourth memory area based on the address of the fourth memory area, and providing the address of the fourth memory area, the address of the first SDI card and the address of the second SDI card to the second host machine so that the second host machine determines that the data has arrived in the fourth memory area of ​​the second host machine. In the aforementioned implementation, after receiving the data from the first SDI card and the address of the fourth memory region of the second host machine, the second SDI card can write the data into the fourth memory region based on the address of the fourth memory region. Then, the second SDI card can provide the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card to the second host machine, so that the second host machine can determine that the data has been stored in the fourth memory region based on this information.

[0018] In one possible implementation, the second host machine writing data from the fourth memory region to the second processor includes: the second host machine obtaining the address of the fifth memory region of the second processor bound to the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card from the second mapping table; the second host machine copying the data from the fourth memory region to the fifth memory region based on the address of the fourth memory region and the address of the fifth memory region. In the aforementioned implementation, the second host machine determines that the data has arrived in the fourth memory region, therefore the second host machine obtains the address of the fifth memory region of the second processor bound to the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card from the second mapping table. Therefore, the second host machine can directly copy the data from the fourth memory region to the fifth memory region based on the address of the fourth memory region and the address of the fifth memory region. Thus, the second host machine only needs to query the second mapping table to determine which processor the data comes from and which processor it is destined for. Therefore, the second host machine does not need to query multiple tables, reducing its resource overhead.

[0019] In one possible implementation, the second processor processes the data to obtain a data processing result package.The implementation includes: the second processor polls its second register to determine that the data is stored in the fifth memory region based on a third instruction obtained from the polling. This third instruction is written to the second register by the second host machine. The second processor retrieves the data from the fifth memory region based on its address and processes the data to obtain the processing result. In the implementation described on page 3 / 18 of the aforementioned specification (CN 120994574 A), after the second host machine writes the data to the fifth memory region, it can also write the third instruction to the second processor's second register. Since the second processor polls its second register, it can determine that the data is stored in the fifth memory region based on the third instruction obtained from the polling. Therefore, the second processor can retrieve the data from the fifth memory region based on its address and process the data to obtain the processing result. Thus, it can be seen that the second host machine or the second SDI card can quickly notify the second processor that data has arrived by directly writing to the second processor's second register, without kernel mode switching overhead or queue entry / exit overhead.

[0020] A second aspect of the embodiments of this application provides a cloud service system. The cloud service system includes infrastructure for providing cloud services. The infrastructure includes a first computing node and a second computing node. The first computing node includes a first host machine, a first processor, and a first SDI card. The first processor is configured to write data to be transmitted into a first memory area of ​​the first host machine and write a first instruction into a second memory area of ​​the first host machine. The first memory area is a memory area allocated by the first host machine to the first processor. The first host machine is configured to poll the second memory area to determine that the first memory area stores data based on the first instruction obtained from the polling. The first host machine is also configured to notify the first SDI card to read data from the first memory area. The first SDI card is configured to send the data to the second computing node.

[0021] In one possible implementation, the first processor is configured to: generate data to be transmitted and store the data in a third memory area of ​​the first processor; copy the data from the third memory area to the first memory area based on the address of the third memory area and the address of the first memory area of ​​the first host machine.

[0022] In one possible implementation, the second computing node includes a second host, a second processor, and a second SDI card; the first host is configured to: obtain from a first mapping table the addresses of mutually bound third memory regions, the address of the first memory region, the address of the first SDI card, the address of the second SDI card, and the address of a fourth memory region of the second host, wherein the fourth memory region is a memory region allocated by the second host to the second processor; and provide the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region to the first SDI card based on the address of the first SDI card; the first SDI...The card is used for: reading data from the first memory region based on the address of the first memory region; sending data and the address of the fourth memory region to the second SDI card based on the address of the second SDI card, the address of the fourth memory region being used by the second SDI card to write data into the fourth memory region.

[0023] In one possible implementation, the first host machine is used for writing a second instruction into the first register of the first SDI card based on the address of the first SDI card; the first SDI is used for polling the first register to obtain the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region provided by the first host machine based on the second instruction obtained from the polling.

[0024] In one possible implementation, the first instruction and the second instruction are store instructions.

[0025] In one possible implementation, the second SDI card is used for writing data from the first SDI card into the fourth memory region of the second host machine, and instructing the second host machine to determine that the data has arrived in the fourth memory region; the second host machine is used for writing data from the fourth memory region into the second processor; the second processor is used for processing the data to obtain the data processing result.

[0026] In one possible implementation, the second SDI card is used to write data into the fourth memory region based on the address of the fourth memory region, and provide the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card to the second host machine, so that the second host machine can determine that the data has arrived in the fourth memory region of the second host machine.

[0027] In one possible implementation, the second host machine is used to: obtain the address of the fifth memory region of the second processor bound to the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card from the second mapping table; and copy the data from the fourth memory region to the fifth memory region based on the address of the fourth memory region and the address of the fifth memory region.

[0028] In one possible implementation, the second processor is used to: poll the second register of the second processor to determine that the data is stored in the fifth memory region based on the third instruction obtained from the polling, the third instruction being written to the second register by the second host machine; and obtain data from the fifth memory region based on the address of the fifth memory region, and process the data to obtain the data processing result.

[0029] A third aspect of the present application provides a computing device cluster, the computing device cluster including at least one computing device, each computing device including a processor and a memory: the memory is used to store instructions; the processor is used to, according to the instructions, cause the computing device cluster to perform the method described in the first aspect or any possible implementation of the first aspect.

[0030] A fourth aspect of the present application provides a computer storage medium, the computer storage medium storing a...One or more instructions, which, when executed by one or more computers, cause one or more computers to perform the method described in the first aspect or any possible implementation of the first aspect.

[0031] A fifth aspect of the present application provides a computer program product storing instructions that, when executed by a computer, cause the computer to perform the method described in the first aspect or any possible implementation of the first aspect.

[0032] In an embodiment of the present application, when a first processor of a first computing node needs to send data to a second processor of a second computing node, the first processor of the first computing node can directly write the data into a first memory area allocated to the first processor in a first host machine, and write a first instruction into a second memory area of ​​the first host machine. Since the first host machine polls the second memory area, it can determine that the first memory area stores the data based on the second instruction obtained from the polling. Then, the first host machine can notify the first SDI card of the first computing node to read the data from the allocated first memory area to send the data to the second processor of the second computing node. Therefore, during data transmission, after the first processor writes the data to the first host machine, the first host machine does not need to participate in any writing operation. The first host machine only needs to detect the arrival of the data and notify the first SDI card to read the data directly from the first host machine before completing the data transmission. This can reduce the excessive occupation of the first host machine's resources, improve the data transmission speed, and thus improve the processing efficiency of data-related tasks.

[0033] Figure 1 is a schematic diagram of a cloud service system provided in an embodiment of this application;

[0034] Figure 2a is a schematic diagram of a supercluster provided in an embodiment of this application;

[0035] Figure 2b is a schematic diagram of a computing node provided in an embodiment of this application;

[0036] Figure 3 is a schematic diagram of a mapping table provided in an embodiment of this application;

[0037] Figure 4 is a flowchart of a data transmission method based on a cloud service system provided in an embodiment of this application;

[0038] Figure 5a is a schematic diagram of data transmission provided in an embodiment of this application;

[0039] Figure 5b is another schematic diagram of data transmission provided in an embodiment of this application;

[0040] Figure 6 is another schematic diagram of data transmission provided in an embodiment of this application;

[0041] Figure 7 is another schematic diagram of a cloud service system provided in an embodiment of this application;

[0042] Figure 8 is a schematic diagram of a computing device provided in an embodiment of this application;

[0043] Figure 9 is a schematic diagram of a computing device cluster provided in an embodiment of this application;

[0044] Figure 10 is a schematic diagram of computer devices in a computer cluster connected via a network provided in an embodiment of this application. Page 10 CN 120994574 A Intent. Detailed Implementation

[0045] This application provides a data transmission method and a cloud service system based on a cloud service system, which can improve the speed of data transmission and thus improve the processing efficiency of data-related tasks.

[0046] The terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate, and this is merely a way of distinguishing objects with the same attributes in the embodiments of this application. In addition, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, so that a process, method, system, product, or device that comprises a series of units is not necessarily limited to those units, but may include other units not explicitly listed or inherent to these processes, methods, products, or devices.

[0047] With the rapid development of cloud technology, cloud vendors have launched supernode products in order to provide tenants with better cloud services. A supernode typically contains multiple computing nodes, each containing a host machine and multiple processors connected to the host machine (e.g., graphics processing unit (GPU) or neural network processing unit (NPU)). Processors on different computing nodes are connected via a high-speed bus, thus a supernode possesses high-performance computing and network communication capabilities, enabling it to perform complex computing tasks (e.g., model training tasks in the field of artificial intelligence (AI)).

[0048] In cloud service systems of related technologies, a source computing node may contain a source host machine, a source processor, and a source network interface card (NIC), while a destination computing node may contain a target host machine, a target processor, and a target NIC. When a source processor needs to send data to a destination processor, the source processor first writes the data to the memory of the source host machine. Then, the CPU of the source host machine writes the data to the communication buffer of the source host machine. The source NIC then reads the data from the communication buffer and sends it to the destination NIC, allowing the destination NIC to send it to the destination processor via the destination host machine, thereby enabling the destination processor to process the data and complete the task.

[0049] During the above data transmission process, multiple data writes are involved, and the CPU of the source host machine also needs to participate. This will occupy a certain amount of CPU resources, which can easily affect the data transmission speed and thus lead to low task processing efficiency.

[0050] In order to solve the above problems, this application provides a data transmission method based on a cloud service system. This method can be implemented through a cloud service system (e.g., a public cloud system, etc.). Figure 1 shows the data transmission method provided by this application embodiment.A schematic diagram of a cloud service system is shown in Figure 1. The cloud service system includes infrastructure that provides cloud services and a cloud management platform that manages this infrastructure. The cloud management platform and the infrastructure are described separately below:

[0051] The cloud management platform can manage the infrastructure in the entire cloud service system in a unified manner (for example, in the infrastructure, according to the tenant's instructions, a hypercluster is created to serve the tenant. The hypercluster can contain multiple hypernodes, which can communicate and connect with each other to jointly process the tenant's tasks, such as model training tasks in the field of AI). The cloud management platform can also be opened to tenants outside the cloud service system and respond to their requests. For example, the cloud management platform can provide various interfaces such as login interface and task processing interface for the tenant's client (e.g., the terminal device used by the tenant or the browser on the terminal device, etc.) to access. Among them, the cloud management platform can authenticate the tenant's client through the login interface. After successful authentication, the tenant's client can be allowed to log in to the cloud management platform. For example, the cloud management platform can also allow the tenant's client to send the tenant's pending tasks to the cloud management platform through the task processing interface. The cloud management platform can call the super cluster it serves to process the tenant's tasks and return the processing results to the tenant. Specification 6 / 18 pages 11 CN 120994574 A

[0052] The infrastructure includes a super cluster serving the tenant, as shown in Figure 2a (Figure 2a is a structural schematic diagram of a super cluster provided in the embodiment of this application). The super cluster includes multiple super nodes, and each super node can include multiple computing nodes. The multiple computing nodes are described below from both hardware and software aspects:

[0053] From the hardware aspect, for any one of these multiple computing nodes, the computing node includes a host, multiple processors connected to the host, and multiple software-defined infrastructure (SDI) cards. The host machine of this computing node can connect to multiple processors and multiple SDI cards of the computing node via a high-speed serial computer expansion bus standard (Peripheral Component Interconnect Express, PCIe) interface. Each of the host machine, processors, and SDI cards has its own independent CPU and memory. The host machine, processors, and SDI cards can work collaboratively; the multiple processors can read and write to the host machine's memory without the host machine's CPU's involvement.After the host machine submits the data transmission task, subsequent data interfaces and transmissions do not require the host machine's involvement. The SDI card of this compute node includes a CPU, memory, and a doorbell (DB) register. The DB register triggers the SDI card to execute the data transmission task, and it can be directly written in user space by the host machine's forwarding module, without kernel-mode switching overhead. The processor of this compute node mainly includes a computing processor (e.g., when the processor is an NPU, the NPU's computing processor could be an AI CORE, etc.), high-bandwidth memory (HBM), and a notification register. The notification register can also be directly written in user space by the host machine's forwarding module or the SDI card's TA module, without kernel-mode switching or enqueue / dequeue overhead.

[0054] As shown in Figure 2b (Figure 2b is a schematic diagram of a computing node provided in an embodiment of this application), from a software perspective, for any one of these computing nodes, the host machine of the computing node, the multiple processors of the computing node, and the multiple SDI cards of the computing node all have independent operating systems (running on the CPUs of the host machine, the multiple processors of the computing node, and the multiple SDI cards of the computing node). The operating system of the host machine of the computing node includes a forwarding module, which can manage the reception and transmission of data between the processors of the computing node, the host machine of the computing node, and the SDI cards of the computing node. The operating system of the processors of the computing node includes a scheduler, which can manage the reception and transmission of data between the processors of the computing node and the host machine of the computing node. The operating system of the SDI cards of the computing node includes a transaction (TA) module, which can manage the reception and transmission of data between the computing node and the other computing nodes. It should be noted that the relevant descriptions of data reception and transmission will not be elaborated here.

[0055] It is worth noting that, for any one of these computing nodes, the memory of the processor of the computing node may contain a special memory area, which may be called Segment1. Segment1 is used to store the data that the processor of the computing node needs to send or interface. The memory of the host machine of the computing node may contain four special memory areas, namely Segment2, Trigger, Mapping Table and Communication Queue. The following is a description of these four memory areas:

[0056] (1) Segment2 can also be called the communication buffer. The multiple processors of the computing node and the memory of the computing nodeMultiple SDI cards can directly read and write to Segment2. It is worth noting that since the host machine of this computing node is connected to multiple processors, the host machine of this computing node will allocate a corresponding Segment2 to each of its connected processors. That is to say, for the multiple processors of this computing node, each processor has a dedicated Segment2 in the host machine of this computing node.

[0057] (2) The trigger is used to notify the forwarding module of the host machine of this computing node whether the data to be transmitted is ready. The trigger can also be directly written by the multiple processors of this computing node in user space, and the data can be quickly detected in user space.

[0058] (3) The mapping table is used to store information related to the transmission channel. The forwarding module of the host machine of this computing node can query the mapping table to determine which processor of this computing node or which processor of other computing nodes the data is sent to. As shown in Figure 3 (Figure 3 is a schematic diagram of a mapping table provided in an embodiment of this application), when a processor of a computing node needs to establish a transmission channel with a processor of another computing node, the forwarding module of the host machine of the computing node can add an entry (tag) to the mapping table. This entry records mutually bound d transmission channels (dChannel) and n transmission channels (nChannel). dChannel is the channel between a processor of the computing node and the host machine of the computing node, and nChannel is the channel between the host machine of the computing node and the host machine of another computing node. Then, dChannel and nChannel can be combined to form a transmission channel built between a processor of the computing node and a processor of another computing node. The information contained in dChannel and nChannel varies depending on the transport protocol on which they are built. For example, when dChannel and nChannel use the Remote Direct Memory Access (RDMA) protocol, dChannel includes the (memory) address of Segment1 of a processor on the compute node and the (memory) address of Segment2 of the host machine on the compute node (this Segment2 is the one allocated to the processor). nChannel includes the (network) address of an SDI card on the compute node and the (network) address of an SDI card on another compute node, and may even include the address of Segment2 of the host machine on another compute node (this Segment2 is the one allocated to a processor on another compute node). Therefore, this compute...The mapping table of a node records a pair of mutually bound dChannels and nChannels, which describes a transmission channel built between a processor of this computing node and a processor of another computing node.

[0059] To further understand the mapping table, a specific application example is introduced below. As shown in Figure 3, suppose a tenant's supernode includes computing node 1, computing node 2, ..., computing node n. For computing node 1, its host1 is connected to multiple NPUs and multiple SDI cards. host1 maintains a mapping table containing multiple entries. Entrance 1 records the mutually bound dChannel1 and nChannel2. dChannel1 contains the address of Segment1 of NPU1 and the address of Segment2-1 of host1. Segment2-1 is the Segment2 assigned by host1 to NPU1. nChannel2 contains the address of SDI card 1, the address of SDI card 3 of compute node 2, and the address of Segment 2-9 of host2 of compute node 2. Segment 2-9 is Segment 2 of NPU9 of compute node 2 assigned by host2.

[0060] It can be seen that dChannel1 (between Segment 1 of NPU1 and Segment 2-1 of host1) and nChannel2 (between Segment 2-1 of host1 and Segment 2-9 of host2) form a transmission channel built between NPU1 and NPU9, and this transmission channel indicates that host1 is bound to Segment 1 of NPU1, Segment 2-1 of host1, SDI card 1, SDI card 3, Segment 2-9 of host2, and NPU9. Data can be transmitted from Segment 1 of NPU1 to Segment 1 of NPU9 along this transmission channel. As for the other dChannels and nChannels in the mapping table, they are similar and will not be described in detail here.

[0061] (4) The communication queue includes a work queue (WQ) and a completion queue (CQ). The WQ is used to submit data transmission tasks, and the CQ is used to submit task completion notifications. The description information of the data transmission task can be stored in the work queue element (WQE). When the forwarding module of the host machine of the computing node determines that the data has arrived, it can generate a WQE and submit the WQE to the WQ, so that the SDI card of the computing node can retrieve the WQE from the WQ, read the data from the host machine of the computing node based on the WQE, and send the data to the SDI card of another computing node.The card completes the data transmission. The completion information of the data transmission task is stored in the completion queue element (CQE). After receiving the data, the SDI card of another computing node can generate a CQE and submit it to the CQ to notify the forwarding module of the host of the other computing node that the data transmission is complete. Specification 8 / 18 pages 13 CN 120994574 A

[0062] Further, in the embodiments of this application, any two computing nodes communicating can be located in the same supernode or in two different supernodes, without limitation.

[0063] Further, in the embodiments of this application, the computing nodes in the supernode can be cloud instances in the infrastructure. These cloud instances can be presented in various ways. For example, these cloud instances can be physical servers selected by the cloud management platform, or bare metal servers selected by the cloud management platform, etc.

[0064] Further, in this embodiment of the application, for multiple supernodes of a tenant, these multiple supernodes can be deployed in the same site or different sites. The site can be presented in various forms. For example, the site can be a region in the infrastructure, or an availability zone in the infrastructure, or a data center (DC) in the infrastructure, or a room in the infrastructure, or a rack in the infrastructure, etc.

[0065] Based on the above cloud service system, it can be seen that among the multiple computing nodes serving the tenant, when the source processor (one of the multiple processors of the source computing node) of the source computing node (i.e., a computing node in a certain supernode) needs to send data to the destination processor (one of the multiple processors of the destination computing node) of the destination computing node (i.e., another computing node of the supernode or a computing node of another supernode), the source processor of the source computing node can directly write the data into the memory area allocated to the source processor in the source host and write a certain instruction into another memory area of ​​the source host. Since the source host machine polls another memory region, it can determine that the memory region allocated to the source processor stores data based on the polled instruction. Therefore, the source host machine can instruct the source SDI card (one of multiple SDI cards on the source compute node) to read data from the memory region allocated to the source processor and send the data to the destination processor on the destination compute node. Thus, during data transmission, after the source processor writes data to the source host machine, the source host machine does not need to participate in any write operations; the source host machine only needs to detect the arrival of data and...The source SDI card reads data directly from the source host machine and then completes the data transmission. This reduces the resource consumption of the source host machine, increases the data transmission speed, and thus improves the processing efficiency of data-related tasks. To further understand the workflow of the aforementioned cloud service system, the following describes the workflow in conjunction with Figure 4. Figure 4 is a schematic flowchart of a data transmission method based on a cloud service system provided in this application embodiment. This method can be implemented through the cloud service system shown in Figure 1. The cloud service system includes infrastructure that provides cloud services. The infrastructure includes a first computing node (also called a source computing node) and a second computing node (also called a destination computing node). The first computing node includes a first host machine (also called a source host machine), a first processor (also called a source processor), and a first SDI card (also called a source SDI card). The second computing node includes a second host machine (also called a destination host machine), a second processor (also called a destination processor), and a second SDI card (also called a destination SDI card). The method includes:

[0066] 401. The first processor writes the data to be transmitted into the first memory area of ​​the first host machine and writes the first instruction into the second memory area of ​​the first host machine. The first memory area is the memory area allocated by the first host machine to the first processor.

[0067] In this embodiment, when the first processor of the first computing node has data to be transmitted, the first processor can directly write the data into the first memory area of ​​the first host machine of the first computing node and directly write the first instruction into the second memory area of ​​the first host machine. It should be noted that the first memory area is the memory area allocated by the first host machine to the first processor, and the second instruction is used to make the first host machine realize that the first memory area stores the data.

[0068] Specifically, the first processor can write the data into the first memory area in the following way:

[0069] After the first processor generates the data to be transmitted, the first processor can first store the data in the third memory area of ​​the first processor. Since the first processor has already obtained the address of the first memory region allocated to it by the first host machine (page 9 / 18, CN 120994574 A), the first processor can directly copy the data from the third memory region to the first memory region based on the address of the third memory region and the address of the first memory region of the first host machine (these two addresses constitute the dChannel between the first processor and the first host machine).

[0070] For example, as shown in Figures 5a and 5b (Figure 5a is a schematic diagram of data transmission provided in an embodiment of this application, and Figure 5b is another schematic diagram of data transmission provided in an embodiment of this application), for ease of explanation, the examples shown in Figures 5a and 5b are divided into multiple steps for description.

[0071] Step 1: After the AI ​​core of NPU1 on compute node 1 generates the data to be transmitted, the AI ​​core of NPU1 can first write the data into segment 1 of NPU1 (i.e., the aforementioned third memory area), and let the scheduler of NPU1 realize that segment 1 of NPU1 stores the data, and can start the data copying.

[0072] Step 2: Since the scheduler of NPU1 has determined the dChannel between segment 2-1 of host1 on compute node 1 (i.e., the aforementioned second memory area) and segment 1 of NPU1 (the dChannel contains the address of segment 1 of NPU1 and the address of segment 2-1 of host1), let the dChannel be dChannel1, the scheduler of NPU1 can copy the data from segment 1 of NPU1 to segment 2-1 of host1 through dChannel1.

[0073] Step 3: When the data copy is completed, the scheduler of NPU1 can write the store instruction (i.e., the aforementioned first instruction) into the Trigger (i.e., the aforementioned second memory region). The store instruction can set the flag bit associated with segment2-1 in the Trigger. Therefore, when the forwarding module of host1 polls the Trigger, it can find that the flag bit has been set, and thus it can be determined that segment2-1 stores the data.

[0074] 402. The first host polls the second memory region to determine that the first memory region stores data based on the first instruction obtained from the polling.

[0075] Since the first host polls the second memory region, the first host can determine that the first memory region stores the data based on the first instruction obtained from the polling (i.e., the effect of the first instruction in the second memory region).

[0076] As in the example above, step 4: the forwarding module of host1 polls the Trigger and finds that the flag bit associated with segment2-1 in the Trigger has been set, so it can be determined that segment2-1 stores the data.

[0077] 403. The first host notifies the first SDI card to read the data from the first memory area, and the first SDI card sends the data to the second SDI card.

[0078] After determining that the data is stored in the first memory area, the first host can notify the first SDI card of the first computing node to read the data from the first memory area, so the first SDI card can send the data to the second SDI card of the second computing node. It should be noted that the first SDI card is the SDI card bound to the first host, and the second SDI card is the SDI card bound to the first SDI card.

[0079] Specifically, the first host can instruct the first SDI card to obtain and send the data in the following ways:

[0080] After determining that the data is stored in the first memory region, the first host machine can first obtain the dchannel between the third memory region of the first processor and the first memory region of the first host machine from its own first mapping table (the dchannel contains the address of the third memory region and the address of the first memory region). Since the dchannel is bound to an nchannel, the nchannel is the nchannel between the first memory region of the first host machine and the fourth memory region of the second host machine (the nchannel contains the address of the first SDI card, the address of the second SDI card, and the address of the fourth memory region of the second host machine). The fourth memory region is the memory region allocated by the second host machine to the second processor.

[0081] Next, based on the mutually bound dchannel and nchannel, the first host machine can determine that the first SDI card is an SDI card bound to the first memory region. Therefore, the first host machine can take the address of the first memory region in the dchannel, the address of the second SDI card in the nchannel, and the address of the fourth memory region as the first task, and submit the first task specification page 10 / 18 15 CN 120994574 A to the first task queue.

[0082] Then, the first host can notify the first SDI to retrieve the first task from the first task queue based on the address of the first SDI card in the nchannel. After obtaining the first task, the first SDI card can read the data from the first memory area based on the address of the first memory area in the first task. Subsequently, the first SDI card can send the data and the address of the fourth memory area in the first task to the second SDI card based on the address of the second SDI card in the first task.

[0083] More specifically, the first host can notify the first SDI card in the following way:

[0084] The first host can write the second instruction into the first register of the first SDI card based on the address of the first SDI card in the nchannel. Since the first SDI will poll the first register, the first SDI card can determine that there is a first task to be processed in the first task queue based on the second instruction obtained from the polling (i.e., the role played by the second instruction in the first register). Therefore, the first SDI card can retrieve the first task from the first task queue, which is equivalent to obtaining the address of the first memory area, the address of the second SDI card, and the address of the fourth memory area.

[0085] As in the example above, step 5: Determine that segment2-1 stores the data. The forwarding module of host1 can find the data between Segment1 of NPU1 and Segment2-1 of host1 from the mapping table (i.e., the first mapping table mentioned above).dChannel1. Then, the forwarding module of host1 can further find nChannel2 bound to dChannel1 from the mapping table. nChannel2 is the nChannel between Segment2-1 of host1 and Segment2-9 of host2.

[0086] Step 6: The forwarding module of host1 can use the address of Segment2-1 of host1 in dChannel1, the address of SDI card 2 in nChannel and the address of Segment2-9 of host2 to generate WQE (i.e. the aforementioned first task) and submit WQE to WQ (i.e. the aforementioned first task queue).

[0087] Step 7: Based on the address of SDI card 1 in nChannel, the forwarding module of host1 writes a store instruction (i.e. the aforementioned second instruction) to the DB register (i.e. the aforementioned first register) of SDI card 1 to set the DB register.

[0088] Step 8: Since the TA module of SDI card 1 polls the DB register, the TA module of SDI card 1 will detect that the DB register is set, thereby determining that there is a WQE to be processed in WQ.

[0089] Step 9: The TA module of SDI card 1 obtains WQE from WQ.

[0090] Step 10: The TA module of SDI card 1 can extract the address of Segment2-1 of host1, the address of SDI card 2 and the address of Segment2-9 of host2 from WQE. First, based on the address of Segment2-1 of host1, it reads the data from Segment2-1 of host1, and based on the address of SDI card 2, it sends the data and the address of Segment2-9 of host2 to SDI card 2.

[0091] 404. The second SDI card writes the data into the fourth memory area of ​​the second host machine and instructs the second host machine to determine that the data has arrived in the fourth memory area.

[0092] After receiving the data from the first SDI card, the second SDI card of the second computing node can write the data into the fourth memory region of the second host machine of the second computing node, and make the second host machine aware that the data has arrived in the fourth memory region.

[0093] Specifically, the first SDI card can make the second host machine aware that the data has arrived in the following way:

[0094] After receiving the data from the first SDI card and the address of the fourth memory region of the second host machine, the second SDI card can write the data into the fourth memory region based on the address of the fourth memory region. Then, the second SDI card can use the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card as a second task, and submit the second task to the second task queue of the second host machine. Since the second host machine polls the second task queue, the second host machine...The machine can obtain a second task from the second task queue to determine that the data has been stored in the fourth memory area based on the second task. Specification 11 / 18 pages 16 CN 120994574 A

[0095] Still as in the above example, steps 11 to 12: Since SDI card 1 and SDI card 2 are connected through a virtual private cloud (VPC), the TA module of SDI card 1 can send the data and the address of Segment2-9 of host2 to the TA module of SDI card 2 through the VPC.

[0096] Step 13: The TA module of SDI card 2 can write the data into Segment2-9 of host2 (i.e., the aforementioned fourth memory area) based on the address of Segment2-9 of host2.

[0097] Step 14: The TA module of SDI card 2 can use the address of Segment 2-9 of host2, the address of SDI card 1, and the address of SDI card 2 as CQE (i.e., the aforementioned second task), that is, use nChannel2 as CQE and add it to the CQ of host2 (i.e., the aforementioned second task queue).

[0098] Step 15: The forwarding module of host2 will poll the CQ, obtain the CQE from the CQ, and determine that the data has reached Segment 2-9 of host2 based on the CQE.

[0099] 405. The second host writes the data from the fourth memory area to the second processor.

[0100] 406. The second processor processes the data and obtains the data processing result.

[0101] After the second host machine senses that the data has arrived in the fourth memory region, since the fourth memory region is the memory region allocated to the second processor of the second computing node, the second host machine can directly write the data from the fourth memory region to the second processor so that the second processor can process the data and obtain the processing result of the data. At this point, the data transmission and data processing are completed, which can meet the task processing requirements of the tenant associated with the data.

[0102] Specifically, the second host machine can write the data to the second processor in the following way:

[0103] The second host machine has obtained the second task, which includes the address of the fourth memory region, the address of the first SDI card and the address of the second SDI card. That is, the second task includes the nchannel between the first memory region of the first host machine and the fourth memory region of the second host machine. Therefore, the second host machine obtains the dchannel bound to the nchannel from the second mapping table. The dchannel is the dchannel between the fifth memory region of the second processor and the fourth memory region of the second host machine. That is, the dchannel includes the address of the fourth memory region of the second host machine and the address of the fifth memory region of the second processor.The address of the storage area. Then, the second host can directly copy the data from the fourth memory area to the fifth memory area based on the address of the fourth memory area and the address of the fifth memory area.

[0104] Still as in the above example, step 16: Since CQE contains nChannel2, the forwarding module of host2 can obtain dchannel21 bound to nChannel2 from its own mapping table (i.e., the aforementioned second mapping table). dchannel21 contains the address of Segment2-9 of host2 and the address of Segment1 of NPU9.

[0105] Step 17: Since dchannel21 contains the address of Segment2-9 of host2 and the address of Segment1 of NPU9, the forwarding module of host2 can directly copy the data from Segment2-9 of host2 to Segment1 of NPU9 (i.e., the aforementioned fifth memory area) based on these two addresses, that is, based on dchannel21.

[0106] More specifically, the second processor can process the data in the following way:

[0107] After the second host writes the data into the fifth memory region, it can also write the third instruction into the second register of the second processor. Since the second processor polls the second register, the second processor can determine that the data is stored in the fifth memory region based on the polled third instruction (i.e., the role played by the third instruction in the second register). Then, the second processor can obtain the data from the fifth memory region based on the address of the fifth memory region and process the data to obtain the data processing result.

[0108] Still as in the above example, step 18: After the copy of the data is completed, the forwarding module of host2 can use the store instruction (i.e., the aforementioned third instruction) to directly write the Notify register of NPU9 (i.e., the aforementioned second register) to set the Notify register. Instruction manual 12 / 18 pages 17 CN 120994574 A

[0109] Step 19: The NPU9 scheduler will poll the Notify register. After finding that it is set, it can be determined that the NPU9's Segment1 stores the data. Therefore, the NPU9 scheduler notifies the NPU9's AI core to read the data from the NPU9's Segment1 and process the data.

[0110] It should be understood that in the embodiments of this application, the first SDI card may also only send the data to the second SDI card without sending the address of the fourth memory region, or even the first mapping table may not contain the address of any destination memory region (e.g., the address of the fourth memory region). In this case, after receiving the data, the second SDI card will randomly write the data into any memory region in the second host and inform the second host that the data is stored in the memory region. Therefore, the subsequent secondThe host machine can write the data from the memory region to the second processor. The writing process is the same as the process of writing the data from the fourth memory region to the second processor, and will not be described again here. It should be noted that the memory region is no longer the memory region allocated by the second host machine to the second processor.

[0111] It should also be understood that, in the embodiments of this application, after the second SDI card receives the data and writes the data to the fourth memory region of the second host machine, since the second SDI card has determined the address of the fourth memory region, the address of the first SDI card and the address of the second SDI card, that is, the nchannel between the first memory region of the first host machine and the fourth memory region of the second host machine, the second SDI card can also directly query the second mapping table of the second host machine to obtain the dchannel bound to the nchannel. Since the dchannel contains the address of the fourth memory region of the second host machine and the address of the fifth memory region of the second processor, the second SDI card can copy the data from the fourth memory region to the fifth memory region, and the second SDI card notifies the second processor to read and process the data in the fifth memory region.

[0112] For example, as shown in FIG6 (FIG6 is another schematic diagram of data transmission provided in the embodiment of this application), in steps 1 to 2: after the TA module of SDI card 2 receives the data and the address of Segment2-9 of host2, it can write the data into Segment2-9 of host2 based on the address of Segment2-9 of host2.

[0113] Step 3: since the TA module of SDI card 2 has determined nChannel2, the TA module of SDI card 2 can obtain dchannel21 bound to nChannel2 from the mapping table of host2. dchannel21 contains the address of Segment2-9 of host2 and the address of Segment1 of NPU9.

[0114] Step 4: the TA module of SDI card 2 can copy the data directly from Segment2-9 of host2 to Segment1 of NPU9 based on dchannel21.

[0115] Steps 5 to 6: After the data copy is completed, the TA module of SDI card 2 can use the store instruction to directly write the Notify register of NPU9 to set the Notify register. The scheduler of NPU9 will poll the Notify register. After finding that it is set, it can be determined that Segment 1 of NPU9 stores the data. Therefore, the scheduler of NPU9 notifies the AI ​​core of NPU9 to read the data from Segment 1 of NPU9 and process the data.

[0116] In this embodiment of the application, when the first processor of the first computing node needs to send data to the second processor of the second computing node...When the processor sends data, the first processor of the first computing node can directly write the data into the first memory area allocated to the first processor in the first host machine, and write the first instruction into the second memory area of ​​the first host machine. Since the first host machine polls the second memory area, it can determine that the first memory area stores the data based on the second instruction obtained from the polling. Then, the first host machine can notify the first SDI card of the first computing node to read the data from the allocated first memory area to send the data to the second processor of the second computing node. It can be seen that during the data transmission process, after the first processor writes the data into the first host machine, the first host machine does not need to participate in any write operation. The first host machine only needs to detect the arrival of the data and notify the first SDI card to read the data directly from the first host machine, and then complete the data transmission. This can reduce the excessive consumption of the first host machine's resources, improve the data transmission speed, and thus improve the processing efficiency of data-related tasks. Specification page 13 / 18 18 CN 120994574 A

[0117] Further, in the embodiments of this application, the first processor can directly copy data to the first memory area of ​​the first host machine through synchronous direct memory access (SDMA) technology (of course, the embodiments of this application are not limited to this technology, and the first processor can also perform data copying through other technologies, which are not specifically limited here), without occupying the CPU resources in the first host machine. Moreover, the first processor can complete the data copying in user mode, without kernel mode switching overhead. Moreover, the first processor can directly write to the second memory area to quickly make the first host machine aware that the data has arrived in the first memory area, and this process has no interruption overhead.

[0118] Further, in this embodiment, the first host and the second host can quickly query the first mapping table and the second mapping table respectively. Since both the first mapping table and the second mapping table contain mutually bound dChannel and nChannel, the first host and the second host can quickly determine which processor the data comes from and which processor it is sent to. For the first host and the second host, only one mapping table needs to be queried, without querying multiple tables, which is beneficial to improving the efficiency of data transmission.

[0119] Further, in this embodiment, the first host can quickly trigger the first SDI card to execute data transmission tasks by directly writing to the first register of the first SDI card. Moreover, the first host submits the first task in user mode, and the first SDI card can read the first task in user mode without kernel mode switching overhead. Moreover, the data is transmitted between the first host, the first processor, and the first SDI card using the RDMA protocol, without the need to use the kernel protocol stack.

[0120] Furthermore, in this embodiment, the second host or the second SDI card can quickly notify the second processor that data has arrived by directly writing to the second register of the second processor, without kernel mode switching overhead or queue entry / exit overhead.

[0121] The above is a detailed description of the data transmission method based on the cloud service system provided in this embodiment. The following will introduce the cloud service system provided in this embodiment. Figure 7 is another structural schematic diagram of the cloud service system provided in this embodiment. As shown in Figure 7, the cloud service system includes infrastructure for providing cloud services. The infrastructure includes a first computing node and a second computing node. The first computing node includes a first host 701, a first processor 702, and a first SDI card 703. The second computing node includes a second host 704, a second processor 705, and a second SDI card 706. It is worth noting that the first host 701 includes a first forwarding module, the first processor 702 includes a first scheduler, the first SDI card 703 includes a first TA module, the second host 704 includes a second forwarding module, the second processor 705 includes a second scheduler, and the second SDI card 706 includes a second TA module.

[0122] The first processor 702 is configured to write the data to be transmitted into the first memory area of ​​the first host machine 701 and write the first instruction into the second memory area of ​​the first host machine 701. The first memory area is the memory area allocated by the first host machine 701 to the first processor 702. For example, the first processor 702 is configured to execute step 401 in the embodiment shown in FIG4 above.

[0123] The first host machine 701 is configured to poll the second memory area to determine that the first memory area stores data based on the first instruction obtained from the polling. For example, the first host machine 701 is configured to execute step 402 in the embodiment shown in FIG4 above.

[0124] The first host machine 701 is also configured to notify the first SDI card 703 to read data from the first memory area. For example, the first host machine 701 is configured to execute step 403 in the embodiment shown in FIG4 above.

[0125] The first SDI card 703 is configured to send data to the second computing node. For example, the first SDI card 703 is configured to execute step 403 in the embodiment shown in FIG4 above.

[0126] In one possible implementation, the first processor 702 is configured to: generate data to be transmitted and store the data in a third memory region of the first processor 702; and copy the data from the third memory region to the first memory region based on the address of the third memory region and the address of the first memory region of the first host machine 701.

[0127] In one possible implementation, the first host machine 701 is configured to: obtain the mutual binding specification page 14 / 18 19 CN 120994574 A from the first mapping table.The addresses of the third memory region, the first memory region, the first SDI card 703, the second SDI card 706, and the fourth memory region of the second host 704 are provided to the second host 704. The fourth memory region is the memory region allocated by the second host 704 to the second processor 705. Based on the address of the first SDI card 703, the addresses of the first memory region, the second SDI card 706, and the fourth memory region are provided to the first SDI card 703. The first SDI card 703 is used to: read data from the first memory region based on the address of the first memory region; and send data and the address of the fourth memory region to the second SDI card 706 based on the address of the second SDI card 706. The address of the fourth memory region is used by the second SDI card 706 to write data into the fourth memory region.

[0128] In one possible implementation, the first host 701 is used to write a second instruction into the first register of the first SDI card 703 based on the address of the first SDI card 703; the first SDI is used to poll the first register to obtain the address of the first memory region, the address of the second SDI card 706, and the address of the fourth memory region provided by the first host 701 based on the polled second instruction.

[0129] In one possible implementation, the first instruction and the second instruction are store instructions.

[0130] In one possible implementation, the second SDI card 706 is used to write data from the first SDI card 703 into the fourth memory region of the second host 704, and instruct the second host 704 to determine that the data has arrived in the fourth memory region; the second host 704 is used to write data from the fourth memory region into the second processor 705; the second processor 705 is used to process the data to obtain the data processing result.

[0131] In one possible implementation, the second SDI card 706 is used to write data into the fourth memory region based on the address of the fourth memory region, and provide the address of the fourth memory region, the address of the first SDI card 703, and the address of the second SDI card 706 to the second host 704, so that the second host 704 determines that the data has arrived in the fourth memory region of the second host 704.

[0132] In one possible implementation, the second host 704 is used to: obtain from the second mapping table the address of the fifth memory region of the second processor 705 bound to the address of the fourth memory region, the address of the first SDI card 703, and the address of the second SDI card 706; and copy data from the fourth memory region to the fifth memory region based on the address of the fourth memory region and the address of the fifth memory region.

[0133] In one possible implementation, the second processor 705 is used to: poll the second register of the second processor 705 to determine that the data is stored in the fifth memory region based on the third instruction obtained from the polling, the third instruction being generated by the second host 704.The host 704 writes to the second register; based on the address of the fifth memory region, it obtains data from the fifth memory region and processes the data to obtain the data processing result.

[0134] It should be noted that the information interaction and implementation process between the modules / units of the above-mentioned device are based on the same concept as the method embodiment of this application, and the resulting technical effects are the same as those of the method embodiment of this application. For specific details, please refer to the description in the method embodiment shown above in the embodiment of this application, which will not be repeated here.

[0135] Please refer to Figure 8. Figure 8 is a structural schematic diagram of a computing device provided in the embodiment of this application. As shown in Figure 8, the computing device 800 (which can be used to present the aforementioned first computing node or second computing node. For ease of explanation, the following description uses the computing device 800 to present the aforementioned first computing node) includes: a processor 801, a memory 802, a communication interface 803, and a bus 804. The processor 801, the memory 802, and the communication interface 803 are coupled through the bus (not marked in the figure). The memory 802 stores instructions. When the execution instructions in the memory 802 are executed, the computing device 800 executes the method performed by the first computing node or the second computing node in the above method embodiments.

[0136] The computing device 800 may be one or more integrated circuits configured to implement the above methods, such as: one or more application-specific integrated circuits (ASICs), or one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs), or a combination of at least two of these integrated circuit forms. For example, when the units in the device can be implemented in the form of a processing element scheduler, the processing element may be a general-purpose processor, such as a central processing unit (CPU) or other processor capable of calling programs. For example, these units may be integrated together and implemented as a system-on-a-chip (SOC).

[0137] The processor 801 may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), or field-programmable gate arrays (FPGAs).Programmable gate array (FPGA) or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The general-purpose processor can be a microprocessor or any conventional processor.

[0138] The memory 802 can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Among them, the non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0139] The memory 802 stores executable program code, which the processor 801 executes to implement the functions of the aforementioned first forwarding module, first scheduler, and first TA module, thereby realizing the above-mentioned data transmission method based on the cloud service system. That is, the memory 802 stores instructions for executing the above-mentioned data transmission method based on the cloud service system.

[0140] The communication interface 803 uses, for example but not limited to, a transceiver module such as a network interface card or transceiver, to realize communication between the computing device 800 and other devices or communication networks.

[0141] In addition to the data bus, the bus 804 may also include a power bus, a control bus, and a status signal bus. The bus may be a peripheral component interconnect express (PCIe) bus or an extended industry standard architecture (EISA) bus.Buses include lines, unified bus (Ubus or UB), compute express link (CXL), cache coherent interconnect for accelerators (CCIX), etc. Buses can be divided into address buses, data buses, control buses, etc.

[0142] Please refer to Figure 9, which is a schematic diagram of a computing device cluster provided in an embodiment of this application. As shown in Figure 9, the computing device cluster 900 includes at least one computing device 800.

[0143] As shown in Figure 9, the computing device cluster 900 includes at least one computing device 800. The memory 802 of one or more computing devices 800 in the computing device cluster 900 may store the same instructions for executing the above-mentioned data transmission method based on the cloud service system.

[0144] In some possible implementations, the memory 802 of one or more computing devices 800 in the computing device cluster 900 may also store some instructions for executing the above-mentioned data transmission method based on the cloud service system. In other words, a combination of one or more computing devices 800 can jointly execute the data transmission method for performing the above-mentioned cloud service system.

[0145] It should be noted that the memory 802 in different computing devices 800 in the computing device cluster 900 can store different instructions, which are used to execute some functions of the above-mentioned cloud management platform. That is, the instructions stored in the memory 802 in different computing devices 800 can realize the functions of one or more modules such as the first forwarding module, the first scheduler, and the first TA module.

[0146] In some possible implementations, one or more computing devices 800 in the computing device cluster 900 can be connected through a network. The network can be a wide area network or a local area network, etc.

[0147] Please refer to Figure 10, which is a schematic diagram of computer devices in a computer cluster provided in the embodiment of this application being connected through a network. As shown in Figure 10, two computing devices 800A and 800B are connected through a network. Specifically, they are connected to the network through the communication interface in each computing device.

[0148] In one possible implementation, the memory in computing device 800A stores instructions for performing the functions of modules such as the first forwarding module. Simultaneously, the memory in computing device 800B stores instructions for performing the functions of modules such as the first scheduler and the first TA module.

[0149] It should be understood that the functions of computing device 800A shown in FIG. 10 can also be performed by multiple computing devices. Similarly, the functions of computing device 800B can also be performed by multiple computing devices.

[0150] This application embodiment also relates to a computer storage medium, which stores a program for signal processing. When the program is run on a computer, it causes the computer to execute the steps performed by the first computing node or the second computing node in the embodiment shown in FIG4.

[0151] This application embodiment also relates to a computer program product, which stores instructions that, when executed by a computer, cause the computer to execute the steps performed by the first computing node or the second computing node in the embodiment shown in FIG4.

[0152] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0153] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices, and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of units is merely a logical functional division. In actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Another point is that the displayed or discussed mutual coupling or direct coupling or communication connection can be an indirect coupling or communication connection through some interfaces, devices or units, and can be electrical, mechanical or other forms.

[0154] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0155] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The integrated unit can be implemented in hardware or in the form of a software functional unit.

[0156] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, essentially the part that contributes to the prior art (pages 17 / 18, 22 CN 120994574 A), or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments of this application.Part or partial steps. The aforementioned storage media include: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks or optical disks, and other media capable of storing program code. Instruction manual 18 / 18 page 23 CN 120994574 A Figure 1 Figure 2a Instruction manual figure 1 / 8 page 24 CN 120994574 A Figure 2b Instruction manual figure 2 / 8 page 25 CN 120994574 A Figure 3 Instruction manual figure 3 / 8 page 26 CN 120994574 A Figure 4 Instruction manual figure 4 / 8 page 27 CN 120994574 A Figure 5a Figure 5b Instruction manual figure 5 / 8 page 28 CN 120994574 A Figure 6 Figure 7 Instruction manual figure 6 / 8 page 29 CN 120994574 A Figure 8 Figure 9 Instruction manual figure 7 / 8 page 30 CN 120994574 A Figure 10 Instruction manual figure 8 / 8 page 31 CN 120994574 A Our Ref.: C065 / P1019 / HK DATA TRANSMISSION METHOD BASED ON CLOUD SERVICE SYSTEM, AND CLOUD SERVICE SYSTEM Abstract The present application discloses a data transmission method based on a cloud service system, and a cloud service system, which can improve the speed of data transmission, thereby enhancing the processing efficiency of tasks associated with the data. The method of the present application includes: when a first processor of a first computing node needs to send data to a second processor of a second computing node, the firstprocessor of the first computing node may directly write the data into a first memory area of a first host machine that is allocated to the first processor, and write a first instruction into a second memory area of the first host machine. Since the first host machine polls the second memory area, it may determine, based on the second instruction obtained from polling, that the data is stored in the first memory area. Then, the first host machine may notify a first SDI card of the first computing node to read the data from the allocated first memory area, so as to send the data to the second processor of the second computing node.

Claims

1. A data transmission method based on a cloud service system, characterized in that, The cloud service system includes infrastructure for providing cloud services. The infrastructure includes a first computing node and a second computing node. The first computing node includes a first host, a first processor, and a first software-defined infrastructure (SDI) card. The method includes: The first processor writes the data to be transmitted into the first memory area of ​​the first host machine and writes the first instruction into the second memory area of ​​the first host machine. The first memory area is the memory area allocated by the first host machine to the first processor. The first host machine polls the second memory region to determine, based on the first instruction obtained from the polling, that the first memory region stores the data; The first host machine notifies the first SDI card to read the data from the first memory region; The first SDI card sends the data to the second computing node.

2. The method according to claim 1, characterized in that, The first processor writes the data to be transmitted into the first memory area of ​​the first host machine, including: The first processor generates data to be transmitted and stores the data in the third memory area of ​​the first processor; The first processor copies the data from the third memory region to the first memory region based on the address of the third memory region and the address of the first memory region of the first host machine.

3. The method according to claim 1 or 2, characterized in that, The second computing node includes a second host, a second processor, and a second SDI card. The first host notifies the first SDI card to read the data from the first memory region, and the first SDI card sends the data to the second computing node, including: The first host machine obtains from the first mapping table the address of the mutually bound third memory region, the address of the first memory region, the address of the first SDI card, the address of the second SDI card, and the address of the fourth memory region of the second host machine, wherein the fourth memory region is the memory region allocated by the second host machine to the second processor; The first host machine provides the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region to the first SDI card based on the address of the first SDI card; The first SDI card reads the data from the first memory region based on the address of the first memory region; The first SDI card sends the data and the address of the fourth memory region to the second SDI card based on the address of the second SDI card. The address of the fourth memory region is used by the second SDI card to write the data into the fourth memory region.

4. The method according to claim 3, characterized in that, The first host machine provides the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region to the first SDI card based on the address of the first SDI card, including: The first host machine writes the second instruction into the first register of the first SDI card based on the address of the first SDI card; The first SDI polls the first register to obtain the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region provided by the first host machine based on the second instruction obtained from the polling.

5. The method according to claim 4, characterized in that, The first instruction and the second instruction are store instructions.

6. The method according to any one of claims 1 to 5, characterized in that, The method further includes: The second SDI card writes the data from the first SDI card into the fourth memory area of ​​the second host machine, and instructs the second host machine to determine that the data has arrived in the fourth memory area; The second host writes the data from the fourth memory region to the second processor; The second processor processes the data to obtain the processing result.

7. The method according to claim 6, characterized in that, The second SDI card writes the data from the first SDI card into the fourth memory region, and the second host machine determines that the data has been stored in the fourth memory region, including: The second SDI card writes the data into the fourth memory region based on the address of the fourth memory region, and provides the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card to the second host machine, so that the second host machine can determine that the data has arrived in the fourth memory region of the second host machine.

8. The method according to claim 7, characterized in that, The second host machine writes the data from the fourth memory region to the second processor in the following ways: The second host machine obtains from the second mapping table the address of the fifth memory region of the second processor, which is bound to the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card; The second host machine copies the data from the fourth memory region to the fifth memory region based on the address of the fourth memory region and the address of the fifth memory region.

9. The method according to claim 8, characterized in that, The second processor processes the data to obtain the processing result, including: The second processor polls the second register of the second processor to determine, based on the third instruction obtained from the polling, that the data is stored in the fifth memory region, and the third instruction is written into the second register by the second host machine; The second processor retrieves the data from the fifth memory region based on the address of the fifth memory region, processes the data, and obtains the processing result of the data.

10. A cloud service system, characterized in that, The cloud service system includes infrastructure for providing cloud services. The infrastructure includes a first computing node and a second computing node. The first computing node includes a first host, a first processor, and a first SDI card. The first processor is configured to write the data to be transmitted into a first memory area of ​​the first host machine and write the first instruction into a second memory area of ​​the first host machine, wherein the first memory area is the memory area allocated by the first host machine to the first processor; The first host machine is configured to poll the second memory region to determine, based on the first instruction obtained from the polling, that the first memory region stores the data; The first host machine is also configured to notify the first SDI card to read the data from the first memory region; The first SDI card is used to send the data to the second computing node.

11. The cloud service system according to claim 10, characterized in that, The first processor is configured to: Generate the data to be transmitted and store the data in the third memory area of ​​the first processor; Based on the address of the third memory region and the address of the first memory region of the first host machine, the data is copied from the third memory region to the first memory region.

12. The cloud service system according to claim 10 or 11, characterized in that, The second computing node includes a second host, a second processor, and a second SDI card; The first host machine is used for: From the first mapping table, obtain the addresses of the mutually bound third memory region, the first memory region, the first SDI card, the second SDI card, and the fourth memory region of the second host machine, wherein the fourth memory region is the memory region allocated by the second host machine to the second processor; Based on the address of the first SDI card, the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region are provided to the first SDI card; The first SDI card is used for: Based on the address of the first memory region, read the data from the first memory region; Based on the address of the second SDI card, the data and the address of the fourth memory region are sent to the second SDI card, and the address of the fourth memory region is used by the second SDI card to write the data into the fourth memory region.

13. The cloud service system according to claim 12, characterized in that, The first host machine is configured to write a second instruction into the first register of the first SDI card based on the address of the first SDI card; The first SDI is used to poll the first register to obtain the address of the first memory region, the address of the second SDI card, and the address of the fourth memory region provided by the first host machine based on the second instruction obtained from the polling.

14. The cloud service system according to claim 13, characterized in that, The first instruction and the second instruction are store instructions.

15. The cloud service system according to any one of claims 10 to 14, characterized in that, The second SDI card is used to write the data from the first SDI card into the fourth memory area of ​​the second host machine, and to enable the second host machine to determine that the data has arrived in the fourth memory area; The second host machine is used to write the data from the fourth memory region to the second processor; The second processor is used to process the data to obtain the processing result of the data.

16. The cloud service system according to claim 15, characterized in that, The second SDI card is used to write the data into the fourth memory region based on the address of the fourth memory region, and to provide the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card to the second host machine so that the second host machine can determine that the data has arrived in the fourth memory region of the second host machine.

17. The cloud service system according to claim 16, characterized in that, The second host machine is used for: From the second mapping table, obtain the address of the fifth memory region of the second processor, which is bound to the address of the fourth memory region, the address of the first SDI card, and the address of the second SDI card; Based on the address of the fourth memory region and the address of the fifth memory region, the data is copied from the fourth memory region to the fifth memory region.

18. The cloud service system according to claim 17, characterized in that, The second processor is used for: The second register of the second processor is polled to determine, based on the third instruction obtained from the polling, that the data is stored in the fifth memory region, and the third instruction is written into the second register by the second host machine; Based on the address of the fifth memory region, the data is obtained from the fifth memory region, and the data is processed to obtain the processing result of the data.

19. A computing device cluster, characterized in that, The computing device cluster includes at least one computing device, each computing device including a processor and memory: The memory is used to store instructions; The processor is configured to, according to the instructions, cause the computing device cluster to perform the method of any one of claims 1 to 9.

20. A computer storage medium, characterized in that, The computer storage medium stores one or more instructions that, when executed by one or more computers, cause the one or more computers to perform the method of any one of claims 1 to 9.

21. A computer program product, characterized in that, The computer program product stores instructions that, when executed by a computer, cause the computer to perform the method described in any one of claims 1 to 9.

Images