Methods for making EUV patternable hard masks

Abstract

SOLUTION: Methods for making thin-films on semiconductor substrates, which may be patterned using EUV, include: mixing a vapor stream of an organometallic precursor with a vapor stream of a counter-reactant so as to form a polymerized organometallic material; and depositing the organometallic polymer-like material onto the surface of the semiconductor substrate. The mixing and depositing operations may be performed by chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with a CVD component, such as a discontinuous, ALD-like process in which metal precursors and counter-reactants are separated in either time or space.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] [CROSS REFERENCE TO RELATED APPLICATIONS] This application claims the benefit of U.S. Provisional Application No. 62 / 782,578, filed December 20, 2018, and U.S. Provisional Application No. 62 / 670,644, filed May 11, 2018, the entire disclosures of which are incorporated herein by reference.

[0002] The present technology relates to systems and methods for forming lithographic masks for use in semiconductor manufacturing. In particular, the present technology provides methods, apparatus, and compositions for forming patternable hard masks on substrates used in the manufacture of semiconductor devices. [Background technology]

[0003] The discussion of the background art provided herein is intended to present the contents of the present disclosure generally, and the inventions of the presently named inventors are not admitted expressly or impliedly as prior art to the present technology to the extent that they are described in this Background section and in a manner of description that is not prior art at the time of filing.

[0004] The fabrication of semiconductor devices, such as integrated circuits, is a multi-step process that involves photolithography. Typically, the process involves the deposition of material on a wafer and patterning the material by lithographic techniques to form the structural features of the semiconductor device (e.g., contacts, vias, interconnects, transistors, and circuits). Typical photolithography process steps known in the art include preparation of a substrate, application of photoresist, e.g., by spin coating, exposure of the photoresist in a desired pattern, dissolving more or less of the exposed areas of the photoresist in a developer solution, development by application of a developer solution to remove either the exposed or unexposed areas of the photoresist, and subsequent processing to form features on the substrate areas where the photoresist was removed, such as by etching or material deposition.

[0005] The evolution of semiconductor design has been driven by the need for and ability to create ever-smaller features on semiconductor substrate materials. This technological advance has been characterized in "Moore's Law" as the density of transistors in high-density integrated circuits doubling every two years. In fact, chip design and manufacturing has advanced so that modern microprocessors contain billions of transistors and other circuit features on a single chip. Individual features on such chips can be on the order of 22 nanometers (nm) or smaller, and in some cases less than 10 nm.

[0006] One challenge in the manufacture of devices with such fine features is the ability to reliably and reproducibly form photolithography masks with sufficient resolution. Current photolithography processes typically use 193 nm ultraviolet (UV) light to expose photoresist. The fact that the light has a wavelength significantly larger than the desired feature size to be formed on the semiconductor substrate creates unique problems. Achieving feature sizes smaller than the wavelength of light requires the use of complex high-resolution techniques such as multiple patterning. Thus, the development of photolithography techniques using shorter wavelength light, such as extreme ultraviolet radiation (EUV), having a wavelength of 10 nm to 15 nm (e.g., 13.5 nm), is of significant importance and significant research effort.

[0007] However, EUV photolithography processes may present challenges including low power output and light loss during patterning. Conventional organic chemically amplified resists (CARs), similar to those used in 193 nm UV lithography, have potential drawbacks when used in EUV lithography, especially since they have low adsorption coefficients in the EUV region, which may result in blurring of diffusion of photoactivated chemical species or roughness of line edges. Furthermore, to provide the etch resistance required to pattern the underlying device layers, fine features patterned in conventional CAR materials may result in high aspect ratios with risk of pattern collapse. Thus, there remains a need for improved EUV photoresist materials with the properties of low thickness, better absorbance, and better etch resistance. Summary of the Invention

[0008] The present technology provides methods for forming thin films on substrates, particularly semiconductor substrates, that can be patterned using EUV. Such methods include those in which a polymerized organometallic material is generated in the vapor phase and deposited on the substrate. Specifically, a method for forming an EUV-patternable thin film on a surface of a semiconductor substrate includes mixing a vapor flow of an organometallic precursor with a vapor flow of a counter-reactant to generate a polymerized organometallic material, and depositing an organometallic polymeric material on the surface of the semiconductor substrate. In some embodiments, one or more organometallic precursors are included in the vapor flow. In some embodiments, one or more counter-reactants are included in the vapor flow. In some embodiments, the mixing and deposition operations are performed in a continuous chemical vapor deposition (CVD), atomic layer deposition (ALD) process, or ALD that includes a CVD component (such as a discontinuous ALD-like process in which the metal precursor and the counter-reactant are separated in time or space). The present technology also provides a method for forming a pattern on a surface of a semiconductor material, which method typically involves exposing an area of ​​an EUV patternable thin film formed according to the present technology with a patterned beam of EUV light under a relatively high vacuum, then removing the wafer from the vacuum and performing a post-exposure bake in ambient air. The exposure results in one or more exposed areas such that the film includes one or more unexposed areas that have not been exposed to EUV light. Further processing of the coated substrate may take advantage of the chemical and physical differences in the exposed and unexposed areas.

[0009] Further scope of applicability of the present technology will become apparent from the detailed description, claims, and drawings. The detailed description and specific examples are intended for illustrative purposes only and are not intended to limit the scope of the present technology. [Brief description of the drawings]

[0010] The present technology will become better understood from the detailed description and the accompanying drawings. [Figure 1] 1 is an exemplary chemical reaction scheme of the present technology. [Diagram 2] 1 is a flow chart illustrating exemplary process aspects of film deposition and treatment of the present technique. [Diagram 3] 1 is an exemplary process for forming an EUV defined pattern according to the present technique. [Figure 4] 4 is another exemplary process for forming a pattern according to the present technique. [Figure 5a] 4 is a scanning electron microscope image of an exemplary substrate formed according to Example 1 having pattern features formed using the methods of the present technique. [Figure 5b] 4 is a scanning electron microscope image of an exemplary substrate formed according to Example 1 having pattern features formed using the methods of the present technique. [Figure 5c] 4 is a scanning electron microscope image of an exemplary substrate formed according to Example 1 having pattern features formed using the methods of the present technique. [Figure 6a] 4 is a scanning electron microscope image of an exemplary substrate formed according to Example 2 having pattern features formed using the methods of the present technique. [Figure 6b] 4 is a scanning electron microscope image of an exemplary substrate formed according to Example 2 having pattern features formed using the methods of the present technique. [Figure 7a] 4 is a scanning electron microscope image of a further exemplary substrate formed according to Example 2 having pattern features formed using the methods of the present technique. [Figure 7b] 4 is a scanning electron microscope image of a further exemplary substrate formed according to Example 2 having pattern features formed using the methods of the present technique. [Figure 8] 11 is a scanning electron microscope image of an exemplary substrate having pattern features formed using the methods of the present technique and underlying features formed according to Example 3. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The following description of the technology is merely exemplary in nature of the subject matter, manufacture, and use of one or more inventions and is not intended to limit the scope, application, or use of any particular inventions claimed in this application, or in any other application that may be filed claiming priority to this application, or in any patents issuing therefrom. A non-limiting discussion of terms and phrases that will aid in the understanding of the technology is provided at the end of this detailed description.

[0012] As described above, the present technique provides methods for forming polymeric thin films on semiconductor substrates that can be patterned using EUV, including those in which polymeric organometallic materials are produced in the vapor phase and deposited on the substrate.

[0013] The substrate may comprise any material composition suitable for photolithographic processing, particularly for the manufacture of integrated circuits and other semiconductor devices. In some embodiments, the substrate is a silicon wafer. The substrate may be a silicon wafer with features ("underlying features") formed thereon having an irregular surface topography (as used herein, "surface" refers to the surface on which the film of the present technology is deposited or the surface exposed to EUV during processing). Such underlying features may include areas where material has been removed (e.g., by etching) or where material has been added (e.g., by deposition) during processing prior to the method of the present technology being performed. Such pre-processing may include the method of the present technology or other processing methods in an iterative process in which two or more layers of features are formed on the substrate. Without limiting the mechanism, function, or utility of the present technology, in some embodiments, the method of the present technology is considered to be advantageous over methods known in the art in which a photolithographic film is deposited on the surface of a substrate using a spin-casting method. Such advantages are due to the conformality of the film of the present technology to the underlying features without "filling" or planarizing such features, and the ability to deposit films on surfaces of a variety of materials. An exemplary substrate having underlying features onto which a film of the present technology is deposited is shown in FIG. 8, which is further referenced in Example 3 below.

[0014] Polymer thin film The present technology provides a method in which an EUV-sensitive thin film is deposited on a substrate. Such a film can act as a resist for subsequent EUV lithography and processing. When such an EUV-sensitive film is exposed to EUV, it undergoes changes such as loss of bulky pendant substituents attached to metal atoms of low density M-OH rich materials, allowing crosslinking to higher density MOM-bonded metal oxide materials. EUV patterning produces film regions with altered physical or chemical properties relative to unexposed regions. These properties may be exploited in subsequent processing such as to dissolve unexposed or exposed regions or to selectively deposit material in exposed or unexposed regions. In some embodiments, under conditions under which such subsequent processing is performed, the unexposed film has a hydrophobic surface and the exposed film has a hydrophilic surface (the hydrophilic properties of exposed and unexposed regions are said to be correlated). For example, material removal may be performed by exploiting differences in the chemical composition, density, and crosslinking of the film. Removal may be performed by wet or dry processing, which are further described below.

[0015] In various embodiments, the thin film is made of SnO x or other metal oxide moieties. The organometallic compounds may be produced in a gas phase reaction of an organometallic precursor with a counter-reactant. In various embodiments, the organometallic compounds are formed by mixing a specific combination of an organometallic precursor having a bulky alkyl or fluoroalkyl group with a counter-reactant and polymerizing the mixture in the gas phase to produce a low density EUV-sensitive material that deposits on the substrate.

[0016] In various embodiments, the organometallic precursor comprises at least one alkyl group on each metal atom that is capable of surviving a gas phase reaction, but other ligands or ions coordinated to the metal atom may be replaced with counter-reactants. The organometallic precursor has the formula: a R b L c (Equation 1) (M is a metal with a high EUV absorption cross section, R is C n H 2n+1(preferably n≧3), L has a ligand, ion, or other moiety that is reactive towards the counter reactant, a≧1, b≧1, c≧1).

[0017] In various embodiments, M is 1×10 7 cm 2 / mol or more. For example, M may be selected from the group consisting of tin, bismuth, antimony, and combinations thereof. In some embodiments, M is tin. R may be fluorinated (e.g., a compound of the formula: C n F x H (2n+1) In various embodiments, R has at least one beta hydrogen or beta fluorine. For example, R may be selected from the group consisting of i-propyl, n-propyl, t-butyl, i-butyl, n-butyl, sec-butyl, n-pentyl, i-pentyl, t-pentyl, sec-pentyl, and combinations thereof. L may be any moiety that is readily displaced by a counter reactant to generate the M-OH moiety, such as a moiety selected from the group consisting of an amine (dialkylamino, monoalkylamino, etc.), an alkoxy, a carboxylic acid, a halogen, and combinations thereof.

[0018] The organometallic precursor may be any of a variety of candidate organometallic precursors. For example, when M is tin, such precursors include t-butyltris(dimethylamino)tin, i-butyltris(dimethylamino)tin, n-butyltris(dimethylamino)tin, sec-butyltris(dimethylamino)tin, i-propyl(tris)dimethylaminotin, n-propyltris(dimethylamino)tin, and analogous alkyl(tris)(t-butoxy)tin compounds, such as t-butyltris(t-butoxy)tin. In some embodiments, the organometallic precursor is partially fluorinated.

[0019] The counter-reactant preferably has the ability to displace a reactive moiety ligand or ion (e.g., L in Formula 1 above) to bond at least two metal atoms together through a chemical bond. Counter-reactants may include water, peroxides (e.g., hydrogen peroxide), di- or polyhydroxy alcohols, fluorinated di- or polyhydroxy alcohols, fluorinated glycols, and other sources of hydroxyl moieties. In various embodiments, the counter-reactant reacts with the organometallic precursor by forming oxygen bridges between adjacent metal atoms. Other potential counter-reactants include hydrogen sulfide and hydrogen disulfide, which may bridge metal atoms through sulfur bridges. An exemplary process by which polymerized organometallic materials are produced is shown in FIG. 1.

[0020] The thin films may include optional materials in addition to the organometallic precursors and counter-reactants to modify the chemical or physical properties of the film (e.g., to modify the film's sensitivity to EUV or to increase etch resistance). Such optional materials may be introduced, for example, by doping during vapor phase formation prior to deposition on the substrate, after film formation, or both. In some embodiments, mild remote H doping may be used to replace some Sn-L bonds with Sn-H. 2 A plasma may be introduced, which may increase the reactivity of the resist under EUV.

[0021] Film formation An exemplary process for film deposition and treatment of the present technique is shown in Figure 2. In some embodiments, the method includes a pre-treatment 1 to improve adhesion of the film to the substrate. The EUV film may then be deposited 2 on the substrate.

[0022] In various embodiments, the EUV patternable film is deposited on the substrate using vapor deposition equipment and processes known in the art. In such processes, polymerized organometallic materials are generated in the vapor phase or in-situ on the surface of the substrate. Suitable processes include, for example, chemical vapor deposition (CVD), atomic layer deposition (ALD), and ALD with CVD elements (such as discontinuous ALD-like processes in which the metal precursor and counter-reactant are separated in time or space).

[0023] In general, the method includes mixing a vapor flow of an organometallic precursor with a vapor flow of a counter-reactant to produce a polymerized organometallic material and depositing the organometallic material onto a surface of a semiconductor substrate. As will be appreciated by those skilled in the art, the mixing and deposition aspects of the process may be simultaneous in a substantially continuous process.

[0024] In an exemplary continuous CVD process, two or more gas streams of organometallic precursor and counter-reactant sources are introduced into a deposition chamber of a CVD apparatus at separate inlets, where they mix and react in the gas phase to produce an aggregated polymeric material (e.g., by the formation of metal-oxygen-metal bonds). These streams may be introduced, for example, using separate inlets or a dual plenum showerhead. The apparatus is configured such that the organometallic precursor and counter-reactant flows mix in the chamber, so that the organometallic precursor and counter-reactant react to produce a polymerized organometallic material. Without limiting the mechanism, function, or utility of the present technology, it is believed that the products of such gas phase reactions become heavier in molecular weight as metal atoms are cross-linked by the counter-reactant, and are then condensed or deposited on a substrate. In various embodiments, the steric hindrance of the bulky alkyl groups prevents the formation of a densely packed network, forming a porous, low-density film.

[0025] CVD processes are typically carried out at low pressures, such as 10 millitorr to 10 torr. In some embodiments, the process is carried out at 0.5 torr to 2 torr. The temperature of the substrate is preferably equal to or lower than the temperature of the reactant stream. For example, the temperature of the substrate may be from 0° C. to 250° C., or from ambient temperature (e.g., 23° C.) to 150° C. In various processes, deposition of polymerized organometallic material onto the substrate occurs at a rate that is inversely proportional to the surface temperature.

[0026] The thickness of the EUV patternable film formed on the surface of the substrate may vary depending on the surface characteristics, materials used, and processing conditions. In various embodiments, the film thickness may range from 0.5 nm to 100 nm, and is preferably thick enough to absorb most of the EUV light under EUV patterning conditions. For example, the total absorption of the resist film may be 30% or less (e.g., 10% or less or 5% or less) so that the resist material at the bottom of the resist film is fully exposed. In some embodiments, the film thickness is 10 nm to 20 nm. Without limiting the mechanism, function, or utility of the present technology, it is contemplated that unlike the wet spin coating processes of the art, the process of the present technology may be applied to a variety of substrates since there are few limitations on the surface adhesion properties of the substrate. Also, as described above, the deposited film may conform closely to surface features, providing benefits in forming a mask on a substrate (such as a substrate having such features) without "filling" or planarizing the underlying features.

[0027] EUV Patterning The present technology also provides a method in which the film is patterned by exposing a region of the deposited film to EUV light. With further reference to FIG. 2, patterning 4 may be followed by an optional post-exposure bake 3 of the film. In such patterning, EUV light is focused on one or more regions of the coated substrate. Exposure to EUV is typically performed such that the film includes one or more regions that are not exposed to EUV light. The resulting film may include multiple exposed and unexposed regions, forming a pattern consistent with the formation of transistors or other features of a semiconductor device that are formed by the addition or removal of material from the substrate in subsequent processing of the film and substrate. EUV apparatus and imaging methods useful herein include methods known in the art.

[0028] Specifically, as described above, regions of the film are formed by EUV patterning that have altered physical or chemical properties relative to the unexposed regions. For example, in the exposed regions, removal of the beta hydride results in metal-carbon bond cleavage, leaving reactive accessible metal hydride functionality that can be converted to hydroxide and crosslinked metal oxide moieties by metal-oxygen bridges that can be used to create chemical contrast as a negative resist or template for a hardmask. In general, more beta-H in the alkyl group results in a more photosensitive film. Following exposure, the film may be baked to provide further crosslinking of the metal oxide film. This chemical reaction is illustrated in Figures 1, 3, and 4. The difference in properties between the exposed and unexposed regions may be exploited in subsequent processing, such as to dissolve the unexposed regions or to deposit material in the exposed regions.

[0029] Such methods can be used to pattern in different ways. With further reference to FIG. 2, in some embodiments, a post-exposure bake 5 can facilitate removal of alkyl groups in the film in a negative resist method. Such a negative resist method is illustrated in FIG. 3. Without limiting the mechanism, function, or utility of the present technology, for example, 10 mJ / cm 2 to 100 mJ / cm 2EUV exposure at doses of 1000 nm may relieve steric hindrance and provide space for the low density film to collapse, and reactive metal-H bonds generated in the beta-hydride elimination reaction can react with adjacent active groups such as hydroxyls in the film, resulting in further crosslinking and densification, creating a chemical contrast between exposed and unexposed regions.

[0030] This material contrast can then be used in subsequent processing, as shown in Figure 2. Such processing 6 may include wet development, dry development, or area-selective ALD. For example, a wet development process or a dry development process may remove the unexposed areas and leave the exposed areas.

[0031] In the wet development process, chemical changes in the exposed regions result in the formation of more cross-linked material with higher molecular weight, resulting in a significant decrease in solubility in the selected organic solvent. The non-cross-linked regions may be removed with a suitable organic solvent (such as isopropyl alcohol, n-butyl acetate, or 2-heptanone). An unexpected advantage of dry deposition is that the film is completely soluble. Without limiting the mechanism, function, or utility of the present technology, this advantage may be related to the gas phase polymerization / condensation that occurs during deposition, potentially producing cyclic oligomers that are readily soluble in the selected solvent.

[0032] Selective dry etching may be performed by taking advantage of differences in composition, degree of crosslinking, and film density. In some embodiments of the present technology, the film of the present technology is vapor-deposited on a substrate. The film is then directly patterned by EUV exposure, and the pattern is developed using a dry method to form a metal oxide-containing mask. Methods and apparatus useful in such processes are described in U.S. Patent Application No. 62 / 782,578, filed December 20, 2018, by Volosskiy et al., which is incorporated herein by reference.

[0033] Such a dry development process involves the use of BCl 3This can be done using mild plasma (high pressure, low power) or thermal treatments while flowing dry development chemistries such as BCl (boron trichloride) or other Lewis acids. 3 can rapidly remove unexposed material leaving a pattern in the exposed film that can be transferred to an underlying layer by a plasma-based etching process, such as a conventional etching process.

[0034] Plasma processes include transformer coupled plasma (TCP), inductively coupled plasma (ICP), or capacitively coupled plasma (CCP) using equipment and techniques known in the art. For example, the process may be carried out at a power level of <1000 W (e.g., <500 W) at a pressure of >5 mT (e.g., >15 mT). Temperatures may be from 0° C. to 300° C. (e.g., 30° C. to 120° C.) with flow rates of 100 standard cubic centimeters per minute (sccm) to 1000 sccm (e.g., about 500 sccm for 1 s to 3000 s (e.g., 10-600 s)).

[0035] In a thermal development process, the substrate is exposed to dry development chemicals (e.g., Lewis acids) in a vacuum chamber (e.g., an oven). A suitable chamber may include a vacuum line, a dry development chemical gas (e.g., Bl 3 ) lines, and heaters for temperature control. In some embodiments, the chamber interior may be provided with a corrosion resistant coating, such as an organic polymer coating or an inorganic coating. One such coating is polytetrafluoroethylene (PTFE) (e.g., Teflon 1M). Such materials may be used in the thermal processes of the present technique without risk of removal by plasma exposure.

[0036] In various embodiments, the method of the present technology combines all dry steps of deposition, (EUV) lithography photopatterning, and film formation by dry development. In such a process, the substrate may proceed directly to a dry development / etching chamber following photopatterning in an EUV scanner. Such a process may avoid the material and manufacturing costs associated with wet development. Alternatively, a post-exposure bake step, in which the exposed areas are further crosslinked to form a denser SnO-like network, may be performed in the development chamber or another chamber.

[0037] Without limiting the mechanism, function, or utility of the present technology, the dry process of the present technology may provide various benefits over wet development processes known in the art. For example, the dry deposition techniques described herein can be used to deposit thinner, more defect-free films than those applied using spin-coating techniques, and the exact thickness of the deposited film can be changed and controlled simply by expanding or contracting the length of the deposition step or deposition sequence. Thus, dry processes may provide more tunability, providing more critical dimension (CD) control and scum removal. Dry development may improve performance (e.g., prevent line collapse due to surface tension in wet development) and increase throughput, for example, by avoiding wet development tracks. Other advantages may include elimination of the need for organic solvent developers, reduced adhesion sensitivity issues, and unlimited solubility-based limitations.

[0038] EUV-patterned thin films can also be used as templates for area-selective deposition of hardmasks, as shown in FIG. 4. In some embodiments, removal of surface alkyl groups from a deposited organometallic polymer film can form a pattern having regions of reactive surface moieties that can be used for bonding with a secondary material (such as a metal oxide precursor) that is applied to the surface of the substrate. Such patterns can include hydrophilic hydride or hydroxide exposed surfaces and hydrophobic bulky alkyl group coated unexposed regions. Such a process can be performed using relatively low doses of EUV light (e.g., 1 mJ / cm2). 2 to 40 mJ / cm 2) which allows for the selective deposition of secondary materials by surface-driven processes such as atomic layer deposition (ALD) and electroless deposition (ELD).

[0039] For example, the formation of a hard mask by ALD is a surface-driven process that requires nucleation sites such as hydroxyl groups on which precursors can adsorb. In unexposed areas, the surface is terminated by bulky alkyl groups that are inert to ALD and act to sterically block the hydroxyl groups. Meanwhile, exposed areas are covered by active hydride and / or hydroxyl functionality that can act as nucleation sites for the ALD process. The difference in surface reactivity can be used to selectively deposit an etch-resistant material in the exposed areas to form a hard mask for potential dry etching / dry development. For this application, only the surface alkyl groups need to be removed under EUV exposure. The desired film thickness for ALD can be 0.5 nm to 30 nm. ALD precursors may diffuse into the exposed resist and nucleate in the exposed areas. ALD can be a metal or metal oxide film and the ALD deposition temperature can be 30° C. to 500° C. (e.g., 30° C. to 210° C.). Resist film thicknesses of 0.5 nm to 40 nm may be observed. In some embodiments, thicker films provide some benefit because the collapse of the resist film can be used to prevent the expansion of the ALD film. A plasma etching process can be used to transfer the pattern to the underlying layer. For example, for Sn-based CVD resist films, H 2 or H 2 / CH 4 The plasma is used to remove the unexposed resist material.

[0040] Embodiments of the present technology are further illustrated by the following non-limiting examples.

[0041] Example 1 The EUV patternable films are deposited using a CVD process on three silicon wafer substrates using t-butyltris(dimethylamino)tin as the organometallic precursor and water vapor as the counter reactant. The substrates and deposition chamber walls are maintained at a temperature of about 70° C. The process is carried out at a pressure of about 2 Torr.

[0042] The organometallic precursors are introduced into the deposition chamber through a bubbler using argon carrier gas at a flow rate of about 200 standard cubic centimeters per minute. The counter reactant is water delivered using an evaporator at about 50 mg / min. The precursors are introduced into the deposition chamber through two separate inlets and then mixed in the space above the substrate.

[0043] As further described below, a polymerized organometallic film having a thickness of about 40 nm is deposited on the surface of the substrate. The substrate is then baked at 150° C. for 2 minutes, developed in 2-heptanone for about 15 seconds, and subsequently washed with the same solvent for 15 seconds. Figures 5a, 5b, and 5c are scanning electron microscope images of the substrate after development.

[0044] Specifically, the two substrates were irradiated at approximately 72 mJ / cm2 in the Small Area Exposure Tool 3 (MET3) at Lawrence Berkeley National Laboratory (LBNL). 2 The substrates are then patterned using EUV at 1000 nm of exposure to define 1:1 line space features on the surface of the film with half pitches of 32 nm and 80 nm, respectively. Images of the resulting substrates are shown in Figures 5a and 5b, respectively. The third substrate was patterned using an EUV exposure of approximately 60 mJ / cm 2 The film is patterned using EUV exposure to define 34 nm contact vias on the surface of the film. An image of the resulting substrate is shown in Figure 5c.

[0045] Example 2 The EUV patternable films are deposited using a CVD process on two silicon wafer substrates using isopropyltris(dimethylamino)tin as the organometallic precursor and water vapor as the counter reactant. The second silicon wafer has a 50 nm amorphous carbon underlayer. The substrates and deposition chamber walls are maintained at a temperature of about 70°C. The process is carried out at a pressure of about 2 Torr.

[0046] The organometallic precursors are introduced into the deposition chamber through a bubbler using argon carrier gas at a flow rate of about 25 standard cubic centimeters per minute. The counter-reactant is delivered using an evaporator at about 50 mg / min. Both precursors are introduced into the deposition chamber through two sets of separate channels in a dual plenum showerhead and then mixed in the space above the substrate. The showerhead temperature is set to 85°C.

[0047] A polymerized metal-organic film with a thickness of about 20 nm is deposited on the surface of the substrate on both wafers. The first wafer is deposited on the surface of the substrate in an EUV interference lithography (EUV-IL) tool at Paul Scherrer Institute (PSI) at about 75 mJ / cm. 2 ~80mJ / cm 2 The second wafer, with the amorphous carbon underlayer, is patterned using EUV at about 64 mJ / cm2 exposure to define 1:1 line / space features at 26 nm and 24 nm pitch on the surface of the film. The second wafer, with the amorphous carbon underlayer, is patterned using EUV at about 64 mJ / cm2 exposure in the Small Area Exposure Tool 3 (MET3) at Lawrence Berkeley National Laboratory (LBNL). 2 The first substrate is patterned using EUV with 1000 nm of exposure to define 1:1 line / space features with 36 nm pitch on the surface of the film. Both substrates are then baked at 180 °C for about 2 minutes, developed in 2-heptanone for about 15 seconds, and subsequently washed with the same solvent for 15 seconds. The wet developed pattern on the second silicon wafer is then transferred to a 50 nm carbon underlayer using a helium / oxygen plasma process. Figures 6a and 6b are scanning electron microscope images of the first substrate after development. Figure 6a shows the first substrate after development with 76 mJ / cm 2 FIG. 6b shows a substrate with 26 nm pitch features exposed at 79 mJ / cm2 7a and 7b are scanning electron microscope images of a second substrate after development (FIG. 7a) and after pattern transfer (FIG. 7b).

[0048] Example 3 The EUV patternable film is deposited using a CVD process on a silicon wafer substrate using isopropyltris(dimethylamino)tin as the organometallic precursor and water vapor as the counter reactant. The silicon wafer has a 50 nm deep line / space topography formed prior to deposition. The deposition conditions are the same as the process described in Example 2.

[0049] A polymerized metal-organic film with a thickness of about 10 nm is deposited on the surface of the substrate, covering the topography on the silicon wafer. The wafer with the existing topography is then irradiated with about 70 mJ / cm2 in an EUV interference lithography (EUV-IL) tool at Paul Scherrer Institute (PSI). 2 The resist is patterned using EUV with 1000 nm of exposure to define 1:1 line / space features at three different pitches: 32 nm, 28 nm, and 26 nm. The substrate is then baked at 190 °C for about 2 minutes, developed in 2-heptanone for about 15 seconds, and subsequently washed with the same solvent for 15 seconds. Figures 8a, 8b, and 8c are scanning electron microscope images of the resist line / space patterns printed on top of the silicon topography at 32 nm pitch (Figure 8a), 28 nm pitch (Figure 8b), and 26 nm pitch (Figure 8c) after development.

[0050] Non-limiting discussion of terminology The foregoing description is merely exemplary in nature and is not intended to limit the present technology, its application, or uses. The broad technology may be implemented in various forms. Thus, although the present technology includes specific examples, the true scope of the present technology should not be so limited, since other variations will become apparent upon consideration of the drawings, specification, and claims that follow.

[0051] Headings (such as "Background" and "Summary") and subheadings provided herein are intended only as a general organization of the subject matter within the technology and are not intended to limit the scope of the technology or its aspects. In particular, subject matter disclosed in the "Background" may include novel technology and may not constitute a description of the prior art. Subject matter disclosed in the "Summary" is not an exhaustive or complete technology of the entire scope of the technology or its embodiments. Classification or discussion of material within this specification as having a particular utility is for the sake of convenience, and no inference should be made that the material must necessarily or solely function in accordance with its classification herein when used in a given configuration.

[0052] It should be understood that one or more steps in a method may be performed in a different order (or simultaneously) without changing the principles of the present technology. Moreover, although each embodiment is described above as having certain features, one or more of those features described with respect to an embodiment of the present technology may be implemented in other embodiments and / or in combination with features of other embodiments (even if the combination is not specified). That is, the described embodiments are not mutually exclusive, and permutations of one or more embodiments with each other remain within the scope of the present technology. For example, an element that may be A, B, C, D, or E, or a combination thereof, may be defined as A, B, C, or a combination thereof in some embodiments.

[0053] As used herein, the phrase at least one of A, B, and C should be construed to mean a logic using a non-exclusive logical OR (A OR B OR C), and not to mean "at least one of A, at least one of B, and at least one of C."

[0054] As used herein, the words "preferred" or "preferred" refer to embodiments of the present technology that provide certain benefits, under particular circumstances. However, other embodiments may be preferred, under the same or other circumstances. Moreover, the recitation of one or more preferred embodiments does not imply that other embodiments are not beneficial, and is not intended to exclude other embodiments from the scope of the present technology.

[0055] As used herein, the word "comprises" and variations thereof are intended to be open-ended such that the recitation of items in a list does not exclude other similar items that may also be beneficial in the materials, compositions, devices, and methods of the present technology. Similarly, the terms "may" and "may" and variations thereof are intended to be open-ended such that a recitation that an embodiment may or may include certain elements or features does not exclude other embodiments of the present technology that do not include those elements or features.

[0056] The open-ended term "comprises" is used herein as a synonym for non-limiting terms such as including, comprising, or having, to describe and claim embodiments of the present technology, and embodiments may instead be described using more restrictive terms such as "consisting of" or "consisting of." Thus, for a particular embodiment that describes a material, composition, or process step, the present technology also specifically includes embodiments that consist of or consist of materials, compositions, or processes excluding (for consisting of) such additional materials, compositions, or processes, and excluding (for consisting of) such additional materials, compositions, or processes that affect a critical characteristic of the embodiment, even if the additional materials, compositions, or processes are not expressly stated in the present application. For example, a description of a composition or process that describes elements A, B, and C specifically contemplates embodiments that consist of and consist of A, B, and C, excluding element D (even if element D is not expressly stated herein to be excluded), as may be described in the technology. Furthermore, as used herein, the term "consisting of" a described material or component contemplates embodiments "consisting of" the described material or component.

[0057] As used herein, the indefinite articles "a" and "an" indicate the presence of "at least one" of the item and, where possible, a plurality of items may be present.

[0058] The numerical values ​​described herein, whether or not modified by the word "about", should be understood as approximate numerical values ​​and interpreted as approximately the described value. Thus, for example, a statement that a parameter has a value of "X" should be interpreted to mean that the parameter may have a value of "about X". "About" when applied to a value indicates that the calculation or measurement allows for a small degree of imprecision in the value (somewhat close to the accuracy of the value, approximately or reasonably close to the value, almost the value). If for any reason the imprecision provided by "about" is not understood in the ordinary sense in the art, then "about" as used herein indicates a variation resulting from typical methods of making, measuring, or using the material, device, or other object to which the calculation or measurement is applied.

[0059] As described herein, ranges include endpoints unless specified, and include all different value technologies and ranges further divided within the entire range. Thus, for example, a range of "A to B" or "about A to about B" includes A and B. Furthermore, the phrase "about A to about B" includes variations in the values ​​of A and B, which may be less than A and more than B, and may be read as "about A, A to B, and about B." Value technologies and ranges for a particular parameter (such as temperature, molecular weight, weight percent, etc.) do not exclude other values ​​and ranges of other values ​​valid herein.

[0060] It is also contemplated that two or more specific exemplary values ​​of a given parameter may define endpoints of a range of values ​​that may be claimed for the parameter. For example, if a parameter X is exemplified herein as having a value A and also exemplified as having a value Z, it is contemplated that the parameter X may have a value ranging from about A to about Z. Similarly, a technology of two or more ranges of parameter values ​​(whether such ranges are nested, overlapping, or separate) includes all possible combinations of the ranges of values ​​that may be claimed using the endpoints of the disclosed ranges. For example, if a parameter X is exemplified herein as having a value ranging from 1 to 10, or 2 to 9, or 3 to 8, it is contemplated that the parameter X may have other ranges of values, including 1 to 9, 1 to 8, 1 to 3, 1 to 2, 2 to 10, 2 to 8, 2 to 3, 3 to 10, and 3 to 9.

Claims

1. 1. A method for forming an EUV patternable film on a surface of a substrate, comprising: providing the substrate on a heated pedestal set at a surface temperature; mixing a vapor flow of an organometallic precursor with a vapor flow of a counter-reactant to form a polymerized organometallic material, the counter-reactant being capable of generating oxygen and / or sulfur bridges between metal atoms; depositing the polymerized organometallic material onto the surface of the substrate at a deposition rate to form the EUV patternable film; Including, The method of claim 1, wherein the deposition rate is inversely proportional to the surface temperature.

2. A method according to claim 1, comprising: The method, wherein the temperature of the substrate is less than or equal to the temperature of the vapor flow of the organometallic precursor and the temperature of the vapor flow of the counter-reactant.

3. The method according to claim 1, The method, wherein said mixing and said depositing are performed in a continuous chemical vapor deposition process.

4. A method for forming an EUV patternable film on a surface of a substrate, comprising: Providing the substrate in a process chamber; flowing a vapor flow of an organometallic precursor into the process chamber through a first plenum of a dual plenum showerhead; flowing a vapor flow of a counter-reactant capable of forming oxygen and / or sulfur bridges between metal atoms through a second plenum of the showerhead to form a mixture used to form a polymerized organometallic material; depositing the polymerized organometallic material onto the surface of the substrate to form the EUV patternable film; A method comprising:

5. 5. The method of claim 1 or 4, comprising: The organometallic precursor has the formula: M R L , where M is 1×10 7 cm 2 / mol or more of atomic absorption cross section, and R is a metal of the formula: n H 2n+1 wherein n is ≧3; L is a ligand or ion which reacts with the counter reactant; a≧1; b≧1; and c≧.

6. 6. The method of claim 5, M is selected from the group consisting of tin, bismuth, antimony, and combinations thereof; R is selected from the group consisting of i-propyl, n-propyl, t-butyl, i-butyl, n-butyl, sec-butyl, i-pentyl, n-pentyl, t-pentyl, sec-pentyl, and mixtures thereof; and L is selected from the group consisting of amines, alkoxy, carboxylates, halogens, and mixtures thereof.

7. 10. The method of claim 1, 4, or 6, comprising: The method wherein the organometallic precursor is t-butyltris(dimethylamino)tin, i-butyltris(dimethylamino)tin, n-butyl(tris)dimethylaminotin, sec-butyltris(dimethylamino)tin, i-propyl(tris)dimethylaminotin, n-propyl(tris)dimethylaminotin, and analogous alkyl(tris)(t-butoxy)tin compounds.

8. The method according to any one of claims 1 to 7, The method wherein said organometallic precursor is partially fluorinated.

9. The method according to any one of claims 1 to 8, The method of claim 1, wherein the counter reactant is selected from the group consisting of water, hydrogen peroxide, di- or polyhydroxy alcohols, hydrogen sulfide, hydrogen disulfide, trifluoroacetaldehyde monohydrate, fluorinated di- or polyhydroxy alcohols, and fluorinated glycols.

10. The method according to any one of claims 1 to 9, The method, wherein the semiconductor substrate comprises an underlying topographical feature.

11. 1. A method for forming a lithography mask precursor on a surface of a semiconductor substrate, comprising: Providing the substrate in a process chamber; flowing a vapor flow of an organometallic precursor through a first plenum of a dual plenum showerhead; flowing a flow of water vapor through a second plenum of the showerhead such that the flows mix within the process chamber to form a polymerized organometallic material; depositing the polymerized organometallic material onto the surface of the semiconductor substrate to form an EUV patternable film; A method comprising:

12. The method of claim 11, further comprising:

21. The method of claim 20, further comprising: exposing a region of the EUV patternable film to EUV light to generate an exposed film region, such that the EUV patternable film also includes an unexposed film region that is not exposed to EUV light.

13. 13. The method of claim 12, The method, wherein the exposed film regions of the mask precursor are insoluble and the unexposed film regions of the mask precursor are soluble in a selected solvent.

14. 14. The method of claim 13 further comprising: removing said unexposed film areas of said mask precursor with said solvent.

15. 13. The method of claim 12, The method, wherein the exposed film regions of the mask precursor comprise reactive surface moieties.

16. 16. The method of claim 15 further comprising: selectively depositing a secondary material onto the surface of the exposed film area; The method wherein solubility contrast or etch selectivity is increased between said exposed and unexposed film regions.

17. 17. The method of claim 16, The method, wherein the deposition of the secondary material is performed using an atomic layer deposition process.

18. 13. The method of claim 12 further comprising: dry developing said EUV patternable film after said exposure.

19. A method for forming a lithography mask precursor on a surface of a semiconductor substrate, comprising: mixing a vapor flow of an organometallic precursor with a vapor flow of a counter-reactant to form a polymerized organometallic material; depositing the polymerized organometallic material onto the surface of the semiconductor substrate at a deposition rate to form an EUV patternable film; Including, The method wherein the deposition rate is inversely proportional to the surface temperature.

20. The method of claim 19, comprising: The method, wherein a temperature of the semiconductor substrate is less than or equal to a temperature of the vapor flow of the organometallic precursor and a temperature of the vapor flow of the counter-reactant.

21. The method of claim 19, comprising: The organometallic precursor has the formula MaRbLc, where M is a metal having an atomic absorption cross section of 1 x 107 cm2 / mol or greater, R is an alkyl such as CnH2n+1, n is ≥ 3, L is a ligand or ion that reacts with the counter reactant, a ≥ 1, b ≥ 1, c ≥ 1; The method of claim 1, wherein the counter reactant is selected from the group consisting of water, peroxide, di- or polyhydroxy alcohols, fluorinated di- or polyhydroxy alcohols, fluorinated glycols, and mixtures thereof.

22. The method according to any one of claims 1 to 21, The method wherein said organometallic precursor is partially fluorinated.

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