Substrate processing device, substrate processing method and storage medium

Abstract

To increase the throughput of a substrate processing device with the suppression of an exclusive floor area.SOLUTION: The substrate processing device includes: one processing block and another processing block provided on either of the right and left sides of a carrier loading unit of a carrier block in a plan view; a substrate transfer region which includes a first transfer mechanism provided on the carrier block; a loading unit lamination having, in a longitudinal direction, an overlaid configuration of a first loading unit, a second loading unit and a third loading unit, on which a substrate is delivered respectively by the first transfer mechanism, a main transfer mechanism of the one processing block and a main transfer mechanism of the other processing block, and provided on one of the front and the rear sides relative to the first transfer mechanism in a plan view; and a second transfer mechanism for substrate transfer between the first loading unit and the second loading unit and between the first loading unit and the third loading unit, respectively, which is provided in the transfer region to sandwich the lamination from the front and back in a plan view together with the first transfer mechanism.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a substrate processing apparatus, a substrate processing method, and a storage medium. [Background technology]

[0002] In the manufacturing process of semiconductor devices, semiconductor wafers (hereinafter referred to as wafers) are transported between various processing modules in a substrate processing apparatus to undergo processing such as liquid processing and heat treatment. Wafers are transported to the substrate processing apparatus by a carrier. Patent Document 1 shows a substrate processing apparatus equipped with a carrier block for transferring wafers to and from the carrier. In this carrier block, two transfer mechanisms are provided to sandwich a stack consisting of a number of substrate placement sections, and each transfer mechanism includes a holding section for transferring the wafer between the placement sections and a holding section for transferring the wafer to and from the carrier. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2013-69916 A Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides a technique that can increase the throughput in a substrate processing apparatus while reducing the occupied floor space. [Means for solving the problem]

[0005] The substrate processing apparatus according to the present disclosure includes a carrier block including a carrier placement portion on which a carrier for storing a substrate is placed; a processing block including a plurality of processing modules each for processing the substrate, the processing block being stacked on top of one another, and a main transport mechanism shared by the plurality of processing modules for transporting the substrate, the processing block being provided on either the left or right side of the carrier placement unit in a plan view; a plurality of processing modules each for processing the substrate, the processing modules being stacked on top of each other; and a main transport mechanism shared by the plurality of processing modules for transporting the substrate, the main transport mechanism being overlapped in a vertical direction with respect to the first processing block; a transport region for the substrate provided in the carrier block so as to be interposed between the carrier placement part, the first processing block, and the second processing block in a plan view; a first transport mechanism provided in the transport region for transferring the substrate to the carrier; a stack of platform parts, which are configured so that a first platform part, a second platform part, and a third platform part to which the substrate is transferred by the first transport mechanism, the main transport mechanism of the one processing block, and the main transport mechanism of the other processing block, are stacked one on top of the other in the vertical direction, and which are provided on one of the front and rear sides of the first transport mechanism in a plan view; a second transport mechanism that is provided in the transport region so as to sandwich the stack from the front and rear together with the first transport mechanism in a plan view, and that transports the substrate between the first placement part and the second placement part and between the first placement part and the third placement part, respectively; Equipped with. Effect of the Invention

[0006] The present disclosure can increase the throughput of a substrate processing apparatus while reducing the occupied floor space. [Brief description of the drawings]

[0007] [Figure 1] 2 is a cross-sectional plan view of a coating and developing apparatus according to an embodiment of the substrate processing apparatus of the present disclosure. FIG. [Diagram 2] FIG. 2 is a vertical sectional front view of the coating and developing apparatus. [Diagram 3] FIG. 2 is a vertical sectional front view of the coating and developing apparatus. [Figure 4] FIG. [Diagram 5] FIG. 2 is a vertical sectional side view of the coating and developing apparatus. [Figure 6] 5A to 5C are explanatory views showing the operation of a transport mechanism provided in the coating and developing apparatus. [Figure 7] 5A to 5C are explanatory views showing the operation of a transport mechanism provided in the coating and developing apparatus. [Figure 8] 5A to 5C are explanatory views showing the operation of a transport mechanism provided in the coating and developing apparatus. [Figure 9] 2 is a schematic diagram of a transport path in the coating and developing apparatus. FIG. [Figure 10] 2 is a schematic diagram of a transport path in the coating and developing apparatus. FIG. [Figure 11] 3 is a schematic diagram showing an air flow formed in the coating and developing apparatus. FIG. [Figure 12] 2 is a schematic diagram showing a wafer transport path in the substrate processing apparatus; FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] A coating and developing apparatus 1 according to an embodiment of a substrate processing apparatus of the present disclosure will be described with reference to the cross-sectional plan view of Fig. 1 and the longitudinal front views of Fig. 2 and Fig. 3. Figs. 2 and 3 show cross sections at different positions of the apparatus. In the coating and developing apparatus 1, a carrier block D1, a first processing block D2, a second processing block D3, and an interface block D4 are arranged in a horizontal line in this order, with adjacent blocks connected to each other. These blocks (the carrier block, the first and second processing blocks, and the interface block) D1 to D4 are each provided with a housing and are partitioned from each other, and a transfer area for a wafer W, which is a substrate, is formed inside each housing.

[0009] In the following description, the arrangement direction of these blocks D1 to D4 is the left-right direction, with the carrier block D1 side being the left side and the interface block D4 being the right side. In addition, in the front-rear direction of the device, when looking at the carrier block D1 from the left, the front is the front and the back is the rear. The interface block D4, which is a relay block, is connected to the exposure machine 20 from the right side.

[0010] Before describing each of the blocks D1 to D4 in detail, we will describe the schematic configuration of the coating and developing apparatus 1. A wafer W is transported to the coating and developing apparatus 1 while being stored in a carrier C called a FOUP (Front Opening Unify Pod). The coating and developing apparatus 1 forms a coating film by supplying various coating liquids including a resist to the wafer W, and develops the resist film exposed by an exposure machine 20.

[0011] The first processing block (left processing block) D2 and the second processing block (right processing block) D3 are each partitioned so as to be vertically divided into two. The lower and upper sides of the first processing block D2 partitioned from each other in this way are respectively referred to as the first lower processing block D21 and the first upper processing block D22. The lower and upper sides of the second processing block D3 partitioned from each other are respectively referred to as the second lower processing block D31 and the second upper processing block D32. Therefore, the first lower processing block D21 and the first upper processing block D22 are stacked on each other, and the second lower processing block D31 and the second upper processing block D32 are stacked on each other. The first lower processing block D21 and the first upper processing block D22 are adjacent to each other, and the second lower processing block D31 and the second upper processing block D32 are adjacent to each other.

[0012] Each of these processing blocks (D21, D22, D31, D32) includes the above-mentioned processing modules and a transfer mechanism (main transfer mechanism) capable of transferring a wafer to and from the processing modules. Furthermore, the first upper processing block D22 and the second upper processing block D32 are each provided with a transfer mechanism separate from the transfer mechanism for transferring a wafer to the processing modules. Hereinafter, this separate transfer mechanism will be referred to as a shuttle. This shuttle is a bypass transfer mechanism that transfers a wafer W to a downstream block without passing through the processing modules, and the first upper processing block D22 and the second upper processing block D32 in which the shuttle is provided are bypass transfer path forming blocks.

[0013] The first lower processing block D21 and the second lower processing block D31 form an outgoing path for transporting the wafer W from the carrier block D1 to the interface block D4. The first upper processing block D22 and the second upper processing block D32 form a return path for transporting the wafer W exposed by the exposure machine 20 from the interface block D4 to the carrier block D1, and the same type of processing modules are provided in both blocks so that the same processing can be performed. On the return path, the wafer W is transported to a processing module by a transport mechanism in one of the first upper processing block D22 and the second upper processing block D32 and processed, and is transported by a shuttle in the other block.

[0014] The first lower processing block D21 and the second lower processing block D31 forming the outward path may be collectively referred to as the lower processing block G1, and the first upper processing block D22 and the second upper processing block D32 forming the return path may be collectively referred to as the upper processing block G2. As described above, the lower processing block G1 and the upper processing block G2 are vertically stacked one on top of the other. As the shuttle is provided as described above, the wafer W is transported in the upper processing block G2 via one of two transport paths. Note that a module is a place on which the wafer W is placed other than the transport mechanism (including the shuttle), that is, a placement portion for the wafer W. A module that performs processing on the wafer W is described as a processing module as described above, and this processing also includes acquiring images for inspection.

[0015] The carrier block D1 will be described below with reference to the side view of Fig. 4. A carrier C is carried in and out of the carrier block D1 by a carrier transport mechanism (external transport mechanism) (not shown) provided in a clean room in which the coating and developing apparatus 1 is installed. The carrier block D1 is a block that carries the wafer W in and out of the carrier C, and delivers the wafer W to the upper processing block G2 and the lower processing block G1.

[0016] The aforementioned housing constituting carrier block D1 is designated as 11. Housing 11 is formed in a rectangular shape, and its lower side protrudes to the left to form support stand 12. Furthermore, on the left side surface of housing 11 above support stand 12, two points spaced apart from each other in the vertical direction protrude to the left to form support stands 13 and 14. The lower support stand and the upper support stand are designated as 13 and 14, respectively.

[0017] The carriers C can be placed on each of the support tables 12 to 14, for example, four at a time, spaced apart in the front-rear direction, and each of the support tables 12 to 14 is provided with a stage for placing the carriers C thereon, and the stages are arranged, for example, in a 3×4 matrix as viewed from the left. The left end of the support table 12 protrudes leftward beyond the support tables 13 and 14, and the stage of the support table 12 is provided on the right side of the support table 12, below the support tables 13 and 14. The inside of the support table 12 is an area for storing bottles containing processing liquid for liquid processing in the first processing block D2 and the second processing block D3, as described above.

[0018] The carrier C can be transferred between the stages by a carrier transfer mechanism 21, which will be described later. Regarding the stages, the two front stages of each of the support bases 13 and 14 are configured as moving stages 15 on which the carrier C is placed to carry the wafer W into and out of the apparatus. Therefore, a total of four moving stages 15 are arranged in a 2×2 matrix as viewed from the left. The moving stages 15 move between a load position on the right side for carrying the wafer W into and out of the apparatus and an unload position on the left side for transferring the carrier C to and from the carrier transfer mechanism 21. In this example, the moving stage 15 of the support base 12 is used as a stage on which the carrier C is placed to eject the unprocessed wafer W into the apparatus, and the moving stage 15 of the support base 13 is used as a stage on which the carrier C is placed to store the processed wafer W in the apparatus.

[0019] Regarding the other stages, the two rear stages of the support bases 13 and 14 and the two stages of the support base 14 are configured as temporary placement stages 16. The other two stages of the support base 14 are configured as a carry-in stage 17 and a carry-out stage 18. For example, the stage on the rear end side and the stage on the front end side of the support base 14 are the carry-in stage 17 and the carry-out stage 18, respectively. These carry-in stage 17 and carry-out stage 18 are stages on which the carrier C is placed so that the external transport mechanism described above can carry the carrier C into and out of the coating and developing apparatus 1, respectively.

[0020] The carrier C is transferred in the following order: carry-in stage 17 → movable stage 15 of support base 12 → movable stage 15 of support base 13 → carry-out stage 18. When transferring the carrier C between stages in this manner, if the destination stage is not available (if it is occupied by another carrier C), the carrier C is placed on the temporary placement stage 16 and waits until the destination stage becomes available.

[0021] A carrier transfer mechanism 21 is provided above the left side of the support base 12. The carrier transfer mechanism 21 includes an articulated arm 22 capable of holding a held portion provided on the upper part of the carrier C, and a moving mechanism 23 capable of moving the articulated arm 22 up and down and back and forth, and is capable of transferring the carrier C between stages as described above.

[0022] Four transfer openings 24 for loading and unloading wafers W are formed in the left side wall of the housing 11, and are arranged in a 2×2 matrix to match the arrangement of the movable stages 15. A door 25 is provided at each transfer opening 24. The door 25 is capable of holding a lid of the carrier C on the movable stage 15 at the load position, and is capable of opening and closing the transfer opening 24 by moving while holding the lid.

[0023] The transfer opening 24 faces a transfer area 31 for the wafer W formed in the housing 11. The transfer area 31 is formed in a long straight line in a plan view, and is provided between the moving stage 15, which is a carrier placement unit, and the first processing block G2 in a plan view. A transfer mechanism 32 is provided on the front side (the other side of the front and rear) of the transfer area 31. The transfer mechanism 32 includes a base that is movable back and forth, vertically movable, and rotatable about a vertical axis, and a holder for the wafer W that can move forward and backward on the base. The transfer mechanism 32, which is a first transfer mechanism, can access the carrier C on the moving stage 15 at the load position described above, and the module stack T1 and pre-processing inspection module 41 described below to transfer the wafer W.

[0024] A pre-processing inspection module 41, which is a third processing module, is provided in the carrier block D1, and the pre-processing inspection module 41 images the surface of the wafer W before it is processed by the coating and developing apparatus 1. Image data obtained by the imaging is transmitted to the control unit 10 described below, and the control unit 10 determines the presence or absence of an abnormality in the wafer W based on the image data. The pre-processing inspection module 41 has a housing having a long and narrow, flat rectangular parallelepiped shape, with its right side located in the center of the transfer area 31 from front to back, and its left side penetrating the left wall of the housing 11 and protruding outside the housing 11.

[0025] A stage 42 that is movable left and right within the module, a half mirror 43 provided above the moving path of the stage 42, an illumination unit 44 that irradiates light downward via the half mirror 43, and a camera 45 provided to the left of the half mirror 43 are provided within the housing of the pre-processing inspection module 41 (see FIG. 3). The wafer W is delivered to the stage 42 located on the right side within the housing by the transport mechanism 32. While the stage 42 to which the wafer W has been delivered moves to the left side within the housing and passes below the half mirror 43, light is emitted by the illumination unit 44 and an image of the wafer W reflected in the half mirror 43 is captured by the camera 45, and the above image data is acquired.

[0026] 1, in the transfer region 31, a transfer mechanism 33 serving as a second transfer mechanism is provided so as to be located behind the pre-processing inspection module 41 in a plan view. The transfer mechanism 33 includes a base that can be raised and lowered and rotated about a vertical axis, and a holder for a wafer W that can move forward and backward on the base, and can deliver the wafer W to and from a shuttle TRS12 of the module stack T1 and the first upper processing block D22, which will be described later.

[0027] Next, the module stack T1 will be described. This module stack T1 is configured by vertically stacking transfer modules TRS, which temporarily place wafers W, and temperature adjustment modules SCPL, and is provided in the center of the front and rear of the transfer area 31. Therefore, the module stack T1 is located behind the transfer mechanism 32 in a plan view, and is sandwiched between the transfer mechanisms 32 and 33 from the front and rear, and overlaps the right side of the pre-processing inspection module 41. Therefore, the pre-processing inspection module 41 is configured to extend leftward from a position overlapping the stack T1 in a plan view. In addition, with regard to the stages for the carrier C described above, the two vertical rows of stages on the front side, including the moving stage 15, are disposed forward of the module stack T1. And with regard to the two vertical rows of stages on the rear side, one row is located to the left of the module stack T1, and the other row is located behind the module stack T1.

[0028] The transfer module TRS has, for example, a number of pins arranged in a horizontal direction, and the wafer W is transferred to the pins by the lifting and lowering operation of the transfer mechanism. The SCPL is configured such that, for example, a coolant flow path is connected to a plate on which the wafer W is placed, thereby cooling the temporarily placed wafer W, and the transfer mechanism lifts and lowers the wafer W to the plate. Note that SCPLs are also provided in blocks other than the carrier block D1, and the SCPLs in blocks other than D1 have the same configuration as, for example, the SCPL in carrier block D1. TRSs are also provided in blocks other than D1. These TRSs have the same configuration as the TRS in carrier block D1, except for the TRS for a shuttle that transfers the wafer W to and from the shuttle, which will be described later.

[0029] Hereinafter, in order to distinguish the SCPL and TRS at each location, which are temporary placement modules, from one another, numbers are added after the SCPL and TRS. For example, multiple TRS and SCPL are provided in each location, stacked. In other words, multiple TRS and SCPLs with the same numbers are provided, but for convenience of illustration, only one is shown. In this specification, a stack of modules means modules that are stacked in a plan view, and the modules may be separated from each other or may be in contact with each other.

[0030] Some of the modules constituting the module stack T1 are provided below the pre-processing inspection module 41, and the other parts are provided above the pre-processing inspection module 41. For example, the modules are provided from bottom to top in the order of TRS1, TRS2, SCPL1, TRS3, and SCPL2, and the pre-processing inspection module 41 is located between SCPL1 and TRS3 (see FIG. 3). For example, TRS1, TRS2, and SCPL1 are located at the height of the first lower processing block D21, and TRS3 and SCPL2 are located at the height of the first upper processing block D22. The transfer mechanism 33 can access each module constituting the module stack T1, and the transfer mechanism 32 can access TRS1 and TRS2. Regarding the transfer of the wafer W to the carrier C and between the modules of the module stack T1, the transfer mechanism 32 is dedicated to the transfer to the carrier C, and the transfer mechanism 33 is dedicated to the transfer between the modules of the module stack T1.

[0031] TRS1 and TRS2 are used for transferring wafers W between the transfer mechanisms 32 and 33, and both serve as first placement units used for transferring wafers W to and from carriers C. SCPL1 is used for transferring wafers W between the first lower processing block D21 and carrier block D1. Therefore, the transfer mechanism 6A of the first lower processing block D21, which will be described later, can also access the second placement unit SCPL1. Furthermore, TRS3 is used for transferring wafers W between the first upper processing block D22 and carrier block D1. Therefore, the transfer mechanism 6B of the first upper processing block D22, which will be described later, can also access the TRS3. SCPL2 is a module for adjusting the temperature of wafers W before they are developed in the first upper processing block D22, and is accessed by the transfer mechanism 6B.

[0032] A hydrophobization processing module 30, which is a fourth processing module that performs a hydrophobization processing by supplying a processing gas to the wafer W before the formation of a coating film, is provided on the rear side (either the front or rear side) of the transfer mechanism 33. For example, a plurality of hydrophobization processing modules 30 are stacked at the height of the second upper processing block D22, and the transfer mechanism 33 transfers the wafer W to and from the hydrophobization processing module 30. The hydrophobization processing module 30 includes a hot plate on which the wafer W is placed, similar to a hot plate 55 provided in a heating module 54 described later, and a cover that can be raised and lowered to cover the hot plate, and the wafer W is subjected to a hydrophobization processing by supplying a processing gas to an enclosed space formed by the cover on the hot plate.

[0033] Next, the first processing block D2 will be described with reference to Fig. 5, which is a vertical cross-sectional side view. The front side of the first processing block D2 is vertically partitioned to form eight stories, which are numbered E1 to E8 from bottom to top. The lower stories E1 to E4 are included in the first lower processing block D21, and the upper stories E5 to E8 are included in the first upper processing block D22. Each story forms an area in which a liquid processing module can be installed.

[0034] First, the first upper processing block D22 will be described. Each of stories E5 to E8 is provided with a developing module 51 as a liquid processing module. The developing module 51 includes two cups 52 arranged side by side and each of which accommodates a wafer W, and a nozzle (not shown), and supplies the developing liquid supplied from the bottle by a pump (not shown) to the surface of the wafer W for processing.

[0035] A transfer area 53 for wafers W is provided at the rear of the stories E5 to E8, and is formed linearly in a plan view from the left end to the right end of the upper processing block D22. Therefore, the extension direction of the transfer area 53 is perpendicular to the extension direction of the transfer area 31 of the carrier block D1. The transfer area 53 is formed from the height of story E5 to the height of story E8. In other words, the transfer area 53 is not divided into stories E5 to E8.

[0036] And, behind the transport area 53, the processing modules are stacked, for example, in seven stages in the vertical direction, and two stacks of the processing modules are arranged side by side on the left and right. That is, the stacks of the processing modules and the cups 52 are each provided along the extension direction of the transport area 53.

[0037] The stack of the process modules arranged side by side is referred to as the rear-side process section 50. The process modules constituting the rear-side process section 50 include a plurality of heating modules 54 and a plurality of post-processing inspection modules 57. The heating module 54 is a module for performing post-exposure baking (PEB), and includes a hot plate 55 on which the wafer W is placed and heated, and a cooling plate 56 for adjusting the temperature of the wafer W. The cooling plate 56 can move between a front position where the wafer W is transferred by the lifting and lowering operation of the transfer mechanism 6B described later, and a rear position where the cooling plate 56 overlaps with the hot plate 55. The lifting and lowering operation of the pins (not shown) of the hot plate 55 cooperates with the corresponding movement of the cooling plate 56 to transfer the wafer W between the hot plate 55 and the cooling plate 56.

[0038] The post-processing inspection module 57 has a similar configuration to the pre-processing inspection module 41, and is arranged so that the movement direction of the wafer W during imaging is the forward and backward direction. This post-processing inspection module 57 acquires image data of the surface of the wafer W that has been processed by the coating and developing apparatus 1, more specifically, the surface of the wafer W on which a resist pattern has been formed by development, and transmits the image data to the control unit 10.

[0039] The transfer area 53, which is the main transfer path, is provided with the transfer mechanism 6B, which is the main transfer mechanism described above, and the transfer mechanism 6B includes a base 61 that is movable left and right, vertically movable, and rotatable about a vertical axis, and a holder 62 for the wafer W that can move forward and backward on the base 61. Note that each of the holders for the transfer mechanisms other than the shuttle in the coating and developing apparatus 1, including this transfer mechanism 6B, is provided with two holders, and can move forward and backward independently of each other on the base.

[0040] A moving mechanism 63 for moving the base 61 of the transfer mechanism 6B left and right is provided below the rear processing unit 50, and a flat space 71A is formed between the moving mechanism 63 and the rear processing unit 50 (see FIG. 5). The space 71A is formed from the left end to the right end of the first upper processing block D22. A shuttle and TRS12 and TRS14 for the shuttle are installed in the space 71A, which will be described in detail later. The transfer mechanism 6B can transfer the wafer W to and from each processing module in the first upper processing block D22, the TRS3 and SCPL2 of the carrier block D1, and the TRS14 for the shuttle. In other words, the transfer mechanism 6B is shared by each liquid processing module provided in the stacked multiple stories and each processing module constituting the rear processing unit 50.

[0041] Next, the first lower processing block D21 will be described. The first lower processing block D21 has a configuration generally similar to that of the first upper processing block D22 described above, and the following description will focus on the differences from the first upper processing block D22. No processing module is provided on story E1, and an anti-reflection film forming module 47 is provided as a liquid processing module on stories E2 to E4. The anti-reflection film forming module 47, which is a first processing module and also a coating film forming module, has a configuration similar to that of the developing module 51, which is a second processing module, except that a coating liquid for forming an anti-reflection film is supplied from a nozzle instead of a developing liquid.

[0042] The rear processing section 50 is composed of heating modules 54. However, the heating modules 54 provided in the first lower processing block D21 and the second lower processing block D32 described later are different from the heating modules 54 in the first upper processing block D22 in that they are used to remove solvents in the coating film. The main transport mechanism provided in the transport region 53 is shown as a transport mechanism 6A and has the same configuration as the transport mechanism 6B described above. The transport mechanism 6A delivers the wafer W to each processing module in the first lower processing block D21, the SCPL1 of the module stack T1 described above, and the module stack T2 described later. The first lower processing block D21 is not provided with a shuttle or a TRS for the shuttle.

[0043] Meanwhile, the first processing block D2 is provided with a module stack T2 (see FIG. 1 and FIG. 3). This module stack T2 is provided on the right side of the transfer area 53 of the first lower processing block D21 and on the right side of the transfer area of ​​the second upper processing block D22, and is composed of an SCPL. The SCPL in the first lower processing block D21 is indicated as SCPL3, and the SCPL in the first upper processing block D22 is indicated as SCPL4. The module stack T2 is provided so that its right end portion slightly enters the second processing block D3. The SCPL3 is for adjusting the temperature of the wafer W before processing in the resist film forming module of the second lower processing block D22 described later, and the SCPL4 is for adjusting the temperature of the wafer W before processing in the developing module 51 of the second upper processing block D22 described later.

[0044] Regarding the layout of the modules in the first upper processing block D22 and the first lower processing block D21, the rear side processing section 50 and the cups 52 of the liquid processing modules are located to the left of the module stack T2 so that they can be transferred by the transport mechanisms 6A and 6B. The layout of the liquid processing modules and the rear side processing section 50 is common to the first and second lower processing blocks D21 and D31 and the first and second upper processing blocks D22 and D32. Therefore, in the second lower processing block D31 and second upper processing block D32 described later, the rear side processing section 50 and the cups 52 of the liquid processing modules are also provided at positions away from the right end of the blocks.

[0045] Next, the second processing block D3 will be described. The second processing block D3 has a configuration substantially similar to that of the first processing block D2, except that the module stack T2 is not provided, and the following mainly describes the differences from the first processing block D2. First, the second upper processing block D32 will be described. The main transport mechanism in the second upper processing block D32 is designated as 6D. A space 71B similar to the space 71A in the first upper processing block D22 is also formed between the moving mechanism 63 that moves the transport mechanism 6D and the rear processing unit 50. The space 71B is located at the same height as the space 71A and communicates with the space 71A. The shuttle and the TRS11 and TRS13 for the shuttle are installed in the space 71B, which will be described later. The transport mechanism 6D transfers the wafer W to and from each processing module in the upper processing block D22, the module stack T3 of the interface block D4 described later, and the TRS11 for the shuttle.

[0046] Next, the second lower processing block D31 will be described. Resist film forming modules 49 are provided on stories E2 to E4. The resist film forming modules 49 have the same configuration as the developing modules 51, except that the processing liquid supplied to the wafer W is resist instead of a developer. The rear processing unit 50 has the same configuration as the rear processing unit 50 of the first lower processing block D21. The main transport mechanism in the second lower processing block D31 is a transport mechanism 6C. The transport mechanism 6C delivers the wafer W to and from each processing module in the lower processing block D21 and the module stack T3 of the interface block D4.

[0047] The interface block D4 will be described below. The interface block D4 has a module stack T3 at the center between the front and rear. This module stack T3 is composed of TRS5 to TRS7 and a temperature adjustment module ICPL, which are stacked on top of each other. In addition to these modules, a buffer module for temporarily waiting the wafer W is also provided, but its description is omitted. The ICPL is a module to which the wafer W is transferred immediately before exposure, and is provided on the lower side of the module stack T3, and adjusts the temperature of the placed wafer W in the same manner as the SCPL. TRS5 and TRS6 are provided at the height of the lower processing block G1, and TRS7 is provided at the height of the upper processing block G2. Transfer mechanisms 36, 37, and 38 are provided at the front, rear, and right of the module stack T3, respectively.

[0048] The transfer mechanisms 36 and 37 are configured similarly to the transfer mechanism 33, and are capable of transferring the wafer W between the modules constituting the module stack T3. The transfer mechanism 36 is also capable of transferring the wafer W to a back surface cleaning module 65, which will be described later, and the transfer mechanism 37 is also capable of transferring the wafer W to a shuttle TRS 13 and a post-exposure cleaning module 66, which will be described later. The transfer mechanism 38 is configured similarly to the transfer mechanism 32, and transfers the wafer W between the ICPL, the TRS 6, and the exposure machine 20.

[0049] Further, a plurality of back surface cleaning modules 65 are provided in a stacked manner in front of the transfer mechanism 36. The back surface cleaning module 65 has a configuration similar to that of the developing module 51, except that instead of a nozzle for supplying a developing solution to the front surface of the wafer W, a nozzle for supplying a cleaning solution to the back surface of the wafer W is provided, and that there is only one cup 52. A plurality of post-exposure cleaning modules 66 are provided in a stacked manner in the rear of the transfer mechanism 37. The post-exposure cleaning module 66 has a configuration similar to that of the developing module 51, except that instead of a nozzle for supplying a developing solution to the front surface of the wafer W, a cleaning solution is provided to the front surface of the wafer W, and that there is only one cup 52.

[0050] Next, the shuttles provided in the first upper processing block D22 and the second upper processing block D32 will be described as 7A and 7B, respectively. The shuttle 7A includes a moving mechanism 72A, a moving body 73A, and a support 74A. The moving mechanism 72A is configured as an elongated member extending left and right, and is provided so as to fit in the space 71A of the first upper processing block D22 described above. The moving body 73A is connected to the front side of the moving mechanism 72A and extends left and right. The support 74A is connected to the front side of the moving body 73A and is formed in a rectangular parallelepiped shape that is elongated left and right. The wafer W is supported on the support 74A and transported in a horizontal straight line in the left and right direction.

[0051] The moving mechanism 72A allows the moving body 73A to move left and right relative to the moving mechanism 72A. The support 74A moves left and right relative to the moving body 73A in response to the movement of the moving body 73A relative to the moving mechanism 72A (see Figs. 6 to 8). The moving body 73A moves between a right position where its right end is located to the right (interface block D4 side) of the right end of the moving mechanism 72A and a left position where its left end is located to the left (carrier block D1 side) of the left end of the moving mechanism 72A. When the moving body 73A is located at the right position, the right end of the support 74A is located to the right of the right end of the moving body 73A (the state shown in Fig. 6). The position of the support 74A in this state is called the right transfer position. When the moving body 73A is located at the left position, the left end of the support 74A is located to the left of the left end of the moving body 73A (the state shown in Fig. 8). The position of the support 74A in this state is called the left transfer position.

[0052] The shuttle 7A transports the wafer W from the TRS11 provided in the second upper processing block D32 to the TRS12 (fourth placement unit) provided in the first upper processing block D22. The TRS11 includes a support plate 75 forming a placement unit body formed to form a recess with an open left side in a plan view, three pins 76 protruding upward from the support plate 75, and a lifting mechanism (not shown) for lifting and lowering the support plate 75, and is located, for example, at the left end of the second upper processing block D32. The lifting mechanism may be an actuator such as a cylinder or a motor, and is connected to the back side (lower side) of each support plate 75 and is located at a position that does not interfere with the movement trajectory of the movable body 73A or the support 74A. As the support plate 75 is raised and lowered, the pins 76 move between an upper position and a lower position to support the lower surface of the wafer W. In a plan view, the right end of support 74A at the right transfer position is fitted in the recess formed by support plate 75, and wafer W can be transferred between support 74A and TRS11 by raising and lowering pins 76.

[0053] The TRS12 has the same configuration as the TRS11, except that the support plate 75 is formed to have a recess that is open on the right side in plan view. The left end of the support 74A at the left transfer position is accommodated in the recess formed by the support plate 75 in plan view, and the wafer W can be transferred between the support 74A and the TRS12. The TRS12 is provided at the left end of the first upper processing block D22 so that the wafer W can be transferred between the support 74A and the transfer mechanism 33 of the carrier block D1. As described above, the transfer of the substrate (wafer W) supported by the support 74 is performed while multiple members provided in the front-rear direction, such as the movable body 73A and the support 74A, change their relative left-right positions. By transferring the substrate in this manner, the TRS11 and TRS12 located on the left and right sides of the support 74A are less likely to interfere with the movable body 73A, and the pins 76 can be arranged at three or more positions where the substrate can be easily supported.

[0054] The shuttle 7B, which is the second bypass transport mechanism, is provided at a different height from the shuttle 7A, for example, located lower than the shuttle 7A. The shuttle 7B is configured in the same manner as the shuttle 7A, and the reference numerals for the moving mechanism, moving body, and support, which are the components of the shuttle 7B, are indicated by adding a B instead of an A after the numerals in order to distinguish them from the components of the shuttle 7A. Specifically, for example, the moving mechanism of the shuttle 7B is indicated as 72B. The moving mechanism 72B is provided to fit within the space 71B of the second upper processing block D32.

[0055] Shuttle 7B transports wafer W from TRS13 provided in second upper processing block D32 to TRS14 provided in first upper processing block D22. TRS13 has a similar configuration to TRS11, and is provided at the right end of second upper processing block D32 so as to be able to transfer wafer W to and from interface block D4. TRS14 has a similar configuration to TRS12, and is provided to the left of module stack T2 and to the right of TRS12 so as to be able to transfer wafer W to and from transfer mechanism 6B.

[0056] As described above, shuttle 7B is provided below shuttle 7A, and therefore the height at which the second bypass substrate placement parts TRS13 and TRS14 are located is lower than the height at which the first bypass substrate placement parts TRS11 and TRS12 are located. In other words, as shown in Fig. 2, the set of shuttle 7A, TRS11, and TRS12, and the set of shuttle 7B, TRS13, and TRS14 are provided at positions shifted from each other in the longitudinal direction (vertical direction).

[0057] The transfer path (first bypass transfer path) of the wafer W by the shuttle 7A and the transfer path (second bypass transfer path) of the wafer W by the shuttle 7B are respectively designated as 77A and 77B, and the positions of the transfer paths 77A and 77B are the same. In correspondence with the positions of the above-mentioned TRS11 to TRS14, the transfer path 77A protrudes to the second upper processing block D22, and the transfer path 77B protrudes to the first upper processing block D22. By protruding in this way, the right side of the transfer path 77A and the left side of the transfer path 77B overlap each other in a plan view. The transfer paths 77A and 77B may be located, for example, outside the heating plate 55 of the heating module 54 and overlapping with the standby position of the cooling plate 56 in a plan view. By arranging the transfer paths relatively far from the heating plate 55 in this way, the effect of heat on the transferred wafer W can be more reliably suppressed.

[0058] The transfer of the wafer W by the shuttle 7A will be described step by step with reference to FIGS. 6 to 8. The transfer mechanism 6D of the second upper processing block D32 delivers the wafer W, which has been processed in each processing module in the second upper processing block D32, onto the pins 76 in the raised position of the TRS11. The pins 76 move to their lowered positions, and the wafer W is delivered to the support 74A in the right transfer position described above (FIG. 6). While the movable body 73A and the support 74A each move to the left, the pins 76 of the TRS11 return to their raised positions (FIG. 7).

[0059] When the support 74A moves to the left transfer position described above, the pins 76 in the lowered position of the TRS12 move to the upper position to support the wafer W (FIG. 8). When the support 74A moves toward the right transfer position, the pins 76 return to the lowered position. Thereafter, the transfer mechanism 33 of the carrier block D1 receives the wafer W. In this manner, the shuttle 7A transfers the wafer W toward the carrier block D1, which is a downstream block. The shuttles 7B, TRS13, and TRS14 also operate in the same manner as the shuttles 7A, TRS11, and TRS12, respectively, and the wafer W is transferred from TRS13 to TRS14. In other words, the shuttle 7B transfers the wafer W toward the first upper processing block D22, which is a downstream block.

[0060] The coating and developing apparatus 1 also includes a control unit 10 (see FIG. 1). The control unit 10 is configured by a computer, and includes a program, a memory, and a CPU. The program includes a set of steps so that a series of operations can be performed in the coating and developing apparatus 1. The program causes the control unit 10 to output control signals to each part of the coating and developing apparatus 1, thereby controlling the operation of each part. Specifically, the operations of the transfer mechanisms 6A-6D, the shuttles 7A and 7B, and each processing module are controlled. This allows the transfer of the wafer W, the processing of the wafer W, and the determination of anomalies in the wafer W, which will be described later, to be performed. The above program is stored in a storage medium, such as a compact disc, a hard disk, or a DVD, and installed in the control unit 10.

[0061] Next, the processing and transport path of the wafer W in the coating and developing apparatus 1 will be described with reference to Fig. 9 and Fig. 10, which respectively show the forward and return paths described above. In Fig. 9 and Fig. 10, a transport mechanism used for the transport is shown on or near some of the arrows showing the transport of the wafer W between modules.

[0062] First, the wafer W is carried out by the transfer mechanism 32 from the carrier C placed on the moving stage 15 of the support table 12. Then, the wafer W is carried by the transfer mechanism 32 to the pre-processing inspection module 41, where image data is acquired and the presence or absence of an abnormality is determined.

[0063] The wafer W is then transferred to TRS1 by the transfer mechanism 32. The wafer W is then transferred by the transfer mechanism 33 to the hydrophobization module 30 and then to the SCPL1, and then taken into the first lower processing block D21 by the transfer mechanism 6A, and transferred to the anti-reflection film forming module 47 and then to the heating module 54, where an anti-reflection film is formed. The wafer W is then transferred to the SCPL4 of the module stack T2, and transferred by the transfer mechanism 6C to the resist film forming module 49 and then to the heating module 54, where a resist film is formed. The wafer W is then transferred to TRS5 of the module stack T3.

[0064] Thereafter, the wafer W is transferred by the front transfer mechanism 36 through the back surface cleaning module 65 and the ICPL, and then by the transfer mechanism 38 to the exposure machine 20, where the resist film on the front surface of the wafer W is exposed according to a predetermined pattern. After exposure, the wafer W is transferred by the transfer mechanism 38 to the TRS 6, and then transferred by the rear transfer mechanism 37 to the post-exposure cleaning module 66.

[0065] The transfer path of the wafer W thereafter is divided into a path (first path) for processing in the first upper processing block D22 and a path (second path) for processing in the second upper processing block D32, as described above. Regarding the second path, the transfer mechanism 37 transfers the wafer W to the TRS7 of the module stack T3, and the transfer mechanism 6D takes the wafer W into the second upper processing block D32. The wafer W is then transferred in the order of the heating module 54 → SCPL3 → developing module 51 → post-processing inspection module 57, whereby a resist pattern is formed, image data is acquired, and the presence or absence of anomalies is determined.

[0066] 6 to 8, the wafer W is transferred in the order of transfer mechanism 6D →TRS11 →shuttle 7A →TRS12, and then the transfer mechanism 33 of the carrier block D1 receives the wafer W and transfers it to TRS2. In this manner, the wafer W is transferred toward the downstream block by the transfer mechanism 6D, out of the transfer mechanisms 6B and 6D which are the main transfer mechanisms of the first upper processing block D22 and the second upper processing block D22 which are the bypass transfer path forming blocks, and the shuttle 7A. The wafer W is then stored in the carrier C on the moving stage 15 of the support table 13 by the transfer mechanism 32.

[0067] Next, the first path will be described. The wafer W is transported in the order of the transport mechanism 37 → TRS13 → shuttle 7B → TRS14 → transport mechanism 6B, and the wafer W is taken into the first upper processing block D22. The wafer W is then transported by the transport mechanism 6B in the order of the heating module 54 → SCPL2 → developing module 51 → post-processing inspection module 57, and after being processed in the same manner as the wafer W on the second path, it is transported to the TRS3 of the carrier block D1. In this manner, the wafer W is transported toward the downstream block by the transport mechanisms 6B and 6D, which are the main transport mechanisms of the first upper processing block D22 and the second upper processing block D22, which are the bypass transport path forming blocks, and the shuttle 7B. The wafer W is then transported to the TRS2 by the transport mechanism 33, and thereafter, like the wafer W on the second path, it is transported by the transport mechanism 32 to the carrier C on the moving stage 15 of the support table 13.

[0068] As described above, the carrier block D1 in the coating and developing apparatus 1 is provided with a module stack T1 including TRS and SCPL for transferring the wafer W to the carrier C, the lower processing block (one processing block) G1, and the upper processing block (another processing block) G2. The transfer mechanisms 32 and 33 are provided, and the transfer mechanism 32 is responsible for transferring the wafer W to the carrier C, and the transfer mechanism 33 is responsible for transferring the wafer W between the modules of the module stack T1. By dividing the roles of the transfer mechanism 32 and the transfer mechanism 33 in this way, the transfer mechanism 32 can quickly load and unload the wafer W to and from the carrier C. Meanwhile, in each of the processing blocks D21, D22, D31, and D32 constituting the lower processing block G1 and the upper processing block G2 to which the wafer W is transferred via the transfer mechanism 33, processing modules are stacked, and the wafer W can be processed in each processing module. Therefore, the coating and developing apparatus 1 can obtain a high throughput. Furthermore, the transfer area 31 facing the transfer port 24 through which the wafer W is delivered to the carrier C extends in the front-rear direction, and the transfer mechanisms 32, 33 are provided in front and rear of the module stack T1 in the transfer area 31, respectively, so that the left-right width of the carrier block D1 can be made relatively small. Therefore, the coating and developing apparatus 1 can reduce its footprint (occupied floor area).

[0069] A pre-processing inspection module 41 is provided on the carrier block D1. The right end of this pre-processing inspection module 41 overlaps with the module stack T1 and penetrates the side wall of the housing 11, so that the left end thereof protrudes from the transport area 31. That is, the pre-processing inspection module 41 is arranged by utilizing the space formed in the center between the front and rear of the transport area 31 by arranging the module stack T1 and the space outside the housing 11 where the carrier C is transferred. That is, while the pre-processing inspection module 41 is installed in the carrier block D1, an increase in the footprint of the carrier block D1 is prevented.

[0070] Furthermore, a hydrophobic treatment module 30 is disposed as a treatment module behind the transfer mechanism 33, and is accessible by the transfer mechanism 33. This arrangement of the hydrophobic treatment module 30 also prevents the width of the coating and developing apparatus 1 from increasing from side to side. The transfer mechanism 33 delivers the wafer W to the hydrophobic treatment module 30, and the transfer mechanism 32 delivers the wafer W to the pre-treatment inspection module 41. This prevents uneven load distribution between the transfer mechanisms 32 and 33, and prevents a decrease in throughput due to the provision of these treatment modules. However, the transfer mechanism 33 may be configured to deliver the wafer W to the pre-treatment inspection module 41.

[0071] In addition, when providing a plurality of moving stages 15 on which carriers C are placed for loading and unloading wafers W, the moving stages 15 are provided in a plurality of stages on the front side of the module stack T1. By arranging the moving stages 15 so as to be concentrated on the front side of the module stack T1 in this manner, it is possible to set up the necessary number of moving stages 15 to ensure sufficient throughput, while allowing the center part of the front and rear of the transfer area 31 to be used as an installation area for the module stack T1 and the pre-processing inspection module 41. By arranging the module stack T1 in this manner, it is possible to arrange the transfer mechanism 33 behind it. Therefore, as described above, providing each moving stage 15 on the front side of the module stack T1 and at different heights from each other contributes to reducing the footprint of the apparatus while increasing the throughput.

[0072] Incidentally, by providing the temporary placement stage 16, which is a temporary placement section for carriers, unnecessary carriers C can be removed from the moving stage 15, so that the wafers W can be efficiently loaded and unloaded from the carriers C. In the carrier block D1, the temporary placement stage 16 is provided at the same position as the module stack T1 in the front-rear direction and at a rear position relative to the module stack T1. In other words, by providing the moving stage 15 in the layout described above, the temporary placement stage 16 is provided by utilizing an empty space that is not accessed by the transfer mechanism 32. In other words, the temporary placement stage 16 is arranged in a layout that prevents the carrier block D1 from becoming large.

[0073] Furthermore, the coating and developing apparatus 1 is provided with shuttles 7A and 7B, which transport the wafer W toward the carrier block D1. As a result, the wafer W to be processed in one of the first upper processing block D22 and the second upper processing block D32 is transported toward the carrier block D1 so as to bypass the processing modules of the other block. This reduces the load on the transport mechanism 6B of the first upper processing block D22 and the transport mechanism 6D of the second upper processing block D32 (more specifically, the number of transport steps required within the block). As a result, the throughput of the coating and developing apparatus 1 can be further improved.

[0074] Incidentally, airflow forming units (not shown) are provided on the upper part of the housing 11 of the carrier block D1, on the upper part of each of the housings of the first and second processing blocks D2 and D3, and on the upper part of the housing of the interface block D4. Each airflow forming unit takes in air from outside the coating and developing apparatus 1 and supplies it to the transport path of the wafer W in the block in which the airflow forming unit is provided, thereby forming an airflow. In Fig. 11, the airflow forming units of the carrier block D1 and the second processing block D22 are shown as 81 and 82, respectively. For convenience of illustration, these airflow forming units 81 and 82 are shown at positions distant from the carrier block D1 and the first processing block D2, respectively.

[0075] The airflow forming unit 82 supplies air through a duct (not shown) to filters provided on the ceiling of each transport area 53 of the first lower processing block D21 and the first upper processing block D22 that constitute the first processing block D2. The air supplied from the filters flows downward through the transport area 53 and is exhausted from exhaust ports (not shown) provided on the lower side of the first lower processing block D21 and the first upper processing block D22 (not shown).

[0076] 11, for example, in the carrier block D1, a filter 83 formed vertically is provided at the end on the front side of the transport region 31. Air supplied from the airflow forming unit 81 to the filter 83 is supplied from the filter 83 toward the rear of the transport region 31. An exhaust hole 84 is opened, for example, at the bottom of the block behind the module stack T1, and the air supplied from the filter 83 is exhausted from the exhaust hole 84.

[0077] By adjusting the balance between the supply amount and exhaust amount of air in each block, the first lower processing block D21 and the first upper processing block D22 are made to have a higher pressure than the transfer region 31. As a result, a part of the air supplied to the transfer region 53 as described above flows into the transfer region 31 and is exhausted from the exhaust hole 84. FIG. 11 shows the airflow thus formed in the transfer regions 31 and 53 with arrows. The airflow thus formed more reliably prevents the processing gas used in the hydrophobization processing module 30 from flowing into the transfer region 31. If the processing gas flows into the development module 51 via the transfer region 31 and reacts with the developing solution, there is a risk of developing defects occurring, but the formation of the above airflow prevents such defects from occurring. That is, the formation of the airflow prevents a decrease in the yield of products manufactured from the wafers W. The filter 83 and the airflow forming units 81 and 82 form an airflow forming mechanism.

[0078] Incidentally, a post-processing inspection module 57 may be provided in place of the pre-processing inspection module 41 described above. In that case, the outward route described in FIG. 9 may be a route that does not involve transport to the inspection module. Specifically, the wafer W may be transported in the order of carrier C →transport mechanism 32 →TRS1 →transport mechanism 33 →SCPL1, and loaded into the first lower processing block D21. The return route described in FIG. 10 may be such that it passes through the post-processing inspection module 57 provided in the carrier block D1. Specifically, the wafer W that has been processed and transported to the TRS2 of the carrier block D1 may be transported by the transport mechanism 32 to the post-processing inspection module 57 and then returned to the carrier C.

[0079] When the post-processing inspection module 57 is disposed in the carrier block D1 in this manner, the pre-processing inspection module 41 may be provided as, for example, a processing module constituting the rear-side processing section 50 of the first lower processing block D21. Note that the carrier block D1 may be configured such that neither the pre-processing inspection module 41 nor the post-processing inspection module 57 is provided, and even in this case, the wafers W may be transferred between the transfer mechanisms 32, 33 by using each module of the module stack T1 to transfer them as appropriate.

[0080] In the above transfer example, the moving stage 15 (loader) on which the carrier C is placed to unload the wafer W is different from the moving stage 15 (unloader) on which the carrier C is placed to load the wafer W. However, one moving stage 15 may serve as both a loader and an unloader. The above transfer mechanism 32 is configured to be shared by the four moving stages 15, which has the advantage that the use of the moving stages 15 can be easily switched in this way.

[0081] In the coating and developing apparatus 1, the upper processing block G2 may be the outgoing path of the wafer W, and the lower processing block G1 may be the return path of the wafer W. Specifically, for example, the anti-reflection film is not formed in the apparatus, and a resist film forming module 49 is provided as a liquid processing module in each of the first upper processing block D22 and the second upper processing block D32. A developing module 51 is provided as a liquid processing module in each of the first lower processing block D21 and the second lower processing block D31. The wafer W may be transported between the blocks on a transport path reverse to the transport path described above, and a resist film may be formed, exposed, and developed in that order to form a resist pattern. Therefore, the shuttle is not limited to forming a return path, and the carrier block D1 is not limited to being configured to deliver the wafer W to the shuttle TRS forming the return path. The shuttle may be provided in the first lower processing block D21 and the second lower processing block D31. For example, the liquid processing modules of the first lower processing block D21 and the second lower processing block D31 can both be resist film forming modules 49, and the apparatus can be configured so that a wafer W is processed in the resist film forming module 49 of either block using a shuttle.

[0082] Furthermore, the liquid processing performed by the apparatus is not limited to the above examples, and may include forming an insulating film by applying a chemical liquid, forming a protective film for protecting the surface of a resist film by applying a chemical liquid, and applying an adhesive to bond wafers W together. Also, a cleaning process may be performed in which a cleaning liquid is supplied to the front or back surface of the wafer W. Therefore, the substrate processing apparatus of the present technology is not limited to a coating and developing apparatus.

[0083] Furthermore, the lower processing block G1 and the upper processing block G2 do not have to be connected to each other by the interface block D4. A description will be given with reference to a schematic diagram of the substrate processing apparatus 8 in FIG. 12. Assume that the module stack T1 includes TRS21 to TRS23. TRS21 is for delivery to the carrier C, and the transfer mechanism 32 transfers the wafer W between the carrier C and TRS21. TRS22 and TRS23 are for delivery to the lower processing block G1 and the upper processing block G2, and the wafer W is transferred between TRS21 and TRS22 and between TRS21 and TRS23 by the transfer mechanism 33, respectively. The wafer W is transferred from the carrier C via TRS21 to TRS22, and from TRS23 to the lower processing block G1 and the upper processing block G2, respectively, and is returned to the carrier C via TRS22, TRS23 and TRS21 after processing. In other words, the apparatus may be configured such that the wafer W is processed in only one of the lower processing block G1 and the upper processing block G2 and then returned to the carrier C.

[0084] Each of the lower processing block G1 and the upper processing block G2 is not limited to being composed of two processing blocks arranged side by side, but may be composed of one processing block. Each of the lower processing block G1 and the upper processing block G2 may be composed of three or more processing blocks arranged side by side, and wafers W may be transferred between the processing blocks arranged side by side.

[0085] In each processing block, the liquid processing module is located at the front and the processing module constituting rear processing section 50 is located at the rear, but this layout may be reversed. Also, in carrier block D1, the layout of transport mechanisms 32, 33 and each stage for carrier C may be reversed. Also, the arrangement of carrier block D1 and other blocks may be reversed.

[0086] In the carrier block D1, other modules such as a post-treatment inspection module 57 may be provided instead of the hydrophobic treatment module 30, and the hydrophobic treatment module 30 may be transported by the transport mechanism 33. However, the hydrophobic treatment module 30 does not need to move the placement part (hot plate) on which the wafer W is placed in the lateral direction when performing the treatment. In other words, when providing a treatment module behind the transport mechanism 33, it is preferable to provide a treatment module that performs treatment without moving the placement part for the wafer W in the lateral direction in this way in order to prevent the carrier block D1 from becoming large, and thus the substrate processing apparatus from becoming large. The order of the TRS and SCPL constituting the module stack T1 may be changed in height or the order of stacking as appropriate within the range in which the wafer W can be transported within the apparatus.

[0087] The hydrophobic processing module 30 may be arranged so as to overlap the TRS and SCPL constituting the module stack T1. However, by arranging a large number of TRS and SCPL in the module stack T1 and placing the wafer W thereon, the wafer W can be transferred quickly between the carrier block D1 and the first processing block D2 and between the carrier C and the carrier block D1. Therefore, as described above, the hydrophobic processing module 30 is preferably arranged on the rear side of the transfer region 31. Furthermore, in the coating and developing apparatus 1, after the transfer mechanism 32 transfers the wafer W to the pre-processing inspection module 41, the transfer mechanism 33 may receive the wafer W at the inspection module 41, transfer it to the SCPL1, and the wafer W may be taken into the lower processing block D21. In other words, the transfer of the wafer W between the transfer mechanisms 32 and 33 is not limited to being performed by the temporary placement module.

[0088] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The above-described embodiments may be omitted, substituted, modified, and combined in various forms without departing from the scope and spirit of the appended claims. [Explanation of symbols]

[0089] C Career D2 First processing block D21 First lower processing block D22 First upper processing block 15 Moving Stage TRS Handover Module T1 Module Stack W wafer 31 Transport Area 32, 33 Conveyor mechanism 6A, 6B, 6C, 6D Transport mechanism

Claims

1. a carrier block including a carrier placement portion on which a carrier for storing a substrate is placed; a processing block including a plurality of processing modules each for processing the substrate, the processing block being stacked on top of one another, and a main transport mechanism shared by the plurality of processing modules for transporting the substrate, the processing block being provided on either the left or right side of the carrier placement unit in a plan view; a plurality of processing modules each for processing the substrate, the processing modules being stacked on top of each other; and a main transport mechanism shared by the plurality of processing modules for transporting the substrate, the main transport mechanism being overlapped in a vertical direction with respect to the first processing block; a transport region for the substrate provided in the carrier block so as to be interposed between the carrier placement part, the first processing block, and the second processing block in a plan view; a first transport mechanism for transferring the substrate to and from the carrier; a first platform, a second platform, and a third platform to which the substrate is transferred by the first transport mechanism, the main transport mechanism of the one processing block, and the main transport mechanism of the other processing block, respectively, are stacked one on top of the other in a vertical direction, and a stack of platform parts is provided in the transport region in a plan view; a second transport mechanism provided in the transport region in a plan view for transporting the substrate between the first and second mounting parts and between the first and third mounting parts, respectively; A substrate processing apparatus comprising:

2. The processing module of the one processing block and the processing module of the other processing block are respectively a first processing module and a second processing module. The substrate processing apparatus according to claim 1 , further comprising a third processing module to which the substrate is transferred by the first transport mechanism or the second transport mechanism, the third processing module being provided at a position overlapping the stack in a plan view.

3. 3. The substrate processing apparatus according to claim 2, wherein the third processing module is an inspection module for inspecting the substrate.

4. The substrate processing apparatus according to claim 3 , wherein the inspection module extends to the other of the left and right sides from a position overlapping the stack in a plan view and is provided so as to protrude outside a housing that forms the transfer area.

5. 5. The substrate processing apparatus according to claim 3, wherein the substrate is transported to the inspection module before being transported to the first processing block and the second processing block.

6. a fourth processing module to which the substrate is transferred by the second transfer mechanism is provided at one of the front and rear sides of the second transfer mechanism; 6. The substrate processing apparatus according to claim 2, wherein the substrate is transferred to the third processing module by the first transfer mechanism.

7. a fourth processing module to which the substrate is transferred by the second transfer mechanism is provided at one of the front and rear sides of the second transfer mechanism; The processing module of the one processing block and the processing module of the other processing block are respectively a first processing module and a second processing module. the plurality of first processing modules or the plurality of second processing modules includes a coating film forming module that supplies a coating liquid to the substrate to form a coating film; 7. The substrate processing apparatus according to claim 1, wherein the fourth processing module is a hydrophobization processing module which performs a gas processing on the substrate to hydrophobize the substrate before the coating liquid is supplied.

8. 8. The substrate processing apparatus according to claim 7, further comprising an airflow forming mechanism for forming an airflow from the other of the front and rear sides in the transfer region toward the fourth processing module and an airflow from the first processing block and the other processing block toward the transfer region.

9. The substrate processing apparatus according to claim 1 , wherein the carrier placement section is provided at a plurality of positions at different heights on the other side of the stack.

10. On one side of the conveying area, a temporary placement portion for a carrier, the temporary placement portion being provided at the same position as the stacked body in the front and rear or on one side of the stacked body in the front and rear; The substrate processing apparatus according to claim 9 , further comprising: a carrier transfer mechanism that transfers the carrier between the temporary placement unit and the carrier placement unit.

11. A substrate processing apparatus as described in any one of claims 1 to 10, wherein the first transport mechanism does not transfer the substrate to the second loading section and the third loading section.

12. A substrate processing apparatus as described in any one of claims 1 to 11, wherein the second transport mechanism does not transfer the substrate to the carrier.

13. An inspection module for inspecting the substrate is provided in the carrier block, 13 . The substrate processing apparatus according to claim 1 , wherein only the first transport mechanism of the first and second transport mechanisms transfers the substrate to and from the inspection module.

14. placing a carrier for storing substrates on a carrier placement portion provided on a carrier block; a process for transporting the substrate in a processing block provided on either the left or right side of the carrier placement unit in a plan view, the processing block including a plurality of processing modules stacked on top of each other and each processing the substrate, and a main transport mechanism shared by the plurality of processing modules and transporting the substrate; a step of transporting the substrate in another processing block that overlaps the first processing block in a vertical direction, the processing block including a plurality of processing modules that process the substrate and are stacked on top of each other and a main transport mechanism that is shared by the plurality of processing modules and transports the substrate; transporting the substrate in a substrate transport region provided in the carrier block so as to be interposed between the carrier placement part, and the first processing block and the second processing block in a plan view; transferring the substrate to the carrier by a first transport mechanism; a step of transferring the substrate to a first mounting portion, a second mounting portion, and a third mounting portion which are configured to be stacked on top of each other in the vertical direction and which, in a plan view, constitute a stack of mounting portions provided in the transport region, by the first transport mechanism, the main transport mechanism of the one processing block, and the main transport mechanism of the other processing block, respectively; transporting the substrate between the first and second placement parts and between the first and third placement parts by a second transport mechanism provided in the transport region in a plan view; A substrate processing method comprising:

15. A storage medium for storing a computer program for use in a substrate processing apparatus, 15. A storage medium, wherein the computer program is a set of steps for executing the substrate processing method according to claim 14.

Images