Structure manufacturing method

Abstract

To provide a structure manufacturing method that can reduce manufacturing costs by eliminating the need for an adhesive layer for fixing a height adjustment portion (spacer) for adjusting the height of a semiconductor chip to a substrate, while enabling fine adjustment of the height from a substrate to a semiconductor chip to a specified value.SOLUTION: A structure manufacturing method includes the steps of: forming an insulating layer on a substrate having a wiring on its upper surface so as to cover all or a part of the wiring; forming a height adjustment portion composed of at least one of an organic resin and an organic resin composition on the top of the insulating layer in a first region on the substrate; and positioning a first semiconductor chip on the height adjustment portion so as to be supported by the height adjustment portion.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a structure including a semiconductor chip. [Background technology]

[0002] Conventionally, a structure (semiconductor device) has been disclosed that includes a substrate, a height-adjusting member (spacer) mounted on the substrate via a first adhesive layer, a first semiconductor chip mounted on the height-adjusting member via a second adhesive layer, a second semiconductor chip mounted on the substrate via the second adhesive layer, a plurality of bonding wires connecting each wiring provided on the substrate to the terminals of each semiconductor chip, and a sealing member that seals these components on the substrate (see, for example, Patent Document 1).

[0003] In such a conventional structure, the height adjustment member is made of an inorganic material. Therefore, in this structure, in order to fix the height adjustment member to the substrate, the first adhesive layer is separately required as described above, and although the manufacturing method of the structure is not explicitly disclosed in the above Patent Document 1, the manufacturing method of such a structure requires steps for forming the first adhesive layer, aligning, etc., and therefore increases the manufacturing cost of the structure.

[0004] Furthermore, since the height-adjusting member is an inorganic member, it is difficult to fine-tune its thickness, making it difficult to fine-tune the height from the substrate to the first semiconductor chip. In a method for manufacturing such a structure, further individual settings are required, such as adjusting the height by adjusting the thickness of the first adhesive layer that fixes the height-adjusting member to the substrate.

[0005] As described above, the above-mentioned conventional manufacturing method for a structure has a problem in that while it reduces manufacturing costs by eliminating the need for an adhesive layer to fix a height adjustment part (spacer) for adjusting the height of the semiconductor chip to the substrate, it is not possible to fine-tune the height from the substrate to a specified value. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2014-138035 A Summary of the Invention [Problem to be solved by the invention]

[0007] Therefore, in consideration of the problems of the conventional technology, the present invention aims to provide a manufacturing method for a structure that can finely adjust the height from a substrate to a semiconductor chip to a predetermined value while reducing manufacturing costs by eliminating the need for an adhesive layer to fix a height adjustment part (spacer) for adjusting the height of a semiconductor chip to a substrate. [Means for solving the problem]

[0008] A method for manufacturing a structure according to an embodiment of the present invention includes the steps of: forming an insulating layer on a substrate having wiring on its upper surface so as to cover all or a part of the wiring; forming a height adjusting portion made of at least one of an organic resin and an organic resin composition on an upper portion of the insulating layer in a first region on the substrate; placing a first semiconductor chip on the height adjustment portion so as to be supported by the height adjustment portion; Equipped with.

[0009] In the method for manufacturing a structure according to the embodiment of the present invention, The method may further include, after the step of arranging the first semiconductor chip, forming a resin layer on the substrate to seal the first semiconductor chip.

[0010] In the method for manufacturing a structure according to the embodiment of the present invention, a step of disposing a second semiconductor chip in a second region on the substrate, the second region being different from the first region, via the insulating layer, before the step of disposing the first semiconductor chip; The method may further include, after the step of arranging the first semiconductor chip, forming a resin layer on the substrate to seal the first semiconductor chip and the second semiconductor chip.

[0011] In the method for manufacturing a structure according to the embodiment of the present invention, a step of providing a first insulating adhesive layer on a lower surface of the first semiconductor chip for bonding between an upper surface of the height adjustment portion and a lower surface of the first semiconductor chip, before the step of arranging the first semiconductor chip; In addition, In the step of placing the first semiconductor chip, the upper surface of the height adjustment portion and the lower surface of the first semiconductor chip may be bonded by the first insulating adhesive layer.

[0012] In the method for manufacturing a structure according to the embodiment of the present invention, The insulating layer and the height adjusting portion may be made of at least one of the same organic resin and organic resin composition.

[0013] In the method for manufacturing a structure according to the embodiment of the present invention, At least one of the organic resin and the organic resin composition may be photosensitive.

[0014] In the method for manufacturing a structure according to the embodiment of the present invention, a step of providing a second insulating adhesive layer on a lower surface of the second semiconductor chip for bonding between an upper surface of the insulating layer and a lower surface of the second semiconductor chip, before the step of arranging the second semiconductor chip; In the step of disposing the second semiconductor chip, an upper surface of the insulating layer and a lower surface of the second semiconductor chip are bonded to each other by the second insulating adhesive layer; The method may further include, after the step of placing the second semiconductor chip, a step of connecting a second wiring among the wirings and a terminal provided on the upper surface of the second semiconductor chip by a second bonding wire.

[0015] In the method for manufacturing a structure according to the embodiment of the present invention, In the process of positioning the second semiconductor chip, a bump electrode may be used to connect a second one of the wirings to a terminal provided on the underside of the second semiconductor chip, and an underfill resin provided between the insulating layer and the second semiconductor chip may be used to bond the insulating layer to the underside of the second semiconductor chip and seal the terminal and the bump electrode.

[0016] In the structure according to the embodiment of the present invention, The distance between the lower surface of the first semiconductor chip and the second bonding wires may be set to a preset distance.

[0017] In the method for manufacturing a structure according to the embodiment of the present invention, A first wiring of the wirings and a terminal provided on the top surface of the first semiconductor chip may be connected by a first bonding wire.

[0018] In the method for manufacturing a structure according to the embodiment of the present invention, The resin layer may be made of a different material from that of the height adjustment portion.

[0019] In the method for manufacturing a structure according to the embodiment of the present invention, The method may further include a step of stacking one or a plurality of third semiconductor chips on the first semiconductor chip.

[0020] In the method for manufacturing a structure according to the embodiment of the present invention, The first semiconductor chip may include a semiconductor memory.

[0021] In the method for manufacturing a structure according to the embodiment of the present invention, The second semiconductor chip may include a controller that controls an operation of the first semiconductor chip.

[0022] In the method for manufacturing a structure according to the embodiment of the present invention, The insulating layer may be made of a solder resist.

[0023] In the method for manufacturing a structure according to the embodiment of the present invention, The height adjustment portion may be insulating.

[0024] In the method for manufacturing a structure according to the embodiment of the present invention, The distance between the bottom surface of the first semiconductor chip and the top surface of the second semiconductor chip may be set to a preset distance.

[0025] In the method for manufacturing a structure according to the embodiment of the present invention, In the process of forming the height adjustment portion, the height adjustment portion may be patterned by patterning using inkjet application of an organic resin material, patterning using pattern printing of an organic resin material, or patterning a photosensitive organic resin material using photolithography technology. Effect of the Invention

[0026] According to a method for manufacturing a structure according to one embodiment of the present invention, it is possible to provide a structure that can reduce manufacturing costs by eliminating the need for an adhesive layer to fix a height adjustment portion (spacer) for adjusting the height of a semiconductor chip to a substrate, while allowing the height from a substrate to be finely adjusted to a predetermined value. [Brief description of the drawings]

[0027] [Figure 1] FIG. 1 is a cross-sectional view that diagrammatically illustrates an example of a cross section of a structure 100 according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a top view showing an example of a configuration focusing on a region in the vicinity of height adjustment unit D of structure 100 shown in FIG. [Diagram 3] FIG. 3 is a top view showing another example of the configuration focusing on the region in the vicinity of height adjustment unit D of structure 100 shown in FIG. [Figure 4] FIG. 4 is a cross-sectional view that illustrates an example of a process for producing the structure 100 according to the embodiment of the present invention shown in FIG. [Diagram 5] FIG. 5 is a cross-sectional view following FIG. 4, which illustrates a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention. [Figure 6] FIG. 6 is a cross-sectional view following FIG. 5, which is a schematic diagram showing an example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention. [Figure 7] FIG. 7 is a cross-sectional view following FIG. 6, which is a schematic diagram showing an example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention. [Figure 8] FIG. 8 is a cross-sectional view following FIG. 7, which illustrates a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention. [Figure 9] FIG. 9 is a cross-sectional view following FIG. 8, which illustrates a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention. [Figure 10] FIG. 10 is a cross-sectional view following FIG. 9, which illustrates a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention. [Figure 11] FIG. 11 is a cross-sectional view following FIG. 10 and illustrating a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention. [Figure 12] FIG. 12 is a cross-sectional view following FIG. 11 and illustrating a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention. [Figure 13]FIG. 13 is a cross-sectional view that diagrammatically illustrates an example of a cross section of a structure 100A according to a first modified example. [Figure 14] FIG. 14 is a cross-sectional view that illustrates an example of a process for a manufacturing method of the structure 100A according to the first modified example shown in FIG. [Figure 15] FIG. 15 is a cross-sectional view following FIG. 14, which diagrammatically illustrates an example of a process of the method for manufacturing structure 100A according to the first modified example. [Figure 16] FIG. 16 is a cross-sectional view that diagrammatically illustrates an example of a cross section of a structure 100B according to the second modified example. [Figure 17] FIG. 17 is a top view showing an example of a configuration focusing on a region in the vicinity of height adjusting portion D of structure 100B shown in FIG. [Figure 18] FIG. 18 is a cross-sectional view that diagrammatically illustrates another example of a cross section of the structure 100B according to the second modified example. [Figure 19] FIG. 19 is a cross-sectional view that illustrates an example of a process of a method for manufacturing the structure 100B according to the second modified example shown in FIG. [Figure 20] FIG. 20 is a cross-sectional view that diagrammatically illustrates an example of a cross section of a structure 100C according to a third modified example. [Figure 21] FIG. 21 is a top view showing an example of a configuration focusing on a region in the vicinity of height adjusting portion D of structure 100C shown in FIG. [Figure 22] FIG. 22 is a cross-sectional view that diagrammatically illustrates another example of a cross section of a structure 100C according to the third modified example. [Figure 23] FIG. 23 is a cross-sectional view that illustrates an example of a process for a method of manufacturing the structure 100C according to the third modified example shown in FIG. [Figure 24] FIG. 24 is a cross-sectional view that diagrammatically illustrates an example of a cross section of a structure 100D according to a fourth modified example. [Diagram 25] FIG. 25 is a cross-sectional view that diagrammatically illustrates another example of a cross section of a structure 100D according to the fourth modified example. [Figure 26] FIG. 26 is a cross-sectional view that illustrates an example of a process for a method of manufacturing the structure 100D according to the fourth modified example shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Hereinafter, embodiments and modifications of the present invention will be described in detail with reference to the drawings. Note that the embodiments described below are merely examples of the present disclosure, and the present disclosure should not be construed as being limited to these embodiments or their modifications. In addition, terms used in this specification that specify shapes, geometric conditions, and the extent thereof, such as "parallel" and "orthogonal," as well as values ​​of length and angle, are not to be bound by strict meanings, but are to be interpreted to include a range within which similar functions can be expected. In addition, in the drawings referred to in this embodiment, the same parts or parts having similar functions are denoted by the same or similar reference numerals, and repeated explanations thereof may be omitted. Furthermore, the dimensional ratios of the drawings may differ from the actual ratios for the convenience of explanation, and some components may be omitted from the drawings.

[0029] Hereinafter, a structure manufactured by a method for manufacturing a structure according to an embodiment of the present disclosure will be described with reference to FIGS.

[0030] Here, FIG. 1 is a cross-sectional view that shows a schematic example of a cross section of a structure 100 according to an embodiment of the present invention. FIG. 2 is a top view showing an example of a configuration focusing on a region near the height adjustment unit D of the structure 100 shown in FIG. 1. The cross section taken along the line A-A in FIG. 2 corresponds to the cross section of the configuration focusing on the region near the height adjustment unit D of the structure 100 shown in FIG. 1. FIG. 3 is a top view showing another example of a configuration focusing on a region near the height adjustment unit D of the structure 100 shown in FIG. 1. The cross section taken along the line A-A in FIG. 3 corresponds to the cross section of the configuration focusing on the region near the height adjustment unit D of the structure 100 shown in FIG. 1.

[0031] [Structure] The structure 100 of this embodiment includes, for example, as shown in FIG. 1, a substrate B, wirings E1, E2, EX (first wiring E1, second wiring E2, third wiring EX), an insulating layer SR, a height adjustment portion D, a first insulating adhesive layer M1, a first semiconductor chip IC1, a first bonding wire W1, a second insulating adhesive layer M2, a second semiconductor chip IC2, a second bonding wire W2, a third insulating adhesive layer M3a, a third semiconductor chip IC3a, a third bonding wire W3a, and a resin layer F.

[0032] 1, the structure 100 is, for example, a semiconductor memory device. However, the configuration of the structure 100 can also be applied to semiconductor devices other than semiconductor memory devices and other devices.

[0033] [substrate] 1 is, for example, a printed wiring board. This substrate B includes, for example, a base material made of glass epoxy resin.

[0034] A plurality of wirings E1, E2, and EX are provided on the substrate B. The plurality of wirings E1, E2, and EX are fixed to the substrate B. Note that the plurality of wirings E1, E2, and EX are, for example, wirings containing copper, but may be composed of other conductive metals such as aluminum.

[0035] [Insulation layer] The insulating layer SR of the structure 100 shown in FIG. 1 is provided on the substrate B so as to cover all or part of the wirings E1, E2, and EX.

[0036] In particular, this insulating layer SR is made of, for example, at least one of a photosensitive resin and a photosensitive resin composition, but may be made of other organic resins or the like.

[0037] This insulating layer SR is, for example, composed of a cured product of solder resist, which is an ink that covers the surface of the substrate B on which wiring is provided and serves as an insulating film that protects the pattern circuit. The ink for forming the solder resist is classified into, for example, "alkali development type solder resist ink", "UV curing type solder resist ink", "thermosetting type solder resist ink", etc., depending on the method of forming the coating film. For example, "alkali development type solder resist ink" is a solder resist ink that can form a fine pattern by exposing a printed wiring board on which solder resist ink has been applied over the entire surface by screen printing, spraying, or curtain method through a negative film on which a pattern has been made, and developing the uncured parts with a dilute alkaline developer. Also, "UV curing type solder resist ink" is a type of solder resist ink that is pattern printed by a screen printing method and cured by irradiating UV light (ultraviolet rays). Also, "thermosetting type solder resist ink" is a type of solder resist ink that is pattern printed by a screen printing method and cured by heating.

[0038] Here, as an example, a method of patterning using a photosensitive resin composition will be described below, although it goes without saying that a dry film can be used instead of the photosensitive resin composition.

[0039] First, the photosensitive resin composition is applied to the surface of the substrate. The application method is not particularly limited, and a known application method such as a screen printing method, a bar coater, or a blade coater can be adopted. The thickness of the photosensitive resin can be appropriately adjusted by the amount of application.

[0040] Next, the coating film of the resin composition is exposed through a negative mask having a predetermined pattern. The exposure may be either contact exposure or non-contact exposure. Alternatively, a pattern may be formed in the coating film by a laser direct imaging device without using a mask.

[0041] The coating film is then developed to give the exposed coating a pattern. By using a dilute alkaline aqueous solution as the developer, it is possible to obtain a coating film with excellent resolution after exposure with little damage to the exposed coating film.

[0042] After development, the photosensitive resin composition is fully cured by heat or ultraviolet irradiation, thereby forming a cured resin layer having a desired pattern.

[0043] [Height adjustment section] The height adjusting portion D of the structure 100 shown in FIG.

[0044] The height adjustment section D is made of, for example, at least one of an organic resin and an organic resin composition (hereinafter, also referred to as an organic resin material). In particular, the height adjustment section D is made of, for example, at least one of a photosensitive resin and a photosensitive resin composition. It is preferable that the height adjustment section D has insulating properties.

[0045] The insulating layer SR and the height adjusting portion D may have the same composition, or may have different compositions.

[0046] Here, the height adjustment portion D may include, for example, a base portion DX, a first height adjustment portion D1, and a second height adjustment portion D2, as shown in FIG. 1 and FIG.

[0047] The first height adjustment portion D1 extends in the first direction X in the first region A1, as shown in, for example, FIGS.

[0048] Also, the second height adjustment portion D2 extends in the first direction X in the first region A1 and is spaced apart from the first height adjustment portion D1. Note that, although the first height adjustment portion D1 and the second height adjustment portion D2 are arranged parallel to each other in the first region A1 in the example of Fig. 1 and Fig. 2, they do not necessarily have to be arranged parallel to each other as long as they can support the first semiconductor chip IC1.

[0049] In particular, a resin layer F is provided between the first height adjustment portion D1 and the second height adjustment portion D2, as shown in Figures 1 and 2. That is, the resin layer F is filled between the first height adjustment portion D1 and the second height adjustment portion D2.

[0050] Furthermore, in the example of FIG. 2, the first and second height adjustment portions D1, D2 are arranged in two rows, but each height adjustment portion may be arranged in four rows.

[0051] That is, the height adjustment portion D may include, for example, a base portion DX, a first height adjustment portion D1, a second height adjustment portion D2, a third height adjustment portion D3, and a fourth height adjustment portion D4, as shown in FIG. 3.

[0052] The first height adjustment portion D1 extends in the first direction X in the first region A1, for example, as shown in FIGS.

[0053] Also, the second height adjustment portion D2 extends in the first direction X in the first region A1 and is spaced apart from the first height adjustment portion D1. Note that, although the first height adjustment portion D1 and the second height adjustment portion D2 are arranged parallel to each other in the first region A1 in the examples of Fig. 1 and Fig. 3, they do not necessarily have to be arranged parallel to each other as long as they can support the first semiconductor chip IC1.

[0054] Furthermore, the third height adjustment portion D3 extends in a second direction Y different from (for example, perpendicular to) the first direction X in the first region A1, as shown in FIG. 3, and is spaced apart from the first and second height adjustment portions D1 and D2.

[0055] Also, the fourth height adjustment portion D4, for example, as shown in FIG. 3, extends in the second direction Y in the first region A1 and is provided spaced apart from the first to third height adjustment portions D1, D2, and D3.

[0056] Here, a resin layer F is provided between the first to fourth height adjustment portions D1, D2, D3, and D4. In other words, above the substrate B, the resin layer F is filled between the first height adjustment portion D1, the second height adjustment portion D2, the third height adjustment portion D3, and the fourth height adjustment portion D4.

[0057] 1 to 3 are merely examples, and may have other configurations and arrangements that have similar functions, or may be omitted as necessary, as described later. That is, the height adjustment unit D may be configured with only the base portion DX.

[0058] The height adjustment portion D is formed by, for example, patterning by inkjet coating of an organic resin material, patterning by pattern printing of an organic resin material, or patterning of a photosensitive organic resin material using photolithography technology (exposure, development), followed by a predetermined curing process. In particular, patterning of a photosensitive organic resin material is preferable in that a fine pattern can be formed when finely forming height adjustment portions such as D1 and D2. Patterning by pattern printing is preferable in that it can be easily performed when forming a shape such as the pedestal portion DX. In addition, adhesion to the base (insulating layer SR) is also obtained.

[0059] The insulating layer SR and the height adjustment portion D may be made of, for example, the same organic resin material. That is, the insulating layer SR, the first and second height adjustment portions D1 and D2, and the base portion DX may be made of the same organic resin material.

[0060] In this case, the organic resin material is, for example, at least one of a photosensitive resin and a photosensitive resin composition.

[0061] In this case, for example, the insulating layer SR, the first and second height adjustment parts D1, D2, and the pedestal part DX can be formed by a method for forming a multi-stage solder resist structure. That is, for example, after forming a film of a photosensitive organic resin material on the insulating layer SR, it is possible to simultaneously form the insulating layer SR, the first and second height adjustment parts D1, D2, and the pedestal part DX by exposing and developing the film in stages so as to leave the parts corresponding to the first and second height adjustment parts D1, D2.

[0062] However, the insulating layer SR and the height adjustment portion D may be made of, for example, different organic resins as necessary. That is, the insulating layer SR, the first and second height adjustment portions D1 and D2, and the base portion DX may be made of different organic resin materials.

[0063] [First semiconductor chip] The first semiconductor chip IC1 of the structure 100 shown in FIG.

[0064] The first semiconductor chip IC1 includes, for example, any semiconductor memory, and specifically, the semiconductor memory includes, for example, a NAND flash memory.

[0065] [First insulating adhesive layer] The first insulating adhesive layer M1 is provided on the lower surface of the first semiconductor chip IC1, and adheres between the upper surface of the height adjustment portion D and the lower surface of the first semiconductor chip IC1 in the first region A1. That is, the first insulating adhesive layer M1 fixes the lower surface of the first semiconductor chip IC1 to the upper surface of the height adjustment portion D. The first insulating adhesive layer may be located only on the contact surface with the lower surface of the first semiconductor chip IC1, or may be located on the entire lower surface of the first semiconductor chip IC1.

[0066] The first insulating adhesive layer M1 may be made of a suitable material such as a die attach material, a die attach film, or other similar materials.

[0067] [First bonding wire] The first bonding wire W1 electrically connects the first wiring E1 of the wirings E1, E2, and EX to a terminal G1 provided on the upper surface of the first semiconductor chip IC1.

[0068] The material of the first bonding wires W1 is, for example, gold, but is not limited to this.

[0069] [Second semiconductor chip] The second semiconductor chip IC2 is arranged in a second area A2 different from the first area A1 on the substrate B, with an insulating layer SR interposed therebetween.

[0070] For example, as shown in FIG. 1, the end IC1a of the first semiconductor chip IC1 is located above the second semiconductor chip IC2, but it may be located beside the second semiconductor chip IC2 at the same height.

[0071] Here, the second semiconductor chip IC2 includes, for example, a controller that controls the operation of the first semiconductor chip IC1.

[0072] More specifically, the controller included in the second semiconductor chip IC2 is, for example, a controller integrated circuit that controls a NAND flash memory.

[0073] The controller included in the second semiconductor chip IC2, for example, writes data to the semiconductor memory of the first semiconductor chip IC1, reads data from the semiconductor memory of the first semiconductor chip IC1, erases data from the semiconductor memory of the first semiconductor chip IC1, and so on in accordance with external commands, thereby managing the storage state of the data in the semiconductor memory of the first semiconductor chip IC1.

[0074] [Second insulating adhesive layer] The second insulating adhesive layer M2 is provided on the lower surface of the second semiconductor chip IC2 and adheres between the upper surface of the insulating layer SR and the lower surface of the second semiconductor chip IC2 in the second region A2. That is, the lower surface of the second semiconductor chip IC2 is fixed to the upper surface of the insulating layer SR by the second insulating adhesive layer M2. The second insulating adhesive layer may be located only on the contact surface with the lower surface of the second semiconductor chip IC2 or may be located on the entire lower surface of the second semiconductor chip IC2.

[0075] The second insulating adhesive layer M2 may be made of a suitable material such as a die attach material, a die attach film, or other similar materials.

[0076] [Second bonding wire] The second bonding wire W2 electrically connects the second wiring E2 of the multiple wirings E1, E2, EX to a terminal G2 provided on the upper surface of the second semiconductor chip IC2.

[0077] The material of the second bonding wires W2 is, for example, gold, but is not limited to this.

[0078] [Third semiconductor chip] The third semiconductor chip IC3a of the structure 100 shown in Fig. 1 is arranged on the first semiconductor chip IC1 so as to be shifted in the first direction X from the position where the first semiconductor chip IC1 is arranged, particularly when wiring is performed by wire bonding as shown in Fig. 1. In this manner, one third semiconductor chip IC3a may be mounted on the first semiconductor chip IC1.

[0079] Also, the third semiconductor chip IC3a includes, for example, an arbitrary semiconductor memory like the first semiconductor chip IC1, and specifically, this semiconductor memory includes, for example, a NAND flash memory.

[0080] In this case, the controller included in the second semiconductor chip IC2, for example, in accordance with external commands, writes data to the semiconductor memories of the first semiconductor chip IC1 and the third semiconductor chip IC3a, reads data from the semiconductor memories of the first semiconductor chip IC1 and the third semiconductor chip IC3a, and erases data from the semiconductor memories of the first semiconductor chip IC1 and the third semiconductor chip IC3a, thereby managing the storage state of the data in the semiconductor memories of the first semiconductor chip IC1 and the third semiconductor chip IC3a.

[0081] As mentioned above, the example of Figure 1 shows a case where one third semiconductor chip IC3a is mounted on the first semiconductor chip IC1, but as described in a modified example below, the number of third semiconductor chips stacked on the first semiconductor chip IC1 may be, for example, two or more.

[0082] [Third insulating adhesive layer] The third insulating adhesive layer M3a is provided on the lower surface of the third semiconductor chip IC3a and is adapted to bond between the lower surface of the third semiconductor chip IC3a and the upper surface of the first semiconductor chip IC1. That is, the lower surface of the third semiconductor chip IC3a is fixed to the upper surface of the first semiconductor chip IC1 by the third insulating adhesive layer M3a. The third insulating adhesive layer may be located only on the contact surface with the lower surface of the third semiconductor chip IC3a or may be located on the entire lower surface of the second semiconductor chip IC3a.

[0083] The third insulating adhesive layer M3 may be made of a suitable material such as a die attach material, a die attach film, or other similar materials.

[0084] [Third bonding wire] The third bonding wire W3a electrically connects between wiring (not shown) provided on the substrate and a terminal G3a provided on the upper surface of the third semiconductor chip IC3a.

[0085] The material of the third bonding wires W3a is, for example, gold, but is not limited to this.

[0086] [Resin layer] The resin layer F encapsulates, on the substrate B, the wirings E1, E2, EX, the first bonding wire W1, the second bonding wire W2, the third bonding wire W3a, the first semiconductor chip IC1, the second semiconductor chip IC2, and the third semiconductor chip IC3a.

[0087] The resin layer F is made of, for example, a material different from that of the height adjustment portion D. However, the resin layer F may be made of the same material as that of the height adjustment portion D. The resin layer F is, for example, at least one of a thermosetting resin and a thermosetting resin composition.

[0088] Here, for example, as shown in Figure 1, the height from the top surface of the substrate B to the top surface of the height adjustment portion D (in the example of Figure 1, the top surfaces of the first height adjustment portion D1 and the second height adjustment portion D2) (in particular, the height to the bottom surface of the first semiconductor chip IC1 and the bottom surface of the first insulating adhesive layer M1) is equal to or higher than the height from the top surface of the substrate B to the top surface of the second semiconductor chip IC2.

[0089] In particular, the distance (shortest distance) Ha between the bottom surface of the first semiconductor chip IC1 (in the example of Figure 1, the bottom surface of the first insulating adhesive layer M1) and the top surface of the second semiconductor chip IC2 is set to a predetermined distance (this distance Ha is adjusted by adjusting the height of the height adjustment portion D).

[0090] In this way, by finely adjusting the height of the height adjustment portion D in the structure 100, it becomes possible to appropriately control, for example, the distance in the third direction Z between the first semiconductor chip IC1 and the second semiconductor chip IC2 whose arrangement regions overlap. In other words, it becomes possible to control the film thickness of the structure 100 to an optimal film thickness.

[0091] In addition, the distance Hb (shortest distance in the third direction Z) between the underside of the first semiconductor chip IC1 (in the example of Figure 1, the underside of the first insulating adhesive layer M1) and the second bonding wire W2 is set to a preset distance (this distance Hb is adjusted by adjusting the height of the height adjustment portion D).

[0092] In this way, by finely adjusting the height of the height adjustment portion D in the structure 100, for example, in the area where the first semiconductor chip IC1 and the second semiconductor chip IC2 are arranged overlapping, the distance between the second bonding wire W2 and the first semiconductor chip IC1 can be controlled to an optimal film thickness, thereby improving the product yield of the structure 100.

[0093] Next, an example of a method for manufacturing the structure 100 having the above-mentioned configuration and functions will be described.

[0094] Here, FIG. 4 is a cross-sectional view that shows a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention shown in FIG. 1. FIG. 5 is a cross-sectional view that shows a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention, subsequent to FIG. 4. FIG. 6 is a cross-sectional view that shows a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention, subsequent to FIG. 5. FIG. 7 is a cross-sectional view that shows a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention, subsequent to FIG. 6. FIG. 8 is a cross-sectional view that shows a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention, subsequent to FIG. 7. FIG. 9 is a cross-sectional view that shows a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention, subsequent to FIG. 8. FIG. 10 is a cross-sectional view that shows a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention, subsequent to FIG. 9. FIG. 11 is a cross-sectional view that shows a schematic example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention, subsequent to FIG. 10. FIG. 12 is a cross-sectional view following FIG. 11, which is a schematic diagram showing an example of a process of the method for manufacturing the structure 100 according to the embodiment of the present invention.

[0095] First, for example, as shown in the process of FIG. 4, a substrate B having one or more wirings E1, E2, and EX provided on the upper surface thereof is prepared.

[0096] Next, for example, as shown in the process of FIG. 5, an insulating layer SR is formed on the substrate B on which the wirings E1, E2, and EX are provided so as to cover all or part of the wirings E1, E2, and EX.

[0097] As described above, the insulating layer SR is composed of, for example, a solder resist ink, which is an ink that covers the surface of the substrate B on which wiring is provided and serves as an insulating film that protects the circuit pattern. The solder resist ink is classified into, for example, "alkali development type solder resist ink", "UV curing type solder resist ink", "thermosetting type solder resist ink", etc., depending on the method of forming the coating film. For example, "alkali development type solder resist ink" is a solder resist ink that can form a fine pattern by exposing a printed wiring board on which a solder resist is entirely applied by screen printing, spraying, or curtain method through a negative film on which a circuit pattern is formed, and developing the uncured parts with a dilute alkaline developing liquid. Also, "UV curing type solder resist ink" is a type of solder resist ink that is pattern printed by a screen printing method and cured by irradiating UV light (ultraviolet rays). Also, "thermosetting type solder resist ink" is a type of solder resist ink that is pattern printed by a screen printing method and cured by heating.

[0098] Here, as an example, a method of patterning using a photosensitive resin will be described below, although it goes without saying that a dry film can be used in place of the photosensitive resin composition.

[0099] First, the photosensitive resin composition is applied to the surface of the substrate. The application method is not particularly limited, and a known application method such as a screen printing method, a bar coater, or a blade coater can be adopted. The thickness of the photosensitive resin composition can be appropriately adjusted by the amount of application.

[0100] Next, the coating film of the photosensitive resin composition is exposed through a negative mask having a predetermined pattern. The exposure may be either contact exposure or non-contact exposure. Alternatively, a pattern may be formed in the coating film by a laser direct imaging device without using a mask.

[0101] The coating film is then developed to form a pattern in the exposed coating film. By using a dilute alkaline aqueous solution as the developer, damage to the exposed coating film is reduced and an exposed coating film with excellent resolution can be obtained.

[0102] After development, the photosensitive resin composition is fully cured by heat or ultraviolet irradiation, thereby forming a cured resin layer having a desired pattern.

[0103] Next, for example, as shown in the process of FIG. 6, a height adjusting portion D made of at least one of an organic resin and an organic resin composition is formed on the insulating layer SR in the first region A1 on the substrate B.

[0104] In the process of forming this height adjustment portion D, the height adjustment portion D is patterned by patterning using inkjet coating of an organic resin material, patterning using pattern printing of an organic resin material, or patterning of a photosensitive organic resin material using photolithography technology (exposure, development).

[0105] More specifically, in the process of forming this height adjustment portion D, a base portion DX located between the insulating layer SR and the first and second height adjustment portions D1, D2 may be formed on the insulating layer SR, and then the first and second height adjustment portions D1, D2 may be formed.

[0106] In this case, the insulating layer SR, the first and second height adjustment portions D1, D2, and the base portion DX may be made of the same organic resin (for example, at least one of a photosensitive resin and a photosensitive resin composition) or different organic resins (for example, the base portion DX is a thermosetting resin, and the insulating layer SR, the first and second height adjustment portions D1, D2 are made of at least one of a photosensitive resin and a photosensitive resin composition).

[0107] On the other hand, in the process of forming this height adjustment portion D, the pedestal portion DX located between the insulating layer SR and the first and second height adjustment portions D1, D2 may be formed simultaneously with the first and second height adjustment portions D1, D2.

[0108] In this case, the insulating layer SR, the first height adjustment portions D1, D2, and the pedestal portion DX may be made of the same organic resin (for example, at least one of a photosensitive resin and a photosensitive resin composition).

[0109] Here, for example, in particular as shown in FIG. 2 described above, in the process of forming this height adjustment portion D, a first height adjustment portion D1 extending in the first direction X in the first region A1, and a second height adjustment portion D2 extending in the first direction X in the first region A1 and spaced apart from the first height adjustment portion D1 may be formed.

[0110] In the example shown in Figure 2, in the process of forming the insulating layer SR described below, a resin layer F is formed between the first height adjustment portion D1 and the second height adjustment portion D2 (i.e., the resin layer F is filled between the first height adjustment portion D1 and the second height adjustment portion D2).

[0111] Furthermore, for example, in particular as shown in FIG. 3 described above, in the process of forming this height adjustment portion D, a third height adjustment portion D3 extending in a second direction Y different from (for example, perpendicular to) the first direction X in the first region A1, and a fourth height adjustment portion D4 extending in the second direction Y in the first region A1 and spaced apart from the first to third height adjustment portions D1, D2, D3 may be formed.

[0112] In the example shown in Figure 3, in the process of forming the insulating layer SR described below, a resin layer F is formed between the first to fourth height adjustment portions D1, D2, D3, and D4 (i.e., the resin layer F is filled between the first height adjustment portion D1, the second height adjustment portion D2, the third height adjustment portion D3, and the fourth height adjustment portion D4).

[0113] 7, before the step of arranging the first semiconductor chip IC1, the second semiconductor chip IC2 is arranged via an insulating layer SR in a second area A2 different from the first area A1 on the substrate B. As described above, the second semiconductor chip IC2 includes a controller that controls the operation of the first semiconductor chip IC1.

[0114] In addition, before the process of placing the second semiconductor chip IC2, a second insulating adhesive layer M2 for bonding between the upper surface of the insulating layer SR and the lower surface of the second semiconductor chip IC2 may be provided on the lower surface of the second semiconductor chip IC2.

[0115] In the step of placing the second semiconductor chip IC2, the upper surface of the insulating layer SR and the lower surface of the second semiconductor chip IC2 may be bonded together by the second insulating adhesive layer M2.

[0116] The height from the top surface of the substrate B to the top surface of the height adjustment portion D is set to be equal to or higher than the height from the top surface of the substrate B to the top surface of this second semiconductor chip IC2.

[0117] Next, for example, as shown in the process of FIG. 8, after the process of placing the second semiconductor chip IC2, a second bonding wire W2 is used to connect the second wiring E2 of the wirings E1, E2, and EX to a terminal G2 provided on the upper surface of the second semiconductor chip IC2.

[0118] As described above, the material of the second bonding wires W2 is, for example, gold, but is not limited to this.

[0119] 9, the first semiconductor chip IC1 is placed on the height adjustment portion D so as to be supported by the height adjustment portion D. As described above, the first semiconductor chip IC1 includes a semiconductor memory (for example, a NAND flash memory).

[0120] In addition, before the process of placing this first semiconductor chip IC1, a first insulating adhesive layer M1 may be provided on the underside of the first semiconductor chip IC1 to bond between the upper surface of the height adjustment portion D and the underside of the first semiconductor chip IC1.

[0121] In the step of placing the first semiconductor chip IC1, the upper surface of the height adjustment portion D and the lower surface of the first semiconductor chip IC1 may be bonded together by the first insulating adhesive layer M1.

[0122] As a result, the end IC1a of the first semiconductor chip IC1 is located above or beside the second semiconductor chip IC2 and at the same height as the second semiconductor chip IC2.

[0123] In particular, the distance (shortest distance) Ha between the underside of the first semiconductor chip IC1 (in the example of Figure 9, the underside of the first insulating adhesive layer M1) and the upper surface of the second semiconductor chip IC2 is set to a predetermined distance (this distance Ha is adjusted by adjusting the height of the height adjustment portion D).

[0124] The distance Hb between the lower surface of the first semiconductor chip IC1 and the second bonding wires W2 (the shortest distance in the third direction Z) is set to a preset distance.

[0125] Next, for example, as shown in the process of FIG. 10, a third semiconductor chip IC3a is stacked on the first semiconductor chip IC1 (note that while the example of FIG. 10 shows a case where there is one third semiconductor chip, as described later, there may be two or more third semiconductor chips).

[0126] 11, a first wiring E1 of the wirings E1, E2, and EX is connected to a terminal G1 provided on the upper surface of the first semiconductor chip IC1 by a first bonding wire W1. Furthermore, a wiring (not shown) provided on the substrate B is electrically connected to a terminal G3a provided on the upper surface of the third semiconductor chip IC3a by a third bonding wire W3a.

[0127] As described above, the material of the first and third bonding wires W1, W3a is, for example, gold, but is not limited to this.

[0128] Next, for example, as shown in the process of FIG. 12, after the process of arranging the first semiconductor chip IC1, a resin layer F for sealing the first to third semiconductor chips IC1, IC2, and IC3a is formed on the substrate B.

[0129] In the process of forming this resin layer F, for example, as shown in FIG. 2 already described, the resin layer F is formed between the first height adjustment portion D1 and the second height adjustment portion D2 of the height adjustment section D (i.e., the resin layer F is filled between the first height adjustment portion D1 and the second height adjustment portion D2).

[0130] Furthermore, in the process of forming this resin layer F, for example, as shown in the above-mentioned FIG. 3, the resin layer F may be formed between the first height adjustment portion D1, the second height adjustment portion D2, the third height adjustment portion D3, and the fourth height adjustment portion D4 of the height adjustment portion D (i.e., the resin layer F is filled between the first height adjustment portion D1 and the second height adjustment portion D2).

[0131] It should be noted that this resin layer F is made of, for example, a different resin material than the height adjustment portion D (for example, the resin layer F is a thermosetting resin and the height adjustment portion D is a photosensitive resin), but they may be made of the same resin material.

[0132] As described above, the manufacturing method of the structure 100 of this embodiment includes the steps of forming an insulating layer SR on a substrate B having wirings E1, E2, and EX provided on its upper surface so as to cover all or part of the wirings E1, E2, and EX, forming a height adjustment portion D composed of at least one of an organic resin and an organic resin composition on top of the insulating layer SR in a first region A1 on the substrate B, and arranging a first semiconductor chip IC1 on the height adjustment portion D so as to be supported by the height adjustment portion D.

[0133] In this way, in the manufacturing method of structure 100, by applying height adjustment portion D composed of at least one of organic resin and organic resin composition as a spacer for adjusting the height from substrate B to first semiconductor chip IC1, an adhesive layer for fixing height adjustment portion D to substrate B is not required, and the manufacturing cost of structure 100 is reduced.

[0134] Furthermore, since the height adjustment portion D, which is made of at least one of an organic resin and an organic resin composition, can easily have its thickness finely adjusted, it becomes easy to finely adjust the height from the substrate B to the first semiconductor chip IC1.

[0135] In other words, according to the manufacturing method of the structure 100 of this embodiment, it is possible to provide a structure that can finely adjust the height from the substrate to the semiconductor chip to a predetermined value while reducing manufacturing costs by eliminating the need for an adhesive layer for fixing a height adjustment portion (spacer) for adjusting the height of the semiconductor chip to the substrate.

[0136] Various modifications can be made to the above-described embodiment. Each modification will be described below with reference to the drawings as necessary. In the following description and the drawings used in the following description, the same reference numerals as those used for the corresponding parts in the above-described embodiment will be used for parts that can be configured in the same manner as in the above-described embodiment, and duplicated descriptions will be omitted. In addition, if it is clear that the effects obtained in the above-described embodiment can also be obtained in the modification, the description may be omitted.

[0137] (First Modification) In the above-described embodiment, an example of a manufacturing method for the structure 100 has been described. In particular, in the example of Fig. 1, a configuration in which one third semiconductor chip is mounted on the first semiconductor chip has been described. However, for example, two or more (multiple) third semiconductor chips may be stacked on the first semiconductor chip.

[0138] In this first modified example, an example of a manufacturing method for a structure in which two third semiconductor chips are stacked on the first semiconductor chip IC1 will be described. The manufacturing method for the other components of the structure according to this modified example is the same as the configuration of the structure 100 of the above-described embodiment.

[0139] Here, FIG. 13 is a cross-sectional view that diagrammatically illustrates an example of a cross section of a structure 100A according to a first modified example.

[0140] For example, as shown in FIG. 13, in a structure 100A according to a first modified example, two third semiconductor chips IC3a and IC3b are stacked on a first semiconductor chip IC1.

[0141] The third semiconductor chips IC3a and IC3b include any semiconductor memory, for example, like the first semiconductor chip IC1, and specifically, the semiconductor memory includes, for example, a NAND flash memory. However, each of the third semiconductor chips IC3a and IC3b may be a semiconductor device other than a semiconductor memory.

[0142] 13, the third insulating adhesive layer M3a is provided on the lower surface of the third semiconductor chip IC3a and bonds the lower surface of the third semiconductor chip IC3a to the upper surface of the first semiconductor chip IC1. That is, the third insulating adhesive layer M3a fixes the lower surface of the third semiconductor chip IC3a to the upper surface of the first semiconductor chip IC1.

[0143] 13, the third insulating adhesive layer M3b is provided on the lower surface of the third semiconductor chip IC3b and bonds the lower surface of the third semiconductor chip IC3b and the upper surface of the third semiconductor chip IC3a. That is, the third insulating adhesive layer M3b fixes the lower surface of the third semiconductor chip IC3b to the upper surface of the third semiconductor chip IC3a.

[0144] As shown in FIG. 13, the third bonding wires W3a and W3b electrically connect between wiring (not shown) provided on the substrate and terminals G3a and G3b provided on the upper surfaces of the third semiconductor chips IC3a and IC3b, respectively.

[0145] In the example of FIG. 13, the number of third semiconductor chips IC3a, IC3b stacked on the first semiconductor chip IC1 is two, but the number may be three or more.

[0146] Next, an example of a method for manufacturing the structure 100A having the above-mentioned configuration and functions will be described.

[0147] Here, Fig. 14 is a cross-sectional view that typically shows one example of a step of a method for manufacturing structure 100A according to the first modified example shown in Fig. 13. Also, Fig. 15 is a cross-sectional view that typically shows one example of a step of a method for manufacturing structure 100A according to the first modified example, subsequent to Fig. 14.

[0148] As in the previously described embodiments, a first semiconductor chip (e.g., a memory) IC1 is placed on a height adjustment portion D so as to be supported by the height adjustment portion D (FIG. 9), and then, for example, as shown in the process of FIG. 14, third semiconductor chips IC3a, IC3b are stacked by being sequentially mounted on the first semiconductor chip IC1.

[0149] 15, for example, a first wiring E1 of the wirings E1, E2, and EX is connected to a terminal G1 provided on the upper surface of the first semiconductor chip IC1 by a first bonding wire W1. Furthermore, wiring (not shown) provided on the substrate B is electrically connected to terminals G3a and G3b provided on the upper surfaces of the third semiconductor chips IC3a and IC3b by third bonding wires W3a and W3b.

[0150] Then, in the subsequent steps, similarly to the above-described embodiments, after the step of arranging the first semiconductor chip IC1, a resin layer F that seals the first to third semiconductor chips IC1, IC2, IC3a is formed on the substrate B (FIG. 13).

[0151] As described above, the manufacturing method for the other components of the structure 100A according to the first modified example is the same as that of the embodiment described above.

[0152] Therefore, in the manufacturing method of the structure 100A relating to this first modified example, by applying a height adjustment portion D composed of at least one of an organic resin and an organic resin composition as a spacer for adjusting the height from the substrate B to the first semiconductor chip IC1, an adhesive layer for fixing the height adjustment portion D to the substrate B is not required, thereby reducing the manufacturing cost of the structure 100.

[0153] Furthermore, in the manufacturing method of the structure 100A relating to this first modified example, the height adjustment portion D, which is made of at least one of an organic resin and an organic resin composition, can easily have its film thickness finely adjusted, making it easy to finely adjust the height from the substrate B to the first semiconductor chip IC1.

[0154] In other words, according to the manufacturing method of the first modified example structure 100A, it is possible to reduce manufacturing costs by eliminating the need for an adhesive layer to fix the height adjustment part (spacer) for adjusting the height of the semiconductor chip to the substrate, while also making it possible to fine-tune the height from the substrate to the first semiconductor chip IC1 to a predetermined value.

[0155] (Second Modification) In the above-described embodiment and the first modified example, an example of a manufacturing method for the structure 100, 100A has been described. In particular, in the example of FIG. 1 and FIG. 13, a configuration has been described in which the height adjustment part D includes the first and second height adjustment parts D1, D2 in addition to the pedestal part DX. For example, by providing the first and second height adjustment parts D1, D2 (the third and fourth height adjustment parts D3, D4) made of at least one of an organic resin and an organic resin composition on the height adjustment part DX, it is possible to reduce the amount of organic resin material used that constitutes the height adjustment part D while finely adjusting the height. However, in the height adjustment part D, when it is assumed that the structure is further thinned, the first and second height adjustment parts D1, D2 may be omitted and the height adjustment part D made of at least one of an organic resin and an organic resin composition may be made thin by only the pedestal part DX (i.e., the height may be adjusted only by the pedestal part DX).

[0156] In this second modified example, an example of a manufacturing method for a structure in which two third semiconductor chips are stacked on the first semiconductor chip IC1 will be described. The other configurations of the structure according to this modified example are the same as those of the manufacturing method for the structure 100 of the embodiment described above.

[0157] Here, Fig. 16 is a cross-sectional view that shows a schematic example of a cross section of structure 100B according to the second modified example. Also, Fig. 17 is a top view that shows an example of a configuration focusing on a region near height adjustment unit D of structure 100B shown in Fig. 16. Also, Fig. 18 is a cross-sectional view that shows a schematic example of another cross section of structure 100B according to the second modified example.

[0158] For example, as shown in FIGS. 16 and 17, the height adjustment portion D of a structure 100B does not include the first and second height adjustment portions D1, D2 as shown in FIG. 1, and includes only a base portion DX.

[0159] 16, the lower surface of the first semiconductor chip IC1 is bonded and fixed by the first insulating adhesive layer M1 to the upper surface of the pedestal portion DX of the height adjustment portion D. That is, the first semiconductor chip IC1 is directly supported by the pedestal portion DX of the height adjustment portion D.

[0160] In the second variant, too, as shown in FIG. 16, there may be one third semiconductor chip IC3a mounted on the first semiconductor chip IC1, or, as shown in FIG. 18, two or more (multiple) third semiconductor chips IC3a, IC3b may be stacked on the first semiconductor chip IC1.

[0161] Next, an example of a method for manufacturing the structure 100B having the above-mentioned configuration and functions will be described.

[0162] Here, FIG. 19 is a cross-sectional view that typically illustrates one example of a process of a manufacturing method for the structure 100B according to the second modified example shown in FIG.

[0163] As in the previously described embodiments, an insulating layer SR is formed on a substrate B having wirings E1, E2, and EX on its upper surface so as to cover all or part of the wirings E1, E2, and EX (FIG. 5). After that, for example, as shown in the process of FIG. 19, only a base portion DX of a height adjustment portion D made of at least one of an organic resin and an organic resin composition is formed on top of the insulating layer SR in a first region A1 on the substrate B.

[0164] Then, in the subsequent steps, similarly to the above-described embodiment, after the second semiconductor chip IC2 is arranged and the second bonding wires W2 are wire-bonded, the lower surface of the first semiconductor chip IC1 is bonded and fixed to the upper surface of the pedestal portion DX of the height adjustment portion D by the first insulating adhesive layer M1. That is, the first semiconductor chip IC1 is directly supported by the pedestal portion DX of the height adjustment portion D.

[0165] Furthermore, similarly to the above-described embodiments, after the step of arranging the first semiconductor chip IC1, a resin layer F for sealing the first to third semiconductor chips IC1, IC2, IC3a is formed on the substrate B (FIG. 16).

[0166] As described above, the manufacturing method for the other components of the structure 100B according to the second modified example is the same as that of the embodiment described above.

[0167] Therefore, in the manufacturing method of the structure 100B relating to this second modified example, by applying a height adjustment portion D composed of at least one of an organic resin and an organic resin composition as a spacer for adjusting the height from the substrate B to the first semiconductor chip IC1, an adhesive layer for fixing the height adjustment portion D to the substrate B is not required, and the manufacturing cost of the structure 100 is reduced.

[0168] Furthermore, in the manufacturing method of the structure 100B relating to this second modified example, the height adjustment portion D, which is made of at least one of an organic resin and an organic resin composition, can easily have its film thickness finely adjusted, making it easy to finely adjust the height from the substrate B to the first semiconductor chip IC1.

[0169] In other words, according to the manufacturing method of the second modified example structure 100B, the manufacturing cost can be reduced by eliminating the need for an adhesive layer to fix the height adjustment part (spacer) for adjusting the height of the semiconductor chip to the substrate, while the height from the substrate to the first semiconductor chip IC1 can be fine-tuned to a predetermined value.

[0170] (Third Modification) In the above-described embodiment, particularly in the example of Fig. 1 to Fig. 3, a manufacturing method has been described in which the height adjustment unit D includes a plurality of height adjustment parts. However, the height adjustment unit D may include only one height adjustment part.

[0171] In this third modified example, an example of a manufacturing method for a configuration in which the height adjustment unit D includes one height adjustment portion D1 will be described. The manufacturing method for the other components of the structure according to this modified example is the same as the manufacturing method for the structure 100 of the embodiment described above.

[0172] Here, Fig. 20 is a cross-sectional view that shows a schematic example of a cross section of structure 100C according to the third modified example. Also, Fig. 21 is a top view that shows an example of a configuration focusing on a region near height adjustment unit D of structure 100C shown in Fig. 20. Also, Fig. 22 is a cross-sectional view that shows a schematic example of another cross section of structure 100C according to the third modified example.

[0173] For example, as shown in FIGS. 20 and 21, the height adjustment portion D of a structure 100C may include a base portion DX and a first height adjustment portion D1.

[0174] 21, the lower surface of the first semiconductor chip IC1 is bonded and fixed by a first insulating adhesive layer M1 to the upper surface of a first height adjustment part D1 provided on a pedestal part DX of the height adjustment part D. That is, the first semiconductor chip IC1 is supported by the pedestal part DX of the height adjustment part D and the first height adjustment part D1.

[0175] In the third modified example as well, as shown in FIG. 20, there may be one third semiconductor chip IC3a mounted on the first semiconductor chip IC1, or, as shown in FIG. 22, two or more (multiple) third semiconductor chips IC3a, IC3b may be stacked on the first semiconductor chip IC1.

[0176] Next, an example of a method for manufacturing the structure 100C having the above-mentioned configuration and functions will be described.

[0177] Here, FIG. 23 is a cross-sectional view that typically illustrates one example of a process of a manufacturing method for the structure 100C according to the third modified example shown in FIG.

[0178] As in the previously described embodiments, an insulating layer SR is formed on a substrate B having wirings E1, E2, and EX on its upper surface so as to cover all or part of the wirings E1, E2, and EX (FIG. 5). Then, for example, as shown in the process of FIG. 23, a base portion DX and a first height adjustment portion D1 of a height adjustment portion D made of at least one of an organic resin and an organic resin composition are formed on top of the insulating layer SR in a first region A1 on the substrate B.

[0179] More specifically, in the process of forming this height adjustment portion D, a base portion DX located between the insulating layer SR and the first height adjustment portion D1 may be formed on the insulating layer SR, and then the first height adjustment portion D1 may be formed.

[0180] In this case, the insulating layer SR, height adjustment portion D, and base portion DX may be made of the same organic resin (e.g., at least one of a photosensitive resin and a photosensitive resin composition) or different organic resins (e.g., the base portion DX is a thermosetting resin, and the insulating layer SR and the first height adjustment portion D1 are made of at least one of a photosensitive resin and a photosensitive resin composition).

[0181] On the other hand, in the step of forming this height adjustment portion D, the pedestal portion DX located between the insulating layer SR and the first height adjustment portion D1 may be formed simultaneously with the first height adjustment portion D1.

[0182] In this case, the insulating layer SR, the first height adjustment portion portion D1, and the pedestal portion DX may be made of the same organic resin (for example, at least one of a photosensitive resin and a photosensitive resin composition).

[0183] Then, in the subsequent steps, similarly to the above-described embodiment, after the second semiconductor chip IC2 is arranged and the second bonding wires W2 are wire-bonded, the lower surface of the first semiconductor chip IC1 is bonded and fixed to the upper surface of the first adjustment portion D1 of the height adjustment portion D by the first insulating adhesive layer M1. That is, the first semiconductor chip IC1 is directly supported by the first height adjustment portion D1 of the height adjustment portion D.

[0184] Furthermore, similarly to the above-described embodiments, after the step of arranging the first semiconductor chip IC1, a resin layer F for sealing the first to third semiconductor chips IC1, IC2, IC3a is formed on the substrate B (FIG. 20).

[0185] As described above, the manufacturing method for the other components of the structure 100C according to the third modified example is the same as that of the embodiment described above.

[0186] Therefore, in the manufacturing method of the structure 100C relating to this third modified example, by applying a height adjustment portion D composed of at least one of an organic resin and an organic resin composition as a spacer for adjusting the height from the substrate B to the first semiconductor chip IC1, an adhesive layer for fixing the height adjustment portion D to the substrate B is not required, thereby reducing the manufacturing cost of the structure 100.

[0187] Furthermore, in the manufacturing method of the structure 100C relating to this third modified example, the height adjustment portion D, which is made of at least one of an organic resin and an organic resin composition, can easily have its film thickness finely adjusted, making it easy to finely adjust the height from the substrate B to the first semiconductor chip IC1.

[0188] In other words, according to the manufacturing method of the third modified example structure 100C, the manufacturing cost can be reduced by eliminating the need for an adhesive layer to fix the height adjustment part (spacer) for adjusting the height of the semiconductor chip to the substrate, while the height from the substrate to the first semiconductor chip IC1 can be fine-tuned to a predetermined value.

[0189] (Fourth Modification) In the above-described embodiment and each modified example, the manufacturing method has been described in which the terminals of the second semiconductor chip IC2 are connected by wire bonding. However, in the structure, the terminals of the second semiconductor chip IC2 may be connected by flip chip bonding.

[0190] In this fourth modification, an example of a method for manufacturing a configuration (flip-chip type) in which each terminal of the second semiconductor chip IC2 is connected by flip-chip bonding will be described. The method for manufacturing other configurations of the structure according to this modification is similar to the method for manufacturing the configuration of the structure 100 of the embodiment described above, and can be similarly applied to the method for manufacturing the configuration of the structure of each modification.

[0191] Here, Fig. 24 is a cross-sectional view that typically shows one example of a cross section of structure 100D according to the fourth modified example, and Fig. 25 is a cross-sectional view that typically shows another example of a cross section of structure 100D according to the fourth modified example.

[0192] For example, as shown in FIG. 24, a structure 100D includes bump electrodes BN and underfill resin UF as a flip-chip bonding configuration instead of wire bonding.

[0193] [Bump electrode] The bump electrode BN electrically connects the second wiring E2 of the wirings E1, E2, and EX to a terminal K2 provided on the lower surface of the second semiconductor chip IC2.

[0194] [Underfill resin] The underfill resin UF is provided between the insulating layer SR and the lower surface of the second semiconductor chip IC2, and includes underfill resin UF that bonds the insulating layer SR to the lower surface of the second semiconductor chip IC2 and seals the terminals K2 and the bump electrodes BN.

[0195] Incidentally, in the fourth variant as well, as shown in FIG. 24, there may be one third semiconductor chip IC3a mounted on the first semiconductor chip IC1, or as shown in FIG. 25, two or more (multiple) third semiconductor chips IC3a, IC3b may be stacked on the first semiconductor chip IC1.

[0196] Next, an example of a method for manufacturing the structure 100D having the above-mentioned configuration and functions will be described.

[0197] Here, FIG. 26 is a cross-sectional view that diagrammatically illustrates one example of a process of a manufacturing method for the structure 100D according to the fourth modified example shown in FIG.

[0198] As in the previously described embodiments, a height adjustment portion D composed of at least one of an organic resin and an organic resin composition is formed on the upper part of the insulating layer SR in the first region A1 on the substrate B (Figure 6), and then, for example, as shown in the process of Figure 23, in the process of arranging the second semiconductor chip IC2, a bump electrode BN is used to connect the second wiring E2 of the wirings E1, E2, and EX to a terminal K2 provided on the underside of the second semiconductor chip IC2, and an underfill resin UF provided so as to be positioned between the insulating layer SR and the second semiconductor chip IC2 bonds the insulating layer SR to the underside of the second semiconductor chip IC2 and seals the terminal K2 and the bump electrode BN.

[0199] Then, in the subsequent steps, similarly to the above-described embodiment, the lower surface of the first semiconductor chip IC1 is adhered and fixed to the upper surface of the height adjustment portion D by the first insulating adhesive layer M1. That is, the first semiconductor chip IC1 is directly supported by the height adjustment portion D.

[0200] Furthermore, similarly to the above-described embodiments, after the step of arranging the first semiconductor chip IC1, a resin layer F for sealing the first to third semiconductor chips IC1, IC2, IC3a is formed on the substrate B (FIG. 24).

[0201] As described above, the manufacturing method for the other components of the structure 100D according to the fourth modified example is the same as that of the embodiment described above.

[0202] Therefore, in the manufacturing method of the structure 100D relating to the fourth modified example, by applying a height adjustment portion D composed of at least one of an organic resin and an organic resin composition as a spacer for adjusting the height from the substrate B to the first semiconductor chip IC1, an adhesive layer for fixing the height adjustment portion D to the substrate B is not required, thereby reducing the manufacturing cost of the structure 100.

[0203] Furthermore, in the manufacturing method of the structure 100D relating to this fourth modified example, the height adjustment portion D, which is made of at least one of an organic resin and an organic resin composition, can easily have its film thickness finely adjusted, making it easy to finely adjust the height from the substrate B to the first semiconductor chip IC1.

[0204] In other words, according to the manufacturing method of the fourth modified example structure 100D, the manufacturing cost can be reduced by eliminating the need for an adhesive layer to fix the height adjustment part (spacer) for adjusting the height of the semiconductor chip to the substrate, while the height from the substrate to the first semiconductor chip IC1 can be fine-tuned to a predetermined value.

[0205] Although the embodiments and modifications of the present invention have been described, these embodiments and modifications are presented as examples and are not intended to limit the scope of the invention. These embodiments and modifications can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and modifications are included in the scope of the invention and its equivalents described in the claims, as well as in the scope and spirit of the invention. [Explanation of symbols]

[0206] 100, 100A, 100B, 100C, 100D Structure B Substrate BN bump electrode E1 First wiring E2 2nd wiring EX 3rd Wiring SR Insulation Layer D Height adjustment part D1 First height adjustment part D2 Second height adjustment part D3 3rd height adjustment part D4 4th height adjustment part DX pedestal part M1 First insulating adhesive layer IC1 First semiconductor chip IC1a end W1 First bonding wire M2 2nd insulation adhesive layer IC2 Second semiconductor chip W2 Second bonding wire M3a, M3b 3rd insulating adhesive layer IC3a, IC3b 3rd semiconductor chip W3a, W3b 3rd bonding wire F Resin layer X 1st direction Y Second direction Z 3rd direction G1, G2, G3a, G3b, K2 terminals A1 1st area A2 2nd area Ha: the distance (shortest distance) between the bottom surface of the first semiconductor chip IC1 and the top surface of the second semiconductor chip IC2 Hb: the distance (shortest distance) between the bottom surface of the first semiconductor chip IC1 and the second bonding wire W2 UF Underfill Resin

Claims

1. forming an insulating layer on a substrate having wiring on its upper surface so as to cover all or part of the wiring; forming a height adjusting portion made of at least one of an organic resin and an organic resin composition on an upper portion of the insulating layer in a first region on the substrate; placing a first semiconductor chip on the height adjustment portion so as to be supported by the height adjustment portion; Equipped with the height adjustment unit includes a first height adjustment portion extending in a first direction in the first region, and a second height adjustment portion extending in the first direction in the first region and spaced apart from the first height adjustment portion; In the step of forming the height adjustment portion, a pedestal portion is formed on the insulating layer so as to be positioned between the insulating layer and the first and second height adjustment portions, and then the first and second height adjustment portions are formed. A method for manufacturing a structure comprising the steps of:

2. The method further includes, after the step of arranging the first semiconductor chip, a step of forming a resin layer on the substrate to seal the first semiconductor chip. A method for manufacturing the structure according to claim 1.

3. a step of placing a second semiconductor chip in a second region on the substrate, the second region being different from the first region, with the insulating layer interposed therebetween, before the step of placing the first semiconductor chip; forming a resin layer on the substrate after the step of arranging the first semiconductor chip to seal the first semiconductor chip and the second semiconductor chip; Further provided with A method for manufacturing the structure according to claim 1.

4. a step of providing a first insulating adhesive layer on a lower surface of the first semiconductor chip for bonding between an upper surface of the height adjusting portion and a lower surface of the first semiconductor chip before the step of arranging the first semiconductor chip; Further preparation, In the step of placing the first semiconductor chip, the upper surface of the height adjustment portion and the lower surface of the first semiconductor chip are bonded together by the first insulating adhesive layer. A method for manufacturing the structure according to claim 1.

5. The insulating layer and the height adjusting portion are made of at least one of the same organic resin and organic resin composition. A method for manufacturing the structure according to claim 1.

6. The method for producing a structure according to claim 1 , wherein at least one of the organic resin and the organic resin composition is photosensitive.

7. a step of providing a second insulating adhesive layer on the lower surface of the second semiconductor chip to bond the upper surface of the insulating layer and the lower surface of the second semiconductor chip before the step of arranging the second semiconductor chip; In the step of disposing the second semiconductor chip, the upper surface of the insulating layer and the lower surface of the second semiconductor chip are bonded together by the second insulating adhesive layer; a step of connecting second wirings of the wirings and terminals provided on the upper surface of the second semiconductor chip by second bonding wires after the step of placing the second semiconductor chip; A method for manufacturing the structure according to claim 3.

8. In the step of placing the second semiconductor chip, second wirings among the wirings and terminals provided on the underside of the second semiconductor chip are connected by bump electrodes, and an underfill resin provided so as to be positioned between the insulating layer and the second semiconductor chip bonds the insulating layer to the underside of the second semiconductor chip and seals the terminals and the bump electrodes. A method for manufacturing the structure according to claim 3.

9. a distance between the bottom surface of the first semiconductor chip and the second bonding wire is set to a predetermined distance; A method for manufacturing the structure according to claim 7.

10. a first bonding wire is connected between a first wiring of the wirings and a terminal provided on the top surface of the first semiconductor chip; A method for producing the structure according to claim 7 or 8.

11. The resin layer is made of a material different from that of the height adjustment portion. A method for manufacturing the structure according to claim 2.

12. further comprising a step of stacking one or more third semiconductor chips on the first semiconductor chip. A method for manufacturing the structure according to claim 1.

13. The method of claim 1 , wherein the first semiconductor chip includes a semiconductor memory.

14. the second semiconductor chip includes a controller that controls the operation of the first semiconductor chip; A method for manufacturing the structure according to claim 3.

15. The method for manufacturing a structure according to claim 1 , wherein the insulating layer is made of a solder resist.

16. The method for manufacturing a structure according to claim 1 , wherein the height adjusting portion has insulating properties.

17. a distance between the bottom surface of the first semiconductor chip and the top surface of the second semiconductor chip is set to a predetermined distance; A method for manufacturing the structure according to claim 3.

18. In the step of forming the height adjustment portion, the height adjustment portion is patterned by inkjet coating of an organic resin material, patterning by pattern printing of an organic resin material, or patterning of a photosensitive organic resin material using a photolithography technique. A method for manufacturing the structure according to claim 1.

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