RFID tag, integrated circuit, and control method for RFID tag

The RFID tag's integrated circuit adjusts charge pump stages to maintain impedance matching and power efficiency, addressing input impedance mismatch issues and enhancing power utilization and communication range.

JP2024174474AInactive Publication Date: 2024-12-17FUJITSU SEMICON MEMORY SOLUTION LTD
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Patent Information

Application Number
JP2023092316
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-06-05
Publication Date
2024-12-17
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

The input impedance mismatch in RFID tags due to changes in the number of charge pump stages and load current can lead to insufficient power supply and decreased power efficiency.

Method used

An RFID tag with an integrated circuit that includes a rectifier circuit with adjustable charge pumps and a control circuit to dynamically adjust the number of charge pump stages based on load power consumption, maintaining impedance matching and optimizing power efficiency.

Benefits of technology

The solution effectively suppresses input impedance mismatch and maintains power efficiency by adapting the charge pump stages, ensuring efficient power utilization and extended communication range.

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Abstract

To suppress reduction in power efficiency by preventing mismatching of input impedance even when power consumption of a load operated by a power supply voltage from a rectifier circuit is changed.SOLUTION: An RFID tag comprises an integrated circuit operated according to electric power received by an antenna and a load, and the integrated circuit comprises: a rectifier circuit which includes a plurality of diodes connected in series and a plurality of capacitors each of which is disposed between a connection node of a pair of diodes adjacent to each other and the antenna, and generates a power supply voltage by rectifying an AC signal received by the antenna by a plurality of stages of charge pumps each of which includes a diode and a capacitor; and a control circuit which changes the number of stages of the charge pumps for use in generation of the power supply voltage according to power consumption of the load operated by the power supply voltage. The communication distance of the RFID tag can be efficiently extended, so that the reliability of a system in which the RFID tag is mounted can be improved.SELECTED DRAWING: Figure 6
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Description

[Technical field]

[0001] The present invention relates to an RFID tag, an integrated circuit, and a method for controlling an RFID tag. [Background technology]

[0002] A method has been proposed for generating an appropriate power supply voltage in a semiconductor device that receives signals and power through an antenna by switching the number of charge pump stages made up of diodes and capacitors included in a rectifier circuit according to the magnitude of the received power. When the received power is low, the semiconductor device increases the number of charge pump stages to ensure a predetermined power supply voltage, and when the received power is high, it reduces the number of charge pump stages to minimize power loss (see, for example, Patent Document 1).

[0003] For example, an RFID tag that performs wireless communication with a reader / writer has a matching circuit with variable impedance, and a rectifier circuit that includes a multi-stage charge pump including a diode and a capacitor and rectifies a signal received from the reader / writer to output a DC voltage. When the RFID tag detects a decrease in the strength of the input signal as an instruction from the reader / writer to adjust the impedance, the RFID tag adjusts the impedance of the matching circuit (for example, see Patent Document 2). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2013-254967 A [Patent Document 2] JP 2019-054398 A Summary of the Invention [Problem to be solved by the invention]

[0005] The input impedance of a rectifier circuit including multiple charge pumps with switchable stages changes when the number of stages of the charge pumps is switched. Therefore, if the input impedance is not matched when the number of stages of the charge pumps is switched, the power supplied from the rectifier circuit to the load may be insufficient. In addition, the input impedance also changes when the load current flowing from the rectifier circuit to the load changes. Therefore, if the input impedance is not matched according to the change in the load current, the appropriate power for operating the load may not be generated.

[0006] In one aspect, the present invention aims to suppress input impedance mismatch and suppress a decrease in power efficiency even when the power consumption of a load operated by a power supply voltage from a rectifier circuit changes. [Means for solving the problem]

[0007] According to one aspect, an RFID tag includes an integrated circuit and a load that operates in response to power received by an antenna, the integrated circuit including a plurality of diodes connected in series and a plurality of capacitors each arranged between the antenna and a connection node of a pair of adjacent diodes, and a rectifier circuit that generates a power supply voltage by rectifying an AC signal received by the antenna with a multi-stage charge pump each including the diodes and the capacitors, and a control circuit that changes the number of stages of the charge pump used to generate the power supply voltage in response to power consumption of the load that operates on the power supply voltage. Effect of the Invention

[0008] Even when the power consumption of a load that operates due to the power supply voltage from the rectifier circuit changes, it is possible to suppress mismatching of the input impedance and suppress a decrease in power efficiency. [Brief description of the drawings]

[0009] [Figure 1] FIG. 2 is a block diagram illustrating an example of an RFID tag according to one embodiment. [Diagram 2]FIG. 2 is a block diagram showing an example of a system including the RFID tag of FIG. 1. [Diagram 3] 1 is an explanatory diagram showing an example of matching between the impedance of an antenna and the input impedance of an LSI; [Figure 4] 4 is an explanatory diagram showing the relationship between the strength of an input signal to an LSI, and the input resistance, reflection coefficient, and load current of the LSI in the RFID tag of FIG. 3. [Diagram 5] 1 is an explanatory diagram showing an example of the relationship between the number of circuit stages of a rectifier circuit and input resistance and input capacitance; [Figure 6] 2 is a circuit diagram showing an example of a main part of the LSI of FIG. 1. [Figure 7] 7 is an explanatory diagram showing an example of matching input impedance by switching the number of stages of the rectifier circuit of FIG. 6. FIG. [Figure 8] 7 is a block diagram showing an example of a power supply voltage control circuit in FIG. 6. [Figure 9] 7 is a block diagram showing another example of the power supply voltage control circuit of FIG. 6. [Figure 10] FIG. 11 is a block diagram showing an example of an LSI mounted on an RFID tag according to another embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, embodiments will be described with reference to the drawings. In the following, the same reference numerals as the signal names are used for signal lines and terminals through which information such as signals is transmitted, and the same reference numerals as the voltage names are used for voltage lines and terminals through which voltages are supplied.

[0011] Fig. 1 shows an example of an RFID (Radio Frequency Identification) tag in one embodiment. The RFID tag 10 shown in Fig. 1 is a passive RFID tag that operates by receiving power together with information such as data. The RFID tag 10 has an antenna 12, an LSI (Large-Scale Integration) 100, and a load 200. The LSI 100 has terminals RF+ and RF- to which the antenna 12 is connected, and a terminal V to which the load 200 is connected. OUTThe LSI 100 is an example of an integrated circuit. The antenna 12 may be externally attached to the RFID tag 10, and the load 200 may be mounted within the LSI 100.

[0012] The LSI 100 includes a rectifier circuit 110, a power supply voltage control circuit 120, a modulation / demodulation circuit 130, a logic circuit 140, and a memory 150. In the LSI 100 shown in Fig. 1, only the power supply lines connecting the circuits are shown, and the signal lines are omitted.

[0013] The rectifier circuit 110 generates a power supply voltage by rectifying complementary AC signals received from the antenna 12 via the antenna terminals RF+ and RF-, and outputs the generated power supply voltage as a power supply voltage V OUT The power supply voltage V OUT is used as an operating voltage for the power supply voltage control circuit 120, the modulation / demodulation circuit 130, the logic circuit 140, the memory 150 and the load 200. An example of the rectifier circuit 110 is shown in FIG.

[0014] The power supply voltage control circuit 120 controls the power supply voltage V OUT Based on the control signal received from the started logic circuit 140, the power supply voltage control circuit 120 outputs a control signal for controlling the operation of the rectifier circuit 110, a control signal for controlling the connection between the LSI 100 and the load 200, and a control signal for controlling the operation of the load 200. Examples of the power supply voltage control circuit 120 are shown in FIGS. 8 and 9.

[0015] The modulation and demodulation circuit 130 demodulates the AC signal received from the antenna 12 via the antenna terminals RF+ and RF- to extract information such as data, and outputs the extracted information to the logic circuit 140. The modulation and demodulation circuit 130 modulates the information such as data received from the logic circuit 140, and outputs the modulated signal to the antenna 12 via the antenna terminals RF+ and RF-.

[0016] When the LSI 100 has an antenna terminal RF+ and a ground terminal instead of the antenna terminal RF-, the rectifier circuit 110 generates a power supply voltage by rectifying the AC signal received from the antenna 12 via the antenna terminal RF+. The modulation and demodulation circuit 130 demodulates the AC signal received from the antenna 12 via the antenna terminal RF+ and outputs the modulated signal to the antenna 12 via the antenna terminal RF+.

[0017] When the information received from the modulation and demodulation circuit 130 indicates a write command, the logic circuit 140 writes the data received together with the write command to the memory 150. When the information received from the modulation and demodulation circuit 130 indicates a read command, the logic circuit 140 outputs the data read from the memory 150 to the modulation and demodulation circuit 130. Note that when the information received from the modulation and demodulation circuit 130 indicates a monitor command, the logic circuit 140 outputs information indicating the state of the LSI 100 (operation mode, power supply voltage V OUT The modulation / demodulation circuit 130 may output the signal (such as the value of

[0018] The memory 150 is, for example, an electrically rewritable non-volatile memory such as a Ferroelectric Random Access Memory (FeRAM). The memory 150 stores data received from the outside of the RFID tag 10 via the antenna 12, various control information used in the RFID tag 10, and identification information of the RFID tag 10. The memory 150 may be a Resistive Random Access Memory (ReRAM) or a Magnetoresistive Random Access Memory (MRAM).

[0019] The load 200 is the power supply voltage V OUT For example, the load 200 operates or stops operating according to an operation mode instructed by the logic circuit 140 to the power supply voltage control circuit 120. The load 200 may have a function to assist the operation of the LSI 100, or may have a function added to the function of the LSI 100. The load 200 also operates when the power supply voltage V OUTThe RFID tag 10 may have a battery that is charged depending on the power source and may have a function of operating a circuit mounted on the RFID tag 10 such as the LSI 100 when power is not being received from the antenna 12.

[0020] Fig. 2 shows an example of a system including the RFID tag 10 of Fig. 1. The system SYS shown in Fig. 2 has the RFID tag 10, and a reader / writer 20 and an antenna 22 that transmit and receive radio signals to and from the RFID tag 10. The reader / writer 20 transmits radio signals (information and power) from the antenna 22 and receives information returned from the RFID tag 10.

[0021] Figure 3 shows an example of matching between the impedance of an antenna and the input impedance of an LSI. The RFID tag shown in Figure 3 has an antenna, a rectifier circuit, and a load, similar to Figure 1. The rectifier circuit rectifies the AC input signal received via the antenna to generate a power supply voltage, and supplies the generated power supply voltage to the load.

[0022] code P IN indicates the strength of the input signal, and the symbol I LOAD indicates the output current from the rectifier circuit to the load. LOAD is the current consumption of a load that operates on the power supply voltage. Hereinafter, the current consumption of a load is also referred to as the load current. Symbol R LOAD indicates the magnitude of the load as a resistance component. ANT denotes the impedance of the antenna. LSI indicates the input impedance of the LSI. The input impedance Z LSI is determined by the characteristics of the rectifier circuit in Figure 3.

[0023] In the RFID tag shown in FIG. 3, by matching the input impedance between the antenna and the input section of the LSI, the LSI can reduce the input voltage V IN On the other hand, if the input impedance is not matched, the input voltage V IN A part of the reflection coefficient Γ*(input voltage V IN), so there are cases where sufficient power is not supplied to the LSI (the sign * is a multiplication sign). The reflection coefficient Γ is IN In order to show the amount of reflection of the input voltage V IN The amount of reflection is described as reflection Γ.

[0024] Antenna impedance Z ANT (1), the input impedance of the LSI Z LSI Assuming that the reflection coefficient Γ is expressed by equation (2), the reflection coefficient Γ is expressed by equation (3). The condition for input impedance matching is expressed by equation (4). In equation (1), the symbol R ANT denotes the resistance of the antenna, and the symbol X denotes the reactance. In equations (1) and (2), the symbol j denotes the imaginary unit. In equation (2), the symbol R P indicates the input resistance of the LSI, and symbol C p denotes the input capacitance of the LSI, and the symbol ω denotes the angular frequency of the input signal.

[0025] Z ANT =R ANT +jX ANT ...(1) Z LSI =R P ||(1 / jωC p ) ‥(2) Γ=(Z LSI -Z ANT ) / (Z LSI +Z ANT ) ‥(3) Z ANT =Z LSI * ...(4)

[0026] FIG. 4 shows the strength of the input signal P IN and the input resistance R of the LSI P , reflection coefficient Γ and load current I LOAD The left side of Figure 4 shows the relationship between the magnitude of load R LOAD The right side of Fig. 4 shows the case where the load R LOAD For example, the RFID tag in Fig. 3 can be switched to a mode where the load stops working (RLOAD large) and the mode in which the load operates (R LOAD (small)

[0027] The input capacitance C of the LSI p is the input signal strength P IN It is almost constant regardless of the input capacitance C p The influence of can be cancelled by adjusting the reactance of the antenna, so it is not shown in the figure.

[0028] For example, the input signal strength P IN The larger the P, the more current flows through the diode in the rectifier circuit, and the lower the diode resistance. IN -R P As shown in the characteristics, the input resistance R P is the input signal strength P IN The larger it is, the smaller it becomes.

[0029] P IN As shown in the -Γ characteristic, the reflected Γ is proportional to the input signal strength P IN (i.e., power) increases, and the antenna resistance R ANT and the input resistance R of the LSI P The input signal strength P IN As the input signal strength P IN Even in areas where the reflected power is large, the reflected power cannot be used among the power available as the input signal.

[0030] P IN -I LOAD As shown in the characteristics, the load current I LOAD is the input signal strength P at which the reflection Γ is minimized. IN Input signal strength P IN It increases with increasing reflectance (Γ), and then the increase rate becomes slower with increasing reflectance (Γ).

[0031] From the above, the minimum input signal strength P that can obtain the power required to operate the LSI is IN The antenna resistance R is set so that the reflection Γ is the smallest. ANTBy adjusting the frequency, the communication distance of the RFID tag can be efficiently extended.

[0032] In addition, the input impedance Z of the LSI shown in equation (2) LSI is determined by the current flowing through the diode in the rectifier circuit, so the magnitude of the load through which the current flows R LOAD It also depends on the P on the right side of Figure 4. IN -R P As shown in the characteristics, the input resistance R P is the magnitude of the load R LOAD The larger the load R, the higher the LOAD When the load current I LOAD decreases, the current flowing through the diode in the rectifier circuit decreases, and the input resistance R P This is because increases.

[0033] As shown on the right side of Figure 4, the magnitude of the load R LOAD When is large, set the antenna resistance to R ANT1 When set to , the load size R LOAD The appropriate input signal strength P when is small IN (Figure 4(a)) The reflection Γ becomes larger (Figure 4(b)). The resistance value of the antenna is R ANT1 When the input signal strength P IN is the appropriate value P in Fig. 4(a). IN (Fig. 4(c)). In addition, the resistance of the antenna is R ANT1 When the appropriate value P in Fig. 4(a) is set to IN The load current I LOAD becomes smaller (Figure 4(d)).

[0034] The resistance of the antenna is R ANT1 Lower value R ANT2 By setting the appropriate value P in Fig. 4(a), IN The reflection Γ at the point θ can be minimized (Fig. 4(e) and (f)). IN The load current I LOAD (Fig. 4(g)). In other words, the resistance of the antenna can be increased byANT2 and reduce the antenna impedance Z ANT and the input impedance Z of the LSI LSI By matching the load R LOAD When the load current I LOAD can be increased.

[0035] In addition, P IN -R P As shown by the symbol (h) in the right side of the characteristic curve, the input signal strength P IN is large, and the input resistance R P is the antenna resistance R ANT1 When the load current I LOAD increases, i.e., the load R LOAD When decreases, the input resistance R P The output voltage of the rectifier circuit drops because reflection increases and the number of charge pump stages increases in the technology of Patent Document 1. IN -R P As shown in the characteristics, the input resistance R P This leads to a vicious cycle in which the impedance decreases, reflections increase further, and impedance matching deteriorates.

[0036] 5 shows an example of the relationship between the number of circuit stages of a rectifier circuit and the input resistance and input capacitance. For example, the rectifier circuit includes a plurality of diodes D connected in series between a ground line and a load, and a plurality of capacitors C each arranged between a connection node of a pair of adjacent diodes D and the antenna terminal RF+ (or RF-).

[0037] When viewed from the antenna terminals RF+ and RF-, the diode D is connected in parallel between the antenna terminals RF+ and RF-. Therefore, as the number of stages of the diode D increases, the resistance between the antennas, that is, the input resistance Rp of the LSI, decreases. IN -R P As shown in the characteristics, the input resistance R P is the input signal strength P IN The larger it is, the smaller it becomes.

[0038] LSI input capacitance Cp is almost proportional to the number of capacitors, so it depends on the number of charge pump stages. However, the input capacitance C p is the input signal strength P IN It is almost constant regardless of

[0039] Fig. 6 shows an example of a main part of the LSI 100 of Fig. 1. In Fig. 6, solid lines indicate voltage lines through which voltages are transmitted, and dotted lines indicate signal lines through which control signals are transmitted. The LSI 100 generates a power supply voltage using a multi-stage charge pump by a rectifier circuit 110, and implements a control method in which the control circuit 120 changes the number of stages of the charge pump according to the power consumption of a load 200.

[0040] The rectifier circuit 110 has switches SW1 and SW2, four diodes D connected in series between the switches SW1 and SW2, and five diodes D connected in series between the switch SW2 and the power supply voltage control circuit 120. The switch SW1 is an example of a first switch, and the switch SW2 is an example of a second switch.

[0041] The anode of each diode D is arranged on the ground line side, and the cathode of each diode D is arranged on the power supply voltage control circuit 120 side. The rectifier circuit 110 also has a diode D whose cathode is connected to the cathode of the diode D arranged on the power supply voltage control circuit 120 side of the switch SW2 and whose anode is connected to the ground line.

[0042] The rectifier circuit 110 has eight capacitors C arranged between a connection node of a pair of adjacent diodes D and the antenna terminal RF+ (or RF-). The anodes of the even-numbered diodes D are connected to the antenna terminal RF+ via the capacitors C. The anodes of the odd-numbered diodes D, except for the diode D in the first stage, are connected to the antenna terminal RF- via the capacitors C.

[0043] In the rectifier circuit 110, one stage of the charge pump is a diode D and a capacitor C connected to the anode of the diode D. The rectifier circuit 110 has four stages of charge pumps arranged in sequence from the switch SW1 side, and four stages of charge pumps arranged in sequence on the power supply voltage control circuit 120 side. The diodes D of the four stages of charge pumps arranged in sequence on the switch SW1 side are an example of a first diode group. The diodes D of the four charge pumps arranged in sequence on the power supply voltage control circuit 120 side are an example of a second diode group.

[0044] 6 shows an example in which the rectifier circuit 110 operates as a four-stage or eight-stage charge pump, but the number of stages of the charge pump is not limited to four or eight. The charge pump is set to an appropriate number of stages according to the value of the power supply voltage to be generated. Also, in FIG. 6, an example in which the number of stages of the charge pump is switched to two stages is shown, but the charge pump may be switched to three or more stages.

[0045] Furthermore, if LSI 100 has antenna terminal RF+ but does not have antenna terminal RF-, a ground terminal may be provided instead of antenna terminal RF-, and the anodes of odd-numbered diodes D excluding the first stage may be connected to the ground terminal via capacitor C.

[0046] The diode D at the final stage of the rectifier circuit 110 is connected to a power supply terminal, which is an input of the load 200, via the power supply voltage control circuit 120 and the switch SW3. For example, the switches SW1 and SW2 are n-channel MOS transistors, and the switch SW3 is a p-channel MOS transistor. The switch SW3 is an example of a power switch.

[0047] When the load 200 is not operating and the rectifier circuit 110 is operating as an eight-stage charge pump, the power supply voltage control circuit 120 outputs a switch control signal to the switches SW1 and SW2 to turn on the switches SW1 and SW2. When the load 200 is operating and the rectifier circuit 110 is operating as a four-stage charge pump, the power supply voltage control circuit 120 outputs a switch control signal to the switches SW1 and SW2 to turn off the switches SW1 and SW2.

[0048] When the load 200 is not operating, the power supply current output from the rectifier circuit 110 is supplied to the power supply voltage control circuit 120, the modulation and demodulation circuit 130, the logic circuit 140, and the memory 150 in Fig. 1. The power supply current at this time is assumed to be smaller than a predetermined value. When the load 200 is operating, the power supply current output from the rectifier circuit 110 is supplied to the load 200, the power supply voltage control circuit 120, the modulation and demodulation circuit 130, the logic circuit 140, and the memory 150 in Fig. 1. The power supply current at this time is assumed to be equal to or greater than a predetermined value.

[0049] In this case, the power supply voltage control circuit 120 turns on the switches SW1 and SW2 when the power supply current is smaller than a predetermined value because the load 200 is not operating, and turns off the switches SW1 and SW2 when the power supply current is equal to or greater than the predetermined value because the load 200 is operating. The power supply voltage control circuit 120 is an example of a control circuit that changes the number of stages of a charge pump.

[0050] The switch SW1 prevents the four-stage charge pump between the switches SW1 and SW2 from performing pumping operation while the switch SW2 is off. This prevents the voltage of the node ND on the input side of the switch SW2 from exceeding an upper limit when the rectifier circuit 110 is operated as a four-stage charge pump, and prevents the rectifier circuit 110 from being destroyed.

[0051] If the on / off of the switches SW1, SW2, and SW3 cannot be controlled until the power supply voltage is generated by the rectifier circuit 110 at the start of the LSI 100, the power supply voltage control circuit 120 is designed to turn off the switches SW1, SW2, and SW3 at the start of the LSI 100. In this case, the rectifier circuit 110 operates as a four-stage charge pump at the start of the LSI 100 to ensure the minimum power required to operate the power supply voltage control circuit 120.

[0052] When the power supply voltage control circuit 120 starts operating due to an increase in the power supply voltage, it turns on the switches SW1 and SW2 to operate the rectifier circuit 110 as an eight-stage charge pump and turns off the switch SW3, if the load 200 is not to be operated. On the other hand, when the power supply voltage control circuit 120 starts operating due to an increase in the power supply voltage, it turns off the switches SW1 and SW2 to operate the rectifier circuit 110 as a four-stage charge pump, if the load 200 is to be operated. In addition, the power supply voltage control circuit 120 supplies the power supply voltage to the load 200 by turning on the switch SW3.

[0053] On the other hand, if the on / off of the switches SW1-SW3 can be controlled even if the rectifier circuit 110 does not generate a power supply voltage when the LSI 100 is started up, the power supply voltage control circuit 120 turns on the switches SW1 and SW2 and turns off the switch SW3 when the LSI 100 is started up. This causes the rectifier circuit 110 to operate as an eight-stage charge pump. Thereafter, when operating the load 200, the power supply voltage control circuit 120 turns off the switches SW1 and SW2 to cause the rectifier circuit 110 to operate as a four-stage charge pump and turns on the switch SW3.

[0054] Fig. 7 shows an example of matching the input impedance by switching the number of stages of the rectifier circuit 110 in Fig. 6. Detailed description of characteristics similar to those in Figs. 4 and 5 will be omitted. IN -R P In terms of characteristics, the input resistance R of the LSI P is the magnitude of the load R LOAD The larger the value, the higher the current, and the fewer the number of diode D stages, the higher the current.

[0055] In the example shown in Figure 7, the load magnitude R LOAD When the input resistance R is large, the eight-stage diode D has a smaller input resistance than the four-stage diode D. P is the antenna resistance R ANT Since the reflection Γ becomes smaller, the impedance matching error can be reduced and the load current I LOAD On the other hand, the load size R LOAD When is small, for example, the input signal strength P IN In the region where is large, the input resistance R P is the antenna resistance R ANT In this case, switching the diode D to four stages improves impedance matching and allows for a large load current I LOAD can be obtained.

[0056] For example, the RFID tag 10 may be in a first operating mode in which the load 200 is operated (the load size R LOAD Small, load current I LOAD A second operation mode in which the operation of the load 200 is stopped (load size R LOAD Large, load current I LOAD In this case, in the first operating mode, the charge pump is set to four stages, and in the second operating mode, the charge pump is set to eight stages.

[0057] In the first operating mode, the input signal strength P IN In the second operation mode, the LSI 100 can be operated with a smaller input signal strength P IN (FIG. 7B) Thus, this embodiment is useful in the case where the RFID tag 10 has operation modes with different power consumptions and the operation mode can be selected according to the application or environment of use.

[0058] The input capacitance C of the LSI p The capacitance value of is the same whether it is operated in 4 steps or 8 steps, and the input signal strength PIN The input capacitance C p The effect of can be cancelled by adjusting the reactance of the antenna.

[0059] Fig. 8 shows an example of the power supply voltage control circuit 120 shown in Fig. 6. In Fig. 8 as well, solid lines indicate voltage lines through which voltages are transmitted, and dotted lines indicate signal lines through which control signals are transmitted. The power supply voltage control circuit 120 shown in Fig. 8 switches the number of diodes D in the rectifier circuit 110 between eight and four stages according to the operation mode of the LSI 100 set by the logic circuit 140, and controls the operation of the load 200.

[0060] The power supply voltage control circuit 120 includes a voltage detection circuit 121, a control circuit 122, and an n-channel MOS transistor NM. The voltage detection circuit 121 and the control circuit 122 detect the power supply voltage V OUT The voltage detection circuit 121 receives the power supply voltage V OUT The voltage detection circuit 121 detects the power supply voltage V OUT When exceeds a certain upper limit, the n-channel MOS transistor NM is turned on, and the power line V OUT Dissipates the charge to the ground wire.

[0061] The voltage detection circuit 121 detects the power supply voltage V OUT When the power supply voltage V reaches the operating voltage of the LSI 100, the reset signal RST output to the logic circuit 140 is released, causing the logic circuit 140 to perform a startup process for the LSI 100. OUT When the voltage drops below the operating voltage of the LSI 100 , a reset signal RST is output to the logic circuit 140 , causing the logic circuit 140 to reset the LSI 100 .

[0062] The logic circuit 140 sets an operation mode of the LSI 100 based on a program executed by a controller such as a built-in CPU (Central Processing Unit), and outputs a control signal CNTL indicating the set operation mode to the control circuit 122. For example, the operation mode includes a first operation mode in which the load 200 is operated, and a second operation mode in which the operation of the load 200 is stopped.

[0063] When the control signal CNTL received from the logic circuit 140 indicates a first operation mode in which the load 200 is operated, the control circuit 122 operates the rectifier circuit 110 as a four-stage charge pump, and performs control to operate the load 200. For example, the control circuit 122 outputs a switch control signal to turn off the switches SW1 and SW2 and a switch control signal to turn on the switch SW3 to the switches SW1, SW2, and SW3, respectively. The control circuit 122 also outputs an operation control signal to the load 200 to operate the load 200.

[0064] For example, the control circuit 122 receives a control signal CNTL indicating the first operation mode from the logic circuit 140, and then controls the power supply voltage V OUT When the control signal CNTL is received, which indicates that the power supply voltage V OUT During the period when the load is unstable, the power supply voltage V OUT Therefore, it is possible to prevent the load 200 from malfunctioning.

[0065] On the other hand, when the control signal CNTL received from the logic circuit 140 indicates a second operation mode in which the operation of the load 200 is stopped, the control circuit 122 operates the rectifier circuit 110 as an eight-stage charge pump and performs control to stop the operation of the load 200. For example, the control circuit 122 outputs a switch control signal to turn on the switches SW1 and SW2 and a switch control signal to turn off the switch SW3 to the switches SW1, SW2, and SW3, respectively. The control circuit 122 also outputs an operation control signal to the load 200 to stop the operation of the load 200.

[0066] Fig. 9 shows another example of the power supply voltage control circuit 120 of Fig. 6. Elements that are the same as or similar to those of Fig. 8 are given the same reference numerals, and detailed description will be omitted. The power supply voltage control circuit 120 shown in Fig. 9 switches the number of stages of diodes D of the rectifier circuit 110 between eight stages or four stages according to the power supply current flowing from the rectifier circuit 110 to the load 200, etc., to control the operation of the load 200.

[0067] The power supply voltage control circuit 120 includes a voltage detection circuit 121, a current detection circuit 123, a first control circuit 124, a second control circuit 125, a sense resistor 126, and an n-channel MOS transistor NM. The voltage detection circuit 121, the current detection circuit 123, the first control circuit 124, and the second control circuit 125 are connected to a power supply voltage V OUT The voltage detection circuit 121 and the n-channel MOS transistor NM are the same as the voltage detection circuit 121 and the n-channel MOS transistor NM in FIG.

[0068] The sense resistor 126 is connected to the power supply line V OUT The power line V OUT The current detection circuit 123 detects the voltage across the power supply line V OUT The power supply current flowing through the power supply line V OUT Indicates whether the power supply current flowing through is greater than or equal to a threshold value or less than a threshold value.

[0069] The first control circuit 124 is connected to the power supply line V OUT When the power supply current flowing through the rectifier circuit 110 is equal to or greater than a threshold, the first control circuit 124 outputs switch control signals to the switches SW1 and SW2 to turn off the switches SW1 and SW2. Then, the first control circuit 124 operates the rectifier circuit 110 as a four-stage charge pump.

[0070] On the other hand, the first control circuit 124 controls the power line V OUTWhen the power supply current flowing through the rectifier circuit 110 is smaller than a threshold value, the first control circuit 124 outputs switch control signals to the switches SW1 and SW2 to turn on the switches SW1 and SW2, respectively. Then, the first control circuit 124 causes the rectifier circuit 110 to operate as an eight-stage charge pump.

[0071] 8, the second control circuit 125 has a function of controlling the switch SW3 and the load 200. When the control signal CNTL received from the logic circuit 140 indicates a first operation mode in which the load 200 is operated, the second control circuit 125 outputs a switch control signal to the switch SW3 for turning on the switch SW3. In addition, the second control circuit 125 outputs an operation control signal to the load 200 for operating the load 200.

[0072] On the other hand, when the control signal CNTL received from the logic circuit 140 indicates a second operation mode in which the operation of the load 200 is stopped, the second control circuit 125 outputs to the switch SW3 a switch control signal for turning off the switch SW3. Also, the second control circuit 125 outputs to the load 200 an operation control signal for stopping the operation of the load 200.

[0073] As described above, in this embodiment, the LSI 100 controls the load current I LOAD The number of stages of the charge pump of the rectifier circuit 110 is switched depending on the magnitude of the input impedance of the LSI 100. This makes it possible to suppress mismatching of the input impedance of the LSI 100 and suppress deterioration of power efficiency. As a result, the power of the wireless input signal is efficiently utilized, enabling the RFID tag 10 to operate with smaller input power. In addition, the communication distance of the RFID tag can be efficiently extended, improving the reliability of the system in which the RFID tag is mounted.

[0074] When there is an operation mode in which the load 200 is operated and an operation mode in which the load 200 is stopped, the LSI 100 changes the number of stages of the charge pump of the rectifier circuit 110 according to the operation mode, thereby making it possible to suppress mismatching of input impedance for each operation mode and suppress deterioration of power efficiency.

[0075] In addition, by changing the number of stages of the charge pump of the rectifier circuit 110 according to the magnitude of the power supply current output from the rectifier circuit 110, it is possible to suppress mismatching of input impedance according to the magnitude of the power supply current and suppress deterioration of power efficiency. In this case, the operation mode may be determined according to the magnitude of the power supply current.

[0076] The number of stages of the charge pump can be easily changed by enabling or disabling a plurality of diode groups arranged in the rectifier circuit 110 with the switches SW1 and SW2. When the rectifier circuit 110 is operated as a four-stage charge pump, turning off the switch SW1 can prevent the voltage of the node ND on the input side of the switch SW2 from exceeding an upper limit value, and thus damage to the rectifier circuit 110 can be prevented.

[0077] When the load 200 is operated, the power supply voltage control circuit 120 controls the power supply voltage V OUT When the power supply voltage V becomes equal to or exceeds the operating voltage of the load 200, the switch SW3 is turned on. OUT During the period when the load is unstable, the power supply voltage V OUT Therefore, it is possible to prevent the load 200 from malfunctioning.

[0078] Fig. 10 shows an example of an LSI mounted on an RFID tag in another embodiment. The same elements as those in Fig. 6 are given the same reference numerals, and detailed description will be omitted. The LSI 100A shown in Fig. 10 is mounted on the RFID tag 10 in Fig. 1 together with the load 200 and the antenna 12, similar to the LSI 100 in Fig. 1. That is, the RFID tag in this embodiment has an LSI 100A instead of the LSI 100 of the RFID tag 10 in Fig. 1.

[0079] 2, the RFID tag 10 equipped with the LSI100A may be included in the system SYS together with the reader / writer 20 and the antenna 22. As with the LSI100 shown in FIG. 6, the LSI100A generates a power supply voltage using a multi-stage charge pump by the rectifier circuit 110A, and implements a control method in which the control circuit 120 changes the number of stages of the charge pump according to the power consumption of the load 200.

[0080] The rectifier circuit 110A has switches SW1 and SW2, five diodes D connected in series between a ground line and the switch SW1, and four diodes D connected in series between the switch SW1 and the power supply voltage control circuit 120. The switch SW1 is an example of a first switch, and the switch SW2 is an example of a second switch.

[0081] The anode of each diode D is arranged on the ground line side, and the cathode of each diode D is arranged on the power supply voltage control circuit 120 side. The switch SW2 connects a node ND on the input side of the switch SW1 to the input of the power supply voltage control circuit 120. The rectifier circuit 110A also has a diode D whose cathode is connected to the anode of the diode D arranged on the power supply voltage control circuit 120 side of the switch SW1 and whose anode is connected to the ground line.

[0082] The rectifier circuit 110A has eight capacitors C arranged between a connection node of a pair of adjacent diodes D and the antenna terminal RF+ (or RF-). The anodes of the even-numbered diodes D are connected to the antenna terminal RF+ via the capacitors C. The anodes of the odd-numbered diodes D, except for the diode D in the first stage, are connected to the antenna terminal RF- via the capacitors C.

[0083] In the rectifier circuit 110A, one stage of the charge pump is a diode D and a capacitor C connected to the anode of the diode D. The rectifier circuit 110A has four stages of charge pumps arranged in sequence between a ground line and a switch SW1, and four stages of charge pumps arranged in sequence between the switch SW1 and the power supply voltage control circuit 120. The diode D arranged between the ground line and the switch SW1 is an example of a first diode group. The anode of the diode D in the first stage of the first diode group is grounded. The diode D arranged between the switch SW1 and the power supply voltage control circuit 120 is an example of a second diode group.

[0084] 10 shows an example in which the rectifier circuit 110A operates as a four-stage or eight-stage charge pump, but the number of stages of the charge pump is not limited to four or eight. The number of stages of the charge pump is appropriately set according to the value of the power supply voltage to be generated. Also, in FIG. 10, an example in which the number of stages of the charge pump is switched to two stages is shown, but the charge pump may be switched to three or more stages.

[0085] Furthermore, if the LSI 100A has an antenna terminal RF+ but does not have an antenna terminal RF-, a ground terminal may be provided instead of the antenna terminal RF-, and the anodes of the odd-numbered diodes D excluding the first stage may be connected to the ground terminal via a capacitor C.

[0086] The final diode D of the rectifier circuit 110A is connected to a power supply terminal, which is an input of the load 200, via the power supply voltage control circuit 120 and the switch SW3. For example, the switch SW1 is an n-channel MOS transistor, and the switches SW2 and SW3 are p-channel MOS transistors. The switch SW3 is an example of a power switch.

[0087] For example, the power supply voltage control circuit 120 has the same or similar configuration as that shown in Fig. 8 or 9. When the power supply voltage control circuit 120 operates the rectifier circuit 110A as an eight-stage charge pump, the power supply voltage control circuit 120 outputs a switch control signal (e.g., high level) to the switches SW1 and SW2 to turn on the switch SW1 and turn off the switch SW2.

[0088] When the power supply voltage control circuit 120 operates the rectifier circuit 110 as a four-stage charge pump, it outputs a switch control signal (for example, a low level) to the switches SW1 and SW2 to turn off the switch SW1 and turn on the switch SW2. This allows the four-stage charge pump arranged between the ground line and the switch SW1 and the four-stage charge pump arranged between the switch SW1 and the power supply voltage control circuit 120 to operate in parallel.

[0089] When the rectifier circuit 110A operates as a four-stage charge pump, the element area of ​​each diode D is equivalent to being twice as large as the element area of ​​each diode D when the rectifier circuit 110 of Fig. 6 operates as a four-stage charge pump. Therefore, the resistance of the diode D when operating as a four-stage charge pump is lower than the resistance of the diode D of the rectifier circuit 110 of Fig. 6. As a result, the rectifier circuit 110A of this embodiment can reduce power loss due to the resistance of the diode D compared to the rectifier circuit 110 of Fig. 6.

[0090] In addition, the current flowing from the rectifier circuit 110A to the load is limited by the charging and discharging of the capacitor C, not by the resistance characteristics of the diode D. Therefore, the input resistance R P The value of is the input resistance R of LSI100 in Figure 6. P is almost the same as the value of

[0091] As described above, this embodiment can also provide the same effects as the above-mentioned embodiment. For example, when the load current I LOADBy switching the number of stages of the charge pump according to the magnitude of the input impedance, it is possible to suppress mismatching of the input impedance of the LSI 100A and suppress deterioration of power efficiency. As a result, the RFID tag 10 can operate with smaller input power and the communication distance of the RFID tag can be efficiently extended, thereby improving the reliability of the system in which the RFID tag is installed.

[0092] Furthermore, in this embodiment, the rectifier circuit 110A can operate in parallel a four-stage charge pump arranged between the ground line and the switch SW1 and a four-stage charge pump arranged between the switch SW1 and the power supply voltage control circuit 120. This allows the resistance of the diode D to be lower when operating as a four-stage charge pump, compared to the rectifier circuit 110 in Fig. 6, and reduces power loss due to the resistance of the diode D.

[0093] The features and advantages of the embodiments will be apparent from the above detailed description. It is intended that the claims cover the features and advantages of the embodiments as described above without departing from the spirit and scope of the claims. In addition, any improvements and modifications can be easily made by a person having ordinary skill in the art. Therefore, it is not intended to limit the scope of the inventive embodiments to the above, and appropriate improvements and equivalents within the scope of the embodiments disclosed can be used. [Explanation of symbols]

[0094] 10 RFID Tags 12 Antenna 20 Reader / Writer 22 Antenna 100, 100A LSI 110, 110A rectifier circuit 120 Power supply voltage control circuit 121 Voltage detection circuit 122 Control circuit 123 Current detection circuit 124 First control circuit 125 Second control circuit 126 Sense resistor 130 Modulation and demodulation circuit 140 Logic Circuits 150 Memory 200 Load C Capacitor CNTL Control Signal D Diode ND Node NM n-channel MOS transistor RF+, RF- Antenna terminals RST Reset signal SW1, SW2, SW3 switches SYS system V OUT Voltage

Claims

1. an integrated circuit and a load that operate in response to power received by an antenna; The integrated circuit comprises: a rectifier circuit including a plurality of diodes connected in series and a plurality of capacitors respectively disposed between the antenna and a connection node of a pair of the diodes adjacent to each other, the rectifier circuit generating a power supply voltage by rectifying an AC signal received by the antenna using a multi-stage charge pump, each stage including the diodes and the capacitors; a control circuit that changes the number of stages of the charge pump used to generate the power supply voltage in accordance with power consumption of the load that operates on the power supply voltage, RFID tag.

2. a first operation mode in which the load operates and a second operation mode in which the load stops operating; the control circuit reduces a number of stages of the charge pump that generates the power supply voltage in the first operation mode to be less than a number of stages of the charge pump that generates the power supply voltage in the second operation mode; The RFID tag of claim 1 .

3. a current detection circuit for detecting a power supply current output from the rectifier circuit; the control circuit reduces a number of stages of the charge pump when the power supply current is equal to or greater than a threshold value to a number smaller than a number of stages of the charge pump when the power supply current is smaller than the threshold value; The RFID tag of claim 1 .

4. The rectifier circuit includes: a first diode group including a plurality of the diodes connected in series; a second diode group including a plurality of the diodes connected in series, the second diode group having an output electrically connected to an input of the load; a diode disposed between the input of the second group of diodes and a ground line; a first switch connecting the input of the first diode group to a ground line; a second switch connecting an output of the first group of diodes to an input of the second group of diodes; the control circuit turns off the first switch and the second switch when the power supply current output from the rectifier circuit is equal to or greater than a predetermined value, and turns on the first switch and the second switch when the power supply current output from the rectifier circuit is smaller than a predetermined value. The RFID tag according to any one of claims 1 to 3.

5. The rectifier circuit includes: a first diode group including a plurality of the diodes connected in series, the first diode being grounded; a second diode group including a plurality of the diodes connected in series, the second diode group having an output electrically connected to an input of the load; a diode disposed between the input of the second group of diodes and a ground line; a first switch connecting an output of the first group of diodes to an input of the second group of diodes; a second switch electrically connecting the output of the first group of diodes to the input of the load; the control circuit turns off the first switch and turns on the second switch when the power supply current output from the rectifier circuit is equal to or greater than a predetermined value, and turns on the first switch and turns off the second switch when the power supply current output from the rectifier circuit is smaller than a predetermined value. The RFID tag according to any one of claims 1 to 3.

6. a power switch disposed on a power line connecting the rectifier circuit and the load; When the load is operated, the control circuit turns on the power switch when the power supply voltage becomes equal to or higher than the operating voltage of the load. The RFID tag according to any one of claims 1 to 3.

7. An integrated circuit that operates in response to power received by an antenna, a rectifier circuit including a plurality of diodes connected in series and a plurality of capacitors respectively disposed between the antenna and a connection node of a pair of the diodes adjacent to each other, the rectifier circuit generating a power supply voltage by rectifying an AC signal received by the antenna using a multi-stage charge pump, each stage including the diodes and the capacitors; a control circuit that changes the number of stages of the charge pump used to generate the power supply voltage in accordance with power consumption of a load that operates on the power supply voltage. Integrated circuits.

8. A method for controlling an RFID tag including an integrated circuit and a load that operates in response to power received by an antenna, comprising: a rectifier circuit included in the integrated circuit, the rectifier circuit including a plurality of diodes connected in series and a plurality of capacitors respectively arranged between the antenna and a connection node of a pair of the diodes adjacent to each other, rectifying an AC signal received by the antenna using a multi-stage charge pump each including the diodes and the capacitors to generate a power supply voltage; a control circuit included in the integrated circuit changes the number of stages of the charge pump used to generate the power supply voltage in accordance with power consumption of the load operated by the power supply voltage; A method for controlling an RFID tag.

Citation Information

Patent Citations

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