Motor drive device, motor system, and vehicle
The motor drive device addresses inefficiencies in relay control by using a configuration with N-channel MOSFETs and a booster circuit, enhancing relay control efficiency and abnormality detection for reliable operation in safety-critical applications.
Patent Information
- Application Number
- JP2023092380
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-05
- Publication Date
- 2024-12-17
AI Technical Summary
Existing motor drive devices face challenges in efficiently performing on/off control of power and motor relays, particularly in applications requiring functional safety, due to difficulties in detecting short-circuit abnormalities in transistors and relays.
A motor drive device configuration that includes high-side and low-side transistors connected in series, with a power relay and motor relay using N-channel MOSFETs, a booster circuit to generate output voltage, and a control unit to manage gate signals for efficient relay control, incorporating a power relay control section to manage the power relay using shared gate control lines.
Enables efficient on/off control of power and motor relays, enhances detection of short-circuit abnormalities, and reduces the number of external components, ensuring reliable operation in safety-critical applications.
Smart Images

Figure 2024174519000001_ABST
Abstract
Description
[Technical field]
[0001] The present disclosure relates to a motor drive device. [Background technology]
[0002] Conventionally, motor driving devices for driving various motors are known. For example, a motor driving device for driving a brushless DC motor or the like drives the motor using a circuit called a half bridge. The half bridge has a high-side transistor and a low-side transistor connected in series between an application end of a power supply voltage and an application end of a ground potential. Summary of the Invention [Problem to be solved by the invention]
[0003] In a system using a motor drive device such as that described above, for example in an automotive field where functional safety is important, a power supply relay that switches the power supply to the half bridge on and off, and a motor relay connected between the output terminal of the half bridge and the motor may be provided.
[0004] An object of the present disclosure is to provide a motor drive device that can perform on / off control of a power supply relay and a motor relay with an efficient configuration. [Means for solving the problem]
[0005] A motor drive device according to an aspect of the present disclosure includes: At least one half bridge including a high-side transistor and a low-side transistor connected in series between an application terminal of a power supply voltage and an application terminal of a ground potential, the half bridge being configured so that a motor can be connected to a node to which the high-side transistor and the low-side transistor are connected; a power relay having one or more N-channel MOSFETs connected between the power supply voltage application terminal and the high-side transistor; a motor relay having one or more N-channel MOSFETs connected between the node and the motor; a boost circuit configured to boost the power supply voltage to generate an output voltage; A motor drive device for use in a motor system comprising: a control unit configured to output a gate signal to a gate of the motor relay; The gate signal is input to a power relay control unit configured to switch whether or not the output voltage is applied to the gate of the power relay. Effect of the Invention
[0006] According to the motor drive device according to the present disclosure, the on / off control of the power supply relay and the motor relay can be performed with an efficient configuration. [Brief description of the drawings]
[0007] [Figure 1] FIG. 1 is a diagram showing a configuration of a motor system according to a comparative example. [Diagram 2] FIG. 2 is a diagram showing a configuration of a charge pump according to a comparative example. [Diagram 3] FIG. 3 is a diagram showing a partial configuration of the motor system according to the first embodiment. [Figure 4] FIG. 4 is a diagram showing a partial configuration of a motor system according to the second embodiment. [Diagram 5] FIG. 5 is a diagram showing a partial configuration of a motor system according to a third embodiment. [Figure 6] FIG. 6 is a diagram showing a partial configuration of a motor system according to a fourth embodiment. [Figure 7] FIG. 7 is a diagram showing a partial configuration of a motor system according to a fifth embodiment. [Figure 8] FIG. 8 is an external view showing a configuration example of a vehicle equipped with the motor system. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] Exemplary embodiments of the present disclosure will now be described with reference to the drawings.
[0009] <1. Comparative Example> First, before describing an embodiment of the present disclosure, a comparative example will be described for comparison. By describing the comparative example, the problem will become more clear.
[0010] <<Motor system>> Fig. 1 is a diagram showing the configuration of a motor system 10 according to a comparative example. The motor system 10 includes a motor drive device 1, half bridges HB1, HB2, and HB3, a power relay 6, motor relays 71, 72, and 73, and a motor 8. The motor drive device 1 drives the motor 8 using the half bridges HB1, HB2, and HB3. The motor 8 is a three-phase brushless DC motor. Note that the motor to be driven is not limited to a brushless DC motor, and may be any motor that can be driven using a half bridge, such as a stepping motor or a brushed DC motor.
[0011] In the configuration of FIG. 1, three half bridges, HB1, HB2, and HB3, are provided corresponding to the three-phase motor 8. The first half bridge HB1 has a first high-side transistor M1 and a first low-side transistor M2 connected in series between an application end NA to which a power supply voltage VB can be applied when a power supply relay 6 described later is in an on state, and an application end of a ground potential. Specifically, the drain of the first high-side transistor M1, which is an N-channel MOSFET (metal-oxide-semiconductor field-effect transistor), is connected to the application end NA. The source of the first high-side transistor M1 is connected to the drain of the first low-side transistor M2, which is an N-channel MOSFET, at a first node N1. The source of the first low-side transistor M2 is connected to the application end of the ground potential. Note that a current detection resistor may be provided between the source of the first low-side transistor M2 and the application end of the ground potential, and the same applies to the low-side transistors M4 and M6.
[0012] The second half bridge HB2 has a second high-side transistor M3 and a second low-side transistor M4 connected in series between an application end NA and an application end of the ground potential. Specifically, the drain of the second high-side transistor M3, which is an N-channel MOSFET, is connected to the application end NA. The source of the second high-side transistor M3 is connected to the drain of the second low-side transistor M4, which is an N-channel MOSFET, at a second node N2. The source of the second low-side transistor M4 is connected to the application end of the ground potential.
[0013] The third half bridge HB3 has a third high-side transistor M5 and a third low-side transistor M6 connected in series between an application end NA and an application end of the ground potential. Specifically, the drain of the third high-side transistor M5, which is an N-channel MOSFET, is connected to the application end NA. The source of the third high-side transistor M5 is connected to the drain of the third low-side transistor M6, which is an N-channel MOSFET, at a third node N3. The source of the third low-side transistor M6 is connected to the application end of the ground potential.
[0014] A first motor relay 71 is connected between a first node N1 and a U-phase input terminal of a motor 8. A second motor relay 72 is connected between a second node N2 and a V-phase input terminal of a motor 8. A third motor relay 73 is connected between a third node N3 and a W-phase input terminal of a motor 8. The motor relays 71, 72, and 73 are all configured by N-channel MOSFETs.
[0015] The motor relay may be configured with two N-channel MOSFETs. In this case, by connecting the drains or sources of the two N-channel MOSFETs at the same node, the body diodes of the two N-channel MOSFETs are connected in the opposite directions to each other, preventing reverse current flow.
[0016] The power relay 6 is connected between an application end of the power supply voltage VB and an application end NA. The power relay 6 has a first N-channel MOSFET 61 and a second N-channel MOSFET 62. The drain of the first N-channel MOSFET 61 is connected to the application end of the power supply voltage VB. The source of the first N-channel MOSFET 61 is connected to the source of the second N-channel MOSFET 62. The drain of the second N-channel MOSFET 62 is connected to the application end NA. That is, the sources of the N-channel MOSFETs 61 and 62 are connected to each other at the same node. With such a configuration of the power relay 6, the body diodes of the N-channel MOSFETs 61 and 62 are connected in the opposite directions to each other, thereby preventing reverse current flow. Note that the configuration of the power relay 6 is not limited to this, and the drains of the N-channel MOSFETs 61 and 62 may be connected to each other at the same node. The power relay 6 may also be configured with one N-channel MOSFET.
[0017] A pull-down resistor Rp is connected between the gate and source of each of the N-channel MOSFETs 61 and 62 .
[0018] Motor drive device 1 is a semiconductor device having an integrated internal configuration shown in Fig. 1. Motor drive device 1 has a DRN terminal (drain terminal), a GH1 terminal (first high side gate terminal), a SH1 terminal (first high side source terminal), a GL1 terminal (first low side gate terminal), a GH2 terminal (second high side gate terminal), a SH2 terminal (second high side source terminal), a GL2 terminal (second low side gate terminal), a GH3 terminal (third high side gate terminal), a SH3 terminal (third high side source terminal), and a GL3 terminal (third low side gate terminal) as external terminals for establishing electrical connection with the outside.
[0019] The DRN terminal is connected to the application terminal NA, i.e., each drain of the high-side transistors M1, M3, and M5. The motor drive device 1 has resistors R1, R2, and R3, a switch SW1, and a comparator 31. The resistors R1, R2, and R3, the switch SW1, and the comparator 31 are configured to detect a short-circuit abnormality of the first N-channel MOSFET 61 in the power relay 6. Such detection of a short-circuit abnormality is performed statically before the motor 8 is operated.
[0020] More specifically, a resistor R1 and a switch SW1 are connected between the DRN terminal and a terminal to which the ground potential is applied. Furthermore, resistors R2 and R3 are connected in series between the DRN terminal and a terminal to which the ground potential is applied. A node to which the resistors R2 and R3 are connected is connected to a first input terminal of a comparator 31. A second input terminal of the comparator 31 is connected to a terminal to which the reference voltage Vref1 is applied.
[0021] The GH1 terminal is connected to the gate of the first high-side transistor M1. The motor drive device 1 includes a pre-driver 41, resistors R4, R5, and R6, a switch SW2, and a comparator 51. A gate signal Gh1 output from the pre-driver 41 is applied to the gate of the high-side transistor M1 via the GH1 terminal. This causes the first high-side transistor M1 to be turned on and off. The pre-driver 41 sets the high-level gate signal Gh1 to the output voltage Vcph of the charge pump 2, which will be described later, to turn on the first high-side transistor M1. Since the output voltage Vcph is boosted by the charge pump 2 as described later and is higher than the power supply voltage VB, the first high-side transistor M1, which is an N-channel MOSFET, can be turned on. On the other hand, the pre-driver 41 sets the low-level gate signal Gh1 to the voltage of the SH1 terminal to turn off the first high-side transistor M1. The SH1 terminal is connected to the source of the first high-side transistor M1.
[0022] The GL1 terminal is connected to the gate of the first low-side transistor M2. A gate signal output from the GL1 terminal is applied to the gate of the first low-side transistor M2, thereby driving the first low-side transistor M2 to be turned on and off.
[0023] A resistor R4 and a switch SW2 are connected between the SH1 terminal and a terminal to which the ground potential is applied. Resistors R5 and R6 are connected in series between the SH1 terminal and a terminal to which the ground potential is applied. A node to which the resistors R5 and R6 are connected is connected to a first input terminal of a comparator 51. A second input terminal of the comparator 51 is connected to a terminal to which a reference voltage Vref2 is applied.
[0024] The GH2 terminal is connected to the gate of the second high-side transistor M3. The motor drive device 1 includes a pre-driver 42, resistors R7, R8, and R9, a switch SW3, and a comparator 52. The second high-side transistor M3 is turned on and off by a gate signal Gh2 output from the pre-driver 42 via the GH2 terminal. The gate signal Gh2 has a high level that is the output voltage Vcph and a low level that is the voltage of the SH2 terminal. The SH2 terminal is connected to the source of the second high-side transistor M3.
[0025] The GL2 terminal is connected to the gate of the second low-side transistor M4. A gate signal output from the GL2 terminal is applied to the gate of the second low-side transistor M4, thereby driving the second low-side transistor M4 to be turned on and off.
[0026] A resistor R7 and a switch SW3 are connected between the SH2 terminal and a terminal to which the ground potential is applied. Resistors R8 and R9 are connected in series between the SH2 terminal and a terminal to which the ground potential is applied. A node to which the resistors R8 and R9 are connected is connected to a first input terminal of a comparator 52. A second input terminal of the comparator 52 is connected to a terminal to which a reference voltage Vref3 is applied.
[0027] The GH3 terminal is connected to the gate of the third high-side transistor M5. The motor drive device 1 includes a pre-driver 43, resistors R10, R11, and R12, a switch SW4, and a comparator 53. The third high-side transistor M5 is turned on and off by a gate signal Gh3 output from the pre-driver 43 via the GH3 terminal. The gate signal Gh3 has a high level that is the output voltage Vcph and a low level that is the voltage of the SH3 terminal. The SH3 terminal is connected to the source of the third high-side transistor M5.
[0028] The GL3 terminal is connected to the gate of the third low-side transistor M6. A gate signal output from the GL3 terminal is applied to the gate of the third low-side transistor M6, thereby driving the third low-side transistor M6 to be turned on and off.
[0029] A resistor R10 and a switch SW4 are connected between the SH3 terminal and a terminal to which the ground potential is applied. Resistors R11 and R12 are connected in series between the SH3 terminal and a terminal to which the ground potential is applied. A node to which the resistors R11 and R12 are connected is connected to a first input terminal of a comparator 53. A second input terminal of the comparator 53 is connected to a terminal to which a reference voltage Vref4 is applied.
[0030] Furthermore, motor drive device 1 has a GR1 terminal (first relay gate terminal), a GR2 terminal (second relay gate terminal), and a GR3 terminal (third relay gate terminal) as external terminals. The GR1 terminal is connected to the gate of motor relay 71. The GR2 terminal is connected to the gate of motor relay 72. The GR3 terminal is connected to the gate of motor relay 73. Motor relays 71, 72, and 73 are each driven to be turned on and off by gate signals output from the GR1 terminal, GR2 terminal, and GR3 terminal, respectively.
[0031] The motor system 10 is suitable for, for example, an in-vehicle field that requires functional safety, and is provided with a power supply relay 6 and motor relays 71-73. The power supply relay 6 switches whether or not the power supply voltage VB is supplied to the half bridges HB1-HB3. For example, if an abnormality is detected while the power supply relay 6 is supplying the power supply voltage VB to the half bridges HB1-HB3, one of the motor relays 71-73 can be turned off, and the motor 8 can be shifted from three-phase drive to two-phase drive. Also, for example, if an abnormality is detected, the power supply relay 6 can be turned off to cut off the supply of the power supply voltage VB to the half bridges HB1-HB3, and the motor 8 can be stopped.
[0032] Furthermore, the motor system 10 has a function of statically detecting short / open abnormalities in the transistors M1-M6 and the motor relays 71-73 before operating the motor 8. Such detection of short / open abnormalities can be performed based on the output levels of the comparators 51-53 in a pattern set by a combination of the on / off states of the switches SW2-SW4, the on / off states of the transistors M1-M6, and the on / off states of the motor relays 71-73. A sequence is executed by switching between such patterns.
[0033] <<Charge pump>> The motor drive device 1 has a charge pump 2. Corresponding to the charge pump 2, the motor drive device 1 has a VCPH terminal (output terminal), a CPL terminal (capacitor low-side terminal), a CPH terminal (capacitor high-side terminal), and a VBT terminal (power supply terminal) as external terminals. The charge pump 2 boosts the power supply voltage VB to generate and output an output voltage Vcph. The output voltage Vcph is output from the VCPH terminal and applied to the gates of the N-channel MOSFETs 61 and 62 in the power supply relay 6. As described above, the output voltage Vcph is also supplied to the pre-drivers 41 to 43. A capacitor C1 is externally connected between the CPH terminal and the CPL terminal. A capacitor C2 is externally connected between the VBT terminal and the VCPH terminal.
[0034] The configuration of the charge pump will be described with reference to Fig. 2. The charge pump 2 shown in Fig. 2 includes transistors 21 to 24 and control circuits 25 and .
[0035] The transistor 21 is configured with a P-channel MOSFET. The source of the transistor 21 is connected to the VCPH terminal. The transistor 22 is configured with an N-channel MOSFET. The drain of the transistor 22 is connected to the drain of the transistor 21 at a node N21. The source of the transistor 22 is connected to an application terminal of the power supply voltage VB. The node N21 is connected to the CPH terminal.
[0036] The transistor 23 is configured with a P-channel MOSFET. The source of the transistor 23 is connected to the application terminal of the power supply voltage V1. The transistor 24 is configured with an N-channel MOSFET. The drain of the transistor 24 is connected to the drain of the transistor 23 at a node N22. The source of the transistor 24 is connected to the application terminal of the ground potential. The node N22 is connected to the CPL terminal.
[0037] The control circuit 25 drives the transistors 21 and 22 by applying a drive signal G1 to the gate of the transistor 21 and a drive signal G2 to the gate of the transistor 22. The control circuit 25 generates the drive signal G1 based on the output voltage Vcph of the VCPH terminal, and generates the drive signal G2 based on the power supply voltage VB.
[0038] The control circuit 26 drives the third transistor 23 and the fourth transistor 24 by applying a drive signal G3 to the gate of the transistor 23 and a drive signal G4 to the gate of the fourth transistor 24. The control circuit 26 generates the drive signal G3 based on the power supply voltage V1 and generates the drive signal G4 based on the ground potential.
[0039] During the steady operation of the charge pump 2, the transistors 22 and 24 are first turned on and the transistors 21 and 23 are turned off, and the power supply voltage VB is applied to the capacitor C1 to charge it. After that, the transistors 22 and 24 are turned off and the transistors 21 and 23 are turned on, so that the voltage at the CPH terminal becomes VB+V1, and is output as the output voltage Vcph from the VCPH terminal. At this time, the capacitor C2 is charged. By repeating such an operation, the power supply voltage VB is boosted. The output voltage Vcph, which is the boosted power supply voltage VB, is applied to the gates of the N-channel MOSFETs 61 and 62, so that the N-channel MOSFETs 61 and 62 can be turned on. In this case, the power supply relay 6 is turned on, and the power supply voltage VB is supplied to the half bridges HB1 to HB3. For example, when VB=48V and V1=12V, Vcph=48+12=60V.
[0040] On the other hand, when the charge pump 2 is stopped, the transistors 21 to 24 are turned off. At this time, a current path is formed from the application terminal of the power supply voltage VB through the body diode of the transistor 22, the body diode of the transistor 21, the VCPH terminal, the pull-down resistor Rp, and the body diode of the second N-channel MOSFET 62, which causes a problem that the N-channel MOSFET 61 cannot be completely turned off.
[0041] In particular, in the configuration shown in FIG. 1, when detecting a short circuit abnormality in the first N-channel MOSFET 61, the switch SW1 is turned on and the output level of the comparator 31 is confirmed. When the first N-channel MOSFET 61 does not have a short circuit abnormality, the voltage of the DRN terminal is VB-2Vf-Vth-1Vf=VB-3Vf-Vth. Here, Vf is the forward voltage of the body diodes of the transistors 21 and 22 and the body diode of the second N-channel MOSFET 62, and Vth is the threshold voltage of the first N-channel MOSFET 61. On the other hand, when the first N-channel MOSFET 61 has a short circuit abnormality, the voltage of the DRN terminal is VB-Vf. The comparator 31 needs to detect 2Vf-Vth, which is a small difference between VB-3Vf-Vth and VB-Vf. However, in reality, since the N-channel MOSFET 61 cannot be completely turned off (i.e., in a weakly on state), it is difficult to confirm the difference in voltage of the DRN terminal depending on the presence or absence of a short circuit abnormality. For example, VB=48V, Vf=0.7V, and Vth=1.2V.
[0042] 2. First embodiment In view of the above problems, an embodiment of the present disclosure will be described below. Here, differences from the configuration of the comparative example shown in Fig. 1 will be mainly described. Fig. 3 is a diagram showing a partial configuration of a motor system 10 according to a first embodiment. In this embodiment, a power relay control unit 9 is provided outside the motor drive device 1.
[0043] The power relay control unit 9 has gate tripping relays 91, 92, and 93. Three gate tripping relays are provided corresponding to the three phases of the motor 8. The gate tripping relays 91 to 93 are all configured with N-channel MOSFETs. The gate tripping relays 91 to 93 are connected between the VCPH terminal and the gates of the N-channel MOSFETs 61 and 62 in the power relay 6. Specifically, the drains of the gate tripping relays 91 to 93 are commonly connected to the VCPH terminal. The sources of the gate tripping relays 91 to 93 are commonly connected to the gates of the N-channel MOSFETs 61 and 62. That is, the gate tripping relays 91 to 93 are connected in parallel.
[0044] The gates of the gate cutoff relays 91 to 93 are connected to the GR1 terminal, the GR2 terminal, and the GR3 terminal, respectively. The motor drive device 1 has a control unit 90. The control unit 90 outputs the gate signals Gr1, Gr2, and Gr3 from the GR1 terminal, the GR2 terminal, and the GR3 terminal, respectively. As shown in FIG. 1, the GR1 terminal, the GR2 terminal, and the GR3 terminal are connected to the gates of the motor relays 71 to 73, respectively. As a result, the on / off of the motor relays 71 to 73 and the on / off of the gate cutoff relays 91 to 93 are controlled by the gate signals Gr1 to Gr3, respectively. In this way, the gate control lines of the motor relays 71 to 73 are shared for controlling the power relay control unit 9 provided for controlling the on / off of the power relay 6, so that the power relay control unit 9 can be efficiently configured and the increase in the number of external parts can be suppressed.
[0045] Here, the operation of the power relay control unit 9 will be described. It is assumed that at least one of the gate signals Gr1 to Gr3 is at a high level. The high level is the output voltage Vcph output from the charge pump 2. In this case, at least one of the motor relays 71 to 73 is turned on in response to the gate signal at a high level, and the voltage of each source of the gate cutoff relays 91 to 93 is Vcph-Vt. Here, Vt is the threshold voltage of the gate cutoff relays 91 to 93. As a result, at least one of the gate cutoff relays 91 to 93 is turned on in response to the gate signal at a high level. As a result, the power relay control unit 9 is turned on, and the output voltage Vcph is supplied to the gates of the N-channel MOSFETs 61 and 62 via the power relay control unit 9. Therefore, the power relay 6 is turned on.
[0046] On the other hand, it is assumed that all of the gate signals Gr1 to Gr3 are at a low level. The low level is approximately the ground potential. In this case, all of the motor relays 71 to 73 are turned off. At this time, the voltage of each source of the gate cutoff relays 91 to 93 becomes the ground potential, and all of the gate cutoff relays 91 to 93 are turned off. As a result, the ground potential is applied to the gates of the N-channel MOSFETs 61 and 62. At this time, a current path via the pull-down resistor Rp is not formed, and the first N-channel MOSFET 61 is more reliably turned off. If the first N-channel MOSFET 61 does not have a short circuit, the voltage of the DRN terminal becomes the ground potential. Therefore, when the first N-channel MOSFET 61 has a short circuit, the difference between the voltage of the DRN terminal (=VB-Vth) and the ground potential is large, and it is easy for the comparator 31 to detect the short circuit.
[0047] Thus, in this embodiment, the power relay control unit 9 functions as an OR relay, being turned on when at least one of the gate signals Gr1 to Gr3 is at a high level, and being turned off when all of the gate signals Gr1 to Gr3 are at a low level. When all of the motor relays 71 to 73 are in the off state, there is almost no need to operate the motor 8, so turning the power relay control unit 9 to the off state turns off the power relay 6 and cuts off the supply of the power voltage VB.
[0048] In addition, when only one half bridge is provided and only one motor relay is provided, only one gate cutoff relay may be provided in the power relay control unit. In other words, the power relay control unit is not limited to being an OR relay.
[0049] 3. Second embodiment 4 is a diagram showing a partial configuration of a motor system 10 according to a second embodiment. The present embodiment differs from the first embodiment in that a power supply relay control unit 9 is built into the motor drive device 1.
[0050] 4, the drains of the gate trip relays 91-93 in the power supply relay control unit 9 are commonly connected to the source of the transistor 21 in the charge pump 2. The sources of the gate trip relays 91-93 are commonly connected to the VCPH terminal. That is, the gate trip relays 91-93 are connected between the source of the transistor 21 (the output terminal of the charge pump 2) and the VCPH terminal.
[0051] In this embodiment, the power relay control unit 9 functions as an OR relay as in the first embodiment, and can control the on / off of the power relay 6. In particular, in this embodiment, an increase in external components can be further suppressed. However, in this embodiment, when the transistor 21 is in the on state, a current is charged to the capacitor C2 via the power relay control unit 9 and the VCPH terminal, and care must be taken when designing the current capacity, taking into account the effect on the current capacity of the on-resistance of the power relay control unit 9.
[0052] <4. Third embodiment> 5 is a diagram showing a partial configuration of a motor system 10 according to the third embodiment. In this embodiment, a transistor 27 which is an N-channel MOSFET is added to the transistor 22 which is an N-channel MOSFET in the charge pump 2. Also, the configuration of the power supply relay control unit 9 differs from that of the first and second embodiments. In this embodiment, the power supply relay control unit 9 is built into the motor drive device 1.
[0053] a 5, the source of transistor 27 is connected to the same node as the source of transistor 22. The drain of transistor 27 is connected to the application terminal of power supply voltage VB. As a result, body diode 22A of transistor 22 and body diode 27A of transistor 27 are connected in the opposite directions to each other. As a result, when transistors 27, 22, and 21 are in the off state, body diode 27A prevents a reverse current from flowing from the application terminal of power supply voltage VB, and it is possible to prevent a voltage of VB-2Vf from being applied to the VCPH terminal.
[0054] In the configuration of FIG. 5, the power relay control unit 9 includes an AND circuit 9A, an AND circuit 9B, an OR circuit 9C, a pull-down switch Sp, and a pull-down resistor Rpp. The gate signals Gr1 to Gr3 are inverted and input to the AND circuit 9A, and a selection signal SEL is also input to the AND circuit 9A. The AND circuit 9A outputs a logical product of the inputs. The AND circuit 9B receives an inverted signal of the output of the AND circuit 9A and a control signal Sctr. The output of the AND circuit 9B is applied to the gates of the transistors 22 and 27. The output of the AND circuit 9A and the control signal Sctr are input to the OR circuit 9C. The output of the OR circuit 9C is applied to the gate of the transistor 21. The output of the AND circuit 9A is applied to the gate of the pull-down switch Sp, which is constituted by an N-channel MOSFET. The source of the pull-down switch Sp is connected to a terminal to which the ground potential is applied. The drain of the pull-down switch Sp is connected to the VCPH terminal via the pull-down resistor Rpp. The pull-down resistor Rpp is not essential.
[0055] Here, the selection signal SEL is assumed to be at high level. When at least one of the gate signals Gr1 to Gr3 is at high level, the output of the AND circuit 9A is at low level, and the pull-down switch Sp is turned off. At this time, the output of the AND circuit 9B corresponds to the level of the control signal Sctr. This mode is the first mode of the power relay control unit 9.
[0056] The AND circuit 9B has a function of shifting the level of the control signal Sctr. For example, when the power supply voltage VB is 48V and the control signal Sctr is 0V (low level), the level is shifted from 0V by 48V to output a 48V output signal as a low level. On the other hand, when the control signal Sctr is 5V (high level), the level is shifted from 5V by 48V to output a 48V+5V output signal as a high level.
[0057] When the control signal Sctr is at a low level, the output of the AND circuit 9B (=gate signal G2) is at a low level. For example, when VB=48V, the output of the AND circuit 9B is 48V, and both of the transistors 22 and 27 are turned off. In this case, the output of the OR circuit 9C, i.e., the gate signal G1 of the transistor 21, is at a low level, the transistor 21 is turned on, and the voltage of the CPH terminal (=V1+VB) is output as the output voltage Vcph from the VCPH terminal. For example, the voltage of the CPH terminal=V1+VB=12V+48V=60V, and G1=60V-5V.
[0058] On the other hand, when the control signal Sctr is at a high level, the output (=gate signal G2) of the AND circuit 9B becomes a high level. For example, when VB=48V, the output of the AND circuit 9B becomes 48V+5V, and both of the transistors 22 and 27 are turned on. In this case, the gate signal G1 of the transistor 21 becomes a high level (=the voltage of the VCPH terminal), the transistor 21 is turned off, and the voltage of the CPH terminal becomes VB. At this time, for example, the voltage of the VCPH terminal=60V, and G1=60V.
[0059] In this manner, when the selection signal SEL is at a high level and at least one of the gate signals Gr1 to Gr3 is at a high level, the charge pump 2 performs a boosting operation by switching the control signal Sctr.
[0060] On the other hand, when the selection signal SEL is at a high level and all of the gate signals Gr1 to Gr3 are at a low level, the output of the AND circuit 9A becomes a high level and the pull-down switch Sp is turned on. At this time, the output of the AND circuit 9B (=gate signal G2) becomes a low level regardless of the control signal Sctr, and both of the transistors 22 and 27 are turned off. This mode is the second mode of the power relay control unit 9. The voltage of the VCPH terminal becomes 0V due to the pull-down switch Sp. At this time, the gate signal G1 is turned to a high level (=voltage of the VCPH terminal), and the transistor 21 is turned off. As a result, 0V is applied to the gate of the first N-channel MOSFET 61, and the first N-channel MOSFET 61 can be turned off more reliably.
[0061] In this embodiment as well, the gate control lines of the motor relays 71 to 73 are shared to control the power relay control unit 9, so that the power relay control unit 9 can be configured efficiently. Furthermore, when at least one of the gate signals Gr1 to Gr3 is at a high level, i.e., when at least one of the motor relays 71 to 73 is in an on state, the power relay 6 can be turned on by the boosting operation of the charge pump 2, and when all of the gate signals Gr1 to Gr3 are at a low level, i.e., when all of the motor relays 71 to 73 are in an off state, the power relay 6 can be turned off.
[0062] Furthermore, when the selection signal SEL is at a low level, the output of the AND circuit 9A is at a low level, and the pull-down switch Sp is turned off. At this time, the output of the AND circuit 9B and the output of the OR circuit 9C are at a level corresponding to the control signal Sctr, the boost operation of the charge pump 2 is enabled, and the power relay 6 is turned on. In this case, since the power relay 6 can be turned on regardless of the levels of the gate signals Gr1 to Gr3, it is possible to turn the power relay 6 on when all the gate signals Gr1 to Gr3 are at a low level, that is, when all the motor relays 71 to 73 are in an off state.
[0063] This makes it possible to realize various patterns for statically detecting short / open abnormalities. For example, in Fig. 1, short abnormality detection for the transistors M1, M4, and M6 can be performed with a pattern in which the switch SW2 is on, the switches SW3 and SW4 are off, the transistors M1 to M6 are all off, the motor relays 71 to 73 are all off, and the power relay 6 is on.
[0064] In this embodiment, when the transistor 27, which is an N-channel MOSFET, is added, the drains of the transistors 22 and 27 may be connected to the same node. Also, the AND circuit 9A may be expressed by MIL logic symbols such as a NAND circuit or an OR circuit, as long as the logic is equivalent.
[0065] <5. Fourth embodiment> FIG. 6 is a diagram showing a partial configuration of a motor system 10 according to a fourth embodiment. This embodiment is different from the third embodiment in that a transistor 28, which is a P-channel MOSFET, is added to the transistor 21. The sources of the transistors 21 and 28 are connected at the same node. This allows the body diodes of the transistors 21 and 28 to be connected in the opposite directions to each other, and when the transistors 21, 22, and 28 are in the off state, it is possible to prevent a reverse flow of current from the application terminal of the power supply voltage VB. The drains of the transistors 21 and 28 may be connected at the same node. However, connecting the sources of the transistors 21 and 28 at the same node allows only one protective element (not shown) to be required between the gate and source.
[0066] <6. Fifth embodiment> 7 is a diagram showing a partial configuration of a motor system 10 according to a fifth embodiment. This embodiment differs from the first embodiment (FIG. 3) in that a boost DC / DC converter 20 is used as a boost circuit instead of a charge pump.
[0067] The step-up DC / DC converter 20 steps up the power supply voltage VB to generate an output voltage Vout. The step-up DC / DC converter 20 has an inductor L1, a diode D1, and a switching element Q1. The inductor L1 and the diode D1 are provided outside the motor drive device 1. A first end of the inductor L1 is connected to an application end of the power supply voltage VB. A second end of the inductor L1 is connected to an anode of the diode D1. The motor drive device 1 has a SW terminal (switch terminal) as an external terminal. The SW terminal is connected to the second end of the inductor L1. The switching element Q1 is built into the motor drive device 1 and is composed of an N-channel MOSFET. The drain of the switching element Q1 is connected to the SW terminal. The source of the switching element Q1 is connected to an application end of the ground potential.
[0068] The switching element Q1 is turned on and off to generate an output voltage Vout at the cathode of the diode D1. The power relay control unit 9 is connected between the power relay 6 and the application terminal of the output voltage Vout.
[0069] When at least one of the gate signals Gr1 to Gr3 is at high level (=Vout), at least one of the gate cutoff relays 91 to 93 in the power relay control unit 9 is turned on, and the power relay 6 (N-channel MOSFETs 61, 62) is turned on.
[0070] <7. Number of half bridges> In the above-described embodiment, the number of half bridges is three because a three-phase motor is used, but this is not limited to this. For example, a motor system may be configured with two half bridges to configure an H bridge and drive a brushed DC motor. Alternatively, a motor system may be configured with one half bridge to drive a brushed DC motor. Also, multiple half bridges may be provided, and a motor may be provided for each half bridge.
[0071] <8. Application to vehicles> Fig. 8 is an external view showing one configuration example of a vehicle equipped with the above-mentioned motor system 10. Fig. 8 shows various motors X11 to X17 mounted on a vehicle X as application examples of the motor 8. The motor system 10 is particularly suitable for in-vehicle applications that require functional safety.
[0072] X11 is a motor for electric power steering. X12 is a motor for an electric oil pump. X13 is a motor for driving a headlight. X14 is a motor for an electric parking brake. X15 is a motor for a seat cooling fan. X16 is a motor for opening and closing the door. X17 is a motor for locking the door.
[0073] <9.Other> In addition to the above-mentioned embodiment, various technical features disclosed in this specification can be modified in various ways without departing from the spirit of the technical creation. In other words, the above-mentioned embodiment should be considered to be illustrative and not restrictive in all respects, and the technical scope of the present invention should not be limited to the above-mentioned embodiment, but should be understood to include all modifications that fall within the meaning and scope equivalent to the scope of the claims.
[0074] <9. Notes> As described above, for example, the motor drive device (1) according to one aspect of the present disclosure includes: at least one half bridge (HB1, HB2, HB3) having high-side transistors (M1, M3, M5) and low-side transistors (M2, M4, M6) connected in series between an application terminal of a power supply voltage (VB) and an application terminal of a ground potential, and configured so that a motor (8) can be connected to a node (N1, N2, N3) to which the high-side transistors and the low-side transistors are connected; a power relay (6) connected between the power supply voltage application terminal and the high-side transistor and having one or more N-channel MOSFETs (61, 62); a motor relay (71, 72, 73) connected between the node and the motor and having one or more N-channel MOSFETs; a boost circuit (2) configured to boost the power supply voltage to generate an output voltage (Vcph); A motor drive device (1) for use in a motor system (10) comprising: a control unit (90) configured to output gate signals (Gr1, Gr2, Gr3) to the gates of the motor relays; The gate signal is input to a power relay control unit (9) configured to switch whether or not the output voltage is applied to the gate of the power relay (first configuration).
[0075] In the first configuration, the power supply relay control unit (9) has one or more gate cutoff relays (91, 92, 93) connected between an application terminal of the output voltage (Vcph) and a gate of the power supply relay (6), The gate of the gate cutoff relay may be configured so that the gate signal can be applied thereto (second configuration).
[0076] In the second configuration, the power supply relay control section (9) may have two or more of the gate cutoff relays (91, 92, 93) connected in parallel (third configuration).
[0077] In the second or third configuration, the power supply voltage Vcph is supplied to an output terminal (VCPH terminal) as an external terminal configured to output the output voltage Vcph. A capacitor (C2) is connected between the output terminal and the power supply voltage (VB) application terminal; The gate cutoff relays (91, 92, 93) may be configured to be externally connected to the output terminals (fourth configuration).
[0078] In the fourth configuration, the boost circuit may be a charge pump (2) (fifth configuration).
[0079] In the second configuration, an output terminal (VCPH terminal) is provided as an external terminal, The power supply relay control unit (9) is built into the motor drive device (1), The gate cutoff relays (91, 92, 93) may be connected between the output end of the boost circuit (2) and the output terminal (sixth configuration).
[0080] In the first configuration, the power supply voltage Vcph is supplied to an external terminal, which is an output terminal (VCPH terminal) configured to output the output voltage Vcph. The boost circuit is a charge pump (2), the boost circuit includes a first transistor (21) and a second transistor (22) connected between the output terminal and an application terminal of the power supply voltage (VB), and a third transistor (27) including a diode (27A) connected in a reverse direction to an anti-parallel diode (22A) of the first transistor or the second transistor; The power supply relay control unit (9) has a pull-down switch (Sp) for pulling down the output terminal to a ground potential, the power relay control unit is configured to switch between a first mode and a second mode in response to the gate signals (Gr1, Gr2, Gr3); the first mode is a mode in which the pull-down switch is in an off state, and the first transistor, the second transistor, and the third transistor are switched on and off in response to switching of a control signal (Sctr); The second mode may be configured to turn on the pull-down switch and turn off the first transistor, the second transistor, and the third transistor regardless of the control signal (seventh configuration).
[0081] In the seventh configuration, the first transistor (21) is constituted by a P-channel MOSFET, The second transistor (22) is composed of an N-channel MOSFET, The third transistor (27) is composed of an N-channel MOSFET, The sources or drains of the second transistor and the third transistor may be connected to the same node (eighth configuration, FIG. 5).
[0082] In the seventh configuration, the first transistor (21) is constituted by a P-channel MOSFET, The second transistor (22) is composed of an N-channel MOSFET, The third transistor (28) is composed of a P-channel MOSFET, The sources or drains of the first transistor and the third transistor may be connected to the same node (ninth configuration, FIG. 6).
[0083] In any one of the seventh to ninth configurations, the motor relays (71, 72, 73) are provided in two or more numbers, The power relay control unit may be configured to be in the first mode when at least any of the gate signals (Gr1, Gr2, Gr3) is at a high level, and to be in the second mode when all of the gate signals are at a low level (tenth configuration).
[0084] In the above tenth configuration, when a selection signal (SEL) is at a predetermined level, the power relay control section may be configured to enter the first mode regardless of the gate signal (eleventh configuration).
[0085] Moreover, a motor system (10) according to one embodiment of the present disclosure includes a motor drive device (1) having any one of the first to eleventh configurations described above, the half bridges (HB1, HB2, HB3), and the motor (8) (twelfth configuration).
[0086] Moreover, a vehicle (X) according to an aspect of the present disclosure includes the motor system (10) of the twelfth configuration (thirteenth configuration). [Industrial Applicability]
[0087] The present disclosure can be used, for example, in an in-vehicle motor system. [Explanation of symbols]
[0088] 1 Motor drive unit 2 Charge Pump 6 Power Relay 8 Motor 9 Power relay control section 10 Motor System 20 Step-up DC / DC converter 21~24 Transistor 22A body diode 25,26 Control circuit 27 Transistor 27A Body Diode 28 Transistor 31 Comparator 41~43 Pre-driver 51~53 Comparator 71~73 Motor Relay 90 Control section 91~93 Gate cutoff relay 9A,9B AND circuit 9C OR circuit C1, C2 capacitors D1 Diode HB1 1st Half Bridge HB2 2nd Half Bridge HB3 3rd Half Bridge L1 Inductor M1 First high-side transistor M2 First low-side transistor M3 Second high-side transistor M4 Second low-side transistor M5 Third high-side transistor M6 3rd low-side transistor Q1 Switching element R1~R12 Resistors Rp, Rpp Pull-down resistor SW1~SW4 Switches Sp Pull-down switch X Vehicle
Claims
1. At least one half bridge including a high-side transistor and a low-side transistor connected in series between an application terminal of a power supply voltage and an application terminal of a ground potential, the half bridge being configured so that a motor can be connected to a node to which the high-side transistor and the low-side transistor are connected; a power relay connected between an application terminal of the power supply voltage and the high-side transistor and having one or more N-channel MOSFETs; a motor relay connected between the node and the motor, the motor relay having one or more N-channel MOSFETs; a boost circuit configured to boost the power supply voltage to generate an output voltage; A motor drive device for use in a motor system comprising: a control unit configured to output a gate signal to a gate of the motor relay; a motor drive device that inputs the gate signal to a power supply relay control unit that is configured to switch whether or not the output voltage is applied to a gate of the power supply relay.
2. the power supply relay control unit has one or more gate cutoff relays connected between an application terminal of the output voltage and a gate of the power supply relay, The motor drive device according to claim 1 , wherein the gate signal can be applied to a gate of the gate interruption relay.
3. The motor drive device according to claim 2 , wherein the power supply relay control section has two or more of the gate cutoff relays connected in parallel.
4. an output terminal as an external terminal configured to output the output voltage; a capacitor is connected between the output terminal and the power supply voltage application terminal; The motor drive device according to claim 2 , wherein the gate interruption relay is externally connected to the output terminal.
5. 5. The motor drive device according to claim 4, wherein the boost circuit is a charge pump.
6. It has an output terminal as an external terminal, The power relay control unit is built into the motor drive device, The motor drive device according to claim 2 , wherein the gate cutoff relay is connected between an output end of the boost circuit and the output terminal.
7. an output terminal as an external terminal configured to output the output voltage; the boost circuit is a charge pump; the boost circuit includes a first transistor and a second transistor connected between the output terminal and an application terminal of the power supply voltage, and a third transistor including a diode connected in a reverse direction to an anti-parallel diode of the first transistor or the second transistor, the power supply relay control unit has a pull-down switch for pulling down the output terminal to a ground potential, the power supply relay control unit is configured to switch between a first mode and a second mode in response to the gate signal; the first mode is a mode in which the pull-down switch is in an off state, and the first transistor, the second transistor, and the third transistor are switched on and off in response to switching of a control signal; 2. The motor drive device according to claim 1, wherein the second mode is a mode in which the pull-down switch is turned on and the first transistor, the second transistor, and the third transistor are turned off regardless of the control signal.
8. the first transistor is configured by a P-channel MOSFET, the second transistor is configured by an N-channel MOSFET, the third transistor is configured by an N-channel MOSFET, The motor drive device according to claim 7 , wherein the sources or drains of the second transistor and the third transistor are connected to a same node.
9. the first transistor is configured by a P-channel MOSFET, the second transistor is configured by an N-channel MOSFET, the third transistor is configured by a P-channel MOSFET, The motor drive device according to claim 7 , wherein the sources or drains of the first transistor and the third transistor are connected to a same node.
10. The motor relay is provided in two or more.
8. The motor drive device according to claim 7, wherein when at least any of the gate signals is at a high level, the power supply relay control unit is in the first mode, and when all of the gate signals are at a low level, the power supply relay control unit is in the second mode.
11. The motor drive device according to claim 10 , wherein when a selection signal is at a predetermined level, the power relay control unit is set to the first mode regardless of the gate signal.
12. A motor drive device according to any one of claims 1 to 11, The half bridge; A motor system comprising the motor.
13. A vehicle comprising the motor system of claim 12.
