Upper arm drive circuit

Abstract

To provide an upper arm drive circuit 1 with which malfunction can be prevented even when output of an electric power conversion circuit 2 becomes a negative potential, and delay of turn-on of an upper arm switching element Q1 can be suppressed.SOLUTION: There is provided an upper arm drive circuit 1 for driving an upper arm switching element Q1 of an electric power conversion circuit 2. The upper arm drive circuit includes: a first switching element SW1 that is connected between a gate of the upper arm switching element Q1 and a reference potential terminal; a first diode D1 that is connected between a gate and a source of the first switching element SW1; a second diode D2 that is connected between a reference potential end of the upper arm switching element Q1 and a connection node N; a second switching element SW2 that is connected between the gate of the first switching element SW1 and the connection node N; a third diode D3 that is connected to a reference potential GND; and a first resistor R1 that is connected between the third diode D3 and the connection node N.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an upper arm driver circuit. [Background technology]

[0002] With the rise in awareness of environmental conservation worldwide, the demand for energy conservation has increased, and power conversion devices (inverters) are being widely adopted in various fields. For power conversion devices installed in the drive systems of railway vehicles, air conditioners, etc., high reliability, as well as high performance and efficiency, are becoming important issues.

[0003] A typical power conversion device includes a power conversion circuit consisting of a bridge circuit having upper and lower arms each made up of a switching element and a freewheeling diode connected in inverse parallel to the switching element, an upper arm drive circuit that drives and controls the switching element of the upper arm, and a lower arm drive circuit that drives and controls the switching element of the lower arm.

[0004] An example of a technique related to an upper arm drive circuit is Patent Document 1. The abstract of Patent Document 1 states that "in a power conversion device having a bridge circuit composed of upper and lower arms, an upper arm drive circuit is provided that is capable of stably controlling the upper arm without malfunctioning even when the output of the power conversion device becomes negative potential."

[0005] Moreover, FIG. 2A of Patent Document 1 describes a configuration in which, as an upper arm drive circuit (6) that drives the upper arm IGBT (2), an upper arm drive MOSFET (10) having a drain connected to the gate of the upper arm IGBT (2) and a source connected to the emitter of the upper arm IGBT (2) (reference potential of the upper arm IGBT (2)), and an upper arm drive MOSFET (9) having a drain connected to the gate of the upper arm drive MOSFET (10) and a source connected to an upper arm drive circuit reference potential wiring (12) via a resistor (11).

[0006] Furthermore, as an example of a circuit configuration that can prevent malfunction even when the output of the power conversion device becomes negative potential, FIG. 3 of Patent Document 1 describes a configuration in which a reference potential wiring GND connection portion (15) (see FIG. 2A of Patent Document 1) has a diode (18) whose anode is connected to the upper arm drive circuit reference potential wiring (12) and whose cathode is connected to a reference potential (GND (ground)), and a reference potential wiring inverter output connection portion (16) (see FIG. 2A of Patent Document 1) has a diode (19) whose anode is connected to the upper arm drive circuit reference potential wiring (12) and whose cathode is connected to the reference potential of the upper arm IGBT (2). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Patent Publication No. 2022-146525 Summary of the Invention [Problem to be solved by the invention]

[0008] However, in the configuration combining FIG. 2A and FIG. 3 of Patent Document 1, when a gate charge is extracted from the gate of the upper-arm drive MOSFET (10) via the upper-arm drive MOSFET (9) in order to turn off the upper-arm drive MOSFET (10) at the timing of turning on the upper-arm IGBT (2), there is a problem that the extraction of the gate charge is delayed due to the presence of a resistor (11) in the path, causing a delay in turning on the upper-arm IGBT (2).

[0009] The problem that the present invention aims to solve is to provide an upper arm drive circuit that can prevent malfunction even when the output of a power conversion circuit becomes negative potential and can suppress delays in turning on the upper arm switching element. [Means for solving the problem]

[0010] In order to solve the above-mentioned problems, an upper arm drive circuit of the present invention is an upper arm drive circuit that drives an upper arm switching element of a power conversion circuit, and is characterized in having: a first switching element having a drain connected to a gate of the upper arm switching element and a source connected to a reference potential terminal of the upper arm switching element; a first diode having a cathode connected to the gate of the first switching element and an anode connected to the source of the first switching element; a second diode having a cathode connected to the anode of the first diode; a second switching element having a drain connected to the gate of the first switching element and a source connected to the anode of the second diode, and controlled to be turned on at a timing to turn on the upper arm switching element and turn off the first switching element; a third diode having a cathode connected to a reference potential; and a first resistor having one terminal connected to a connection node between the source of the second switching element and the anode of the second diode and the other terminal connected to the anode of the third diode. Effect of the Invention

[0011] According to the present invention, it is possible to realize an upper arm driver circuit that can prevent malfunction even when the output of a power conversion circuit becomes a negative potential, and can suppress a delay in turning on an upper arm switching element. [Brief description of the drawings]

[0012] [Figure 1] FIG. 2 is a circuit diagram showing a schematic configuration of an upper arm drive circuit according to an embodiment. [Diagram 2] FIG. 4 is a circuit diagram illustrating the operation of an upper arm driver circuit according to the embodiment. [Diagram 3] FIG. 4 is a circuit diagram illustrating the operation of an upper arm driver circuit according to the embodiment. [Figure 4] FIG. 4 is a circuit diagram showing a schematic configuration of an upper arm driver circuit of Comparative Example 1. [Diagram 5] FIG. 4 is a circuit diagram illustrating the operation of an upper arm driver circuit according to Comparative Example 1. [Figure 6]FIG. 4 is a circuit diagram illustrating the operation of an upper arm driver circuit according to Comparative Example 1. [Figure 7] FIG. 11 is a circuit diagram showing a schematic configuration of an upper arm driver circuit of Comparative Example 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] Hereinafter, embodiments of the present invention will be described with reference to the drawings. In each drawing and each embodiment, the same or similar components are designated by the same reference numerals, and duplicated explanations will be omitted.

[0014] FIG. 1 is a circuit diagram showing a schematic configuration of an upper arm driver circuit according to an embodiment.

[0015] The power conversion device 3 has an upper arm drive circuit 1, a power conversion circuit 2, and a lower arm drive circuit (not shown).

[0016] The power conversion circuit 2 has an upper-arm switching element Q1 and a lower-arm switching element Q2 connected in series between a DC power supply potential VDC and a reference potential GND, an upper-arm freewheeling diode DQ1 connected in anti-parallel to the upper-arm switching element Q1, and a lower-arm freewheeling diode DQ2 connected in anti-parallel to the lower-arm switching element Q2. An AC output of the power conversion circuit 2 is output from a connection node between the upper-arm switching element Q1 and the lower-arm switching element Q2 to an output terminal OUT.

[0017] The upper arm switching element Q1 and the lower arm switching element Q2 may be, for example, an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET). When a MOSFET is used, a body diode built into the MOSFET may be used as the upper arm freewheel diode DQ1 and the lower arm freewheel diode DQ2. In this embodiment, a case where the upper arm switching element Q1 and the lower arm switching element Q2 are N-type switching elements will be described as an example. The reference potential GND is, for example, a ground potential, but is not limited to this.

[0018] The upper arm drive circuit 1 is a drive circuit that drives the upper arm switching element Q1, and the lower arm drive circuit (not shown) is a drive circuit that drives the lower arm switching element Q2.

[0019] The upper arm driver circuit 1 of this embodiment has a first switching element SW1, a first diode D1, a second diode D2, a second switching element SW2, a third diode D3, and a first resistor R1.

[0020] The drain of the first switching element SW1 is connected to the gate of the upper-arm switching element Q1, and the source is connected to the reference potential terminal of the upper-arm switching element Q1. By turning on the first switching element SW1, the gate of the upper-arm switching element Q1 and the reference potential terminal are shorted, and charge can be extracted from the gate of the upper-arm switching element Q1. For example, an N-type MOSFET can be used as the first switching element SW1.

[0021] The first diode D1 has a cathode connected to the gate of the first switching element SW1 and an anode connected to the source of the first switching element SW1.

[0022] The cathode of the second diode D2 is connected to the anode of the first diode.

[0023] The drain of the second switching element SW2 is connected to the gate of the first switching element SW1, and the source is connected to the anode of the second diode D2. The second switching element SW2 is controlled to be turned on at the timing when the upper arm switching element Q1 is turned on and the first switching element SW1 is turned off. For example, an N-type MOSFET can be used as the second switching element SW2.

[0024] The cathode of the third diode D3 is connected to the reference potential GND. The reference potential GND is, for example, a ground potential, but is not limited to this. The reference potential GND of the upper arm driver circuit 1 may be the same as or different from the reference potential GND of the power conversion circuit 2.

[0025] The first resistor has one terminal connected to a connection node N between the source of the second switching element SW2 and the anode of the second diode D2, and the other terminal connected to the anode of the third diode D3.

[0026] The upper arm driver circuit 1 of this embodiment preferably further includes a second resistor R2 connected to the gate of the upper arm switching element Q1, and a Zener diode ZD having a cathode connected to the gate of the upper arm switching element Q1 and an anode connected to the reference potential terminal of the upper arm switching element Q1. The second resistor R2 serves as a gate resistor of the upper arm switching element Q1. The second resistor R2 is connected between the gate of the upper arm switching element Q1 and an upper arm driver circuit (not shown) that applies an ON signal to the gate of the upper arm switching element Q1. FIG. 1 shows an example in which the second resistor R2 is connected to the right side of the drain of the first switching element SW1 (the side closer to the gate of the upper arm switching element Q1), but is not limited to this, and the second resistor R2 may be connected to the left side of the drain of the first switching element SW1. The Zener diode ZD serves to limit the voltage between the gate of the upper arm switching element Q1 and the reference potential terminal to protect the upper arm switching element Q1.

[0027] The upper arm driver circuit 1 of this embodiment also includes, as a control circuit for controlling the operation of the second switching element SW2, a P-type third switching element SW3 whose source is connected to the power supply potential VCC and whose drain is connected to the gate of the second switching element SW2, and a third resistor R3 connected between the drain of the third switching element SW3 and one terminal of the first resistor R3. The control circuit for controlling the operation of the second switching element SW2 shown here is merely an example, and is not limited to this. Here, an example is shown in which a P-type MOSFET is used as the third switching element SW3. If an N-type MOSFET is used as the third switching element SW3, the circuit configuration of the control circuit may be changed as appropriate.

[0028] The upper arm driver circuit 1 of this embodiment also includes a gate driver circuit (not shown) that applies an on signal to the gate of the upper arm switching element Q1, a control circuit (not shown) for controlling the operation of the first switching element SW1, a control circuit (not shown) for controlling the operation of the third switching element SW3, and a discharge circuit (not shown) for withdrawing charge from the gate of the upper arm switching element Q1, but detailed explanations are omitted.

[0029] 2 and 3 are circuit diagrams for explaining the operation of the upper arm driver circuit of the embodiment.

[0030] Consider the case where the upper arm switching element Q1 is turned on (from off to on) as shown in Fig. 2. Here, a case where the upper arm switching element Q1 is in the off state and the output of the power conversion circuit 2 is at a negative potential will be described. In this case, the reference potential terminal of the upper arm switching element Q1 and the source of the first switching element SW1 are also at a negative potential.

[0031] By turning on the third switching element SW3, the second switching element SW2 is turned on and becomes conductive. Since the output of the power conversion circuit 2 is at a negative potential, charge is extracted from the gate of the first switching element SW1, and a current i flows to the output of the power conversion circuit 2 via the second switching element SW2, the connection node N, and the second diode D2 along the path shown in Figure 2, turning off the first switching element SW1 (changing it from on to off). At this time, since the path of the current i does not pass through a resistor, it is possible to suppress a delay in turning off the first switching element SW1.

[0032] An on signal is applied to the gate of the upper arm switching element Q1 from a gate drive circuit (not shown). When the first switching element SW1 is turned off, the first switching element SW1 becomes non-conductive, and the potential between the reference potential terminal and the gate of the upper arm switching element Q1 becomes equal to or higher than a threshold value, so that the upper arm switching element Q1 is turned on.

[0033] In this way, since the current i that flows due to the charge extracted from the gate when the first switching element SW1 is turned off does not pass through a resistor in its path, delays in turning off the first switching element SW1 can be suppressed, and thereby delays in turning on the upper arm switching element Q1 can be suppressed.

[0034] 3, after the upper arm switching element Q1 is turned on, the potential of the output of the power conversion circuit 2 is positive, the first switching element SW1 is off, the second switching element SW2 is on, and the third switching element SW3 is on. At this time, a current i from the output of the power conversion circuit 2 flows to the reference potential GND via the first diode D1, the second switching element SW2, the connection node N, the first resistor R1, and the third diode D3 along the path shown in FIG.

[0035] In the state of FIG. 3, since the first switching element SW1 is already off, there is no problem even if the current i flows via the first resistor R1.

[0036] Furthermore, if the first resistor R1 were not present, the circuit would be in a nearly short-circuited state, which would cause a problem of burning out the first diode D1, the second switching element SW2, and the third diode D3, which are elements in the path of the current i, and especially the second switching element SW2. In contrast, in this embodiment, the first resistor R1 prevents these elements from burning out, and reduces the current i that flows steadily while the upper arm switching element Q1 is on, thereby reducing power consumption. Although there is no resistance in the path of the current i in the state shown in FIG. 2, this is not a problem because the time is short and the elements are unlikely to burn out.

[0037] Furthermore, in the state of Figure 3, the current i flows through the first diode D1, causing the source of the first switching element SW1 to have a higher potential than the gate, and a reverse bias can be created between the gate and source of the first switching element SW1 by the forward voltage of the first diode D1, so that the first switching element SW1 can be reliably maintained in the off state.

[0038] Although not shown, when turning off the upper-arm switching element Q1, a discharge circuit not shown draws charge from the gate of the upper-arm switching element Q1 to turn off the upper-arm switching element Q1. Also, a control circuit not shown for controlling the operation of the third switching element SW3 turns off the third switching element SW3 to turn off the second switching element SW2, and a control circuit not shown for controlling the operation of the first switching element SW1 turns on the first switching element SW1, thereby maintaining the upper-arm switching element Q1 in an off state.

[0039] FIG. 4 is a circuit diagram showing a schematic configuration of an upper arm driver circuit of the first comparative example.

[0040] The difference from Example 1 shown in FIG. 1 is that Comparative Example 1 has a fourth resistor R4 between the source of the second switching element SW2 and the connection node N instead of the first resistor R1, and a discharge circuit 4 is added.

[0041] The discharge circuit 4 has, for example, a fourth switching element SW4, a fifth resistor R5, and a capacitor C as shown in FIG. 4, and is a circuit that can discharge by bypassing the fourth resistor R4 by turning on the discharge circuit 4 only for the time constant of the capacitor C of the discharge circuit 4 and the CR of the fifth resistor R5.

[0042] 5 and 6 are circuit diagrams illustrating the operation of the upper arm driver circuit of Comparative Example 1. In FIG.

[0043] Fig. 5 shows a state corresponding to Fig. 2. As shown in Fig. 5, in Comparative Example 1, when the upper arm switching element Q1 is turned on, the current i passes through the fourth resistor R4, which causes a delay when the first switching element SW1 is turned off, and as a result, a problem occurs in that the turn-on of the upper arm switching element Q1 is also delayed. Therefore, in Comparative Example 1, a discharge circuit 4 is added to suppress the problem of the delay caused by the fourth resistor R4.

[0044] Fig. 6 shows a state corresponding to Fig. 3. In Comparative Example 1, a fourth resistor R4 is provided to prevent the element from burning out.

[0045] In contrast to Comparative Example 1, in the embodiment, as shown in FIG. 2, a resistor is provided at the position of the first resistor R1 instead of the position of the fourth resistor R4, so that the path of the current i in the state of FIG. 2 does not pass through the resistor, and therefore the delay problem can be solved without providing a discharge circuit 4 as in Comparative Example 1.

[0046] FIG. 7 is a circuit diagram showing a schematic configuration of an upper arm driver circuit of Comparative Example 2. As shown in FIG.

[0047] A problem of malfunction occurring when the output of the power conversion circuit 2 becomes a negative potential will be described with reference to Fig. 7. As shown in Fig. 7, the upper arm driver circuit 1 of Comparative Example 2 has a first switching element SW1, a second switching element SW2, and a fourth resistor R4. Unlike Example 1, Comparative Example 2 does not have a second diode D2 and a wiring between the connection node N and the reference potential terminal (same as the output of the power conversion circuit 2) of the upper arm switching element Q1.

[0048] In Comparative Example 2, when the upper arm switching element Q1 is off, the first switching element SW1 is on, and the second switching element SW2 is off, the gate of the first switching element SW1 only drops to 0 V, which is the same as the reference potential GND. Therefore, in this state, when the output of the power conversion circuit 2 becomes a negative potential, the first switching element SW1 is fixed to the on position.

[0049] In this state, even if an attempt is made to turn on the upper arm switching element Q1 by applying an on signal to the gate of the upper arm switching element Q1 from a gate drive circuit (not shown), since the first switching element SW1 is fixed on, the voltage between the gate of the upper arm switching element Q1 and the reference potential terminal is fixed at 0 V, resulting in a malfunction in which the upper arm switching element Q1 cannot be turned on.

[0050] 1, when the output of the power conversion circuit 2 becomes negative potential with the upper arm switching element Q1 off, the first switching element SW1 on, and the second switching element SW2 off, the potential of the source of the second switching element SW2 (the potential of the connection node N) becomes substantially the same potential as the output of the power conversion circuit 2 via the second diode D2. However, in this state, since the second switching element SW2 is off, the first switching element SW1 maintains the on state.

[0051] Furthermore, when turning on the upper arm switching element Q1, as in the operation described in Figure 2, the first switching element SW1 can be turned off without being fixed on, and the upper arm switching element Q1 can be turned on. Therefore, even if the output of the power conversion circuit 2 becomes negative potential, malfunction as in Comparative Example 2 does not occur, and malfunction can be prevented.

[0052] As described above, according to the upper arm driver circuit 1 of the embodiment, even if the output of the power conversion circuit 2 becomes a negative potential, it is possible to prevent malfunction and suppress a delay in turning on the upper arm switching element Q1.

[0053] Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations described in the embodiments, and various modifications are possible within the scope of the technical concept of the present invention. In addition, some or all of the configurations described in each embodiment may be combined and applied. [Explanation of symbols]

[0054] 1 Upper arm drive circuit 2. Power Conversion Circuit 3. Power conversion device 4 Discharge circuit SW1 First switching element SW2 Second switching element SW3 Third switching element SW4 Fourth switching element D1 First diode D2 Second diode D3 Third diode ZD Zener diode R1 First resistor R2 Second resistor R3 Third Resistor R4 The Fourth Resistance R5 The Fifth Resistance C Capacitor N connected nodes VCC power supply potential Q1 Upper arm switching element Q2 Lower arm switching element DQ1 Upper arm freewheel diode DQ2 Lower arm freewheel diode VDC DC power supply potential OUT Output terminal GND Reference potential i current

Claims

1. An upper arm driver circuit for driving an upper arm switching element of a power conversion circuit, a first switching element having a drain connected to the gate of the upper arm switching element and a source connected to a reference potential terminal of the upper arm switching element; a first diode having a cathode connected to the gate of the first switching element and an anode connected to the source of the first switching element; a second diode having a cathode connected to the anode of the first diode; a second switching element having a drain connected to the gate of the first switching element and a source connected to the anode of the second diode, and being controlled to be turned on at a timing when the upper arm switching element is turned on and the first switching element is turned off; a third diode having a cathode connected to a reference potential; a first resistor having one terminal connected to a connection node between the source of the second switching element and the anode of the second diode, and the other terminal connected to the anode of the third diode.

2. In claim 1, a second resistor connected to a gate of the upper arm switching element; a Zener diode having a cathode connected to the gate of the upper arm switching element and an anode connected to a reference potential terminal of the upper arm switching element.

3. In claim 1, a P-type third switching element having a source connected to a power supply potential and a drain connected to the gate of the second switching element; a third resistor connected between the drain of the third switching element and one terminal of the first resistor.

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