High-frequency amplification device and constant current circuit

Abstract

To provide a high-frequency amplification device and a constant current circuit in which change of a current flowing in a current mirror circuit can be suppressed by reducing the dependence on a power source voltage.SOLUTION: A regulator circuit 3 is connected between a power source line L1 of a Nagata current mirror circuit 21 and a power source line L3 for supplying a power source voltage VDD. The regulator circuit 3 outputs a voltage Vreg which significantly increases according to increase of the power source voltage VDD when the power source voltage VDD is low to the power source line L1, and outputs a voltage Vreg which saturates when the power source voltage VDD exceeds a predetermined value and slightly increases according to increase of the power source voltage VDD to the power source line L1.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a high-frequency amplifier and a constant current circuit. [Background technology]

[0002] Conventionally, a high-frequency amplifier device has been proposed that uses a Nagata current mirror circuit (Patent Document 1) as a bias circuit. The Nagata current mirror circuit has a peaking characteristic in the power supply voltage-current characteristic, and can be considered as a constant current in which the current is almost constant relative to the power supply voltage near the peak. However, the power supply voltage region (peak region) near the peak where the current is almost constant is very narrow. For this reason, the current flowing through the current mirror circuit is highly dependent on the power supply voltage, and there has been a problem in that the current cannot be made constant. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Unexamined Patent Publication No. 16463 / 1983 Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention has been made in consideration of the above-mentioned circumstances, and an object of the present invention is to provide a high-frequency amplifier device and a constant current circuit that can reduce the dependency on the power supply voltage and suppress fluctuations in the current flowing through a current mirror circuit. [Means for solving the problem]

[0005] In order to achieve the above-mentioned object, a high-frequency amplifier and a constant current circuit according to the present invention are characterized by the following [1] to [6]. [1] a first transistor connected between a first power supply line to which a first power supply voltage is supplied and a second power supply line to which a second power supply voltage is supplied; a second transistor that is connected to the first transistor in a current mirror configuration, and that mirrors a drain current or a collector current flowing through the first transistor, and that has a gate or a base connected to an input terminal via an input capacitor, and a drain or a collector connected to an output terminal via an output capacitor, and that amplifies a high-frequency signal input to the input terminal and outputs the amplified signal from the output terminal; a resistor connected between the drain or collector of the first transistor and the gate or base of the first transistor; A current mirror circuit having a regulator circuit connected between a third power supply line to which a third power supply voltage is supplied and the first power supply line, the regulator circuit outputting the first power supply voltage to the first power supply line, the first power supply voltage increasing greatly in response to an increase in the third power supply voltage while the third power supply voltage is low, and outputting the first power supply voltage to the first power supply line, the first power supply voltage being saturated and increasing little in response to an increase in the third power supply voltage when the third power supply voltage exceeds a certain value. It is a high frequency amplifier. [2] In the high frequency amplifier according to the invention, the current mirror circuit has different peak regions of the first power supply voltage in which the drain current or the collector current of the second transistor reaches a peak depending on threshold voltages of the first transistor and the second transistor, the regulator circuit outputs the first power supply voltage having a different saturation region according to the threshold voltage, and supplies the first power supply voltage such that the saturation region according to the threshold voltage is included in the peak region according to the threshold voltage. It is a high frequency amplifier. [3] In the high frequency amplifier according to the invention, The regulator circuit includes: a third transistor having a drain or collector connected to the third power supply line and a source or emitter connected to the first power supply line; a plurality of fourth transistors or a plurality of the fourth transistors and a diode connected in series between a gate or a base of the third transistor and the second power supply line; It is a high frequency amplifier. [4] In the high frequency amplifier according to the invention, the current mirror circuit is configured such that at least a portion of a peak region of the first power supply voltage where a drain current or a collector current of the second transistor reaches a peak depending on a threshold voltage of the first transistor and a threshold voltage of the second transistor overlap with each other; the regulator circuit outputs the first power supply voltage in the same saturation region according to the threshold voltage, and supplies the first power supply voltage such that the saturation region is included in a region where the peak region according to the threshold voltage overlaps. It is a high frequency amplifier. [5] In the high frequency amplifier according to the invention, The regulator circuit includes: a third transistor having a drain or collector connected to the third power supply line and a source or emitter connected to the first power supply line; a fifth transistor and a diode connected in series between the gate or base of the third transistor and the second power supply line; It is a high frequency amplifier. [6] a first transistor connected between a first power supply line to which a first power supply voltage is supplied and a second power supply line to which a second power supply voltage is supplied; a second transistor connected to the first transistor in a current mirror configuration and mirroring a drain current or a collector current flowing through the first transistor; a resistor connected between the drain or collector of the first transistor and the gate or base of the first transistor; A current mirror circuit having a regulator circuit connected between a third power supply line to which a third power supply voltage is supplied and the first power supply line, the regulator circuit outputting the first power supply voltage to the first power supply line, the first power supply voltage increasing greatly in response to an increase in the third power supply voltage while the third power supply voltage is low, and outputting the first power supply voltage to the first power supply line, the first power supply voltage being saturated and increasing little in response to an increase in the third power supply voltage when the third power supply voltage exceeds a certain value; It is a constant current circuit. Effect of the Invention

[0006] According to the present invention, it is possible to provide a high-frequency amplifier and a constant current circuit that can reduce the dependency on the power supply voltage and suppress fluctuations in the current flowing through a current mirror circuit.

[0007] The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading the following description of the embodiment of the present invention (hereinafter, referred to as "embodiment") with reference to the accompanying drawings. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a circuit diagram showing an example of a high-frequency amplifier device according to the first embodiment. [Diagram 2] FIG. 2 is a graph showing the voltage Vreg-power supply current IDD characteristics of the Nagata current mirror circuit shown in FIG. [Diagram 3] FIG. 3 is a graph showing input / output characteristics of the regulator circuit shown in FIG. [Figure 4] FIG. 4 is a graph showing the power supply voltage VDD-power supply current IDD characteristics of the high frequency amplifier device shown in FIG. [Diagram 5] FIG. 5 is a graph showing the threshold voltage Vth-power supply current IDD characteristics of the high frequency amplifier device shown in FIG. [Figure 6] FIG. 6 is a circuit diagram showing details of the high-frequency amplifier device shown in FIG. [Figure 7] FIG. 7 is a graph showing input / output characteristics of the regulator circuit shown in FIG. [Figure 8] FIG. 8 is a circuit diagram showing an example of a high-frequency amplifier device according to the second embodiment. [Figure 9] FIG. 9 is a graph showing the voltage Vreg-power supply current IDD characteristics of the Nagata current mirror circuit shown in FIG. [Figure 10] FIG. 10 is a graph showing input / output characteristics of the regulator circuit shown in FIG. [Figure 11] FIG. 11 is a graph showing the power supply voltage VDD-power supply current IDD characteristics of the high frequency amplifier device shown in FIG. [Figure 12] FIG. 12 is a graph showing the threshold voltage Vth-power supply current IDD characteristics of the high frequency amplifier device shown in FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Specific embodiments of the present invention will be described below with reference to the accompanying drawings.

[0010] (First embodiment) First, a radio frequency amplifier 1 according to a first embodiment will be described. The radio frequency amplifier 1 according to this embodiment is formed on a GaAs (gallium arsenide) substrate using a pHEMT process. The radio frequency amplifier 1 according to this embodiment is a circuit that amplifies a radio frequency signal RFIN inputted from an input terminal TIN and outputs it as a radio frequency signal RFOUT from an output terminal TOUT. The radio frequency amplifier 1 includes a radio frequency amplifier section 2 that uses a Nagata current mirror circuit 21 (=current mirror circuit) as a bias circuit, and a regulator circuit 3 provided at the input of the Nagata current mirror circuit 21.

[0011] The high frequency amplifier 2 has an amplifying transistor and a Nagata current mirror circuit 21 that functions as a bias circuit for the amplifying transistor, an input capacitor C1, an output capacitor C2, and a coil L for cutting DC components from the high frequency signals RFIN and RFOUT.

[0012] The Nagata current mirror circuit 21 includes a transistor M1 (=first transistor), a transistor M2 (=second transistor), and resistors R1 to R3. In this embodiment, the transistors M1 and M2 are configured by N-channel field effect transistors. The transistor M1 is connected between a power supply line L1 (=first power supply line) to which a voltage Vreg (=first power supply voltage) is supplied, and a ground line L2 (=second power supply line) to which a ground voltage Vgnd (=second power supply voltage) is supplied.

[0013] More specifically, the transistor M1 has a source connected to the ground line L2 and a drain connected to the power supply line L1 via resistors R1 and R2. A power supply terminal TDD2 is connected to the power supply line L1, and a voltage Vreg is supplied from the regulator circuit 3. The transistor M1 has a gate connected to the connection point of the resistors R1 and R2. That is, the resistor R1 is connected between the gate and drain of the transistor M1.

[0014] The transistor M2 is connected to the transistor M1 as a current mirror. More specifically, the source of the transistor M2 is connected to the ground line L2, and the gate is connected to the drain of the transistor M1 via the resistor R3. The transistors M1 and M2 are composed of transistors with the same characteristics. The power supply current IDD, which is the mirror current of the drain current flowing through the transistor M1, flows through the drain of the transistor M2.

[0015] The transistor M2 functions as an amplifying transistor, with its gate connected to the input terminal TIN via the input capacitor C1 and its drain connected to the output terminal TOUT via the output capacitor C2. The transistor M2 also has its drain connected to the power supply terminal TDD via the coil L. The power supply terminal TDD is supplied with the power supply voltage VDD.

[0016] The regulator circuit 3 is connected between a power supply line L3 (=third power supply line) to which a power supply voltage VDD (=third power supply voltage) is supplied, and the power supply line L1. The power supply line L3 is connected to a power supply terminal TDD. The regulator circuit 3 has an input terminal TIN2 connected to the power supply line L3, and an output terminal TOUT2 connected to a power supply terminal TDD2 of the high frequency amplifier section 2.

[0017] Next, the voltage Vreg-power supply current IDD characteristics of the Nagata current mirror circuit 21 will be described below with reference to Fig. 2. In the case of a general current mirror circuit that does not have a resistor R1 between the gate and drain of the transistor M1, the power supply current IDD folded back to the transistor M2 increases as the voltage Vreg supplied to the transistor M1 increases.

[0018] In contrast, the Nagata current mirror circuit 21 provides a resistor R1 between the gate and drain of the transistor M1, so that the voltage Vreg-power supply current IDD characteristic has a peaking characteristic as shown in Fig. 2. To explain in more detail, while the voltage Vreg is low, the power supply current IDD increases as the voltage Vreg increases, and when the power supply current IDD reaches its peak, the power supply current IDD decreases as the voltage Vreg increases.

[0019] Therefore, in the voltage region near the peak (hereinafter abbreviated as the "peak region"), the power supply current IDD can be regarded as a constant current that is almost constant against the fluctuation of the voltage Vreg. In other words, if a voltage within the peak region is supplied to the power supply terminal TDD2, the power supply current IDD of the Nagata current mirror circuit 21 can be made constant, and the amplification factor of the high frequency amplifier 1 can be made constant.

[0020] However, the peak region is very narrow, making it difficult to keep the power supply current IDD constant. Moreover, depending on the design of the Nagata current mirror circuit 21, the peak region may vary depending on the threshold voltage Vth of the transistors M1 and M2, which also makes it difficult to keep the power supply current IDD constant. In the example shown in Figure 2, the peak region when the threshold voltage Vth = 0.10V is Vpeak(0.1), the peak region when the threshold voltage Vth = 0.25V is Vpeak(0.25), and the peak region when the threshold voltage Vth = 0.40V is Vpeak(0.4). These peak regions Vpeak(0.1), Vpeak(0.25), and Vpeak(0.4) vary depending on the threshold voltage Vth, and there are no overlapping regions.

[0021] Therefore, in this embodiment, a regulator circuit 3 is provided between the power supply line L3 and the power supply line L1. The regulator circuit 3 is designed in accordance with the characteristics of the Nagata current mirror circuit 21, thereby reducing the dependency of the power supply current IDD on the power supply voltage VDD and the dependency of the threshold voltage Vth, thereby reducing the fluctuation of the power supply current IDD.

[0022] More specifically, when the Nagata current mirror circuit 21 has the characteristics as shown in Fig. 2, the input / output characteristics of the regulator circuit 3 are designed as shown in Fig. 3. Generally, as shown in Fig. 3, the regulator circuit 3 outputs a voltage Vreg that increases significantly as the power supply voltage VDD increases while the power supply voltage VDD is low, and when the power supply voltage VDD exceeds a certain value, it saturates and outputs a voltage Vreg that increases slightly as the power supply voltage VDD increases.

[0023] In this embodiment, as shown in FIG. 3, the regulator circuit 3 is designed so that the saturation regions of the voltage Vreg (regions where the voltage Vreg increases slightly) differ depending on the threshold voltage Vth of the transistors M1 and M2. In the example shown in FIG. 3, the saturation region when the threshold voltage Vth=0.10V is Vsa(0.1), the saturation region when the threshold voltage Vth=0.25V is Vsa(0.25), and the saturation region when the threshold voltage Vth=0.40V is Vsa(0.4). The saturation regions Vsa(0.1), Vsa(0.25), and Vsa(0.4) differ depending on the threshold voltage Vth and do not overlap. The regulator circuit 3 is designed so that the saturation regions Vsa(0.1), Vsa(0.25), and Vsa(0.4) depending on the threshold voltage Vth are included in the peak regions Vpeak(0.1), Vpeak(0.25), and Vpeak(0.4) depending on the threshold voltage Vth.

[0024] As a result of designing the regulator circuit 3 as described above, when the power supply voltage VDD becomes high to a certain extent, the power supply current IDD saturates to a constant value, as shown in Figure 4. Then, even if the threshold voltage Vth differs, the power supply current IDD saturates to approximately the same value, as shown in Figures 4 and 5. This reduces the dependency of the power supply current IDD on the power supply voltage VDD and the threshold voltage Vth, and can reduce the fluctuation of the power supply current IDD.

[0025] Next, a specific example of the regulator circuit 3 described above will be described with reference to Fig. 6. As shown in the figure, the regulator circuit 3 has a transistor M3 (=third transistor), transistors M41 and M42 (=fourth transistor), and a resistor R4. The transistors M3, M41, and M42 are configured as N-channel field effect transistors, and have the same characteristics as the transistors M1 and M2. Therefore, the threshold voltages Vth of the transistors M1 to M3, M41, and M42 are the same.

[0026] The drain of the transistor M3 is connected to the input terminal TIN2, and the source is connected to the output terminal TOUT2. The transistors M41 and M42 are diode-connected with their gates connected to the drains. The transistors M41 and M42 are connected in series between the gate of the transistor M3 and the ground line L2. To explain in more detail, the drain and gate of the transistor M41 are connected to the gate of the transistor M3, and the drain and gate of the transistor M42 are connected to the source of the transistor M41. The source of the transistor M42 is connected to the ground line L2.

[0027] According to the regulator circuit 3 configured as described above, a current is supplied to the transistors M41 and M42 via the resistor R4. Since the transistors M41 and M42 function as diodes, the gate voltage of the transistor M3 is the sum of the threshold voltages Vth of the transistors M41 and M42 (=2×Vth). Therefore, the source voltage of the transistor M3 connected to the output terminal TOUT2 is the gate voltage of the transistor M3 minus the threshold voltage Vth, and the threshold voltage Vth is output from the output terminal TOUT2 as the voltage Vreg. For this reason, as shown in FIG. 7, the voltage Vreg increases when the threshold voltage Vth increases and decreases when the threshold voltage Vth decreases, and the saturation region differs depending on the threshold voltage Vth.

[0028] 6, the regulator circuit 3 can be composed of N-channel transistors M3, M41, and M42, and does not require a P-channel transistor. This is suitable for forming the high-frequency amplifier 1 using the pHEMT process on a GaAs substrate on which it is difficult to form a P-channel transistor.

[0029] Second embodiment Next, a high-frequency amplifier 1B according to a second embodiment will be described with reference to Fig. 8. In this figure, parts equivalent to those of the high-frequency amplifier 1 shown in Figs. 1 to 7 described in the above-mentioned first embodiment are given the same reference numerals, and detailed description thereof will be omitted.

[0030] The high frequency amplifier 1B of this embodiment includes a high frequency amplifier 2B (=current mirror circuit) having a Nagata current mirror circuit 21B, and a regulator circuit 3B. The configurations of the high frequency amplifier 2B and the Nagata current mirror circuit 21B are the same as those of the high frequency amplifier 2 and the Nagata current mirror circuit 21 already described in the first embodiment, and therefore detailed description thereof will be omitted here.

[0031] However, the Nagata current mirror circuit 21B of the second embodiment differs from the Nagata current mirror circuit 21 of the first embodiment in the resistance values ​​of the resistors R1 to R3 and the characteristics of the transistors M1 and M2. Therefore, the Nagata current mirror circuit 21B of the second embodiment differs in characteristics from the Nagata current mirror circuit 21 of the first embodiment. Fig. 9 shows the voltage Vreg-power supply current IDD characteristics of the Nagata current mirror circuit 21B of the second embodiment.

[0032] As shown in the figure, the Nagata current mirror circuit 21B of the second embodiment has peaking characteristics similar to those of the first embodiment. On the other hand, although the peak regions Vpeak(0.1), Vpeak(0.25), and Vpeak(0.4) according to the threshold voltage Vth are slightly different, they overlap when the voltage Vreg is in the range of 0.8 V to 1.0 V. Therefore, in the second embodiment, the regulator circuit 3B is configured as shown in FIG.

[0033] 8, the regulator circuit 3B includes a transistor M3, a transistor M5 (a fifth transistor), a resistor R4, and a diode D1. The transistors M3 and M5 are N-channel field effect transistors and have the same characteristics as the transistors M1 and M2. Therefore, the threshold voltages Vth of the transistors M1 to M3 and M5 are the same.

[0034] The drain of the transistor M3 is connected to the input terminal TIN2, and the source is connected to the output terminal TOUT2. The transistor M5 is diode-connected with its gate connected to its drain. The transistor M5 and the diode D1 are connected in series between the gate of the transistor M3 and the ground line L2. More specifically, the drain and gate of the transistor M5 are connected to the gate of the transistor M3. The anode of the diode D1 is connected to the source of the transistor M5, and the cathode is connected to the ground line L2.

[0035] According to the regulator circuit 3B configured as described above, a current is supplied to the transistor M5 and the diode D1 via the resistor R4. Since the transistor M5 functions as a diode, the gate voltage of the transistor M3 is the sum of the threshold voltage Vth of the transistor M5 and the forward voltage VD1 of the diode D1 (=Vth+VD1). Therefore, the source voltage of the transistor M3 connected to the output terminal TOUT2 is the gate voltage of the transistor M3 minus the threshold voltage Vth, and the forward voltage VD1 is output from the output terminal TOUT2 as the voltage Vreg. Therefore, the voltage Vreg does not fluctuate and remains almost the same even if the threshold voltage Vth fluctuates, as shown in FIG. 10.

[0036] As shown in FIG. 10, the voltage Vreg saturates at 0.8V to 1.0V. That is, the saturation regions Vsa(0.1), Vsa(0.25), and Vsa(0.4) of the voltage Vreg are 0.8V to 1.0V. On the other hand, as described above, the peak regions Vpeak(0.1), Vpeak(0.25), and Vpeak(0.4) overlap between 0.8V and 1.0V (see FIG. 9). As a result of providing such a regulator circuit 3B, when the power supply voltage VDD becomes high to a certain extent, the power supply current IDD saturates to a constant value as shown in FIG. 11. Then, as shown in FIG. 11 and FIG. 12, the dependency of the power supply current IDD on the power supply voltage VDD and the dependency of the threshold voltage Vth are reduced, and the fluctuation of the power supply current IDD can be reduced.

[0037] 8, the regulator circuit 3B can be configured from N-channel transistors M3 and M5, and does not require a P-channel transistor. This is suitable for forming the high-frequency amplifier 1B using the pHEMT process on a GaAs substrate on which it is difficult to form a P-channel transistor.

[0038] The present invention is not limited to the above-described embodiment, and can be appropriately modified, improved, etc. In addition, the material, shape, size, number, arrangement location, etc. of each component in the above-described embodiment are arbitrary as long as the present invention can be achieved, and are not limited.

[0039] In the above-described embodiment, the regulator circuit 3 has two diode-connected transistors M41 and M42 connected in series between the gate of the transistor M3 and the ground line L2, but this is not limited to this. The number of transistors connected in series between the gate of the transistor M3 and the ground line L2 may be three or more as long as it matches the characteristics of the Nagata current mirror circuit 21. Furthermore, the transistors M41 and M42 and one or more diodes may be connected in series between the gate of the transistor M3 and the ground line L2 in accordance with the characteristics of the Nagata current mirror circuit 21.

[0040] In the above-described embodiment, the regulator circuit 3B has one diode-connected transistor M5 and one diode D1 connected in series between the gate of the transistor M3 and the ground line L2, but this is not limited to this. The number of diodes D1 connected in series between the gate of the transistor M3 and the ground line L2 may be two or more as long as it matches the characteristics of the Nagata current mirror circuit 21B.

[0041] In the above-described embodiments, when the high-frequency amplifier devices 1, 1B are formed on a Si substrate, the regulator circuits 3, 3B are not limited to the configurations shown in Figures 6 and 8, and may use well-known regulator circuits using operational amplifiers.

[0042] In the above-mentioned embodiment, the transistors M1 to M3, M41, M42, and M5 are configured as field effect transistors, but this is not limited thereto. The transistors may be configured as bipolar transistors. In this case, the explanation can be made by replacing the "gate" with the "base," the "source" with the "emitter," and the "drain" with the "collector." [Explanation of symbols]

[0043] 1. High frequency amplifier 3,3B Regulator circuit 21,21B Nagata current mirror circuit (current mirror circuit) C1 Input capacitor C2 Output capacitor D1 Diode L1 Power line (first power line) L2 Ground line (second power line) M1 transistor (first transistor) M2 transistor (second transistor) M3 transistor (third transistor) M41, M42 transistors (fourth transistor) M5 transistor (fifth transistor) R1 Resistor RFIN, RFOUT High frequency signal TIN input terminal Vgnd Ground voltage (= second power supply voltage) Vreg voltage (first power supply voltage) Vsa(0.1) Saturation region Vsa(0.25) Saturation region Vsa(0.4) Saturation region Vpeak(0.1) Peak area Vpeak(0.25) Peak area Vpeak(0.4) Peak area

Claims

1. a first transistor connected between a first power supply line to which a first power supply voltage is supplied and a second power supply line to which a second power supply voltage is supplied; a second transistor connected to the first transistor in a current mirror configuration, for mirroring a drain current or a collector current flowing through the first transistor, having a gate or a base connected to an input terminal via an input capacitor, and a drain or a collector connected to an output terminal via an output capacitor, for amplifying a high frequency signal input to the input terminal and outputting the amplified high frequency signal from the output terminal; a resistor connected between the drain or collector of the first transistor and the gate or base of the first transistor; A current mirror circuit having a regulator circuit connected between a third power supply line to which a third power supply voltage is supplied and the first power supply line, the regulator circuit outputting the first power supply voltage to the first power supply line, the first power supply voltage increasing greatly in response to an increase in the third power supply voltage while the third power supply voltage is low, and outputting the first power supply voltage to the first power supply line, the first power supply voltage being saturated and increasing slightly in response to an increase in the third power supply voltage when the third power supply voltage exceeds a certain value. High frequency amplifier.

2. 2. The high frequency amplifier according to claim 1, the current mirror circuit has different peak regions of the first power supply voltage in which the drain current or the collector current of the second transistor reaches a peak depending on threshold voltages of the first transistor and the second transistor, the regulator circuit outputs the first power supply voltage having a different saturation region according to the threshold voltage, and supplies the first power supply voltage such that the saturation region according to the threshold voltage is included in the peak region according to the threshold voltage. High frequency amplifier.

3. 2. The high frequency amplifier according to claim 1, The regulator circuit includes: a third transistor having a drain or collector connected to the third power supply line and a source or emitter connected to the first power supply line; a plurality of fourth transistors or a plurality of the fourth transistors and a diode connected in series between a gate or a base of the third transistor and the second power supply line; High frequency amplifier.

4. 2. The high frequency amplifier according to claim 1, the current mirror circuit is configured such that at least a part of a peak region of the first power supply voltage where a drain current or a collector current of the second transistor reaches a peak depending on a threshold voltage of the first transistor and a threshold voltage of the second transistor overlap with each other; the regulator circuit outputs the first power supply voltage in the same saturation region according to the threshold voltage, and supplies the first power supply voltage such that the saturation region is included in a region where the peak region according to the threshold voltage overlaps. High frequency amplifier.

5. 2. The high frequency amplifier according to claim 1, The regulator circuit includes: a third transistor having a drain or collector connected to the third power supply line and a source or emitter connected to the first power supply line; a fifth transistor and a diode connected in series between the gate or base of the third transistor and the second power supply line; High frequency amplifier.

6. a first transistor connected between a first power supply line to which a first power supply voltage is supplied and a second power supply line to which a second power supply voltage is supplied; a second transistor connected to the first transistor in a current mirror configuration and mirroring a drain current or a collector current flowing through the first transistor; a resistor connected between the drain or collector of the first transistor and the gate or base of the first transistor; A current mirror circuit having a regulator circuit connected between a third power supply line to which a third power supply voltage is supplied and the first power supply line, the regulator circuit outputting the first power supply voltage to the first power supply line, the first power supply voltage increasing greatly in response to an increase in the third power supply voltage while the third power supply voltage is low, and outputting the first power supply voltage to the first power supply line, the first power supply voltage being saturated and increasing slightly in response to an increase in the third power supply voltage when the third power supply voltage exceeds a certain value. Constant current circuit.

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