Display device

Abstract

To manufacture a semiconductor device and a display device with fewer steps.SOLUTION: A semiconductor device includes a transistor 100 and a pixel electrode 110. The transistor includes a first gate electrode 101, a first insulating layer 102 on the first gate electrode, a semiconductor layer 103 on the first insulating layer, a second insulating layer 105 on the semiconductor layer, and a second gate electrode 106 on the second insulating layer. The first gate electrode includes a region overlapping with the semiconductor layer through the first insulating layer. The second gate electrode includes a region overlapping with the semiconductor layer through the second insulating layer. The pixel electrode is provided on the second insulating layer. In the first region 121, at least part of the second gate electrode corresponds to at least a part of the region overlapping with at least part of the semiconductor layer. The second region 122 is at least part of the region where the pixel electrode is provided. The second insulating layer in the first region is thinner than the second insulating layer in the second region.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device, a display device, a light-emitting device, and a manufacturing method thereof. The present invention relates to a semiconductor device, a display device, a light-emitting device, and a manufacturing method thereof, each of which uses a transistor. Alternatively, the present invention relates to an electronic device using a semiconductor device, a display device, or a light-emitting device. [Background technology]

[0002] In a transistor with a structure in which gate electrodes are placed above and below a semiconductor layer, the on-current is increased. It is known that the threshold voltage can be controlled to reduce the off-current. A transistor with this configuration is called a double-gate transistor or a dual-gate transistor. This type of transistor is called an Al-gate transistor. Hereinafter, this type of transistor will be referred to as It may also be called a bottom-gate transistor having a back gate electrode.

[0003] A bottom-gate type transistor having a back gate electrode is used in, for example, a display device. (See FIG. 7 of Patent Document 1, etc.) [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2010-109342 A Summary of the Invention [Problem to be solved by the invention]

[0005] In the display device described in Patent Document 1, in order to increase the aperture ratio or to add a noise to the pixel electrode, To reduce noise, a planarizing insulating layer is formed over the transistor. The pixel electrode is formed on the insulating layer for the transistor. A semiconductor layer (where a channel is formed) of a transistor is formed under the planarizing insulating layer. The semiconductor layer is disposed close to the substrate.

[0006] In the display device described in Patent Document 1, the back gate electrode is formed in a layer separate from the pixel electrode. Therefore, the display device can be more advantageous than a display device using a transistor having a structure without a back gate electrode. This increases the number of manufacturing steps, which is an issue.

[0007] In order to reduce the number of manufacturing steps for display devices, the back gate electrode and pixel electrode are formed in the same layer. When the transistor is formed, a planarizing insulating layer is formed between the back gate electrode and the semiconductor layer of the transistor. The insulating layer for planarization is generally thick, so the back gate electrode does not function sufficiently. There is a problem that cannot be met.

[0008] One embodiment of the present invention is a semiconductor device using a bottom-gate transistor having a back gate electrode. It is an object of the present invention to manufacture a semiconductor device in fewer steps. The present invention relates to a bottom-gate transistor having a back gate electrode, which can be fabricated in fewer steps. Another object of the present invention is to provide a semiconductor device using a transistor. The present invention relates to a semiconductor device that can apply a strong electric field to a semiconductor layer by using a back gate electrode. Another object of one embodiment of the present invention is to provide a semiconductor device having a controlled threshold voltage. Another object of the present invention is to provide a semiconductor device having a normally It is an object of the present invention to provide a semiconductor device that is easily turned off. One object of one embodiment is to provide a semiconductor device including a transistor with high on-state current. Alternatively, one embodiment of the present invention is a transistor capable of suppressing light from entering a channel or the like. Another object of the present invention is to provide a semiconductor device having a transistor. An object of the present invention is to provide a semiconductor device including a transistor that is not easily deteriorated. Alternatively, one embodiment of the present invention is a method for producing a transparent substrate by using a halftone mask or a graytone mask. To provide a semiconductor device in which the thickness of an insulating layer provided on a channel of a transistor is made different Another object of the present invention is to provide a method for improving a semiconductor device while suppressing an increase in the number of steps. Another object of the present invention is to provide a semiconductor device. One of the objectives of the present invention is to provide a semiconductor device in which an increase in cost is suppressed by suppressing the addition of a new material. Alternatively, one embodiment of the present invention is a transistor with low off-state current that can display an accurate image. Another object of the present invention is to provide a display device capable of performing the above-mentioned. Another object of the present invention is to provide a display device with a high aperture ratio. An object of the present invention is to provide a semiconductor device that generates less noise in pixel electrodes. In one aspect of the present invention, an insulating layer provided under a pixel electrode is provided under a back gate electrode. It is an object of the present invention to provide a semiconductor device having a thickness greater than an insulating layer to be formed.

[0009] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0010] One embodiment of the present invention includes a transistor and a pixel electrode. a first insulating layer on the first gate electrode; a semiconductor layer on the first insulating layer; a second insulating layer on the layer and a second gate electrode on the second insulating layer, has a region overlapping with the semiconductor layer via the first insulating layer, and the second gate electrode has a second The pixel electrode has an area overlapping the semiconductor layer through the insulating layer, and is provided on the second insulating layer. In the first region, at least a portion of the second gate electrode overlaps with at least a portion of the semiconductor layer. The second region is at least a part of the region in which the pixel electrode is provided. At least a portion of the region, the second insulating layer in the first region is The semiconductor device is characterized in that the insulating layer in the first region is thinner than the second insulating layer in the second region.

[0011] The transistor further has a first electrode and a second electrode, and one of the first electrode and the second electrode One of the electrodes can be used as a source electrode and the other as a drain electrode. The layer may be electrically connected to the transistor through an opening provided in the layer.

[0012] The second insulating layer is either a color filter or a black matrix, or It may include both.

[0013] One aspect of the present invention is to form a first gate electrode on an insulating surface, A first insulating layer is formed, and a first gate electrode is formed on the first insulating layer through the first insulating layer. forming a semiconductor layer at least partially overlapping the first region on the semiconductor layer; and a second region, the first region forming a second insulating layer thinner than the second region, the second insulating layer a second insulating layer disposed on the edge layer and at least in contact with at least a portion of the semiconductor layer through the first region of the second insulating layer; a second gate electrode overlapping the second region of the second insulating layer; and forming at least a part of a base electrode.

[0014] One aspect of the present invention is to form a first gate electrode on an insulating surface, A first insulating layer is formed, and a first gate electrode is formed on the first insulating layer through the first insulating layer. forming a semiconductor layer at least partially overlapping the first region on the semiconductor layer; and a second region, the first region being thinner than the second region, and the second region having an opening therethrough. An insulating layer is formed, and a small portion of the semiconductor layer is disposed on the second insulating layer through a first region of the second insulating layer. a second gate electrode at least partially overlapping the second region of the second insulating layer; At least a portion of the wiring is overlapped on the wiring at least partially, and the wiring is inserted through the opening. and forming a pixel electrode in contact with the electrode.

[0015] The second insulating layer is used as a half-tone mask, a gray-tone mask, a phase-shift mask, or may be formed by using a multi-tone mask. Effect of the Invention

[0016] According to one embodiment of the present invention, a bottom-gate transistor having a back gate electrode is A semiconductor device using the same can be manufactured in fewer steps. A semiconductor device using bottom-gate transistors with a back gate electrode that can be fabricated easily Alternatively, a strong electric field can be applied to the semiconductor layer by the back gate electrode. Alternatively, a semiconductor device in which the threshold voltage can be controlled can be provided. Alternatively, a semiconductor device that is easily brought into a normally-off state can be provided. Alternatively, a semiconductor device using a transistor with a large on-state current can be provided. Alternatively, half-tone masks, gray-tone masks, phase shifters, etc. can be provided. A mask for insulating the transistor channel is formed by using a soft mask or a multi-tone mask. It is possible to provide a semiconductor device in which the thickness of the edge layer is made different. It is possible to provide a better semiconductor device while maintaining the above-mentioned characteristics. As a result, a semiconductor device can be provided with reduced cost. To provide a display device capable of performing accurate display using transistors with low current. Alternatively, a display device having a high aperture ratio can be provided. It is possible to provide a display device with less noise to the pixel electrodes. The insulating layer provided under the back gate electrode is thicker than the insulating layer provided under the back gate electrode. This can be done. [Brief description of the drawings]

[0017] [Figure 1] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 2] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 3] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 4] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 5]1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 6] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 7] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 8] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 9] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 10] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 11] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 12] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 13] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 14] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 15] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 16] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 17] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 18] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 19] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 20] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 21] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 22] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 23] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 24] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 25] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 26] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 27] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 28] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 29] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 30] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 31] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 32] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 33] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 34] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 35] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 36] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 37] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 38] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 39] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 40] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 41] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 42] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 43] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 44] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 45] 1 is a cross-sectional view showing a structure of a semiconductor device. [Diagram 46] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 47] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 48] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 49] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 50] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 51] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 52] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 53] FIG. 1 is a top view showing a structure of a semiconductor device. [Figure 54] FIG. 1 is a top view showing a structure of a semiconductor device. [Figure 55] FIG. 1 is a circuit diagram showing a configuration of a semiconductor device. [Figure 56] FIG. 1 is a circuit diagram showing a configuration of a semiconductor device. [Figure 57] FIG. 1 is a circuit diagram showing a configuration of a semiconductor device. [Figure 58] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 59] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 60] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 61] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 62] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 63] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 64] 1A to 1C illustrate a method for manufacturing a semiconductor device. [Figure 65] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 66] 1 is a cross-sectional view showing a structure of a semiconductor device. [Figure 67] FIG. [Figure 68] FIG. [Figure 69] 1A to 1C illustrate a structure of an oxide semiconductor layer. [Figure 70] 1A to 1C illustrate a structure of an oxide semiconductor layer. [Figure 71] 1A to 1C illustrate a structure of an oxide semiconductor layer. [Figure 72] FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Hereinafter, the embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications and details may be made to the present invention. The present disclosure should not be construed as being limited to the description of the following embodiment. In the configurations described below, the same parts or parts having similar functions are denoted by the same reference numerals. These figures are commonly used in the following drawings, and their repeated explanations will be omitted.

[0019] In addition, the contents (or even a part of the contents) described in one embodiment may be used in the embodiment. Another content (or a part of the content) described in the form, and / or one or more other implementations The contents (or a part of the contents) described in the embodiments may be applied, combined, or replaced. It is possible to do things like:

[0020] In addition, the configuration of a figure (or a part thereof) described in one embodiment may differ from that of the figure. The configuration of the part, the configuration of another figure (or part) described in the embodiment, and / or The present invention is combined with the configuration of the figure (or a part thereof) described in one or more other embodiments. It can be adjusted.

[0021] In addition, in the figures, the size, thickness, or area may be exaggerated for clarity. Therefore, one aspect of the embodiment of the present invention is not necessarily limited to that scale. The drawings are merely schematic illustrations of ideal examples. The shape is not limited to the shape shown in the figure. For example, there may be variations in shape due to manufacturing techniques, errors, etc. It is possible to include variations in shape due to the above.

[0022] When it is explicitly stated that X and Y are connected, it means that X and Y are electrically connected. X and Y are connected functionally, X and Y are directly connected, Here, X and Y are objects (e.g., devices, elements, circuits, etc.). Therefore, a given connection relationship is For example, the present invention is not limited to the connection relationships shown in the drawings or text, and may be modified in any manner without departing from the spirit or scope of the present invention. This also includes things other than relationships.

[0023] An example of the case where X and Y are electrically connected is The elements that function as One or more diodes (e.g., diodes) can be connected between X and Y.

[0024] An example of a case where X and Y are functionally connected is a case where a functional connection between X and Y is possible. It is possible to connect one or more circuits between X and Y. For example, If the signal output from X is transmitted to Y even if there is another circuit between X and Y, It is assumed that X and Y are functionally connected.

[0025] In addition, when it is explicitly stated that X and Y are electrically connected, it means that X and Y are electrically connected. There are three cases: when X and Y are electrically connected, when X and Y are functionally connected, and when X and Y are directly connected. In other words, the term "electrically connected" includes "connected" and "not connected" explicitly. If the item is listed in the "Connected" section, it is the same as if it were explicitly stated that the item is connected. Let's say there is.

[0026] In addition, the circuit diagram shows that independent components are electrically connected to each other. Even if the wiring is a single layer, in reality, for example, some of the wiring may function as an electrode. In some cases, the conductive layer may have the functions of multiple components such as wiring and electrodes. In this specification, the term "electrically connected" refers to a state in which one conductive layer functions as a plurality of components. If both of these are present, they will also be included in this category.

[0027] (Embodiment 1) In this embodiment, one embodiment of a semiconductor device (a display device, a light-emitting device, etc.) of the present invention will be described. This will be described with reference to the drawings.

[0028] A cross-sectional view of a semiconductor device according to one embodiment of the present invention is shown in FIG. The transistor 100 and the electrode 110 are disposed on an insulating substrate 200. The photodiode 100 includes an electrode 101, an insulating layer 102 on the electrode 101, and a semiconductor layer on the insulating layer 102. A semiconductor layer 103, an insulating layer 105 on the semiconductor layer 103, and an electrode 106 on the insulating layer 105. The electrode 101 has a region overlapping with the semiconductor layer 103 via the insulating layer 102. The electrode 106 has an area overlapping with the semiconductor layer 103 through the insulating layer 105. , is provided on the insulating layer 105. In the region 121, at least a part of the electrode 106 is a semiconductor. This is at least a part of the area that overlaps with at least a part of layer 103. Region 1 Region 22 is at least a part of the region where electrode 110 is provided. The insulating layer 105 in region 1 is thinner than the insulating layer 105 in region 122. The semiconductor device has a region 121 and a region 122 that is thicker than the region 121. The region 121 is connected to the electrode 106 and the semiconductor The region 122 is at least a part of the region where the electrode 110 overlaps with the body layer 103. It can be said that there is at least some overlap.

[0029] Here, the electrode 101 serves as the first gate electrode of the transistor 100, and the electrode 106 serves as the second gate electrode of the transistor 100. It can function as a second gate electrode (backgate electrode) of the transistor 100. The electrode 110 can also function as a pixel electrode. Since the electrode 106 overlaps the semiconductor layer 103 through a thin region (region 121), the electrode 106 The electrode 110 and the electrode 106 are made of the same conductive film etched. In this case, the electrode 110 and the electrode 10 Electrode 110 and electrode 106 have the same material and approximately the same thickness. The conductive film may be etched. In the case of chipping, the number of process steps can be reduced.

[0030] The transistor has a first gate electrode and a second gate electrode (back gate electrode). However, one aspect of the embodiment of the present invention is not limited to this. First, only either the first gate electrode or the second gate electrode (back gate electrode) For example, as shown in FIG. 66(C), it is possible to have one electrode and not the other. In such a case, the transistor can function as a transistor. It is possible to do so.

[0031] In FIG. 1A, the transistor 100 further includes an electrode 104a and an electrode 104b. One of the electrodes 104a and 104b is used as a source electrode, and the other is used as a drain electrode. In FIG. 1A, the electrode 104a and the electrode 104b are disposed above the semiconductor layer 103. (For example, the electrodes 104a and 104b are in contact with the upper and side surfaces of the semiconductor layer 103. The lower surface of the semiconductor layer 103 and the electrodes 104a and 104b are disposed as follows: Not in contact.

[0032] Note that it is preferable that the transistor has both a source electrode and a drain electrode. However, one aspect of the embodiment of the present invention is not limited to this, and the transistor may have a source electrode Alternatively, it is possible to have only one of the drain electrodes and not the other, and both In such a case, the transistor may not have the semiconductor layer 10. 3 to connect to another element (e.g., another transistor), A transistor having a channel formed in 103 can function normally.

[0033] A transistor is defined as a transistor having at least three terminals including a gate, a drain, and a source. The drain (also called drain terminal, drain region or drain A channel region is between the source (source terminal, source region or source electrode) and the and a current can flow through the drain, the channel region, and the source. Here, the source and drain are different depending on the structure or operating conditions of the transistor. Therefore, it is difficult to determine which is the source and which is the drain. The part that functions as a source and the part that functions as a drain are called the source and drain. In that case, for example, one of the source and the drain may be connected to the first terminal, The other of the source and drain is referred to as a second terminal, a second electrode, or a first region. This may be referred to as the second area.

[0034] The electrode 110 is electrically connected to the transistor 100 through an opening provided in the insulating layer 105. can be connected to

[0035] In addition, when explicitly stating "Y on top of X" or "Y on top of X", X It is not limited to Y being directly on top of X. This also includes cases where there is another object between X and Y. Here, X and Y are objects (e.g. For example, a device, an element, a circuit, a wiring, an electrode, a terminal, a conductive film, a layer, etc.

[0036] Thus, for example, if a description explicitly states "layer Y on (or on) layer X," In this case, layer Y is directly above layer X, and layer X is directly above another layer (e.g. This includes cases where there is a layer (e.g. layer Z) and layer Y is directly on top of it. The other layer (eg, layer Z) may be a single layer or multiple layers (laminate).

[0037] Furthermore, the same applies when it is explicitly stated that "Y is above X." It is not limited to Y being directly on top of X, but may also be the case where another object is between X and Y. For example, if we say "above layer X, layer Y is located," we mean the layer X. There is layer Y directly above and there is another layer (say layer Z) directly above and in contact with layer X. This includes the case where layer Y is directly on top of it. Z, etc.) may be a single layer or a multi-layer (laminate).

[0038] The same applies to the case where there is a Y below an X, or a Y below an X.

[0039] As shown in FIG. 9A, the electrodes 104a and 104b of the semiconductor layer 103 are For example, the thickness of the area that does not overlap with the electrode 104a and the electrode 104b may be thin. When etching is performed to form the layers that will become the electrodes 104a and 104b, A part of the surface of the semiconductor layer 103 existing in the lower layer may be etched. At least a part of the region of the conductor layer 103 that becomes a channel is thinned. Alternatively, a channel protection film is provided between the upper portion of the channel and the electrodes 104a and 104b. A transistor without a channel etched structure is sometimes called a channel etched transistor.

[0040] One embodiment of the semiconductor device of the present invention is not limited to that shown in FIG. Other configuration examples of the device are shown. Note that the same parts as in FIG. 1(A) are indicated by the same reference numerals. The explanation will be omitted.

[0041] For example, as shown in FIG. 1B, a semiconductor layer 103, an electrode 104a, and an electrode 104b are The insulating layer 107 may be provided between the electrodes 10. When etching is performed to form the semiconductor layer 103 (particularly the , a protective film for preventing the region that will become the channel of the semiconductor layer 103) from being etched. The function of the channel protection film is to form a transistor having a channel protection film. In this case, the semiconductor layer 103 is thinned. Therefore, the S value of the transistor 100 can be improved (reduced).

[0042] In addition, in the case of a channel protection type transistor, as shown in FIG. In 21, it is possible to remove the insulating layer 105. In that case, the electrode 106 and the insulating layer 105 are The electrode 106 is in direct contact with the edge layer 107 in a portion thereof. As a back gate electrode, it becomes possible to apply a stronger electric field to the semiconductor layer 103. .

[0043] Alternatively, for example, as shown in FIG. 2A, the electrodes 104a and 104b may be formed of a semiconductor layer. 103 (for example, the upper surface and part of the end surface of the electrode 104a and the electrode 104b are the semiconductor layer In this way, the semiconductor layer 1 03 is to prevent damage when etching the electrodes 104a and 104b. Alternatively, the semiconductor layer 103 can be made thin, improving the S value (S You can reduce the value.

[0044] Alternatively, for example, as shown in FIG. 3A, the end 131a and the end 131b of the semiconductor layer 103 are 31b and the ends 132a and 132b of the electrodes 104a and 104b are approximately aligned. Such a semiconductor layer 103, the electrode 104a, and the electrode 104 may have a shape similar to that described above. In step b, a semiconductor film and a conductive film on the semiconductor film are etched using the same mask. The mask can be formed by performing a masking process. A photomask having three or more regions with different A mask having a tone, a phase shift, or a multi-tone mask can be used. By using a half-tone mask, the semiconductor layer 103 is exposed and the semiconductor layer The region where 103 is removed is formed by an etching process using one mask. In this way, the number of steps for manufacturing the transistor 100 can be further reduced, and the semiconductor device can be further improved. In addition, the semiconductor layer 10 can be formed by using a half-tone mask. When the electrode 104a and the electrode 104b are formed, The semiconductor layer 103 is necessarily present underneath. 132b may also be stepped.

[0045] Alternatively, as shown in FIG. 3B, in the configuration shown in FIG. 3A, In this way, in the case other than that shown in FIG. Even if a channel protection film is not provided, in various transistors that do not have a channel protection film, It is possible to add additional units.

[0046] Alternatively, for example, as shown in FIG. 9A, the semiconductor layer 103, the electrode 104a, and the electrode 10 4b, a conductive layer 108a and a conductive layer 108b may be provided between the conductive layer 108a and the conductive layer 108b. The conductive layer 108a and the conductive layer 108b are, for example, a conductive material having an impurity element added thereto. Alternatively, the conductive layer 108a and the conductive layer 108b may be formed using a semiconductor layer. 08b may be formed using a conductive metal oxide. Alternatively, for example, a conductive layer The conductive layer 108a and the conductive layer 108b are made of conductive gold to which an impurity element that provides conductivity is added. In the case of FIG. 1(A), the semiconductor An impurity element that imparts electrical conductivity may be added to a portion of the layer 103. Examples of impurity elements that impart this include phosphorus, arsenic, boron, hydrogen, and tin.

[0047] In FIG. 9A, the electrodes 104a and 104b of the semiconductor layer 103 are In addition, the thickness is reduced in the area where the conductive layer 108a and the conductive layer 108b do not overlap. This is because the electrodes 104a and 104b, and the conductive layers 108a and 108b are When etching is performed to form the layers 104a and 104b, In addition, the semiconductor layer 103 existing under the layer that will become the conductive layer 108a and the conductive layer 108b This is because part of the surface is etched (channel etched type transistor). In addition, a channel protective film is provided between the semiconductor layer 103 and the conductive layer 108a and the conductive layer 108b. By doing so, the semiconductor layer 103 may be prevented from being etched (channel protection type transistor).

[0048] In the above, the electrode 110 and the electrode 106 are formed using the same layer. However, the present invention is not limited to this, and the electrode 110 and the electrode 106 may be formed using different layers. .

[0049] Alternatively, between the electrode 104a and the semiconductor layer 103 or between the electrode 104b and the semiconductor layer 103, An insulating layer is provided between the electrodes 104a and 104b and the conductive layers 108a and 108b. Then, an opening is provided in the insulating layer, and the electrode 104a and the electrode 104b are inserted. 104b and the semiconductor layer 103, or the electrode 104a and the electrode 104b and the conductive layer The conductive layer 108a and the conductive layer 108b may be connected to each other.

[0050] It should be noted that various substrates can be used as the substrate having the insulating surface 200. The type of the substrate is not limited to a specific one. An example of the substrate is a semiconductor substrate (e.g. (e.g. single crystal substrate or silicon substrate), SOI substrate, glass substrate, quartz substrate, plastic substrate Plate, metal substrate, stainless steel substrate, substrate with stainless steel foil, Tungsten substrate, substrate with tungsten foil, flexible substrate, laminated film , paper containing fibrous materials, or base films.

[0051] Note that the transistor 100 is formed on a substrate, and then the transistor is formed on a substrate different from the substrate. By transposing the transistor 100, the transistor 100 is placed on the other substrate. Good too.

[0052] As described above, Figs. 1(A), 1(B), 2(A), 3(A), 3(B), and 9 In the transistor 100 shown in (A) and the like, the threshold voltage Therefore, it is possible to effectively control the normally-off state. Alternatively, the on-current can be effectively increased by the back gate electrode. Alternatively, the off-current can be effectively reduced by the back gate electrode. Alternatively, the on / off ratio can be increased by using a back gate electrode. Therefore, by adopting the above-mentioned configuration in a display device, the display device can perform accurate display. Alternatively, the above-mentioned configuration can be used in a display device or a light-emitting device, and the insulating layer 105 can be used as a planarizing film. By making the above function, the aperture ratio can be increased.

[0053] This embodiment is one of the basic examples of the configuration according to one aspect of the present invention. Therefore, to change, add, modify, delete, adapt, generalize, or The present invention can be freely combined with other embodiments that correspond to the lower conceptualizations. Cut.

[0054] (Embodiment 2) In this embodiment, one embodiment of a semiconductor device (a display device, a light-emitting device, etc.) of the present invention will be described. This will be described with reference to the drawings.

[0055] In the first embodiment, Figs. 1(A), 1(B), 2(A), 3(A), and 3(B) 9(A) and the like, the insulation in the region 122 or a part thereof Layer 105 may be a stack of multiple layers. 105 has a stack of m layers (m is a natural number of 2 or more). The insulating layer 105 in the embodiment has a single layer or a stack of layers equal to or less than m. Alternatively, the insulating layer 105 may include an organic insulating layer. 5 may include a laminate of an organic insulating layer and an inorganic insulating layer.

[0056] For example, the above-mentioned Figs. 1(A), 1(B), 2(A), 3(A), 3(B), In the configuration shown in FIG. 9(A), the insulating layer 105 in the region 122 is made up of a layer 105a and a layer The insulating layer 105 in the region 121 may have a single layer of the layer 105a. The layer 105b is formed above the layer 105a. C), Fig. 1(D), Fig. 2(B), Fig. 3(C), Fig. 3(D), Fig. 9(B). By using this structure, the difference in the ease of etching (selectivity) can be utilized to selectively etch the required area. By etching only the layer 105a and the layer 105b, a stack of layers can be formed. As a result, the film thickness of the insulating layer 105 in each region can be easily controlled. Or, depending on the film quality, different functions (e.g., flattening function, blocking function of impurities, Each region can be appropriately provided with a function such as light shielding. By using a photosensitive material, the number of process steps can be reduced.

[0057] Here, the layer 105a may be an inorganic insulating layer, and the layer 105b may be an organic insulating layer. In this case, since an organic material is used, it is possible to make layer 105b thicker than layer 105a. By using an inorganic insulating layer (more preferably a silicon nitride film) as the layer 105a, For example, impurities in layer 105b can be prevented from entering transistor 100. Alternatively, layer 105b may be an organic insulating layer, which may function as a planarizing layer. Since this can function, it is possible to reduce unevenness caused by the transistor 100 and the like. In this way, the surface on which the electrode 110 is formed can be made flat. When the electrode 110 is used as a pixel electrode, display defects can be reduced. Since the thickness of the layer 105b can be increased, noise to the pixel electrode can be reduced. Or, the etching selectivity differs depending on the film quality, so the necessary part Only the layer 105a and the layer 105b are selectively etched to form a laminate of layers 105a and 105b having a predetermined shape. It is possible to do so.

[0058] Alternatively, the layer 105a and / or the layer 105b (or a portion thereof) may be (more preferably Alternatively, the layer 105b may be a color filter and / or a black matrix. By using a color filter and / or a black matrix, the transistor 1 A substrate on which the insulating surface 200 is provided and another substrate (for example, a substrate for a display device) are provided. It is possible to increase the bonding margin with the opposing substrate in the transformer. In the layer 105a and / or layer 105b (or a part thereof) adjacent to the transistor 100, By using a black matrix, it is possible to prevent light from entering the transistor 100. The difficulty in receiving light reduces the off-state current of the transistor 100 and the For example, as shown in FIG. 65(A), A black matrix 652 may be provided in a portion of the substrate 05b. As a matrix, a configuration in which multiple color filters of different colors are stacked can also be used. .

[0059] The color filter and / or the black matrix are formed using an organic material. Therefore, it is preferable to form the layer 105b. There is no limitation, and a conductive film having a light-shielding property can also be used as the black matrix.

[0060] Alternatively, the thickness of the layer 105a may be thinner than the thickness of the layer 105b. By reducing the thickness, the electric field from the electrode 106 can be sufficiently supplied to the channel. Alternatively, by increasing the thickness of the layer 105b, the transistor 100 etc. The unevenness can be sufficiently reduced.

[0061] Alternatively, for example, the above-mentioned Figs. 1(A), 1(B), 2(A), 3(A), and 3( 9(A) and the like, the insulating layer 105 in the region 122 is the layer 10 5b and layer 105c, and the insulating layer 105 in the region 121 is a single layer of layer 105c. The layer 105c is formed above the layer 105b. , Fig. 26(A), Fig. 26(B), Fig. 27(A), Fig. 28(A), Fig. 28(B), Fig. 34( By using this structure, the difference in the ease of etching (selectivity) By using the above, only the necessary portions are etched, and the stacking of the layers 105b and 105c is reduced. As a result, it is easy to control the film thickness in each region of the insulating layer 105. Or, depending on the film quality, different functions (e.g., flattening function, impurity removal function) can be achieved. Each area can be given appropriate functions (such as blocking light and blocking light). Alternatively, some layers can be formed using photosensitive materials, reducing the number of process steps. It is possible to eliminate it.

[0062] Here, the layer 105b may be an organic insulating layer, and the layer 105c may be an inorganic insulating layer. In this case, since an organic material is used, it is possible to make layer 105b thicker than layer 105c. By forming the layer 105c as an inorganic insulating layer (more preferably, a silicon nitride film), the layer 1 The impurities in 05b may enter the electrode 106 or a layer provided on the electrode 106 (for example, a liquid crystal layer, an alignment film, Alternatively, the layer 105b can be made of an organic insulating material to prevent the organic EL layer, etc. By using the organic insulating layer as an edge layer, the organic insulating layer can be used as a planarizing layer, and the transistor 100, etc. In this way, the surface on which the electrode 110 is formed can be made flat. Therefore, for example, when the electrode 110 is used as a pixel electrode, the display Alternatively, the thickness of the layer 105b can be increased, This can reduce noise to pixel electrodes. Also, the difference in film quality can reduce etching noise. Since the etching selectivity is different, only the necessary parts can be selectively etched to obtain a layer of a desired shape. A stack of layers 05b and 105c can be formed.

[0063] Alternatively, layer 105b and / or layer 105c (or a portion thereof) may be (more preferably Alternatively, the layer 105b may be a color filter and / or a black matrix. By using a color filter and / or a black matrix, the transistor 1 A substrate on which the insulating surface 200 is provided and another substrate (for example, a substrate for a display device) are provided. It is possible to increase the bonding margin with the opposing substrate in the transformer. In the layer 105b and / or layer 105c (or a part thereof) adjacent to the transistor 100, By using a black matrix, it is possible to prevent light from entering the transistor 100. Since the light is less likely to enter, the off-state current of the transistor 100 can be reduced and / or Alternatively, it is possible to reduce deterioration of the transistor 100. For example, in FIG. As shown, a black matrix 652 may be provided in a portion of layer 105b. The black matrix is ​​made up of multiple color filters of different colors. It is also possible to be there.

[0064] The color filter and / or the black matrix are formed using an organic material. Therefore, it is preferable to form the layer 105b. There is no limitation, and a conductive film having a light-shielding property can also be used as the black matrix.

[0065] Alternatively, the thickness of the layer 105c may be smaller than the thickness of the layer 105b. By reducing the thickness, the electric field from the electrode 106 can be sufficiently supplied to the channel. Alternatively, by increasing the thickness of the layer 105b, the transistor 100 etc. The unevenness can be sufficiently reduced.

[0066] Alternatively, for example, the above-mentioned Figs. 1(A), 1(B), 2(A), 3(A), and 3( 9(A) and the like, the insulating layer 105 in the region 122 is the layer 10 5a, layer 105b and layer 105c are stacked, and the insulating layer 105 in the region 121 is layer 105a. Such a structure may be a laminate of layers 105a and 105c. D), Fig. 27(B), Fig. 28(C), Fig. 28(D), and Fig. 34(B). By using the difference in the ease of etching (selectivity), the necessary parts can be etched. By etching only the layer 105a, the layer 105b, and the layer 105c are formed as a stack. As a result, it becomes easier to control the film thickness of the insulating layer 105 in each region. Or, depending on the film quality, different functions (e.g., flattening function, blocking impurities) can be performed. Each area can be given appropriate functions (such as a function to block light, a function to block light, etc.). The layers can be formed using photosensitive materials, reducing the number of process steps. is possible.

[0067] Here, the layer 105a is an inorganic insulating layer, the layer 105b is an organic insulating layer, and the layer 105c is an inorganic insulating layer. In this case, since an organic material is used, the layers 105a and 105c are It is possible to make layer 105b thicker than layer 105a. For example, the impurities in the layer 105b are not absorbed by the transistor. Alternatively, the layer 105c can be made of an inorganic insulating layer ( Preferably, the layer 105b is a silicon nitride film, so that impurities in the layer 105b do not penetrate into the electrode 106 or the electrode 107. The layer 105b is an organic insulating layer. By forming the organic insulating layer as a planarization layer, the organic insulating layer can be used as a planarization layer for the transistor 100, etc. In this way, the surface on which the electrode 110 is formed can be made flat. Therefore, for example, when the electrode 110 is used as a pixel electrode, display defects can be prevented. Alternatively, the thickness of the layer 105b can be increased, so that the image It is possible to reduce noise to the element electrodes. The film quality of the layers 105b and 105c can be made different. By utilizing the difference in the etching selectivity between the two layers, only the necessary parts are selectively etched. In this way, a laminate of layers 105a, 105b, and 105c having a predetermined shape can be formed.

[0068] Alternatively, layers 105a, 105b, and / or 105c (or portions thereof) may be (More preferably, layer 105b) and a color filter and / or a black matrix. By using a color filter and / or a black matrix, A substrate on which the transistor 100 is provided (a substrate having an insulating surface 200) and another substrate (e.g. In addition, it is possible to increase the margin for bonding with the opposing substrate in a display device. Alternatively, the layers 105a, 105b, and / or 105c ( By using a black matrix for the transistor 100 (or a part thereof), By making it difficult for light to enter the transistor 100, It is possible to reduce the off-state current of the transistor 100 and / or reduce deterioration of the transistor 100. For example, as shown in FIG. 65(C), the black matrix is ​​formed in a part of the layer 105b. As the black matrix, a color filter having a different color may be provided. It is also possible to use a configuration in which multiple filters are stacked.

[0069] The color filter and / or the black matrix are formed using an organic material. Therefore, it is preferable to form the layer 105b. There is no limitation, and a conductive film having a light-shielding property can also be used as the black matrix.

[0070] Each of the layers 105a, 105b, and 105c may be a single layer or a plurality of layers. It may be a laminate of layers.

[0071] In this embodiment, part or all of the first embodiment may be changed, added, modified, deleted, or It corresponds to the application, superordinate concept, or subordinate concept. It can be freely combined with or substituted for any other embodiment.

[0072] (Embodiment 3) In this embodiment, one embodiment of a semiconductor device (a display device, a light-emitting device, etc.) of the present invention will be described. This will be described with reference to the drawings.

[0073] In the first embodiment, Figs. 1(A), 1(B), 2(A), 3(A), and 3(B) 9A and the like, in the vicinity of the channel of the transistor 100, However, the insulating layer 105 is thinned in the region ( The range of the region 121 is not limited to this. The range of the region 121 is a part of the vicinity of the channel. For example, the configuration shown in FIG. 1(A) can be changed to the configuration shown in FIG. In FIG. 66(A), the range of the region 121 is a part of the vicinity of the channel (FIG. 1(A)). The configurations of the figures other than FIG. 1(A) are changed in the same manner. Alternatively, the range of the region 121 may be the entire vicinity of the transistor 100. For example, the vicinity of the transistor 100 (e.g., Insulating layer 1 is formed in the area where electrode 106 overlaps electrode 104a and / or electrode 104b. 05 may be thinned.

[0074] In the second embodiment, Figs. 1(C), 1(D), 2(B), 3(C), 3(D), Fig. 9(B), Fig. 26(A), Fig. 26(B), Fig. 27(A), Fig. 28(A), Fig. 28(B), Fig. 34(A), Fig. 26(C), Fig. 26(D), Fig. 27(B), Fig. 28(C) 28(D), 34(B), 65(A), 65(B), 65(C), etc. In this structure, the layer 105b near the channel of the transistor 100 is removed, and the insulating layer 105 However, the area where the layer 105b is removed is not limited to this. The region where the layer 105b is removed may be a part of the vicinity of the channel. The configuration shown in FIG. 66(C) can be changed to the configuration shown in FIG. 66(B). The range of the region 121 is a part of the vicinity of the channel (a narrower range than the region 121 in FIG. 1(C)). The configurations of the figures other than FIG. 1(C) can be changed in the same manner. The range of 21 may be the entire vicinity of the transistor 100 or may be a larger range. For example, Fig. 1(C), Fig. 1(D), Fig. 2(B), Fig. 3(C), Fig. 3(D), Fig. 9(B), Fig. 26(C), Fig. 26(D), Fig. 27(B), Fig. 28(C), Fig. 28(D), In the configuration shown in FIG. 34B, the layer 105b near the transistor 100 is removed. For example, the insulating layer 105 may be thinned. Layer 105b may be removed in the area where it overlaps with 104b. This configuration is shown in FIG. ,Fig. 2(D),Fig. 2(C),Fig. 3(E),Fig. 2(E),Fig. 9(C),Fig. 26(E),Fig. 7(D), 27(C), 28(E), 27(E), and 34(C).

[0075] 26(E), 27(D), 27(C), 28(E), 27(E), In the configuration shown in FIG. 34(C), in part or all of the area where layer 105b has been removed, Optionally, either layer 105a or layer 105c may be removed.

[0076] In the vicinity of the transistor 100 (e.g., the electrode 106 is connected to the electrode 104a and / or the electrode 10 In the configuration in which the insulating layer 105 is thinned in the region overlapping with the electrode 106, the electrode 106 is The capacitance value of the parasitic capacitance formed by overlapping with the electrodes 104a and 104b is increased. Therefore, the parasitic capacitance can be actively used as a storage capacitance. For example, the storage capacitor can be used as a storage capacitor for a pixel. Even if the insulating layer 105 is thinned in the vicinity of the transistor 100, a certain amount of If a potential is applied, the potential is applied to the electrode 104a and / or the electrode 104b. However, one aspect of an embodiment of the present invention is not limited to this.

[0077] On the other hand, when a fluctuating potential (such as a pulse potential) is applied to the electrode 106 (for example, the electrode 101 In the case where a signal similar to the signal input to the electrode 106 is input to the electrode 106, Reduce the effect of changes in the potential of the electrodes 104a and / or 104b on the potential of the electrodes 104a and / or 104b. In order to achieve this, an insulating layer is provided between the electrode 106 and the electrode 104a and / or the electrode 104b. It is desirable to increase the thickness of 105. For example, the thickness of the electrode 106 and the electrode 104a and / or It is desirable to have layer 105b between electrode 104b and the electrode 106. Reduce the effect of changes in the potential of the electrodes 104a and / or 104b on the potential of the electrodes 104a and / or 104b. For example, the electrode 104b is connected to the electrode 110, and noise is prevented from being introduced into the signal input to the electrode 110. Therefore, when the electrode 110 is used as a pixel electrode, the display of the display device However, one aspect of the embodiment of the present invention is not limited to this. stomach.

[0078] The electrode 106 may be formed over the entire region 121, or may be formed over at least a part of the region 121. In addition, an electrode 106 may be formed on a part of the electrode 104. a and / or electrode 104b overlap with electrode 106, so that the Reduce the effect of changes in the potential of the electrodes 104a and / or 104b on the potential of the electrodes 104a and / or 104b. It is possible to do so.

[0079] Alternatively, the transistor 100 may be used in a driver circuit (for example, a scanning line for inputting a signal to a pixel). When forming a driving circuit or a signal line driving circuit, the entire area above the driving circuit may be the region 121. For example, the entire layer 105b above the drive circuitry may be removed. Since there is no need to provide a display element for displaying an image, planarization by the layer 105b is not required. Alternatively, the entire layer 105b above the driving circuitry may be removed, It is possible to increase the capacitance (parasitic capacitance) formed by the electrodes and wiring. The capacitance element (parasitic capacitance) for the bootstrap operation and the dynamic circuit The capacitance element (parasitic capacitance) can be increased. Alternatively, the entire layer 105b on the driving circuit can be When removing the layer 105b, there is no need for a margin to leave a part of the layer 105b, so the entire driving circuit In this case, the layout area of ​​the transistor 100 included in the driving circuit can be reduced. The electrodes 106 of multiple transistors 100 may be electrically connected to each other. Alternatively, a plurality of the transistors 100 included in the driver circuit may be In this embodiment, the electrodes 106 may or may not be separated from each other.

[0080] In this embodiment, some or all of the first and second embodiments are modified or added. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as embodiment 1 or embodiment 2, or may be replaced with any other embodiment. This can be implemented by replacing the above.

[0081] (Embodiment 4) In this embodiment, one embodiment of a semiconductor device (a display device, a light-emitting device, etc.) of the present invention will be described. This will be described with reference to the drawings.

[0082] In the configuration examples of the semiconductor device or the like shown in the first to third embodiments, An example of the configuration of the connection portion between 110 and electrode 104b is shown.

[0083] Electrode 110 and electrode 104 when insulating layer 105 has a laminate of layers 105a and 105b An example of the configuration of the connection portion b will be described with reference to FIGS.

[0084] FIG. 4A shows the configuration shown in FIG. 1C and the electrode 110 and the electrode 104 in the configuration. In the enlarged view of FIG. 4(A), the edge of the opening of layer 105a is The ends of the openings in the layer 105b and the layer 105c are generally aligned. After forming a laminated film of film A which becomes layer 105a and film B which becomes layer 105b, the same photomask is used. It can be formed by etching film A and film B using a mask.

[0085] The shape of the connection between the electrode 110 and the electrode 104b is not limited to the configuration shown in the enlarged view of FIG. For example, the structure shown in FIG. 4B may be used. In FIG. 4B, the layer 105a The edge of the opening in layer 105a is not aligned with the edge of the opening in layer 105b, and the diameter of the opening in layer 105b is The diameter of the opening is larger than that of 05a (the difference in the diameter of the opening is shown as Δx1 in the figure). For example, the opening is formed by fabricating the structure shown in the enlarged view of FIG. 4(A) and then assembling the layer 105b. When layer 105b is ashed, layer 1 The insulating layer 05b is made of an organic insulating layer. Chemically reacting reactive oxygen molecules, ozone molecules, or oxygen atoms, etc., with the organic layer. Alternatively, the film A which becomes the layer 105a is removed by ashing it. After forming a laminated film of film B which becomes layer 105b, film A and film B are etched using a photomask. After etching, the etched film B is further etched using another photomask. Alternatively, the layer 105a may be formed by a film A and a film B. After forming a laminated film of film B which will become layer 105b, film B is etched using a photomask. After the photomask is applied, the film A is etched using another photomask to form the film B. When film A and film B are etched using different photomasks, for example, For example, as shown in FIG. 5B, the diameter of the opening of the layer 105b is set to be equal to that of the layer 105a. The diameter of the opening of 105a can be made even larger (the difference in the diameter of the opening is indicated by Δx3 in the figure). Or, if film A and film B are etched using different photomasks, e.g. For example, as shown in FIG. 5(A), the diameter of the opening in layer 105a is set to be larger than the diameter of the opening in layer 105b. It can also be made larger (the difference in the diameter of the opening is shown as Δx2 in the figure).

[0086] 4 and 5, the electrode 1 is formed of the insulating layer 105 which is a laminate of the layer 105a and the layer 105b. However, the laminated structure of the insulating layer 105 is different from that of the insulating layer 105. Since the structure is not limited to this, the connection between the electrode 110 and the electrode 104b may be determined according to the laminated structure. The portions can be of various configurations.

[0087] For example, when the insulating layer 105 is a laminate of the layer 105b and the layer 105c, the electrode 110 and the electrode An example of the configuration of the connection part of 104b is shown in FIG. 29. FIG. 29(A) shows the same as that shown in FIG. 26(A). FIG. 13 is a diagram showing a configuration in which the electrode 110 and the electrode 104b are connected to each other; In FIG. 29(A), the edge of the opening in layer 105b is not aligned with the edge of the opening in layer 105c. In FIG. 29(B), the diameter of the opening in layer 105b is larger than the diameter of the opening in layer 105c. The edge of the opening of layer 105b is not aligned with the edge of the opening of layer 105c. is larger than the diameter of the opening in layer 105b.

[0088] The openings having the shapes shown in FIG. 29(A) and FIG. 29(B) are formed by, for example, forming the film B which becomes the layer 105b. After the film B is etched using a photomask, the film C that will become the layer 105c is formed. The film C is then etched using another photomask to form the film. The opening having the shape shown in FIG. 29(B) can be formed, for example, by the film B which becomes the layer 105b and the layer 105 After forming a laminated film of film C, which becomes c, films B and C are etched using a photomask. Then, the etched film C is further etched using another photomask. The insulating layer can be formed by:

[0089] Although not shown in FIG. 29, the edge of the opening of the layer 105b and the edge of the opening of the layer 105c may be of generally uniform shape.

[0090] For example, when the insulating layer 105 is a laminate of the layers 105a, 105b, and 105c, An example of the configuration of the connection between the electrode 110 and the electrode 104b is shown in FIG. The configuration shown in FIG. 26(C) and the connection part between the electrode 110 and the electrode 104b in the configuration In FIG. 30(A), the edge of the opening in layer 105a and the edge of the opening in layer 105b are shown. The edge of the opening of layer 105a and the edge of the opening of layer 105b are approximately aligned. The diameter of the openings in layers 105a and 105b is not aligned with the edge of the opening in layer 105c. In FIG. 30(B), the edge of the opening in layer 105a and the edge of the opening in layer 105c are The ends of the openings of the layers 105a and 105c are generally aligned. The edge of the opening in layer 105b is not aligned with the edge of the opening in layer 105a. Larger than the opening diameter of 05c.

[0091] The opening shown in FIG. 30(A) is formed by, for example, film A which becomes layer 105a and film B which becomes layer 105b. A laminated film of film B is formed, and film B and film A are etched using a photomask. Forming a film C that will become 105c, and etching the film C using another photomask. It can be formed by:

[0092] The opening having the shape shown in FIG. 30(B) is formed, for example, by a film A which becomes a layer 105a and a film B which becomes a layer 105b. A laminated film of film B is formed, film B is etched using a photomask, and then layer 105 is formed. Forming film C, which will become film c, and etching film C and film A using another photomask. It can be formed by:

[0093] Although not shown in FIG. 30, the edge of the opening of layer 105a and the edge of the opening of layer 105b The edges of the openings in layer 105c may be flush with each other.

[0094] Or, the end of the opening of the layer 105a, the end of the opening of the layer 105b, and the end of the opening of the layer 105c. In this case, the end of layer 105a may be aligned with the end of layer 105. The end of layer 105b may be covered by layer 105c. It doesn't have to be covered.

[0095] In the configuration shown in FIG. 4 and FIG. 5, the taper angle (in the figure) of the edge of the opening of the layer 105a The taper angle of the opening edge of the layer 105b (indicated as θ1 in the figure) is approximately They may be substantially the same or different from each other. The taper angle of the end of the opening of layer 105b (indicated as θ1 in the figure) and the taper angle of the end of the opening of layer 105c are The angle (indicated by θ3 in the figure) may be approximately the same or may be different from each other. In the configuration shown in FIG. 30, the taper angle of the edge of the opening of the layer 105a (θ2 The taper angle of the opening edge of the layer 105b (indicated by θ1 in the figure), the taper angle of the opening edge of the layer 105c (indicated by θ2 in the figure), The taper angles of the opening ends (indicated as θ3 in the figure) are all approximately the same. Alternatively, the two angles may be approximately the same, or the three angles may be different from each other. good.

[0096] For example, when the layer 105b is thick, the edge of the layer 105b is smoothed as much as possible. For clarity, it is desirable that θ1 be small. For example, it is desirable that θ2 be larger than θ1. For example, it is preferable that θ3 is larger than θ1. One embodiment of the form is not limited to this.

[0097] Here, the taper angle of the end of the layer is the side angle of the end of the layer when observed from the cross-sectional direction. The thickness of each layer is defined as the angle between the tangent line at the bottom of the edge and the bottom surface of the layer. By controlling the thickness, material, and etching conditions for forming openings in each layer, The par angle can be controlled.

[0098] In addition, in Figs. 4, 5, 29, and 30, Figs. 1(C), 26(A), and 26(C) The configuration of the connection between the electrode 110 and the electrode 104b in the configuration shown is shown. However, in the semiconductor device having the other configurations shown in the first to third embodiments, A similar configuration can be applied to the connection portion between the electrode 110 and the electrode 104b. .

[0099] In addition, the structure of the connection portion between the electrode 110 and the electrode 104b shown in Figs. In the embodiment, an opening in the insulating layer 105 is provided to expose any insulating layer provided under the insulating layer 105. The configuration of the connection portion that electrically connects the electrode and any electrode provided on the insulating layer 105 For example, an electrode formed in the same layer as the electrode 110 and an electrode 104b The present invention can also be applied to the configuration of a connection portion with an electrode formed in the same layer as the electrode. 110 and an electrode formed in the same layer as the electrode 110, and an electrode 101 and an electrode formed in the same layer as the electrode 101 The same can also be applied to the configuration of the connection part with the electrode formed. For example, the electrode 106 and the electrode An electrode formed in the same layer as 106, an electrode formed in the same layer as electrode 101, and an electrode formed in the same layer as electrode 101 For example, the same electrode 106 and the same electrode 106 can be used. Connection between an electrode formed on the same layer and the electrode 104b or an electrode formed on the same layer as the electrode 104b The same can be applied to the configuration of parts.

[0100] In this embodiment, some or all of the first to third embodiments are modified or added. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to third embodiments. This can be done.

[0101] (Embodiment 5) In this embodiment, the electrode 106 of the transistor 100 is electrically connected to another electrode or wiring. In the drawings used for the explanation, the same connection as that described in the previous embodiment will be described. The same parts as those in the drawings used in 2. above are designated by the same reference numerals, and the explanation thereof will be omitted.

[0102] For example, the electrode 106 can be electrically connected to the electrode 101. By doing so, it is possible to supply the same potential as that of the electrode 101 to the electrode 106. Therefore, the on-state current of the transistor 100 can be increased. Examples of electrical connections are shown in Figs. 6(A) to 6(E), 7(A) to 7(E), and 8(A). ~Figure 8(E), Figure 9(D), Figure 9(E), Figure 31(A)~Figure 31(E), Figure 32(A)~ This is shown in Fig. 32(E), Fig. 33(A) to Fig. 33(E), Fig. 34(D), and Fig. 34(E). For the various figures described in the first to fourth embodiments, the same electric The electrode 106 and the electrode 101 can be electrically connected, and the figure can be similarly described. come.

[0103] In addition, a transistor 100 is disposed in each pixel to form a pixel matrix consisting of a plurality of pixels. In this case, an opening may be formed for each pixel to electrically connect the electrode 106 to the electrode 101. As a result, the contact resistance and wiring resistance can be reduced. An opening may be formed in each of the electrodes 106 and 101 to electrically connect the electrodes 106 and 101. The area of ​​the electrode 106 can be reduced. , may be performed inside the pixel matrix area or outside the pixel matrix area. By performing this outside the pixel matrix area, the layout surface within the pixel matrix area can be As a result, the aperture ratio can be improved. When the driving circuit is provided outside the matrix region, the electrodes 106 and 101 The electrical connection is preferably made in the region between the drive circuit and the pixel matrix region.

[0104] Or, for example, electrode 106 is electrically connected to electrode 104a or electrode 104b. By connecting in this manner, the electrode 106 can be connected to the electrode 104a or The same potential as that of the electrode 104b can be supplied to the electrode 106. 13(A) to 13(E), 14(A) to 14(E), 15(A) to 15( E), Figures 38(A) to 38(E), Figures 39(A) to 39(E), Figures 40(A) to 4 0(E). Note that this also applies to the various figures described in the first to fourth embodiments. As in these figures, the electrode 106 is electrically connected to the electrode 104a or the electrode 104b. and similarly, diagrams can be described.

[0105] In addition, a transistor 100 is disposed in each pixel to form a pixel matrix consisting of a plurality of pixels. In this case, an opening may be formed for each pixel to electrically connect the electrode 106 to the electrode 104b. Alternatively, an opening may be formed for each set of pixels to electrically connect the electrode 106 to the electrode 104b. In addition, the electrode 106 and the electrode 104b are electrically connected in the pixel matrix region. Alternatively, it may be performed outside the pixel matrix area. In this way, it is possible to reduce the contact resistance and wiring resistance and / or the layout area. Yes, it is possible.

[0106] For example, electrode 106 can be electrically connected to electrode 104b and electrode 110. By connecting in this manner, the electrode 106 can be connected to the electrodes 104b and 110. The same potential can be applied to the electrodes 106, 104b, and 110. Examples are shown in Figs. 16(A) to 16(E), 17(A) to 17(E), and 18(A) to 1 8(E), Figure 41(A) to Figure 41(E), Figure 42(A) to Figure 42(E), Figure 43(A) to 43(E). In the configurations shown in these figures, the electrodes 110 and 106 are the same. In this example, the electrode 110 and the electrode 106 are integrally formed from a conductive film. In addition, although an example in which the electrode 110 and the electrode 106 are formed from the same conductive film has been shown, The electrodes 110 and 106 can be formed by etching different conductive films. Also, the electrode 110 and the electrode 106 may be in contact with each other to form an electrical connection. It should be noted that the various figures described in the first to fourth embodiments may be connected in series. As in these figures, the electrode 106 is electrically connected to the electrode 104b and the electrode 110. and similarly, diagrams can be described.

[0107] For example, the electrode 106 is electrically connected to the electrode 101a formed using the same layer as the electrode 101. Here, the electrodes 101 and 101a are made of the same conductive film. It can be formed by etching using the same mask (reticle). Therefore, the electrodes 101 and 101a are made of the same material. The thickness and the like are approximately the same. An example in which the electrode 106 is connected to the electrode 101a is shown in FIG. Fig. 10(E), Fig. 11(A) to Fig. 11(E), Fig. 12(A) to Fig. 12(E), Fig. 35(A ) to 35(E), 36(A) to 36(E), and 37(A) to 37(E). In addition, the same applies to the various figures described in the first to fourth embodiments as to these figures. Electrode 106 and an electrode formed using the same layer as electrode 101 are electrically connected to each other. and similarly, diagrams can be described.

[0108] In addition, a transistor 100 is disposed in each pixel to form a pixel matrix consisting of a plurality of pixels. In this case, an opening may be formed for each pixel to electrically connect the electrode 106 to the electrode 101a. Alternatively, an opening may be formed for each set of pixels to electrically connect the electrode 106 to the electrode 101a. In addition, the electrical connection between the electrode 106 and the electrode 101a is performed within the pixel matrix region. For example, the electrode 101a may be disposed in the pixel matrix area or outside the pixel matrix area. The capacitance line may be a capacitance line arranged in a trix. The capacitance line may be other wiring, electrodes, conductive By overlapping with a layer or the like via an insulating layer, a capacitance such as a storage capacitance is formed. The electrode 101a is connected to a gate signal line disposed in another pixel, or to another gate in the same pixel. The signal line may be a .

[0109] For example, the electrode 106 is formed using the same layer as the electrodes 104a and 104b. The electrodes 104a and 104b can be electrically connected to each other. The electrode 104c is formed by etching the same conductive film using the same mask (reticle). That is, they are simultaneously patterned. The electrodes 104a, 104b, and 104c are generally the same in terms of material, thickness, etc. 23(A) to 23(E) and 24(A) to 24(E) show examples in which the electrode 106 is connected to the electrode 104c. 4(E), Fig. 25(A)~Fig. 25(E), Fig. 49(A)~Fig. 49(E), Fig. 50(A)~ This is shown in Fig. 50(E) and Fig. 51(A) to Fig. 51(E). Note that Fig. 25(A) to Fig. 25(E) 51(A) to 51(E), the same layer as the semiconductor layer 103 is provided under the electrode 104c. In addition, the semiconductor layer 103a formed in the layer is formed in the semiconductor layer 103b. For the various figures shown above, as well as these figures, the electrodes 106, 104a, and 10 4b, and an electrode formed using the same layer as in 4b can be electrically connected. It can be stated.

[0110] In addition, a transistor 100 is disposed in each pixel to form a pixel matrix consisting of a plurality of pixels. In this case, an opening may be formed for each pixel to electrically connect the electrode 106 to the electrode 104c. Alternatively, an opening may be formed for each set of pixels to electrically connect the electrode 106 to the electrode 104c. In addition, the electrode 106 and the electrode 104c are electrically connected in the pixel matrix region. For example, the electrode 104c may be disposed in the pixel matrix area. The capacitance line may be a capacitance line arranged in a trix. The capacitance line may be other wiring, electrodes, conductive By overlapping with a layer or the like via an insulating layer, a capacitance such as a storage capacitance is formed. The pole 104c may be connected to a signal line, a power line, or another signal line in the same pixel. It can be a signal line or a power line.

[0111] Here, when the electrode 101a or the electrode 104c is used as a capacitance line, the following configuration is applied. This can be done.

[0112] A capacitance line is provided for each pixel row (or each pixel column) of the pixel matrix. The electrode 106 of the transistor 100 of the pixel row (or pixel column) is provided in the pixel row (or pixel column). Alternatively, each pixel row of the pixel matrix may be electrically connected to a capacitance line. (or each pixel column), and a capacitance line is provided for each pixel row (or each pixel column), and the transistor 100 The electrode 106 is provided in the pixel row (or pixel column) adjacent to the pixel row (or pixel column). The capacitance line may be electrically connected to the capacitance line.

[0113] In addition, when one pixel of the pixel matrix has multiple sub-pixels, each sub-pixel row (or A capacitance line is provided for each subpixel row (or each subpixel column), and a transistor for each subpixel row (or each subpixel column) is provided for each The electrode 106 of the capacitor 100 is connected to a capacitance line provided in the corresponding subpixel row (or the corresponding subpixel column). Alternatively, one pixel of the pixel matrix may be electrically connected to a plurality of sub-pixels. In the case where pixels are provided, a capacitance line is provided for each pixel row (or each pixel column), and a capacitance line is provided for each sub-pixel row (or The electrode 106 of the transistor 100 of each pixel row (or each subpixel column) is connected to the Alternatively, the pixel matrix may be electrically connected to a capacitance line provided in the pixel matrix. When a pixel in the array has multiple sub-pixels, each sub-pixel row (or each sub-pixel column) A capacitance line is provided, and the electrode 106 of the transistor 100 of each subpixel row (or each subpixel column) is in the subpixel row (or subpixel column) adjacent to the subpixel row (or subpixel column) The capacitance line may be electrically connected to the capacitance line.

[0114] Multiple capacitance lines can be shared with each other. For example, adjacent pixels (or sub-pixels) ) the capacitance lines can be shared. As a result, the number of capacitance lines can be reduced. do.

[0115] When the electrode 106 of the transistor 100 is electrically connected to a capacitance line, A constant potential (preferably a potential equal to the lowest potential applied to the electrode 101) is applied to the This allows the transistor to be turned on (at or below this potential). The threshold voltage of the electrode 100 can be controlled to make it normally off. 1. Noise caused by capacitive coupling with the electrode 104a, etc. does not enter the electrode 110. It is possible to do so.

[0116] When the electrode 106 of the transistor 100 is electrically connected to a capacitance line, For example, when performing common inversion driving, a pulse signal can be supplied to the counter electrode and The potential of the capacitance line may change with the same amplitude. 06 is supplied with a low potential so that the transistor 100 is turned off. The threshold voltage of the transistor 100 can be controlled to make it normally off.

[0117] When the electrode 106 of the transistor 100 is electrically connected to a capacitance line, A semiconductor layer 103 is sandwiched between a pair of electrodes of a capacitance element formed with a capacitance wire as one electrode. However, one aspect of the embodiment of the present invention is not limited thereto.

[0118] The electrodes 101a and 104c are not limited to capacitance lines and may be other wirings. For example, it can be used as a power supply line, an initialization line, etc. The wiring may be provided in a pixel circuit in a display device using a photoelectric element. Provided in a driving circuit (for example, a scanning line driving circuit or a signal line driving circuit in a display device) It may be wiring.

[0119] In this embodiment, some or all of the first to fourth embodiments are modified or added. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to fourth embodiments. This can be done.

[0120] (Embodiment 6) In this embodiment, the electrode 101 of the transistor 100 (or a layer formed in the same layer as the electrode 101) is 104a or 104b (or an electrode formed on the transistor 100) of the transistor 100. An example of electrical connection between the electrode 104a and the electrode 104b (electrodes formed in the same layer) will be described. The following description will be given with reference to Figs. 19, 44, and 45. The same parts as those in the drawings used for the explanation of the previous embodiment are designated by the same reference numerals, and the explanation thereof will be omitted. .

[0121] In FIG. 19, in the case where layers 105a and 105b are provided as the insulating layer 105, The electrode 101a is formed in the same layer as the electrode 101 of the transistor 100, and the electrodes 104a and An example of electrical connection of electrode 104c formed in the same layer as electrode 104b is shown.

[0122] In the configuration shown in FIG. 19(A), the electrode 104c and the electrode 101a are connected to the layers 105a and 105 and an opening 191 provided in the insulating layer 102, the layer 105a, and the layer 105b. 192 is electrically connected to the electrode 110b.

[0123] In the configuration shown in FIG. 19(B), the electrode 104c and the electrode 101a are provided on the layer 105a. The electrode 1 is formed through the opening 193 and the opening 194 formed in the insulating layer 102 and the layer 105a. That is, the connection between the electrode 104c and the electrode 101a is At minute 109, layer 105b is removed.

[0124] In addition, the layer 105b is removed from the entire connecting portion between the electrode 104c and the electrode 101a. For example, as shown in FIG. 19(C) or FIG. 19(D), Layer 105b may remain in a portion of connection portion 109 between 04c and electrode 101a. .

[0125] In the configuration shown in FIG. 19(C), the electrode 104c and the electrode 101a are provided on the layer 105a. and an opening 196 provided in the insulating layer 102, the layer 105a, and the layer 105b. and are electrically connected by electrode 110b.

[0126] In the configuration shown in FIG. 19(D), the electrode 104c and the electrode 101a are connected to the layers 105a and 105 b, and an opening 198 in the insulating layer 102 and the layer 105a. and are electrically connected by electrode 110b.

[0127] Next, in FIG. 44, in the case where a layer 105b and a layer 105c are provided as the insulating layer 105, In the transistor 100, an electrode 101a is formed in the same layer as the electrode 101, and an electrode 4 shows an example of electrical connection of electrode 104c formed in the same layer as electrode 4a and electrode 104b.

[0128] In the configuration shown in FIG. 44(A), the electrode 104c and the electrode 101a are connected to the layer 105b and the layer 105 and an opening 441 provided in the insulating layer 102, the layer 105b, and the layer 105c. At 442, electrical connection is made by electrode 110b.

[0129] In the configuration shown in FIG. 44(B), the electrode 104c and the electrode 101a are provided on the layer 105c. The electrode 1 is formed through the opening 443 and the opening 444 formed in the insulating layer 102 and the layer 105c. That is, the connection between the electrode 104c and the electrode 101a is At minute 109, layer 105b is removed.

[0130] In addition, the layer 105b is removed from the entire connecting portion between the electrode 104c and the electrode 101a. For example, as shown in FIG. 44(C) or FIG. 44(D), Layer 105b may remain in a portion of connection portion 109 between 04c and electrode 101a. .

[0131] In the configuration shown in FIG. 44(C), the electrode 104c and the electrode 101a are provided on the layer 105c. and an opening 446 provided in the insulating layer 102, the layer 105b, and the layer 105c. and are electrically connected by electrode 110b.

[0132] In the configuration shown in FIG. 44(D), the electrode 104c and the electrode 101a are connected to the layer 105b and the layer 105 and an opening 448 formed in the insulating layer 102 and the layer 105c. and are electrically connected by electrode 110b.

[0133] Next, in FIG. 45, layers 105a, 105b, and 105c are provided as the insulating layer 105. In this case, the electrode 101a is formed in the same layer as the electrode 101 of the transistor 100. and an example of electrical connection of electrode 104c formed in the same layer as electrodes 104a and 104b. Shows.

[0134] In the configuration shown in FIG. 45(A), the electrode 104c and the electrode 101a are connected to the layers 105a and 105 and an opening 451 provided in the insulating layer 102, the layer 105a, the layer 105b, and the layer 105c. 105c is electrically connected to the opening 452 by the electrode 110b. There are.

[0135] In the configuration shown in FIG. 45(B), the electrode 104c and the electrode 101a are connected to the layers 105a and 105b. and an opening 453 provided in the insulating layer 102, the layer 105a, and the layer 105c. 454 is electrically connected to the electrode 110b. At the connection portion 109 of the electrode 101a and the substrate 105c, the layer 105b is removed.

[0136] In addition, the layer 105b is removed from the entire connecting portion between the electrode 104c and the electrode 101a. For example, as shown in FIG. 45(C) or FIG. 45(D), Layer 105b may remain in a portion of connection portion 109 between 04c and electrode 101a. .

[0137] In the configuration shown in FIG. 45(C), the electrode 104c and the electrode 101a are connected to the layers 105a and 105b. and an opening 455 provided in the insulating layer 102, the layer 105a, the layer 105b, and the layer 105c. An electrical connection is made to the opening 456 by the electrode 110b.

[0138] In the configuration shown in FIG. 45(D), the electrode 104c and the electrode 101a are connected to the layers 105a and 105 and an opening 457 provided in the insulating layer 102, the layer 105a, and the layer 105c. An electrical connection is made to the opening 458 by the electrode 110b.

[0139] The connection configuration between the electrode 104c and the electrode 101a shown in this embodiment is, for example, Connection between electrode 104b and electrode 101 when transistor 100 is diode-connected Diode-connected transistors can be used in, for example, protection circuits and , and can be used in a driving circuit, etc. Alternatively, the connection configuration between the electrode 104c and the electrode 101a The above also applies to the case where the gate electrode is connected to the source electrode or the drain electrode. For example, a single pixel can be configured with multiple transistors. In such a pixel circuit or driving circuit, a gate electrode and a source electrode or a drain electrode are For example, a pixel circuit having an EL element (organic light-emitting element) in the pixel In the semiconductor device, a plurality of transistors are provided, and a gate electrode and a source electrode or a drain electrode are connected to each other. In some cases, the circuit for driving the gate line also has multiple A transistor is provided.

[0140] 19, the openings 441 to 448 in FIG. 44, and the openings 191 to 198 in FIG. The shapes of the openings 451 to 458 in FIG. 5 are the same as those in FIG. A configuration similar to that of the opening shown in FIG. 30 can be applied.

[0141] The electrode 104c and the electrode 101a are connected without using the electrode 110b. For example, a contact hole may be provided in the insulating layer 102 to allow the electrode 10 It is also possible to directly connect 4c to electrode 101a.

[0142] In this embodiment, some or all of the first to fifth embodiments are modified or added. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to fifth embodiments. This can be done.

[0143] (Embodiment 7) In this embodiment, a configuration in which the parasitic capacitance of the transistor 100 is increased or Regarding a structure for increasing the capacitance of a capacitor electrically connected to the transistor 100, An example of this will be described. For the explanation, Figs. 20, 21, 46, and 47 will be used. In the drawings used in this embodiment, the same parts as those in the drawings used in the description of the previous embodiment are denoted by the same reference numerals. The explanation is omitted.

[0144] 20(A) to 20(D) and 21(A) to 21(D) show the insulating layer 105 46(A) and 46(B) are examples of a laminate of layers 105a and 105b. 47(B) and 47(C) show a stack of layers 105b and 105c as the insulating layer 105. This is an example of using layers, as shown in Figs. 46(B), 46(D), 47(A), and 47(D). The figure shows an example in which the insulating layer 105 is a laminate of layers 105a, 105b, and 105c. be.

[0145] In Figs. 20, 21, 46 and 47, the layer 105b on the electrode 104b is entirely or largely The capacitance value (or capacitance) of the parasitic capacitance between the electrode 104b and the electrode 106 is In the figure, for example, parasitic capacitance occurs in the portion 281 surrounded by the dashed line. The shapes of the electrode 104b and the electrode 106 and the electrode 107 are different from each other. The value of this capacitance can be adjusted by appropriately determining the range of removing the layer 105b on the upper surface of the insulating film 04b. It is possible.

[0146] 20, 21, 46, and 47, the parasitic capacitance is also between the electrode 104b and the electrode 101. Capacitance may be generated and / or a capacitive element may be formed. By appropriately determining the shape of 01, the value of this capacitance can be adjusted.

[0147] In this way, the capacitance between the gate and source of transistor 100 can be increased. Alternatively, a capacitor element having a large capacitance can be formed. For example, the transistor 100 When using this in a circuit that performs bootstrap operation, the capacitance between the gate and source should be increased. It is preferable to store a signal in a capacitance element in a dynamic circuit. In this case, it is desirable that the capacitance element is large. It is preferable to use a transistor 100 having the configuration shown in FIG.

[0148] In this embodiment, some or all of the first to sixth embodiments are modified or added. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to sixth embodiments. This can be done.

[0149] (Embodiment 8) In this embodiment, a structure of a capacitor included in a semiconductor device or the like (a display device, a light-emitting device, or the like) is An example of the configuration will be described below. For the explanation, Fig. 22 and Fig. 48 are used. In the drawings, the same parts as those in the drawings used for explaining the previous embodiment are designated by the same reference numerals. , explanation will be omitted.

[0150] In addition, in FIG. 22(A) to FIG. 22(E), the insulating layer 105 is made up of a layer 105a and a layer 105b. 48(A) and 48(C) show an example in which a layer of the insulating layer 105 is used. 48(B), 48(D), and 48(C) are examples of the case where a laminate of layers 105b and 105c is used. 48(E) uses a laminate of layers 105a, 105b, and 105c as the insulating layer 105. This is an example case.

[0151] The electrode 101a formed in the same layer as the electrode 101 is set as one electrode, and the electrode 104a and the electrode The electrode 104c formed in the same layer as the electrode 104b is used as the other electrode to form a capacitance element. An example of this is shown in Figures 22(A) and 22(B). The capacitor element is formed in the portion 282. The electrode 106a is formed in the same layer as the electrode 106. In addition, in FIG. 22(A) and FIG. 22(B), the electrode 106a is In the example shown, the electrode 104c is electrically connected to the electrode 104. However, the electrode 106a may not be electrically connected to the electrode 104c. Alternatively, the electrode 101a may be electrically connected to the electrode 101a and the electrode 104c. It may be electrically connected to both, or may not be provided on portion 282 .

[0152] The electrode 101a formed in the same layer as the electrode 101 is set as one electrode, and the electrode 106a is set as the other electrode. A capacitor element can be formed as the electrode. D), Fig. 22(E), Fig. 48(A), Fig. 48(B), Fig. 48(C), Fig. 48(D), Fig. 4 8(E). In the figure, for example, the capacitive element is formed in a portion 283 surrounded by a dashed line.

[0153] In FIG. 22(C), a part of the layer 105b is removed to form the structure shown in FIG. 22(D). In the configuration shown in FIG. 22(D), the layer 105b in the region 121c is removed. In FIG. 22(D), the width of the electrode 101a is larger than the width of the electrode 101a (in the left-right direction of the drawing). The structure in which the layer 105b is removed is shown in FIG. 22(E). 48(A) and 48(B) show a structure in which a part of the layer 105b is removed. In the configuration shown in FIG. 48(C) and FIG. 48(D), the layer 105b in the region 121c Further, in FIG. 48(D), the width where the electrode 101a is provided (the left side of the drawing) is FIG. 48(E) shows a structure in which layer 105b is removed in a width wider than that in the direction perpendicular to the substrate 101 (to the right).

[0154] In addition, in FIG. 22 and FIG. 48, the electrode 106a is the same as the electrode 106, the electrode 110, and the electrode 110. The electrode 101a may be an electrode formed in the same layer as the electrode 101. The electrode 104c may be the electrode 104.

[0155] The capacitance element shown in FIG. 22 or FIG. 48 is provided between the gate and source of the transistor 100. Alternatively, the semiconductor device can be used as a storage capacitor provided in a pixel. Alternatively, the transistor can be used as a capacitance element for holding a signal in a driver circuit. It can be used as.

[0156] In this embodiment, some or all of the first to seventh embodiments are modified or added. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to seventh embodiments. This can be done.

[0157] (Embodiment 9) In this embodiment, the insulating Examples of materials for the layers, electrodes, semiconductor layers, etc. will be described.

[0158] The material of the semiconductor layer 103 of the transistor 100 will be described below. The semiconductor layer formed in the same layer as 103 can be made of the same material.

[0159] The semiconductor layer 103 of the transistor 100 is a layer made of an oxide semiconductor (oxide semiconductor layer). The oxide semiconductor may include, for example, an oxide of a quaternary metal, In-S n-Ga-Zn-O oxide semiconductors and ternary metal oxides such as In-Ga-Zn-O In-Sn-Zn-O oxide semiconductors, In-Al-Zn-O oxide semiconductors Semiconductors, Sn-Ga-Zn-O oxide semiconductors, Al-Ga-Zn-O oxide semiconductors, Sn-Al-Zn-O oxide semiconductors, Hf-In-Zn-O oxide semiconductors, and binary Metal oxide semiconductors such as In-Zn-O, Sn-Zn-O, and A l-Zn-O oxide semiconductor, Zn-Mg-O oxide semiconductor, Sn-Mg-O oxide Semiconductors, In-Mg-O oxide semiconductors, In-Ga-O oxide semiconductors, single-element metals In-O-based oxide semiconductors, Sn-O-based oxide semiconductors, and Zn-O-based oxide semiconductors are oxides of In addition, the above oxide semiconductor may contain elements other than In, Ga, Sn, and Zn. It may also contain elements such as SiO2.

[0160] For example, an In-Sn-Zn-O oxide semiconductor is a semiconductor that contains indium (In), tin (Sn) It means an oxide semiconductor containing zinc (Zn), regardless of its composition ratio. For example, an In-Ga-Zn-O oxide semiconductor is a semiconductor that contains indium (In), gallium (G a) It means an oxide semiconductor containing zinc (Zn), regardless of the composition ratio. The In-Ga-Zn-O oxide semiconductor can be called IGZO.

[0161] The oxide semiconductor layer can be formed using an oxide semiconductor film. When a Zn-O-based oxide semiconductor film is formed by a sputtering method, the composition of the target is The composition ratio of In:Sn:Zn is 1:2:2, 2:1:3, 1:1:1, or For example, 20:45:35 is used.

[0162] In addition, when an In-Zn-O-based oxide semiconductor film is formed by a sputtering method, The composition ratio of the target is In:Zn=50:1 to 1:2 in atomic ratio (converted to molar ratio). and In2O3:ZnO=25:1 to 1:4), preferably In:Zn=20:1 to 1:1 (In terms of molar ratio, In2O3:ZnO=10:1 to 1:2), and more preferably I n:Zn = 1.5:1 to 15:1 (converted to molar ratio: In2O3:ZnO = 3:4 to For example, the target has an atomic ratio of In:Zn:O=X:Y:Z. Then, Z>1.5X+Y.

[0163] In addition, when an In-Ga-Zn-O-based oxide semiconductor film is formed by a sputtering method, In this case, the composition ratio of the target is In:Ga:Zn=1:1:0.5, In:G It can be a:Zn=1:1:1, or In:Ga:Zn=1:1:2.

[0164] In addition, by setting the purity of the target to 99.99% or more, the amount of the target that is mixed into the oxide semiconductor film can be reduced. It is possible to reduce the amount of alkali metals, hydrogen atoms, hydrogen molecules, water, hydroxyl groups, hydrides, etc. In addition, by using the target, lithium, sodium, and the like can be easily formed in the oxide semiconductor film. The concentrations of alkali metals such as thorium and potassium can be reduced.

[0165] In addition, oxide semiconductors are insensitive to impurities, and the film contains a considerable amount of metal impurities. There is no problem even if it is used in a cheap product that contains a large amount of alkali metals such as sodium (Na). It has been pointed out that soda-lime glass can also be used (Kamiya, Nomura, Hosono, "Amorphous Oxide "Physical properties of semiconductors and the current status of device development," Solid State Physics, September 2009, Vol. 44, pp.621-633.) However, this is not a proper indication. Alkali metals are oxidized. Alkaline earth metals are also impurities because they are not elements that make up oxide semiconductors. When an element is not a component of the body, it becomes an impurity. In particular, Na When the insulating film in contact with the oxide semiconductor layer is an oxide, Na diffuses into the insulating film. + In addition, Na reacts with the metals and oxygen that constitute the oxide semiconductor in the oxide semiconductor layer. This breaks the coupling or interrupts the coupling, resulting in, for example, a threshold voltage The shift in the negative direction leads to transistor characteristics such as normally on and reduced mobility. This impurity causes deterioration of the properties and also causes variation in the characteristics. The deterioration and variation in the characteristics of the transistor occur when the hydrogen concentration in the oxide semiconductor layer is sufficiently low. Therefore, this phenomenon is remarkable when the hydrogen concentration in the oxide semiconductor layer is 1×10 18 / c m 3 Less than or equal to 1×10 17 / cm 3 If the concentration of the impurity is less than or equal to It is desirable to reduce the concentration of Na. Specifically, the measured value of Na concentration by secondary ion mass spectrometry is , 5×10 16 / cm 3 Less than or equal to 1×10 16 / cm 3 More preferably, 1 ×10 15 / cm 3 Similarly, the measured value of Li concentration should be 5×10 15 / c m 3 Less than or equal to 1×10 15 / cm 3 Similarly, the measured value of K concentration should be less than 0. is 5 x 10 15 / cm 3 Less than or equal to 1×10 15 / cm 3 The following should be used.

[0166] Note that the oxide semiconductor layer may be amorphous or may have crystallinity. The conductor layer may be single crystal or non-single crystal. If it is non-single crystal, it may be amorphous or polycrystalline. In addition, the structure may include a portion having crystallinity in the amorphous state, or a non-amorphous structure. The oxide semiconductor layer may be a layer having a c-axis orientation and a triaxial structure as viewed from a direction perpendicular to the ab plane. The atomic arrangement is a square, hexagonal, equilateral triangle, or equilateral hexagon, and the direction is perpendicular to the c-axis direction. From the viewpoint of the crystal structure, it is considered to be a crystal containing a phase in which metal atoms are arranged in layers, or metal atoms and oxygen atoms are arranged in layers ( CAAC: Also called C Axis Aligned Crystal. It can be used.

[0167] CAAC will be described in detail with reference to Figures 69 to 71. 69 to 71, the upward direction is the c-axis direction, and the plane perpendicular to the c-axis direction is the ab-plane. In addition, when simply referring to the upper half and lower half, this refers to the upper half and lower half taken along the ab plane. In Figure 69, the circled O atom indicates a 4-coordinate O atom, and the double circled O atom indicates a 4-coordinate O atom. The O atom indicates a three-coordinate O atom.

[0168] In Figure 69(A), one hexacoordinate In atom and six tetracoordinate oxygen atoms adjacent to the In atom are shown. The structure has one In atom and one nearby oxygen atom. The structure showing only the elementary atoms is called a subunit here. The structure in Figure 69(A) is an octahedral The upper half and lower half of FIG. 69(A) are shown in plan view for simplicity. Each half has three tetracoordinated O atoms. The load is 0.

[0169] In Figure 69(B), one pentagonal Ga atom and three trigonal O atoms adjacent to the Ga atom are shown. A structure having a Ga atom and two 4-coordinate O atoms adjacent to the Ga atom. The three-coordinate O atoms are all on the ab plane. Each half has one tetrahedral O atom. In addition, the In atom is also pentahedral, so The structure shown in Figure 69(B) can be obtained. The subunit shown in Figure 69(B) has a zero charge. .

[0170] In Figure 69(C), there is one 4-coordinate Zn atom and four 4-coordinate O atoms adjacent to the Zn atom. The structure of Figure 69(C) shows one tetracoordinate O atom in the upper half and There are three tetracoordinate O atoms in the upper half of Figure 69(C). The subunit shown in Figure 69(C) may have one tetracoordinated O atom in the lower half. A valence atom has zero charge.

[0171] In Figure 69(D), there is one hexacoordinated Sn atom and six tetracoordinated O atoms adjacent to the Sn atom. The upper half of Figure 69(D) has three tetracoordinate O atoms, and the lower half has The subunit shown in Figure 69(D) has a charge of +1. do.

[0172] Figure 69(E) shows a subunit containing two Zn atoms. The upper half of the nucleus has one tetracoordinated O atom, and the lower half has one tetracoordinated O atom. Figure 69(E) The subunit shown in has a charge of -1.

[0173] Here, a set of several subunits is called a group, and some of the groups are called A collection of these is called one unit.

[0174] Here, we will explain the rules for bonding between these subunits. The three O atoms in the upper half of the 6-coordinated In atom each have three neighboring In atoms downward. However, the three O atoms in the lower half each have three adjacent In atoms in the upward direction. ) one O atom in the upper half of the five-coordinate Ga atom has one adjacent Ga atom downward. In the four-layer structure shown in FIG. 69(C), one O atom in the lower half has one adjacent Ga atom in the upward direction. One O atom in the upper half of the Zn atom has one neighboring Zn atom downward, and Each of the three O atoms has three adjacent Zn atoms above it. The number of 4-coordinated O atoms in the direction is equal to the number of adjacent metal atoms below the O atoms. Similarly, the number of 4-coordinated O atoms below the metal atom and the number of adjacent metal atoms above the O atom The number of adjacent metal atoms is equal to the number of adjacent metal atoms below the O atom. The sum of the numbers of adjacent metal atoms is 4. Therefore, the number of 4-coordinated O atoms above the metal atom is When the sum of the number of tetracoordinated O atoms below another metal atom is 4, the metal atom is Two types of subunits can be bonded together. For example, a six-coordinate metal atom (In or Sn) is bonded through a tetracoordinate O atom in the lower half, there are three tetracoordinate O atoms Therefore, either a five-coordinate metal atom (Ga or In) or a four-coordinate metal atom (Zn) It will be combined with Reka.

[0175] Metal atoms with these coordination numbers are bonded in the c-axis direction via four-coordinated O atoms. In addition, the subunits are bonded together so that the total charge of the layer structure is zero. Together they form one group.

[0176] Figure 70(A) shows a model diagram of one group that constitutes the In-Sn-Zn-O system layer structure. Figure 70(B) shows a unit consisting of three groups. ) shows the atomic arrangement when the layer structure of FIG. 70(B) is observed from the c-axis direction.

[0177] In FIG. 70(A), for simplicity, the three-coordinate O atom is omitted, and the four-coordinate O atom is For example, the upper and lower halves of the Sn atom each have three tetracoordinate O atoms. Similarly, in Figure 70(A), the In atom The upper and lower halves each contain one tetracoordinate O atom, shown as 1 in a circle. Similarly, in Figure 70(A), there is one 4-coordinate O atom in the lower half, The top half of the Zn atom has three tetracoordinated O atoms, and the top half has one tetracoordinated O atom. The lower half shows a Zn atom with three tetracoordinate O atoms.

[0178] In FIG. 70(A), the groups constituting the In-Sn-Zn-O system layer structure are The Sn atoms in the upper and lower halves have three tetracoordinate O atoms, respectively. is bonded to an In atom in the upper half and another to an In atom in the lower half, and the In atom is bonded to three In atoms in the upper half. A 4-coordinate O atom is bonded to a Zn atom, and one 4-coordinate O atom in the lower half of the Zn atom is bonded to the Three tetracoordinate O atoms are bonded to the In atoms in the upper and lower halves via the The In atom is arranged in a subunit consisting of two Zn atoms with one tetracoordinated O atom in the upper half. The tetracoordinated O atom of the lower half of this subunit is connected to the tetracoordinated O atom of the Each of the groups is bonded to a Sn atom in the upper half and a Sn atom in the lower half. These are combined to form one unit.

[0179] Here, in the case of a tricoordinated O atom and a tetracoordinated O atom, the charges per bond are For example, In (6- or 5-coordinate) The charges of the Zn (four-coordinated) and Sn (five- or six-coordinated) atoms are +3, +2 and +4. Therefore, the subunit containing the Sn atom has a charge of +1. To form a layered structure containing Sn atoms, a charge of -1 is required to cancel the charge of +1. As shown in Figure 69(E), a structure with a charge of -1 is a subunit containing two Zn atoms. For example, one Sn-containing subunit has two Zn atoms. If there is one subunit containing a 1-methyl group, the charges are cancelled out, making the total charge of the layer structure 0 It can be said that:

[0180] In addition, the In atom can have either five or six coordinates. In the case of the unit shown in FIG. 70(B), the In-Sn-Zn-O crystal (I In-Sn-Zn-O system layers can be obtained. The structure is In2SnZn2O7(ZnO) m (m is 0 or a natural number.) It is possible.

[0181] In addition, there are oxides of four-component metals, such as In-Sn-Ga-Zn-O oxides. and In-Ga-Zn-O oxide (also written as IGZO), which is an oxide of a ternary metal. ), In-Al-Zn-O oxides, Sn-Ga-Zn-O oxides, Al-Ga-Zn -O oxides, Sn-Al-Zn-O oxides, and binary metal oxides such as In-Zn -O oxides, Sn-Zn-O oxides, Al-Zn-O oxides, Zn-Mg-O acids oxides, Sn-Mg-O oxides, In-Mg-O oxides, In-Ga-O oxides, Oxides of single-element metals such as In-O oxides, Sn-O oxides, and Zn-O oxides The same is true when using

[0182] For example, Figure 71(A) shows a group of models that have an In-Ga-Zn-O layer structure. A diagram of the data is shown.

[0183] In FIG. 71(A), the groups constituting the In-Ga-Zn-O system layer structure are In atoms in the upper and lower halves of the system have three tetracoordinate O atoms, and In atoms in the lower halves have three tetracoordinate O atoms. is bonded to the Zn atom in the upper half, and the three 4-coordinate O atoms in the lower half of the Zn atom One tetrahedral O atom is bonded to the Ga atom in the upper half and the other to the Ga atom in the lower half through the G Through one tetracoordinate O atom in the lower half of the a atom, three tetracoordinate O atoms are The structure is that the In atom is bonded to the In atom in the lower half of the group. Make up a knit.

[0184] Figure 71(B) shows a unit consisting of three groups. Figure 71(C) shows This shows the atomic arrangement when the layer structure of FIG. 71(B) is observed from the c-axis direction.

[0185] Here, In (6- or 5-coordinate) atom, Zn (4-coordinate) atom, Ga (5-coordinate) atom The charges of In, Zn and Ga atoms are +3, +2 and +3, respectively. The charge of the subunits is zero. Therefore, the combination of these forms a layer structure. The total charge is always zero.

[0186] Here, In (6- or 5-coordinate) atom, Zn (4-coordinate) atom, Ga (5-coordinate) atom The charges of In, Zn and Ga atoms are +3, +2 and +3, respectively. Subunits containing either of these have a zero charge. When combined, the total charge of the group is always zero.

[0187] An oxide semiconductor film containing CAAC (hereinafter also referred to as a CAAC film) can be formed by a sputtering method. The target can be made of the above-mentioned materials. When forming a CAAC film by sputtering, the oxygen gas ratio in the atmosphere is For example, when a sputtering method is performed in a mixed gas atmosphere of argon and oxygen, When performing this, the oxygen gas ratio is preferably 30% or more, and more preferably 40% or more. This is more preferable because the crystallization of CAAC is promoted by the supplementation of oxygen from the atmosphere. It is.

[0188] In addition, when the CAAC film is formed by the sputtering method, It is preferable to heat the substrate to be treated to 150° C. or higher, and it is preferable to heat the substrate to 170° C. or higher. This is because the crystallization of CAAC is promoted with an increase in the substrate temperature. .

[0189] In addition, after the CAAC film is heat-treated in a nitrogen atmosphere or in a vacuum, It is preferable to carry out the heat treatment in an oxygen atmosphere or in a mixed atmosphere of oxygen and other gases. The oxygen deficiency caused by the previous heat treatment is restored by the supply of oxygen from the atmosphere in the subsequent heat treatment. This is because it can be restored.

[0190] In addition, it is preferable that the film surface (film-forming surface) on which the CAAC film is formed is flat. Since the AC film has a c-axis that is approximately perpendicular to the surface on which the film is formed, the concave portions on the surface on which the film is formed are The convexity induces the generation of grain boundaries in the CAAC film. Before the AAC film is formed, the surface to be coated is subjected to chemical mechanical polishing (CME). It is preferable to perform a planarization process such as chemical polishing (CMP). In addition, the average roughness of the surface to be coated is preferably 0.5 nm or less, and more preferably 0.5 nm or less. It is more preferable that it be 0.3 nm or less.

[0191] Note that the oxide semiconductor film formed by sputtering or the like contains moisture or In one embodiment of the present invention, the oxide semiconductor film (or an oxide semiconductor layer formed using an oxide semiconductor film) In order to reduce impurities (dehydration or dehydrogenation), nitrogen or rare gases are used under reduced pressure. Inert gas atmosphere, oxygen gas atmosphere, or ultra-dry air (CRDS (cavity ring The moisture content measured using a dew point meter using the down-laser spectroscopy method is 20 ppm (dew point (converted into air) below -55°C, preferably below 1 ppm, and preferably below 10 ppb The oxide semiconductor film (oxide semiconductor layer) is subjected to heat treatment in an atmosphere.

[0192] By subjecting the oxide semiconductor film (oxide semiconductor layer) to heat treatment, Specifically, the temperature is set to 250°C or higher, and the hydrogen or moisture in the semiconductor layer is removed. Heat treatment may be performed at a temperature of 0° C. or lower, preferably 400° C. or higher but lower than the distortion point of the substrate. For example, the heat treatment may be performed at 500°C for 3 to 6 minutes. Since dehydration or dehydrogenation can be performed in a short time, processing can be performed even at temperatures exceeding the distortion point of the glass substrate. It is possible.

[0193] In this manner, moisture or hydrogen is released from the oxide semiconductor film (oxide semiconductor layer), and then oxygen is released. In this way, oxygen defects in the oxide semiconductor film (oxide semiconductor layer) are reduced. The oxide semiconductor film (oxide semiconductor layer) can be made to be i-type or as close to i-type as possible. .

[0194] The addition of oxygen is performed, for example, by forming a stoichiometric composition ratio in contact with an oxide semiconductor film (oxide semiconductor layer). This can be done by forming an insulating film having a region with more oxygen and then heating it. In this way, excess oxygen in the insulating film can be supplied to the oxide semiconductor film (oxide semiconductor layer). In this manner, the oxide semiconductor film (oxide semiconductor layer) is changed to a state in which excess oxygen is contained. The excessive oxygen may be, for example, in the oxide semiconductor film (oxide semiconductor layer). They exist between the lattices of the crystals that make up the

[0195] Note that an insulating film having a region with more oxygen than the stoichiometric composition is an oxide semiconductor film ( Among the insulating films in contact with the semiconductor layer, the insulating film located in the upper layer or the insulating film located in the lower layer Although it may be used for only one of the insulating films, it is preferable to use it for both insulating films. An insulating film having a region with more oxygen than the theoretical composition ratio is formed on an oxide semiconductor film (oxide semiconductor layer). The insulating film is used as an upper layer and a lower layer of the insulating film in contact with the oxide semiconductor film (oxide semiconductor By sandwiching the insulating layer between the insulating layers, the above effect can be further enhanced.

[0196] Here, the insulating film having a region with more oxygen than the stoichiometric composition ratio is a single-layer insulating film. The insulating film may be made of a single insulating film or may be made of a plurality of insulating films stacked together. It is desirable to minimize the amount of impurities such as hydrogen and other chemicals contained in the insulating film. The hydrogen penetrates into the oxide semiconductor film (oxide semiconductor layer) or This removes oxygen from the oxide semiconductor layer, causing the oxide semiconductor film to have a low resistance (become n-type). Therefore, the insulating film should be one that contains as little hydrogen as possible. It is important not to use hydrogen in the film formation process so that the insulating film is not damaged. For example, a silicon nitride film or a silicon nitride film is used as an insulating film having a high barrier property. Silicon nitride oxide film, aluminum nitride film, aluminum oxide film, or aluminum nitride oxide film When a plurality of laminated insulating films are used, the nitrogen content ratio is The insulating film such as a silicon oxide film or a silicon oxynitride film having a low barrier property is preferably used as the insulating film having a high barrier property. The insulating layer is formed on the side close to the oxide semiconductor film (the nitride semiconductor layer). The insulating film is sandwiched between the oxide semiconductor film (oxide semiconductor layer) and the insulating film with high barrier properties. By using an insulating film with high barrier properties, the oxide semiconductor film (oxide semiconductor Prevents impurities such as moisture or hydrogen from entering the insulating film (interlayer) and the interface with other insulating films and their vicinity. In addition, the ratio of nitrogen to the oxide semiconductor film (oxide semiconductor layer) can be adjusted so that the oxide semiconductor film (oxide semiconductor layer) is in contact with the oxide semiconductor film. By forming insulating films such as low-temperature silicon oxide films and silicon oxynitride films, materials with high barrier properties can be used. This can prevent the insulating film used from being in direct contact with the oxide semiconductor film (oxide semiconductor layer).

[0197] In addition, oxygen is added after moisture or hydrogen is removed from the oxide semiconductor film (oxide semiconductor layer). The oxide semiconductor film (oxide semiconductor layer) is subjected to heat treatment in an oxygen atmosphere. The temperature of the heat treatment may be, for example, 100° C. or higher and lower than 350° C., preferably 15 The temperature is 0° C. or higher and lower than 250° C. The oxygen gas used in the heat treatment in the oxygen atmosphere includes It is preferable that the gas does not contain water, hydrogen, etc. Alternatively, the pure oxygen gas introduced into the heat treatment device The degree is 6N (99.9999%) or more, preferably 7N (99.99999%) or more, ( That is, it is preferable to keep the impurity concentration in oxygen to 1 ppm or less, preferably 0.1 ppm or less. I wish.

[0198] Alternatively, moisture or hydrogen is released from an oxide semiconductor film (oxide semiconductor layer) and then oxygen is added to the oxide semiconductor film (oxide semiconductor layer). The addition may be performed by ion implantation or ion doping. For example, 2.45 Oxygen plasma generated by microwaves at GHz is added to an oxide semiconductor film (oxide semiconductor layer). That would be good.

[0199] The oxide semiconductor layer thus formed is used as the semiconductor layer 103 of the transistor 100. Thus, the transistor 100 with significantly reduced off-state current can be obtained.

[0200] The semiconductor layer 103 of the transistor 100 may include microcrystalline silicon. Silicon is a semiconductor with an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystalline). The microcrystalline silicon has a crystal grain size of 2 nm to 200 nm, preferably 10 nm or more. 80 nm or less, more preferably 20 nm to 50 nm, and even more preferably 25 nm or less Columnar or needle-like crystals measuring 33 nm or less are grown in the normal direction to the substrate surface. For this reason, grain boundaries may be formed at the interfaces between the columnar crystals or needle-like crystals.

[0201] A typical example is microcrystalline silicon, whose Raman spectrum shows that it is single-crystalline silicon. 0cm -1 That is, the 520 cm -1 and 480 cm, which indicates amorphous silicon. -1 During this time, the Raman spectrum of microcrystalline silicon In addition, hydrogen or It contains at least 1 atomic % or more of halogen. In addition, helium, argon The inclusion of rare gas elements such as fluorine, krypton, or neon further promotes lattice distortion. This increases the stability and produces good microcrystalline silicon. Such a description is disclosed, for example, in US Pat. No. 4,409,134.

[0202] The semiconductor layer 103 of the transistor 100 includes amorphous silicon. The semiconductor layer 103 of the transistor 100 may include polycrystalline silicon. Alternatively, the semiconductor layer 103 of the transistor 100 may be made of an organic semiconductor, a carbon nanotube, or the like. It may also include the following.

[0203] The material of the electrode 110 will be described below. The poles may also be made of similar materials.

[0204] The electrode 110 can be formed using a light-transmitting conductive material. Examples include indium tin oxide (ITO), indium tin oxide with silicon oxide (ITSO) ), organic indium, organic tin, zinc oxide, indium zinc oxide, etc. can be used. The electrode 110 includes both a light-transmitting region and a light-reflective region. This allows a semi-transmissive display device to be constructed. The display device may be formed of a conductive material having reflectivity. Alternatively, a structure in which light is emitted from the opposite side of the substrate on which the pixels are formed can be used. It is possible to configure a (top emission) light emitting device.

[0205] In particular, when a conductive material having reflectivity is used as the electrode 110, the transistor 10 By providing an electrode 110 on the upper portion of the transistor 100 so as to overlap with 0, the aperture ratio is It can be improved.

[0206] The material of the electrode 106 will be described below. The poles may also be made of similar materials.

[0207] The electrode 106 can be formed using a light-transmitting conductive material. Examples include indium tin oxide (ITO), indium tin oxide with silicon oxide (ITSO) ), organic indium, organic tin, zinc oxide, indium zinc oxide, etc. can be used. do.

[0208] The material of the insulating layer 105 is described below.

[0209] The insulating layer 105 may include an organic insulating layer. The insulating layer 105 may include an inorganic insulating layer. The insulating layer 105 may include a laminate of an inorganic insulating layer and an organic insulating layer. For example, The layers 105a and 105c can be inorganic insulating layers. The layer 105b can be an organic insulating layer. It can be said that:

[0210] When the insulating layer 105 or the layer 105b is used as a color filter, the insulating layer 105 or As the layer 105b, a green organic insulating layer, a blue organic insulating layer, a red organic insulating layer, etc. are used. When the insulating layer 105 or the layer 105b is used as a black matrix, A black organic insulating layer can be used as the insulating layer 105 or the layer 105b.

[0211] The organic insulating layer may be made of acrylic resin, polyimide, polyamide, or the like. By using polyimide, the light-emitting element formed on the insulating layer 105 or layer 105b can be It is also possible to reduce the deterioration of the organic insulating layer by using a photosensitive material. In the case of a film using a photosensitive material, the film can be etched without forming a resist mask. The organic insulating layer can be formed by a droplet discharge method such as an ink jet method. Alternatively, the ink jet method or other droplet ejection method may be used. The layer may be etched after it is formed. For example, the layer may be formed by a liquid method such as an ink-jet method. A layer formed by a droplet discharge method is etched using a resist mask. Good too.

[0212] As the inorganic insulating layer, a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or the like can be used. do.

[0213] In this embodiment, some or all of the first to eighth embodiments are modified or added. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to eighth embodiments. This can be done.

[0214] (Embodiment 10) In this embodiment mode, one mode of a manufacturing method of a semiconductor device will be described.

[0215] FIG. 59 shows an example of a method for manufacturing a semiconductor device having the structure of FIG.

[0216] An electrode 101 is formed on the insulating surface 200, and an insulating layer 102 is formed on the electrode 101; At least a part of the electrode 101 is disposed on the insulating layer 102 via the insulating layer 102. Then, a semiconductor layer 103 is formed (FIG. 59(A)).

[0217] An electrode 104a and an electrode 104b are formed on the semiconductor layer 103. An insulating film 591 is formed on the electrode 104b. The insulating film 591 is made of a positive photosensitive material. It is assumed that the above-mentioned structure is formed (Figure 59(B)).

[0218] Next, the insulating film 591 is exposed to light using a half-tone mask 592 . Here, the halftone mask 592 has a region 592a, a region 592b, and a region 592c. However, the transmittance of the light used for exposure is different between the regions. The transmittance of region 592b is greater than the transmittance of region 592a (FIG. 59C).

[0219] By exposing the insulating film 591 using such a half-tone mask 592, The insulating layer 120 has a region 121 and a region 122, the region 121 being thinner than the region 122, and a through hole 124 is formed. An insulating layer 105 having an opening 123 can be formed (Figure 59(D)).

[0220] Then, a thin film is formed on the insulating layer 105, which is connected to at least a part of the semiconductor layer 103 through the region 121. At least a portion of the electrode 106 overlaps with the electrode 110 on at least a portion of the region 122. Forms at least a part of the (Figure 59 (E)).

[0221] In this manner, a semiconductor device can be formed.

[0222] In the above, an example was shown in which a positive photosensitive material was used as the insulating film 591. The insulating film 591 may be made of a photosensitive material. A resist is formed on the insulating film 591 without using a material, and the resist is then used as a half-tone mask. A resist mask is formed by exposing the resist mask to light. The insulating layer 105 may be formed by etching the insulating film 591.

[0223] FIG. 60 shows an example of a method for manufacturing a semiconductor device having the structure of FIG.

[0224] An electrode 101 is formed on an insulating surface 200, an insulating layer 102, a semiconductor layer 103, and an electrode 10 The manufacturing process up to this point is the same as that shown in FIG. An insulating film 601a is formed on the electrode 104a and the electrode 104b, and an insulating film 601 is formed on the insulating film 601a. b is formed (Figure 60(A)).

[0225] Next, a resist 602 is formed on the insulating film 601b. The resist 602 is a positive type. The resist 602 is exposed to light using a half-tone mask 603. The half-tone mask 603 has a region 603a, a region 603b, and a region 603c. The transmittance of the light used for exposure is different between the two. Here, (transmittance of region 603c)>(region 6 (Transmittance of area 603b)>(Transmittance of area 603a) (FIG. 60(B)).

[0226] By exposing the resist 602 using such a half-tone mask 603, Thus, a resist mask 604 having three regions with different thicknesses is formed (FIG. 60( C).

[0227] The insulating film 601a and the insulating film 601b are etched using the resist mask 604. By this, it has a region 121 and a region 122, and the region 121 is thinner than the region 122, In addition, an insulating layer (a laminate of layers 105a and 105b) having an opening 123 penetrating therethrough is formed. This can be done (Figure 60(D)).

[0228] Then, a thin film is formed on the layer 105b, which is connected to at least a part of the semiconductor layer 103 through the region 121. At least a portion of the electrode 110 is disposed on at least a portion of the region 122 and at least a portion of the electrode 106 overlapping the region 122. At least a part of the slit is formed (Figure 60(E)).

[0229] In this manner, a semiconductor device can be formed.

[0230] In the manufacturing process shown in FIG. 60, a positive type resist 602 is used. However, the present invention is not limited to this. A negative photosensitive material may be used. First, the insulating film 601b is formed using a photosensitive material, and the insulating film 601b is subjected to half-tone masking. By exposing the layer to light, an insulating layer (a laminate of layers 105a and 105b) is formed. Good too.

[0231] In addition, in the manufacturing process shown in FIG. 60, an example using a half-tone mask is shown, but this is not limited to this. For example, a manufacturing process as shown in FIG.

[0232] The manufacturing process up to FIG. 61(A) is the same as that of FIG.

[0233] In the manufacturing process shown in FIG. 61, the insulating film 601b is etched to form the region 121 and the opening 1. 24 is formed. In this manner, the layer 105b is formed (FIG. 61(B)).

[0234] Thereafter, the insulating film 601a exposed at the opening 124 is etched to form a through opening. At this time, a portion of the layer 105b may be further etched. The insulating layer 120 has a region 121 and a region 122, and the region 121 is thinner than the region 122 and penetrates the insulating layer 120. An insulating layer (a stack of layers 105a and 105b) having an opening 123 can be formed ( Figure 61(C)).

[0235] Then, a thin film is formed on the layer 105b, which is connected to at least a part of the semiconductor layer 103 through the region 121. At least a portion of the electrode 110 is disposed on at least a portion of the region 122 and at least a portion of the electrode 106 overlapping the region 122. At least a part of the slit is formed (Figure 61(D)).

[0236] In this manner, a semiconductor device can be formed.

[0237] In the manufacturing process shown in FIG. 61, the insulating film 601a and the insulating film 601b are laminated. In the above example, the etching process for these films is performed after the etching process is performed. However, the present invention is not limited to this example. For example, The manufacturing process can be as shown in FIG.

[0238] The steps up to the formation of the insulating film 601a (FIG. 62(A)) are the same as those shown in FIG. .

[0239] After the insulating film 601a is formed, the insulating film 601a is etched to form an opening 125. A layer 105a is formed (FIG. 62(B)).

[0240] Thereafter, an insulating film 601b is formed to cover the layer 105a (FIG. 62(C)).

[0241] Next, the insulating film 601b is etched. At this time, a part of the layer 105a is further etched. Thus, if we have region 121 and region 122, and region 121 is region 12 2 and has an opening 123 therethrough (a stack of layers 105a and 105b). ) can be formed (Figure 62(D)).

[0242] Then, a thin film is formed on the layer 105b, which is connected to at least a part of the semiconductor layer 103 through the region 121. At least a portion of the electrode 110 is disposed on at least a portion of the region 122 and at least a portion of the electrode 106 overlapping the region 122. At least a part of the porosity (Figure 62(E)).

[0243] In this manner, a semiconductor device can be formed.

[0244] In the manufacturing process shown in FIGS. 60, 61, and 62, the insulating layer 105 is formed into two films (insulating A manufacturing process in which only one of the films is selectively formed. In this example, the regions 121 and 122 are formed by removing the However, the present invention is not limited to the above, and may be applied to a manufacturing process in which the insulating layer 105 is formed from m (m is a natural number) films, By selectively removing only n films (n is a natural number smaller than m) out of m films, In this way, the regions 121 and 122 may be formed.

[0245] For example, a manufacturing process for forming the insulating layer 105 from three films is shown in FIG. The process corresponds to a manufacturing process of a semiconductor device having the structure shown in FIG.

[0246] The manufacturing process up to the step shown in FIG. 63(A) is the same as that shown in FIG.

[0247] After the insulating film 601b is formed, the insulating film 601b is etched to form the openings 126 and A layer 105b having an opening 127 is formed (Figure 63(B)).

[0248] Thereafter, an insulating film 601c is formed to cover the layer 105b (FIG. 63(C)).

[0249] Next, the insulating film 601a and the insulating film 601c are etched to form a through hole. Thus, an opening 123 is formed through the region 121 and the region 122. An insulating layer (layer 105a and layer 105b) is formed on the insulating layer 105a and has an opening 123 therethrough, the opening 123 being thinner than the region 122. A layer 105c and a layer 105b can be formed (FIG. 63(D)).

[0250] Then, a thin film is formed on the layer 105c, which is connected to at least a part of the semiconductor layer 103 through the region 121. At least a portion of the electrode 110 is disposed on at least a portion of the region 122 and at least a portion of the electrode 106 overlapping the region 122. At least a part of it (Figure 63(E)).

[0251] In this manner, a semiconductor device can be formed.

[0252] In addition, the manufacturing process for forming the insulating layer 105 from three films is the same as the process shown in FIG. An example of a different process is shown in FIG. 64. The process shown in FIG. 64 is performed in the configuration shown in FIG. This corresponds to the manufacturing process of a semiconductor device in which the end of the layer 105a is covered with the layer 105b. .

[0253] First, the insulating film is etched to form a layer 105a having an opening 128a. After this, an insulating film 601b is formed (FIG. 64(A)).

[0254] The insulating film 601b is etched to form a layer 105b having an opening 127 and an opening 128. (FIG. 64(B)). Here, the opening 128 is formed at the opening 128a. It has a smaller diameter than the opening 128a.

[0255] Thereafter, an insulating film 601c is formed to cover the layer 105b (FIG. 64(C)).

[0256] Next, the insulating film 601c is etched to form a penetrating opening 123. Thus, there is a region 121 and a region 122, where the region 121 is thinner than the region 122. In addition, the insulating layer (layer 105a, layer 105b, and layer 105c) having an opening 123 penetrating therethrough ) can be formed (Figure 64(D)).

[0257] Then, a thin film is formed on the layer 105c, which is connected to at least a part of the semiconductor layer 103 through the region 121. At least a portion of the electrode 110 is disposed on at least a portion of the region 122 and at least a portion of the electrode 106 overlapping the region 122. At least a part of it (Figure 64(E)).

[0258] In this manner, a semiconductor device can be formed.

[0259] 59 to 64 are diagrams in which parts of FIG. 1(A), FIG. 1(C), and FIG. 26(C) are modified. The manufacturing method of the semiconductor device having the structure shown in the figure is shown. Semiconductor devices having other configurations can be manufactured in a similar manner.

[0260] In this embodiment, some or all of the first to ninth embodiments are modified or added. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to ninth embodiments. This can be done.

[0261] (Embodiment 11) In this embodiment mode, the semiconductor device described in any of the first to tenth embodiments is used as a display device. We will explain an example of application to this.

[0262] The semiconductor device described in any of the first to tenth embodiments is used for a pixel of a liquid crystal display device or the like. There can be.

[0263] An example of a cross-sectional view of a pixel of a liquid crystal display device is shown in FIG. 52. FIG. 52(A) and FIG. 52(B) show: FIG. 1C is a cross-sectional view of a pixel when the semiconductor device having the configuration shown in FIG. 1C is used in a liquid crystal display device. In Fig. 52, the same parts as those in Fig. 1 are designated by the same reference numerals, and the description thereof will be omitted.

[0264] In FIG. 52, a transistor 100 can be a transistor provided in a pixel. The electrode 110 can be a pixel electrode. The layer 105b can be a color filter and / or Or it can be a black matrix.

[0265] In FIG. 52(A), a protrusion 510 is provided on the region 122. Therefore, the projection 510 can function as a spacer. A substrate on which the transistor 100 is formed (hereinafter referred to as a pixel substrate) and a substrate for sealing the liquid crystal layer. (hereinafter, referred to as the opposing substrate) can be controlled. Alternatively, the protrusions 510 may be used to control the alignment of the liquid crystal molecules. The protrusions 510 function as ribs that control the direction in which the liquid crystal molecules fall. The direction can be controlled.

[0266] In FIG. 52, a liquid crystal layer, an electrode paired with a pixel electrode (hereinafter referred to as an opposing electrode), The counter substrate is not shown. The counter electrode may be provided on the pixel substrate or on the counter substrate. Although an alignment film is not shown, it may be provided or may not be provided. Good too.

[0267] In the configuration shown in FIG. 52(A), as shown in FIG. 52(B), the insulating layer 105 is thin or Layer 510a and layer 510b are then added to fill in the areas where no layer is present (e.g., where layer 105b has been removed). In this way, the unevenness of the portion of the pixel substrate facing the liquid crystal layer is reduced. The layers 510a and 510b can be formed using a material different from that of the protrusion 510. The layer 510a, the layer 510b, and the protrusions may be formed of the same material. 510 may form a black matrix. In (B), one of the layers 510a and 510b may be omitted. For example, a configuration in which only layer 510a is provided may be used.

[0268] In FIG. 52, the protrusion 510, the layer 510a, and the layer 510b are formed by photolithographically forming an insulating layer. It can be formed by processing using a graphic process, or it can be formed using a photosensitive material. It is possible to form the film by a droplet ejection method such as inkjet. In FIG. 52, an example in which a protrusion 510 is provided on the pixel substrate is shown, but the present invention is not limited to this. A protrusion may be provided on the opposing substrate.

[0269] In FIG. 52, the protrusion 510 is shown to overlap the electrode 110. The projection 510 may be provided so as not to overlap with the electrode 110. In addition, the protrusion 510 is arranged so as to overlap a part of the electrode 110 and not overlap a part of the electrode 110. The protrusion 510 may be provided for each pixel, or for multiple pixels. The protrusion 510 may be provided so as to overlap a part of the pixel wiring. The insulating film 12 may be provided so as to partially overlap the black matrix.

[0270] In FIG. 52, a configuration in which the semiconductor device shown in FIG. 1C is applied to a liquid crystal display device is shown. The semiconductor device shown in any one of the first to tenth embodiments may be used for liquid crystal display devices. For example, the present invention can be applied to the display devices shown in the first to tenth embodiments. The semiconductor device thus obtained is applied to a liquid crystal display device, and the protrusions 510, the layer 510a, Either layer 510b may be provided.

[0271] This embodiment is a modification of the first to tenth embodiments in part or in whole. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to tenth embodiments. It is possible.

[0272] (Embodiment 12) In this embodiment mode, the semiconductor device described in any of the first to tenth embodiments is used as a display device. We will explain an example of application to this.

[0273] The semiconductor device described in any of the first to tenth embodiments is, for example, a liquid crystal display device. The above pixels can be used.

[0274] FIG. 55(A) to FIG. 55(F) show an example of a circuit diagram for one pixel of a pixel portion of a liquid crystal display device. The pixel includes a transistor, a capacitor, and a liquid crystal element. The pixel circuit also includes a pixel electrode 551, a source signal line 552, and a capacitance line 553. The source signal line 552 is a video signal In addition, in the pixel configuration shown in FIG. 55(A) to FIG. 55(F), A sub-pixel is included in one pixel. The transistor 100 shown in the embodiment 10 can be used. A) to F are the transistor symbols used in FIG. 55(F). In FIG. 55(G), The transistor symbol and the configuration of the transistor 100 shown in the first to tenth embodiments Show the correspondence.

[0275] FIG. 55(H) shows only the liquid crystal elements shown in FIGS. 55(A) to 55(F). As shown in FIG. 55(H), the liquid crystal element includes an electrode 110 (corresponding to a pixel electrode) and an electrode 550. (corresponding to the counter electrode). In addition, a liquid crystal layer is provided between the electrode 110 and the electrode 550.

[0276] As the capacitance elements shown in FIG. 55(A) to FIG. 55(F), The parasitic capacitance and the capacitance element shown in the eighth embodiment can be used.

[0277] The semiconductor device shown in the first to tenth embodiments includes an EL element (organic light emitting element). The present invention can also be used in pixels of a display device using an EL display device (hereinafter referred to as an EL display device) or a light-emitting device. do.

[0278] 56(A) to 56(C) show examples of circuit diagrams of pixels in an EL display device. The pixel shown in FIG. 56(C) includes an EL element 560, a transistor 562, and a transistor Further, the gate signal line 551, the source signal line 552, and the capacitance element 564 are provided. The source signal line 552 also includes a capacitance line 553 and a current supply line 561. The transistor 562 supplies a video signal to the gate of the transistor 563. The transistor 563 controls whether or not a current is supplied to the EL element 560. The transistor has a function of controlling the The transistor 100 shown in the first embodiment can be used. The correspondence with the configuration of the transistor 100 shown in the first to tenth embodiments is shown in FIG. That is correct.

[0279] The semiconductor device shown in the first to tenth embodiments can be used in liquid crystal display devices and EL displays. The driving circuit can be used for a display device, etc. It can be used in a scanning line driver circuit or a signal line driver circuit that outputs the signal. FIG. 7(B) shows an example of a part of a driver circuit. A transistor 701, a transistor 702, a transistor 703, a transistor 704, transistor 705, transistor 706, transistor 707, transistor 708, transistor 709, transistor 710, transistor 711, transistor 712, transistor 713, transistor 715, transistor 801, transistor 802, transistor 803, transistor 804, transistor 805, transistor 806, transistor 807, transistor 808, transistor 809, transistor 810, transistor 811, transistor 812, transistor 813, transistor 814, For some or all of the transistors 815, 816, and 817, The transistor 100 described in any of Embodiments 1 to 10 can be used.

[0280] In addition, the capacitor 714 in FIG. 57A may be the capacitor shown in the seventh or eighth embodiment. A parasitic capacitance or a capacitance element can be used.

[0281] This embodiment is a modification or change of any or all of the first to eleventh embodiments. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to eleventh embodiments. It is possible.

[0282] (Embodiment 13) In this embodiment mode, the semiconductor device described in any of the first to tenth embodiments is used as a liquid crystal display. An example of application to a display device such as a display apparatus will be described.

[0283] One mode of a pixel configuration of a liquid crystal display device is shown in FIG. 53, FIG. 58(A), and FIG. 58(B). Also, the cross-sectional view of A1 to A2 in the top view of FIG. 53 is the same as that in FIG. 58(A) or FIG. ).

[0284] In FIG. 53, FIG. 58(A) and FIG. 58(B), a pixel 530 includes a transistor 100 The pixel 530 includes a pixel electrode 531, a capacitor element 531, and a liquid crystal element (or a display element). In FIG. 53 and FIG. 58, the pixel electrode of the liquid crystal element (or the display element) Only the corresponding electrodes 110 are shown; the counter electrodes (common electrodes) are not shown.

[0285] The configuration of the transistor 100 may include the various configurations shown in the first to tenth embodiments. Therefore, the configuration of the transistor 100 can be the same as that of the first embodiment to the second embodiment. Since the configuration is similar to that shown in the tenth embodiment, the same parts are indicated by the same reference numerals and the description will be omitted. FIG. 58A shows an example in which the transistor 100 shown in FIG. FIG. 58B shows an example in which the transistor 100 shown in FIG. 1C is used. be.

[0286] The capacitance element 531 uses the parasitic capacitance or capacitance element shown in the seventh or eighth embodiment. In FIG. 58(A), in the region 121c where the insulating layer 105 is thinned, In FIG. 58B, the region 1 where the layer 105b is removed is left as is. 58(B) is an example in which a capacitor element 531 is formed in the semiconductor device 21c. The configuration of 31 corresponds to the configuration of the capacitive element shown in FIG.

[0287] The electrode 106 of the transistor 100 is electrically connected to the electrode 101a through the opening 501a. The electrode 101 of the transistor 100 serves as the gate electrode of the transistor. The electrode 101a is provided in parallel with the electrode 101. The electrode 101a functions as a wiring for applying a potential to the electrode 106 of the transistor 100. At the same time, it also functions as a capacitance line for the pixels (or sub-pixels) in the adjacent row. The electrode 104a of 100 serves as either a source electrode or a drain electrode, and is also connected to the source wiring The source wiring is arranged to cross the gate wiring. The electrode 104b of the transistor 100 serves as the other of the source electrode and drain electrode, and the opening 50 1b is electrically connected to the electrode 110. One is electrode 110 and the other is electrode 101a.

[0288] The electrode 101a may be formed, for example, in the same layer as the electrode 101 and from the same material. The electrode 101a and the electrode 101 may be made of different materials.

[0289] Another embodiment of the pixel configuration of a liquid crystal display device is shown in FIG. 54, FIG. 58(C) and FIG. 58(D). In addition, the cross-sectional view of A1 to A2 in the top view of FIG. 54 is similar to that in FIG. 58(C) or FIG. (D).

[0290] In FIG. 54, FIG. 58(C) and FIG. 58(D), a pixel 530 includes a transistor 100 The pixel 530 includes a pixel electrode 532, a capacitor element 532, and a liquid crystal element (or a display element). It may be a pixel.

[0291] The structure of the transistor 100 is the same as that shown in the first to tenth embodiments. Therefore, the same parts are indicated by the same reference numerals and the explanation is omitted. FIG. 58(D) is an example in which the transistor 100 having the configuration shown in FIG. 1(C) is applied. In this example, the transistor 100 having the configuration shown in FIG. 00, various configurations shown in the first to tenth embodiments can be adopted. do.

[0292] The capacitance element 532 uses the parasitic capacitance or capacitance element shown in the seventh or eighth embodiment. In FIG. 58C, in the region 121c where the insulating layer 105 is thinned, In FIG. 58D, the region 1 where the layer 105b is removed is left as is. 58(D) is an example in which a capacitor element 532 is formed in the semiconductor device 21c. The configuration of 31 corresponds to the configuration of the capacitive element shown in FIG.

[0293] The electrode 106 of the transistor 100 is electrically connected to the electrode 101 at the opening 502a. The electrode 101 of the transistor 100 serves as the gate electrode of the transistor and Electrode 101b is provided in parallel to electrode 101, and also functions as a gate wiring. The electrode 101b functions as a capacitance line. The electrode 104a of the transistor 100 is a source electrode. Alternatively, the source line may function as one of the drain electrodes and the source line. The electrode 104b of the transistor 100 is disposed so as to intersect with the gate wiring. The other of the source electrode and drain electrode is electrically connected to the electrode 110 through the opening 502b. One of a pair of electrodes of the capacitor 532 is the electrode 110, and the other is the electrode It's 101b.

[0294] The electrode 101b may be formed, for example, in the same layer as the electrode 101 using the same material. The electrode 101b and the electrode 101 may be made of different materials.

[0295] In addition, although a configuration having a plurality of openings is shown as the electrode 110 in FIG. 54, the present invention is not limited to this. In addition, in the configuration shown in FIG. 53, the electrode 110 is configured to have a plurality of openings. The electrodes 110 can be of any shape.

[0296] In FIG. 53, FIG. 54, and FIG. 58, the electrode 110 is a light-transmitting electrode. Alternatively, the electrode may include both a reflective region and a light-transmitting region. The electrode 110 may have both a reflective region and a light-transmitting region. When an electrode including the above is used, the liquid crystal display device can be made semi-transmissive.

[0297] The electrode 110 is an electrode including both a reflective region and a light-transmitting region. In the case where the reflective electrode is formed in the region having the reflectivity, the same layer as the layer in which the reflective electrode is formed is provided. The material can be used to form the electrode 106. Thus, the semiconductor of the transistor 100 The layer 103 can be light-shielding. The electrodes including both the transparent film and the reflective film are laminated by etching using a halftone mask. It can also be formed by etching.

[0298] Note that a display element, a display device which is a device having a display element, a light-emitting element, and a A light-emitting device, which is a device for displaying light, can have various forms or elements. An example of a display element, a display device, a light-emitting element, or a light-emitting device is an EL (electroluminescence) device. luminescence) elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements) , LEDs (white LEDs, red LEDs, green LEDs, blue LEDs, etc.), transistors ( current-dependent light-emitting transistors), electron-emitting devices, liquid crystal devices, electronic ink, electrophoretic devices child, electrowetting element, grating light valve (GLV), plasma Display panels (PDP), digital micromirror devices (DMD), piezoelectric ceramics Contrast displays, carbon nanotubes, etc., are created by electro-magnetic effects. Some display media have a changeable light, brightness, reflectance, transmittance, etc. An example of such a display device is an EL display. One example of such a device is a field emission display (FED) or SED type flat panel display. Type display (SED: Surface-conduction Electron- Examples of display devices using liquid crystal elements include , LCD (transmissive LCD, semi-transmissive LCD, reflective LCD) LCDs include LCDs, direct-view LCDs, and projection LCDs. An example of a display device using an ink or an electrophoretic element is electronic paper.

[0299] This embodiment is a modification or change of any or all of the first to twelfth embodiments. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to twelfth embodiments. It is possible.

[0300] (Embodiment 14) In this embodiment, an example in which the display device is applied to a display module will be described.

[0301] FIG. 72 is a diagram showing a display module. The display module shown in FIG. 01, a display device 902, a backlight unit 903, and a housing 904; 2 is electrically connected to the driver IC 905. In addition, the backlight unit 90 A power supply voltage and a signal are supplied to 3 via a terminal 906.

[0302] The display module is not limited to that shown in FIG. 72, and may be a display module having a touch panel. The display module may be a flexible printed circuit (FP In FIG. 72, the driver IC 905 may include a flexible printed circuit board. The display device 902 may be electrically connected to the display device 902 via a flexible printed circuit (FPC). The display module may include optical films such as a polarizing plate and a retardation plate.

[0303] This embodiment is a modification or change of any part or all of the first to thirteenth embodiments. It corresponds to addition, modification, deletion, application, superordinate conception, or subordinate conception. The present invention may be freely combined with other embodiments such as the first to thirteenth embodiments. It is possible.

[0304] (Embodiment 15) In this embodiment, an example of an electronic device will be described.

[0305] 67(A) to 67(H) and 68(A) to 68(D) are diagrams showing electronic devices. These electronic devices include a housing 5000, a display unit 5001, a speaker 5003, and a LE. D lamp 5004, operation key 5005 (including power switch or operation switch), connection Terminal 5006, sensor 5007 (force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance , light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation (including functions for measuring flow rate, humidity, gradient, vibration, odor, or infrared rays), 5008, etc.

[0306] FIG. 67(A) shows a mobile computer, which includes, in addition to the above, a switch 5009. , infrared port 5010, etc. FIG. 67(B) shows a mobile phone equipped with a recording medium. A portable image reproducing device (e.g., a DVD reproducing device) and, in addition to the above, the following devices are also included: The display unit 5002, the recording medium reading unit 5011, etc. In addition to the above, the display includes a second display unit 5002 and a support unit 5012. , earphones 5013, etc. FIG. 67(D) shows a portable game machine. In addition to the above, the recording medium reading unit 5011, etc. can be included. This is a digital camera with a television receiving function, and in addition to the above, it also has an antenna 5014, The mobile phone may have a shutter button 5015, an image receiving unit 5016, etc. This is a slot machine, and in addition to the above, it has a second display unit 5002, a recording medium reading unit 5011, , etc. FIG. 67(G) shows a television receiver, which, in addition to the above, has It can have a tuner, an image processor, etc. FIG. 67(H) shows a portable television receiver. In addition to the above, the device includes a charger 5017 capable of transmitting and receiving signals. FIG. 68(A) shows a display, which includes, in addition to the above, a support base 5018, FIG. 68(B) shows a camera, which, in addition to the above, has external connections. The device may have a port 5019, a shutter button 5015, an image receiving unit 5016, etc. FIG. 68(C) shows a computer, which, in addition to the above, includes a pointing device 5 020, an external connection port 5019, a reader / writer 5021, etc. FIG. 68(D) shows a mobile phone, which, in addition to the above, includes a transmitting unit, a receiving unit, a mobile phone / transmitter a tuner for one segment partial reception service for mobile terminals, etc.

[0307] The electronic devices shown in FIGS. 67(A) to 67(H) and 68(A) to 68(D) are For example, various information (still images, videos, text images, etc.) can be stored. ) on the display, touch panel function, calendar, date or time display, etc. Functions for controlling processing by various software (programs), wireless communication functions , a function for connecting to various computer networks using wireless communication functions, wireless communication functions A function for transmitting or receiving various data using the Or, the data can be read and displayed on a display unit. In electronic devices having such a display unit, one display unit is used mainly to display image information, and another A function that mainly displays text information on one display unit, or a function that takes parallax into consideration on multiple displays By displaying the image, it is possible to provide a function of displaying a stereoscopic image. In electronic devices having an image receiving unit, the functions of taking still images, taking videos, The function of automatically or manually correcting the captured image, and the function of storing the captured image on a recording medium (external or camera) It can have functions such as storing the captured image on the camera (built into the camera), displaying the captured image on the display, etc. In addition, the electronic devices shown in Figures 67(A) to 67(H) and Figures 68(A) to 68(D) The functions that the device can have are not limited to these, and the device can have a variety of functions.

[0308] The electronic device described in this embodiment has a display unit for displaying some information. It is characterized by the above.

[0309] Next, application examples of the semiconductor device will be described.

[0310] FIG. 68(E) shows an example in which a semiconductor device is integrated with a building. E) is a housing 5022, a display unit 5023, a remote control device 5024 which is an operation unit, a speaker The semiconductor device is a wall-mounted type that is integrated with the building and is installed in a space It can be installed without requiring a large space.

[0311] FIG. 68(F) shows another example in which a semiconductor device is provided inside a building as an integral part of the building. The display panel 5026 is attached to the unit bath 5027. The viewer can then view the display panel 5026.

[0312] In this embodiment, a wall and a unit bath are used as examples of structures. The configuration is not limited to this, and the semiconductor device can be installed in various structures.

[0313] Next, an example in which the semiconductor device is integrated with a moving object will be described.

[0314] FIG. 68G is a diagram showing an example in which the semiconductor device is provided in an automobile. The cable 5028 is attached to a vehicle body 5029 and is connected to the vehicle body via the vehicle body movement or the inside or outside of the vehicle. The information input from the smartphone can be displayed on demand. It may have.

[0315] FIG. 68(H) shows an example in which a semiconductor device is integrated with a passenger airplane. FIG. 68(H) shows a display panel 5031 mounted on a ceiling 5030 above the seats of a passenger airplane. The display panel 5031 is attached to the ceiling 5 It is integrally attached via 030 and the hinge portion 5032, and the telescoping of the hinge portion 5032 enables the passenger to view the display panel 5031. The display panel 5031 has a function of displaying information by being operated by the passenger.

[0316] In addition, in the present embodiment, examples of the moving body include an automobile body and an aircraft body but are not limited thereto, and it can be installed on various things such as motorcycles, four-wheeled vehicles (including automobiles, buses, etc.), trains (including monorails, railways, etc.), ships, etc.

[0317] In addition, in this specification, etc., in the figures or sentences described in a certain embodiment, it is possible to extract a part thereof to constitute an aspect of the invention. Therefore when a figure or sentence describing a certain part is described, the content obtained by extracting a part of that figure or sentence is also disclosed as an aspect of the invention and can be used to constitute an aspect of the invention . Therefore, for example, in a drawing or sentence in which a single or plural number of active elements (such as transistors, diodes, etc.), wirings, passive elements (such as capacitive elements, resistive elements, etc.), conductive layers, insulating layers, semiconductor layers, organic materials, inorganic materials, parts, devices, operation methods, manufacturing methods, etc. are described it is possible to extract a part thereof to constitute an aspect of the invention . For example, from a circuit diagram composed of N (N is an integer) circuit elements (such as transistors, capacitive elements, etc.), it is possible to extract M (M is an integer and M < N) circuit elements (such as transistors, capacitive elements, etc.) to constitute an aspect of the invention . As another example, from a cross-sectional view composed of N (N is an integer) layers, it is possible to extract M (M is an integer and M < N) layers . It is assumed that it is possible to extract a part thereof to constitute an aspect of the invention. For example, from a circuit diagram having N (N is an integer) circuit elements (such as transistors, capacitive elements, etc.), it is possible to extract M (M is an integer and M < N) circuit elements (such as transistors, capacitive elements, etc.) to constitute an aspect of the invention . From a cross-sectional view composed of N (N is an integer) layers, it is possible to extract M (M is an integer and M < N) layers to constitute an aspect of the invention. As another example, It is possible to extract and configure one aspect of the invention. From a flowchart consisting of elements (N is an integer), M elements (M is an integer, M <N It is possible to extract elements of the above to constitute one aspect of the invention.

[0318] In this specification, etc., in a drawing or text described in a certain embodiment, When at least one specific example is described, the generic concept of that specific example must be derived. This is easily understood by those skilled in the art. In the drawings or text, if at least one specific example is described, The concept is also disclosed as an aspect of the invention and may constitute an aspect of the invention. It is possible.

[0319] In this specification, at least the contents shown in the drawings (or even a part of the drawings) is disclosed as one aspect of the invention and can constitute one aspect of the invention. Therefore, if something is shown in a diagram, it can be explained in text. Even if there is no such disclosure, the contents are disclosed as one aspect of the invention, and one aspect of the invention is Similarly, even if a part of the figure is taken out, it is possible to construct it as one aspect of the invention. and can constitute one embodiment of the invention. [Explanation of symbols]

[0320] 100 Transistors 101 Electrode 102 Insulating layer 103 Semiconductor layer 104 Electrode 105 Insulating layer 106 Electrode 107 Insulating layer 110 electrodes 121 areas 122 areas 123 Aperture 124 Aperture 125 Aperture 126 Aperture 127 Aperture 128 Aperture 191 Aperture 192 Aperture 193 Aperture 194 Aperture 195 Aperture 196 Aperture 197 Aperture 198 Aperture 200 Insulating Surface 281 parts 282 parts 283 parts 441 Aperture 442 Aperture 443 Aperture 444 Aperture 445 Aperture 446 Aperture 447 Aperture 448 Aperture 451 Aperture 452 Aperture 453 Aperture 454 Aperture 455 Aperture 456 Aperture 457 Aperture 458 Aperture 510 Protrusions 530 pixels 531 Capacitive element 532 Capacitive element 550 electrode 551 Gate signal line 552 source signal line 553 Capacitive Line 560 EL element 561 Current supply line 562 Transistor 563 Transistor 564 Capacitive Element 591 Insulating Film 592 Halftone Mask 602 Resist 603 Halftone Mask 604 Resist mask 652 Black Matrix 701 Transistor 702 Transistor 703 Transistor 704 Transistor 705 Transistor 706 Transistor 707 Transistor 708 Transistor 709 Transistor 710 Transistor 711 Transistor 712 Transistor 713 Transistor 714 Capacitive element 715 Transistor 801 Transistors 802 Transistor 803 Transistor 804 Transistor 805 Transistor 806 Transistor 807 Transistor 808 Transistor 809 Transistor 810 Transistor 811 Transistor 812 Transistor 813 Transistor 814 Transistor 815 Transistor 816 Transistor 817 Transistor 901 Case 902 Display device 903 Backlight unit 904 Case 905 Driver IC 906 Terminal 101a electrode 101b electrode 103a Semiconductor layer 104a electrode 104b electrode 104c electrode 105a layer 105b layer 105c layer 106a electrode 108a conductive layer 108b Conductive layer 109 Connection 110b electrode 121c area 128a aperture 131a End 131b End 132a End 132b End 5000 cabinet 5001 Display section 5002 Display section 5003 Speaker 5004 LED Lamp 5005 Operation key 5006 Connection terminal 5007 Sensor 5008 Microphone 5009 Switch 5010 Infrared port 5011 Recording medium reading unit 5012 Support part 5013 Earphones 5014 Antenna 5015 Shutter button 5016 Image receiving unit 5017 charger 5018 Support stand 5019 External connection port 501a aperture 501b aperture 5020 Pointing Device 5021 Reader / Writer 5022 Case 5023 Display section 5024 Remote control device 5025 Speaker 5026 Display Panel 5027 Unit Bath 5028 Display Panel 5029 Body 502a aperture 502b aperture 5030 Ceiling 5031 Display Panel 5032 Hinge part 510a layer 510b layer 592a area 592b area 592c area 601a Insulating film 601b Insulating film 601c Insulating film 603a area 603b area 603c area

Claims

1. A display device including, in a pixel, an EL element, a first transistor having a function of controlling a current supplied to the EL element, and a second transistor having a function of controlling whether or not a video signal is supplied to a gate of the first transistor, A first conductive layer; and a first insulating layer having an area above the first conductive layer; an oxide semiconductor layer having a region above the first insulating layer; a second conductive layer having a region above the oxide semiconductor layer; a second insulating layer having an area above the second conductive layer; a third insulating layer having an area above the second insulating layer; a fourth insulating layer having an area above the third insulating layer; a third conductive layer having an area above the fourth insulating layer; the first conductive layer has a region overlapping with the oxide semiconductor layer with the first insulating layer interposed therebetween; the oxide semiconductor layer has a region that functions as a channel formation region of the first transistor, the first conductive layer has a region that functions as a gate electrode of the first transistor; the second conductive layer has a region functioning as a source electrode or a drain electrode of the first transistor, the third conductive layer has a first region, a second region, and a third region; the first region overlaps the second insulating layer, the third insulating layer, and the fourth insulating layer; The first region functions as a pixel electrode of the EL element, the second region does not overlap the third insulating layer and overlaps the channel formation region via the second insulating layer and the fourth insulating layer; the third region does not overlap the fourth insulating layer, does not overlap the third insulating layer, and does not overlap the second insulating layer; In the third region, the third conductive layer has a region in contact with the second conductive layer, the third insulating layer functions as a color filter; a top surface of the second insulating layer and a bottom surface of the fourth insulating layer are in contact with each other in a region below the second region and overlapping with the channel formation region.

2. A display device including, in a pixel, an EL element, a first transistor having a function of controlling a current supplied to the EL element, and a second transistor having a function of controlling whether or not a video signal is supplied to a gate of the first transistor, A first conductive layer; and a first insulating layer having an area above the first conductive layer; an oxide semiconductor layer having a region above the first insulating layer; a second conductive layer having a region above the oxide semiconductor layer; a second insulating layer having an area above the second conductive layer; a third insulating layer having an area above the second insulating layer; a fourth insulating layer having an area above the third insulating layer; a third conductive layer having an area above the fourth insulating layer; the first conductive layer has a region overlapping with the oxide semiconductor layer with the first insulating layer interposed therebetween; the oxide semiconductor layer has a region that functions as a channel formation region of the first transistor, the first conductive layer has a region that functions as a gate electrode of the first transistor; the second conductive layer has a region functioning as a source electrode or a drain electrode of the first transistor, the third conductive layer has a first region, a second region, and a third region; the first region overlaps the second insulating layer, the third insulating layer, and the fourth insulating layer; the first region functions as a pixel electrode of the EL element; the second region does not overlap the third insulating layer and overlaps the channel formation region via the second insulating layer and the fourth insulating layer; the third region does not overlap the fourth insulating layer, does not overlap the third insulating layer, and does not overlap the second insulating layer; In the third region, the third conductive layer has a region in contact with the second conductive layer, the third insulating layer functions as a color filter; an upper surface of the second insulating layer and a lower surface of the fourth insulating layer are in contact with each other in a region below the second region and overlapping with the channel formation region; The oxide semiconductor layer includes an In-O based oxide semiconductor.

3. In claim 1 or 2, A display device, wherein an upper surface of the second insulating layer and a lower surface of the fourth insulating layer are in contact with each other at a periphery of the third region.

4. In any one of claims 1 to 3, the third conductive layer has a fourth region; the fourth region has a region overlapping with a fifth insulating layer; the fifth insulating layer has a region that functions as a color filter; The fifth insulating layer is different in color from the third insulating layer.

Images