Semiconductor device

Abstract

To manufacture a reliable display device including a thin film transistor having stable electrical characteristics.SOLUTION: In a manufacturing method of a semiconductor device including a thin film transistor having a semiconductor layer including a channel forming region as an oxide semiconductor film, after performing heat treatment (heat treatment for dehydration or dehydrogenation) to increase the purity of the oxide semiconductor film and reduce water content as an impurity, the oxide semiconductor film is slowly cooled in an oxygen atmosphere. In addition, impurities such as moisture existing not only in the oxide semiconductor film but also in a gate insulating layer are reduced, and impurities such as moisture existing at the interface between a film provided in contact with the upper and lower surfaces and the oxide semiconductor film are reduced.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device including an oxide semiconductor and a manufacturing method thereof.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Generally speaking, electro-optical devices, semiconductor circuits, and electronic devices are all semiconductor devices. [Background technology]

[0003] In recent years, semiconductor thin films (thickness of several to several hundred nm) formed on substrates with insulating surfaces have been used The technology of constructing thin film transistors (TFTs) is attracting attention. It is widely used in electronic devices such as C and electro-optical devices, especially in switching of image display devices. Indium oxide, an example of a metal oxide, is a liquid crystal display. It is used as an electrode material with the translucency required for liquid crystal displays, etc.

[0004] Some metal oxides exhibit semiconducting properties. Metal oxides that exhibit semiconducting properties include Examples of such oxides include tungsten oxide, tin oxide, indium oxide, and zinc oxide. Thin-film transistors that use metal oxides as channel formation regions and that exhibit excellent semiconductor properties are already known. (Patent Documents 1 to 4, Non-Patent Document 1).

[0005] Incidentally, metal oxides include not only single-component oxides but also multi-component oxides. For example, Homologous phase InGaO 3 (ZnO) m (m: natural number) is In, Ga, and Zn It is known as a multi-component oxide semiconductor (also called In-Ga-Zn oxide) having the following structure: (Non-Patent Documents 2 to 4).

[0006] In addition, the oxide semiconductor composed of the above-mentioned In-Ga-Zn-based oxide is used for thin-film transistors. It has been confirmed that this can be applied to the channel layer of a photoresist (Patent Document 5, Non-Patent Document 5, and and 6). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Japanese Patent Application Publication No. 1988-1986 [Patent Document 2] Japanese Patent Application Publication No. 8-264794 [Patent Document 3] Special Publication No. 11-505377 [Patent Document 4] JP 2000-150900 A [Patent Document 5] JP 2004-103957 A [Non-patent literature]

[0008] [Non-Patent Document 1] MW Prins, KO Grosse-Holz, G. Muller, JFM Cillessen, JB Giesbers, RP Weening, and RM Wolf, “A ferroelectric transparent thin-film transistor”, Appl. Phys. Lett., 17 June 1996, Vol.68 p.3650-3652 [Non-Patent Document 2] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, p.298-315 [Non-Patent Document 3] N. Kimizuka, M. Isobe, and M. Nakamura, “Syntheses and Single-Crystal Data of Homologous Compounds, In2O3(ZnO)m(m=3,4, and 5), InGaO3(ZnO)3, and Ga2O3(ZnO)m(m=7,8,9, and 16) in the In2O3-ZnGa2O4-ZnO System”, J. Solid State Chem., 1995, Vol.116, p.170-178 [Non-Patent Document 4] Masaki Nakamura, Noboru Kimizuka, Takahiko Mouri, Mitsumasa Isobe, "Synthesis and crystal structure of homologous phase, InFeO3(ZnO)m (m: natural number) and its isomorphic compounds", Solid State Physics, 1993, Vol.28, No.5, pp.317-327 [Non-Patent Document 5] K. Nomura, H. Ohta, K. Ueda, T. Kamiya, M. Hirano, and H. Hosono, "Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor", SCIENCE, 2003, Vol.300, p.1269-1272 [Non-Patent Document 6] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, and H. Hosono, "Room-temperature fabrication of transparent flexible thin-film transistors using amorphous oxide semiconductors", NATURE, 2004, Vol.432 p.488-492 Summary of the Invention [Problem to be solved by the invention]

[0009] To manufacture a highly reliable semiconductor device having a thin film transistor having stable electrical characteristics One of the objectives of the project is to [Means for solving the problem]

[0010] A semiconductor device having a thin film transistor in which a semiconductor layer including a channel formation region is an oxide semiconductor film In a method for manufacturing an electronic device, the purity of an oxide semiconductor film is increased and impurities such as moisture are reduced. In addition, a heat treatment for dehydration or dehydrogenation is performed on the oxide semiconductor film. The impurities such as moisture present not only in the upper and lower portions but also in the gate insulating layer 402 are reduced. The present invention reduces impurities such as moisture that are present at the interface between the oxide semiconductor film and the film provided by the insulating film.

[0011] In order to reduce impurities such as moisture, the oxide semiconductor film is formed and then exposed. in an inert gas atmosphere of nitrogen or rare gas (argon, helium, etc.), or Heat treatment is performed at 200°C or higher, preferably 400°C to 600°C, under reduced pressure, and oxidation is performed. The moisture content of the semiconductor film is then reduced. Then, the film is heated in an oxygen atmosphere at a temperature between room temperature and 100°C. Cool slowly at 40°C.

[0012] The film is formed by heat treatment under an inert gas atmosphere such as nitrogen or argon, or under reduced pressure. After reducing the moisture content in the oxide semiconductor film, it was cooled in an oxygen atmosphere and used to fabricate a thin film transistor. To improve the electrical characteristics of thin film transistors and increase the mass productivity of high-performance thin film transistors. To achieve this.

[0013] The heating temperature conditions were varied, and multiple samples were heat-treated under a nitrogen atmosphere using a thermal desorption analyzer. Measured by TDS (Thermal Desorption Spectroscopy) The results are shown in Figures 5, 6, and 7.

[0014] The thermal desorption analyzer measures the gas components that are desorbed from the sample while the sample is heated and heated in a high vacuum. This is an instrument that detects and identifies gases and gases desorbed from the surface and inside of a sample using a quadrupole mass spectrometer. Here, a thermal desorption spectrometer (product name: EM) manufactured by Electron Science Corporation is used. The measurement conditions were a temperature rise of about 10°C / min, and the measurement was performed at about 1×10 -7 The vacuum level was 1500 Pa. The SEM voltage was 1500 V, and the Dwell Time was e is set to 0.2 [sec], and the number of channels used is 23. 2 Ionization of O Coefficient 1.0, H 2 The fragmentation coefficient of O is 0.805, and that of H is 0.805. 2 O's through pass officer Number 1.56, H 2 The pumping rate of O is set to 1.0.

[0015] Figure 5 shows a comparison sample with only a glass substrate and a sample with a 50 nm thick In-G The results of TDS are shown in comparison with a sample (sample 1) on which a-Zn-O-based non-single crystal film was formed. Figure 5 shows the graph of H 2 The results of the measurement of O are shown. A peak is observed around 300°C. Therefore, moisture (H 2 O) and other impurities are removed. You can see that it is separated.

[0016] Figure 6 shows a non-single crystal In-Ga-Zn-O film with a thickness of 50 nm formed on a glass substrate. The deposited sample (Sample 1) and a 50 nm thick In-Ga-Zn- After forming the O-based non-single crystal film, it was heated at 350°C in air for 1 hour. The sample (sample 2) was heated at 350°C in a nitrogen atmosphere for 1 hour. This is a comparison with the sample (sample 3) that was 2 The TDS measurement results for O are shown below. From the results in FIG. 6, it can be seen that the peak intensity in the vicinity of 300°C in Sample 3 is The moisture content is lower than that of sample 2, which indicates that the moisture content (H 2 O) It can be seen that the impurities are eliminated in the nitrogen atmosphere rather than in the air atmosphere. Heating the film with 2 It can be seen that impurities such as fluorine-containing phosphate can be reduced.

[0017] Figure 7 shows a 50 nm thick In-Ga-Zn-O non-single crystal film formed on a glass substrate. The sample (sample 1) was heated at 250°C for 1 hour in a nitrogen atmosphere. The sample (Sample 4) was heated at 350°C for 1 hour in a nitrogen atmosphere. The treated sample (sample 3) was heated at 450°C for 1 hour in a nitrogen atmosphere. The sample that was heat-treated (sample 5) and the sample that was heated at 350°C in a nitrogen atmosphere for 10 min were The H 2 TDS measurement results for O 7 is a graph showing the relationship between the heating temperature in a nitrogen atmosphere and the I Moisture (H) desorbed from n-Ga-Zn-O non-single crystal film 2 O) and other impurities can be reduced. It can be seen that...

[0018] In addition, from the graphs in Figures 6 and 7, the moisture content (H 2 O) The first peak indicates the desorption of impurities such as water (H 2 O) etc. A second peak indicating the elimination of the impurity can be confirmed.

[0019] The samples that were heat-treated at 450°C in a nitrogen atmosphere were then left in the air at room temperature for one week. Even after leaving it for about a few hours, no moisture was observed to desorb at temperatures above 200°C. It has been found that Ga-Zn-O based non-single crystal films are stabilized.

[0020] In addition, the heating temperature conditions under nitrogen atmosphere were 150℃, 175℃, 200℃, 225℃, and 25 0℃, 275℃, 300℃, 325℃, 350℃, 375℃, 400℃, 425℃, 45 The carrier concentration was measured at 100° C. and 0° C. The results are shown in FIG.

[0021] From the results of Figures 4, 5, 6, and 7, it can be seen that the In-G Moisture (H 2 O) and other impurities are eliminated, and the It can be seen that there is a relationship between the change in the ZnO concentration and the In-Ga-Zn-O non-single crystal film. Moisture (H 2 The carrier concentration increases due to the elimination of impurities such as SiO.

[0022] In addition, TDS measurement revealed that H 2 In addition to O, there are H, O, OH, and H 2 , O 2 , N, N 2 , and Ar When measurements were performed on each of the 2 O, H, O, and OH have intensity peaks. Although the H 2 , O 2 , N, N 2 No peaks were observed for Ar and Ar. The material is a glass substrate with a 50 nm thick In-Ga-Zn-O non-single crystal film formed on it. The heating conditions were 250°C for 1 hour in a nitrogen atmosphere and 350°C for 1 hour in a nitrogen atmosphere. 10 hours at 350℃ in nitrogen atmosphere, 1 hour at 350℃ in air atmosphere, 1 hour at 450℃ As a comparative example, a non-single crystal In-Ga-Zn-O film without heat treatment and a glass substrate were used. The mass and mass of each were measured.

[0023] From the above results, by heat treatment of the In-Ga-Zn-O system non-single crystal film, In other words, the In-Ga-Zn-O system Moisture (H 2 O) is released, and the decomposition of water molecules produces H, O, and O. H and other substances are also released. Note that In-Ga-Zn-O non-single crystal films also contain hydrogen and OH. It is believed that these are also released concomitantly during heat treatment.

[0024] In this specification, under an inert gas atmosphere of nitrogen or rare gas (argon, helium, etc.), Alternatively, the heat treatment under reduced pressure is referred to as a heat treatment for dehydration or dehydrogenation. So, what happens when this heat treatment causes H 2 Dehydrogenation is defined as the process of desorption of hydrogen as hydrogen. However, for convenience, it is called dehydration or dehydrogenation including the elimination of H, OH, etc. It is decided.

[0025] By performing heat treatment under an inert gas, impurities (H 2 O. After reducing the amount of ions (H, OH, etc.) and increasing the carrier concentration, the material is cooled slowly. The carrier concentration of the oxide semiconductor layer is increased by forming an oxide insulating film in contact with the oxide semiconductor layer. Reducing this leads to improved reliability.

[0026] The oxide semiconductor layer is heat-treated in a nitrogen atmosphere to reduce its resistance (the carrier concentration is high). Circle, preferably 1×10 18 / cm 3 The above steps are carried out to form an oxide semiconductor layer with low resistance. Then, an oxide insulating film is formed in contact with the oxide semiconductor layer having a low resistance. In the low-resistance oxide semiconductor layer, at least a region in contact with the oxide insulating film is made high-resistance ( The carrier concentration is reduced, preferably to 1×10 18 / cm 3 (less than 10000 times) and high resistance oxide semiconductor During the process of the semiconductor device, the semiconductor device is exposed to an inert gas atmosphere (or reduced pressure). By heating under high pressure, slowly cooling in an oxygen atmosphere, and forming an oxide insulating film, It is important to increase or decrease the carrier concentration in the oxide semiconductor layer. By performing heat treatment for dehydration or dehydrogenation, the oxide semiconductor layer becomes oxygen-deficient. n-type (n - , n + Then, an oxide insulating film is formed to form an oxide semiconductor. It can be said that the body layer is made i-type by making it oxygen-rich. When an oxide insulating film is formed on an nO-based non-single crystal film, the carrier concentration of the oxide insulating film is The carrier concentration shown by the dotted line 10 in the figure (1×10 14 / cm 3 This results in the following: To manufacture and provide a semiconductor device having a thin film transistor having good electrical characteristics and high reliability It becomes possible to do so.

[0027] Note that the oxide insulating film formed in contact with the low-resistance oxide semiconductor layer is resistant to moisture and hydrogen ions. Nya, OH - An inorganic insulating film is used to block impurities such as silicon nitride. A silicon film, a silicon oxide film, or a silicon nitride oxide film is used.

[0028] Furthermore, after forming an oxide insulating film as a protective film on the low-resistance oxide semiconductor layer, A second heating may be performed after the oxide insulating film is formed on and in contact with the oxide semiconductor layer and serves as a protective film. After forming the thin film transistor, a second heating process reduces the variation in the electrical characteristics of the thin film transistor. It is possible.

[0029] The hydrogen content of the oxide semiconductor layer is determined not only by the hydrogen contained in the layer, but also by the water (H 2 O), MO Hydrogen can take various forms such as H and MH (M is a metal element), but the average hydrogen concentration is the absolute amount. The value or peak value is 3×10 20 cm -3 Less than 1×10 20 cm -3 Below Below.

[0030] These concentration ranges were obtained by secondary ion mass spectrometry (SIMS) or by its data. The data is obtained based on the

[0031] The above configuration solves at least one of the above problems.

[0032] The oxide semiconductor used in this specification is, for example, InMO 3 (ZnO) m Expressed as (m>0) A thin film is formed, and a thin film transistor is fabricated using the thin film as an oxide semiconductor layer. In addition, M is one or more metal elements selected from Ga, Fe, Ni, Mn, and Co. For example, M can be Ga, Ga and Ni, or Ga In some cases, the oxide semiconductor may contain the above-mentioned metal elements other than Ga, such as Fe. In addition to the metallic elements contained as M, Fe, Ni and other transition metals are also contained as impurity elements. In this specification, the term "I" refers to a transition metal or an oxide thereof. nMO 3 (ZnO) m In the oxide semiconductor layer with a structure represented by (m>0), M is G The oxide semiconductor with the structure containing a is called the In-Ga-Zn-O oxide semiconductor, and the thin film of the oxide semiconductor is It is also called the In-Ga-Zn-O system non-single crystal film.

[0033] In addition to the above, In-Sn-Zn- O-based, In-Al-Zn-O-based, Sn-Ga-Zn-O-based, Al-Ga-Zn-O-based, S n-Al-Zn-O series, In-Zn-O series, In-Ga-O series, Sn-Zn-O series, Al -Zn-O, In-O, Sn-O, and Zn-O oxide semiconductors can be used. The oxide semiconductor layer may contain silicon oxide. By including silicon oxide (SiOx(X>0)) which inhibits oxidation, In the case where a heat treatment is performed after the formation of an oxide semiconductor layer, crystallization of the oxide semiconductor layer can be suppressed. Note that the oxide semiconductor layer is preferably in an amorphous state and is partially crystallized. It may be possible.

[0034] The oxide semiconductor is preferably an oxide semiconductor containing In, more preferably an oxide semiconductor containing In and In order to make the oxide semiconductor layer i-type (intrinsic), Hydrogenation or dehydrogenation and formation of an oxide insulating film in contact with the oxide semiconductor are effective.

[0035] In addition, since thin-film transistors are easily damaged by static electricity, etc., It is preferable to provide a protection circuit for protecting the driver circuit on the same substrate as the line. is preferably configured using a nonlinear element using an oxide semiconductor.

[0036] In addition, the gate insulating layer and the oxide semiconductor film are processed continuously (continuously) without being exposed to the air. It may be subjected to a continuous process (also called in-situ process or continuous deposition). By performing the treatment continuously without causing the oxide semiconductor film to be damaged, the interface between the gate insulating layer and the oxide semiconductor film is free from water and halogen. It is formed without being contaminated by atmospheric components or impurities suspended in the air, such as hydrocarbons. Therefore, the variation in the characteristics of the thin film transistors can be reduced.

[0037] In this specification, the term "successive processing" refers to the first processing step performed by the PCVD method or the sputtering method. During the entire process from the deposition of the substrate to the second treatment step using PCVD or sputtering, The environment in which the substrates are processed is always in a vacuum or This means that the atmosphere is controlled in an inert gas (nitrogen or rare gas). By performing subsequent processing, reattachment of moisture, etc. to the cleaned substrate can be avoided, and film formation, etc. can be performed. The following processing can be performed.

[0038] To carry out a series of processes from the first processing step to the second processing step in the same chamber is considered to be within the scope of continuous processing in this specification.

[0039] In addition, a series of processes from the first process to the second process are carried out in different chambers. In this case, after the first processing step is completed, the substrate is transported between chambers without being exposed to the atmosphere. The application of a second treatment is also considered to be within the scope of the continuous treatment in this specification.

[0040] Between the first and second processing steps, a substrate transfer step, an alignment step, and a slow cooling step are performed. or a step of heating or cooling the substrate to a temperature required for the second step. However, such a process is considered to be within the scope of the continuous process in this specification.

[0041] However, the first step is to use liquids in the cleaning process, wet etching, and resist formation. If the first processing step is between the second processing step, it does not fall within the scope of continuous processing as used herein. Let's say that's not the case. Effect of the Invention

[0042] It is possible to manufacture a thin film transistor having stable electrical characteristics. A semiconductor device having a good and reliable thin film transistor can be manufactured. [Brief description of the drawings]

[0043] [Figure 1] 1A to 1C are cross-sectional views illustrating a manufacturing process of a semiconductor device according to one embodiment of the present invention. [Diagram 2] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 3] FIG. 2 is a cross-sectional view illustrating an electric furnace used in one embodiment of the present invention. [Figure 4] 1 is a graph showing the carrier concentration of an oxide semiconductor layer versus heating temperature. [Diagram 5] 1 is a graph showing the results of TDS measurement. [Figure 6] 1 is a graph showing the results of TDS measurement. [Figure 7] 1 is a graph showing the results of TDS measurement. [Figure 8] 1A to 1C are cross-sectional views illustrating a manufacturing process of a semiconductor device according to one embodiment of the present invention. [Figure 9]1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 10] 1A to 1C are cross-sectional views illustrating a manufacturing process of a semiconductor device according to one embodiment of the present invention. [Figure 11] 1A to 1C are cross-sectional views illustrating a manufacturing process of a semiconductor device according to one embodiment of the present invention. [Figure 12] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 13] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 14] 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 15] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 16] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 17] FIG. 1 illustrates a pixel equivalent circuit of a semiconductor device according to one embodiment of the present invention. [Figure 18] 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 19] FIG. 1 is a block diagram illustrating a semiconductor device according to one embodiment of the present invention. [Figure 20] FIG. 2 is a diagram illustrating a configuration of a signal line driver circuit. [Figure 21] 4 is a timing chart illustrating an operation of the signal line driver circuit. [Figure 22] 4 is a timing chart illustrating an operation of the signal line driver circuit. [Figure 23] FIG. 2 is a diagram illustrating a configuration of a shift register. [Figure 24] 24 is a diagram for explaining a connection configuration of the flip-flop shown in FIG. 23. [Diagram 25] 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 26] 1A and 1B are diagrams illustrating examples of usage of electronic paper. [Figure 27] FIG. 1 is an external view illustrating an example of an electronic book. [Figure 28] 1A and 1B are external views illustrating examples of a television device and a digital photo frame. [Figure 29] FIG. 1 is an external view illustrating an example of a gaming machine. [Diagram 30] FIG. 1 is an external view illustrating an example of a portable computer and a mobile phone. [Diagram 31] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Diagram 32] 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 33] 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 34] 1A and 1B are a cross-sectional view and a top view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 35] 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 36] 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 37] 1A and 1B are diagrams illustrating a structure of an oxide semiconductor layer used in calculations. [Figure 38] 13A to 13C are diagrams illustrating calculation results of oxygen concentrations in oxide semiconductor layers. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0044] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and various modifications in form and details are possible by those skilled in the art. The present invention is not limited to the description of the following embodiments. It is not something that can be done.

[0045] (Embodiment 1) A semiconductor device and a method for manufacturing the semiconductor device will be described with reference to FIGS.

[0046] FIG. 2A is a plan view of a thin film transistor 470 included in the semiconductor device described in this embodiment. FIG. 2B is a cross-sectional view taken along line C1-C2 in FIG. 2A. The transistor 470 is an inverted staggered thin film transistor, and the substrate 40 is a substrate having an insulating surface. 0, a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, a source electrode The thin film transistor 470 also includes a drain electrode layer 405a and a drain electrode layer 405b. In addition, an oxide insulating film 407 in contact with the oxide semiconductor layer 403 is provided.

[0047] The oxide semiconductor layer 403 is formed by removing at least moisture or the like which is an impurity after the formation of the oxide semiconductor film. Heat treatment to reduce the capacitance (heat treatment for dehydration or dehydrogenation) is performed, and the resistance is reduced (capacitance The rear concentration is increased, preferably 1×10 18 / cm 3 Next, in an oxygen atmosphere, The oxide insulating film 407 is formed in contact with the oxide semiconductor layer 403. As a result, the resistance increases (the carrier concentration decreases, preferably to 1×10 18 / cm 3 (less than) The oxide semiconductor film can be used as a channel formation region.

[0048] In addition, the water content (H 2 O) and other impurities After the desorption process, the mixture is cooled slowly in an oxygen atmosphere. After heat treatment and slow cooling in an oxygen atmosphere, an oxide insulating film is formed in contact with the oxide semiconductor layer. The carrier concentration of the oxide semiconductor layer is reduced by performing the above-mentioned process. This leads to improved reliability.

[0049] Note that the oxide semiconductor layer 403 is not only provided in the oxide semiconductor layer 403 but also provided in the gate insulating layer 402 and provided above and below the gate insulating layer 402. Specifically, the interface between the gate insulating layer 402 and the oxide semiconductor layer 403 The water that exists at the interface between the oxide insulating film 407 and the oxide semiconductor layer 403 and at the interface between the oxide insulating film 407 and the oxide semiconductor layer 403 Impurities such as minerals are reduced.

[0050] In addition, the source and drain electrode layers 405a and 40 5b: Titanium, aluminum, manganese, magnesium, zirconium, beryllium The material is made of one or more of the above elements. Alternatively, a laminate of an alloy film and the like may be formed.

[0051] The oxide semiconductor layer 403 including the channel formation region is formed using an oxide material having semiconductor characteristics. Typically, an In-Ga-Zn-O based non-single crystal is used.

[0052] 1A to 1D are cross-sectional views showing a manufacturing process of the thin film transistor 470 shown in FIG. .

[0053] In FIG. 1A, a gate electrode layer 401 is formed on a substrate 400 having an insulating surface. An insulating film serving as a base film may be provided between the substrate 400 and the gate electrode layer 401. The base film has a function of preventing the diffusion of impurity elements from the substrate 400. a silicon oxide film, a silicon nitride film, or a silicon oxynitride film; The gate electrode layer 401 can be formed of a laminated structure of several films. Butan, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, sapphire Using metal materials such as indium or alloy materials mainly composed of these, it is possible to form a single layer or multilayer. It can be formed as follows.

[0054] For example, the gate electrode layer 401 may have a two-layer laminate structure of molybdenum on an aluminum layer. A two-layer structure with a layer of molybdenum laminated on a copper layer, or a two-layer structure with a layer of molybdenum laminated on a copper layer, The structure is a two-layer structure with a titanium nitride layer or tantalum nitride layer laminated on a copper layer, and a titanium nitride layer and a molybdenum layer. It is preferable to use a two-layer structure in which a tungsten layer is laminated with a butyl layer. A layer of tungsten or tungsten nitride and a layer of aluminum and silicon alloy or aluminum It is possible to form a three-layer structure by laminating a titanium-titanium alloy layer and a titanium nitride layer or a titanium layer. preferable.

[0055] Next, a gate insulating layer 402 is formed over the gate electrode layer 401 .

[0056] The gate insulating layer 402 is formed by depositing silicon oxide using a plasma CVD method or a sputtering method. A silicon layer, a silicon nitride layer, a silicon oxynitride layer or a silicon oxynitride layer may be formed in a single layer or For example, the deposition gas is SiH 4 , oxygen and nitrogen A silicon oxynitride layer may be formed by plasma CVD.

[0057] The sputtering method uses a high-frequency power source as the sputtering power source. There are two types of sputtering: DC sputtering and pulsed DC sputtering, which applies a bias in a pulsed manner. RF sputtering is mainly used to deposit insulating films, while DC The sputtering method is mainly used when forming a metal film.

[0058] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The sputtering equipment can deposit layers of different materials in the same chamber, or multiple layers in the same chamber. It is also possible to form films by discharging multiple types of materials simultaneously using the bar.

[0059] In addition, a magnetron sputtering method using a magnet mechanism inside the chamber is used. E using a plasma generating device using microwaves instead of glow discharge. There is a sputtering device that uses the CR sputtering method.

[0060] In addition, as a method for forming a film using a sputtering method, a target material and a sputtering method are used during film formation. Reactive sputtering is a method in which a compound thin film is formed by chemically reacting the components of the sputtering gas with the There are also sputtering methods in which a voltage is applied to the substrate during deposition, and bias sputtering methods in which a voltage is also applied to the substrate during deposition.

[0061] Next, an oxide semiconductor film is formed over the gate insulating layer 402.

[0062] Note that before the oxide semiconductor film is formed by a sputtering method, argon gas is introduced. A reverse sputtering process is performed to generate plasma, and the gate insulating layer 402 is adhered to the surface of the gate insulating layer 402. It is preferable to remove particles that are generated by the reverse sputtering. Without applying a voltage, a voltage was applied to the substrate side using an RF power source in an argon atmosphere. This is a method of modifying the surface by forming plasma in the atmosphere. Helium may also be used. In addition, oxygen, N 2 The atmosphere with O etc. Alternatively, the mixture may be added to an argon atmosphere. 2 , C.F. 4 Even if you add the atmosphere good.

[0063] The oxide semiconductor film was formed by sputtering using an In-Ga-Zn-O metal oxide target. The oxide semiconductor film is formed by a deposition method under a rare gas (typically, argon) atmosphere. , in an oxygen atmosphere, or in an atmosphere of rare gas (typically argon) and oxygen. The film can be formed by a tarring method.

[0064] The gate insulating layer 402 and the oxide semiconductor film are successively formed without exposure to air. By continuously forming the film without exposing it to the air, the interface is free from water and hydrocarbons. The interfaces of each layer are formed without being contaminated by atmospheric components or impurity elements floating in the air. Therefore, the variation in the characteristics of the thin film transistors can be reduced.

[0065] The oxide semiconductor film is formed into an island-shaped oxide semiconductor layer (first oxide semiconductor layer) by a photolithography process. The resulting conductive layer is then processed into a conductor layer (see Figure 1(A)).

[0066] The oxide semiconductor layer is heated under an inert gas atmosphere (nitrogen, helium, neon, argon, etc.) or After the heat treatment under reduced pressure, the mixture is slowly cooled in an oxygen atmosphere (see FIG. 1(B)). The oxide semiconductor layer 430 is subjected to heat treatment in the above atmosphere. It is possible to remove impurities such as hydrogen and water contained in the

[0067] In the heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. It is preferable that the nitrogen introduced into the heat treatment device does not contain hydrogen or the like. The purity of rare gases such as helium, neon, and argon is preferably 6N (99.9999%) or higher. or 7N (99.99999%) or more (i.e. impurity concentration is 1 ppm or less, preferably It is preferable to keep the concentration of the ion exchange resin at 0.1 ppm or less.

[0068] Heat treatment can be performed using an electric furnace or a GRTA (Gas-Reactor-Atomic-Tapered Atomic) method. Rapid Thermal Annealing (LRTA) using lamp light (La Use instantaneous heating methods such as the mp Rapid Thermal Anneal method. It is possible.

[0069] Here, as one mode of heat treatment of the oxide semiconductor layer 430, a heating method using an electric furnace 601 is used. The method will be explained with reference to FIG.

[0070] FIG. 3 is a schematic diagram of an electric furnace 601. A heater 603 is provided on the outside of a chamber 602. The chamber 602 is heated by a heater. A susceptor 605 for mounting a substrate 604 is provided in the chamber 602. The chamber 602 is provided with a gas supply means 606 and an exhaust means 607. A gas supply means 606 is provided to introduce gas into the chamber 602. In addition, the inside of the chamber 602 is evacuated by the exhaust means 607, or the inside of the chamber 602 is evacuated. The temperature rise rate of the electric furnace 601 is set to 0.1°C / min or more and 20°C / min or less. It is preferable to set the temperature drop rate of the electric furnace 601 to 0.1° C. / min or less and 15° C. / min or less. It is preferable to set the rate to 1 / min or less.

[0071] The gas supply means 606 includes a gas supply source 611a, a gas supply source 611b, and a pressure regulating valve 612a. , pressure regulating valve 612b, refiner 613a, refiner 613b, mass flow controller 61 4a, mass flow controller 614b, stop valve 615a, stop valve 61 In this embodiment, the gas supply source 611a, the gas supply source 611b, and the chamber It is preferable to provide a purifier 613a and a purifier 613b between the purifier 602 and the purifier 613. a, purifier 613b, the gas supply source 611a, the gas supply source 611b are provided. The purifier 613a purifies impurities such as water and hydrogen from the gas introduced into the chamber 602. By removing the gas using the purifier 613b, water, hydrogen, etc. are prevented from entering the chamber 602. can be reduced.

[0072] In this embodiment, nitrogen or a rare gas is introduced into the chamber 602 from a gas supply source 611a. The inside of the chamber is filled with nitrogen or rare gas atmosphere, and the temperature is preferably 200°C to 600°C. In a chamber 602 heated to 400° C. or more and 450° C. or less, The oxide semiconductor layer 430 is heated to dehydrate or can carry out dehydrogenation.

[0073] Alternatively, the temperature is increased to 200° C. or higher and 600° C. or lower, preferably 400° C. or lower, under reduced pressure by an exhaust means. In a chamber 602 heated to 450° C. or less, an oxide film formed on a substrate 604 is By heating the oxide semiconductor layer 430, the oxide semiconductor layer 430 is dehydrated or dehydrogenated. It is possible to do so.

[0074] Next, the introduction of nitrogen or a rare gas into the chamber 602 from the gas supply source 611a is stopped. At the same time, the heater is turned off. Next, oxygen is supplied from the gas supply source 611b to the chamber 6 02, and the chamber 602 of the heating device is gradually cooled. The inside of the gas supply source 611b is filled with oxygen and the substrate 604 is gradually cooled. Therefore, it is preferable that the oxygen introduced into the chamber 602 does not contain impurities such as water and hydrogen. Alternatively, the purity of oxygen introduced from the gas supply source 611b into the chamber 602 is set to 6N. (99.9999%) or less, preferably 7N (99.99999%) or less (i.e., oxygen It is preferable to set the impurity concentration in the oxide semiconductor to 1 ppm, preferably 0.1 ppm. The conductor layer is gradually heated in an inert gas atmosphere or under reduced pressure and then cooled in an oxygen atmosphere. Cooling reduces the resistance (increases the carrier concentration, preferably 1×10 18 / cm 3 (End) In this way, the resistance of the oxide semiconductor layer 431 (second oxide semiconductor layer) can be reduced.

[0075] As a result, the reliability of the thin film transistor to be formed later can be improved.

[0076] In addition, when the heat treatment is performed under reduced pressure, oxygen is flowed into the chamber 602 after the heat treatment. The pressure can then be returned to atmospheric pressure and cooled.

[0077] Also, oxygen is introduced into the chamber 602 from the gas supply source 611b, and at the same time, helium, Introduce one or both of a rare gas such as neon or argon and nitrogen into the chamber 602. You may do so.

[0078] After the substrate 604 in the chamber 602 of the heating device was cooled to 300° C., 4 may be moved to a room temperature atmosphere. This can reduce the cooling time of the substrate 604. can.

[0079] In addition, if the heating device is a multi-chamber device, the heating process and the cooling process are performed in different chambers. Typically, nitrogen or a rare gas is filled and the temperature is 200°C to 600°C. In the first chamber, which is preferably heated to 400° C. or higher and 450° C. or lower, The oxide semiconductor layer on the plate is heated. Then, the plate is transferred to a transfer chamber into which nitrogen or a rare gas is introduced. The above-mentioned oxidizing agent is placed in a second chamber which is filled with oxygen and is at a temperature of 100° C. or less, preferably at room temperature. The heat-treated substrate is then moved and cooled. Through these steps, throughput is improved. It is possible to do so.

[0080] In addition, the heat treatment of the oxide semiconductor layer under an inert gas atmosphere or under reduced pressure can form island-shaped oxide It is also possible to perform this treatment on the oxide semiconductor film before processing it into an oxide semiconductor layer. In that case, an inactive After the oxide semiconductor layer 430 is subjected to heat treatment in a gas atmosphere or under reduced pressure, The substrate is then slowly cooled to above room temperature and below 100°C using a heating device. The filling process is carried out.

[0081] The state of the oxide semiconductor layer 430 after heat treatment under an inert gas atmosphere or under reduced pressure is as follows: It is preferably in an amorphous state, but may be partially crystallized.

[0082] Next, a conductive film is formed over the gate insulating layer 402 and the oxide semiconductor layer 431.

[0083] The conductive film material is an element selected from Al, Cr, Ta, Ti, Mo, and W, or The alloys may be composed of the elements mentioned above or may be combinations of the elements mentioned above.

[0084] In addition, when a heat treatment is performed after the formation of the conductive film, the conductive film is required to have heat resistance capable of withstanding the heat treatment. Aluminum alone has problems such as poor heat resistance and susceptibility to corrosion. Therefore, it is preferable to form it in combination with a heat-resistant conductive material. Heat-resistant conductive materials that can be used include titanium (Ti), tantalum (Ta), and tungsten (Tb). Tennen (W), Molybdenum (Mo), Chromium (Cr), Neodymium (Nd), Scandium ( Sc), or an alloy containing the above elements, or a combination of the above elements The alloy may be made of a combination of the above elements or a nitride containing the above elements.

[0085] The oxide semiconductor layer 431 and the conductive film are etched to form the oxide semiconductor layer 432 and the source electrode. The drain electrode layers 405a and 405b are formed (see FIG. 1C). The oxide semiconductor layer 432 is only partially etched to form a groove (recess). The result is 432.

[0086] The oxide insulating film 407 is formed in contact with the oxide semiconductor layer 432. Impurities such as water and hydrogen are mixed into the oxide insulating film 407 by a CVD method, a sputtering method, or the like. Here, the oxide insulating film 407 is formed by a sputtering method. The oxide insulating film is formed in contact with the oxide semiconductor layer having a low resistance. The film 407 is resistant to moisture, OH, - These are reduced and blocked from entering from the outside. The inorganic insulating film is typically a silicon nitride film, a silicon oxide film, or a silicon nitride oxide film. A recombinant membrane is used.

[0087] In this embodiment, a silicon oxide film with a thickness of 300 nm is formed as the oxide insulating film 407. The substrate temperature during film formation may be from room temperature to 300° C. in this embodiment. The silicon oxide film is formed by sputtering using a rare gas (typically argon). In an atmosphere of rare gas (typically argon) and oxygen, or in an atmosphere of rare gas (typically argon) and oxygen The target may be a silicon oxide target or a silicon target. For example, oxygen and nitrogen can be used with a silicon target. Silicon oxide can be formed by sputtering in a nitrogen atmosphere.

[0088] A sputtering method, a PCVD method, or the like is applied to the oxide semiconductor layer 432 having a low resistance. When the oxide insulating film 407 is formed, the oxide semiconductor layer 432 has a low resistance. In addition, the region in contact with the oxide insulating film 407 is made to have a high resistance (the carrier concentration is reduced, preferably 1×10 18 / cm 3 The semiconductor layer can be made to have a high resistance. In the device manufacturing process, heating in an inert gas atmosphere (or reduced pressure) and oxygen atmosphere The carrier concentration of the oxide semiconductor layer is increased or decreased by slow cooling at room temperature and forming an oxide insulating film. It is important that the oxide semiconductor layer 432 is an oxide semiconductor having a high resistance oxide semiconductor region. Through the above steps, a thin-film transistor is obtained. A star 470 can be fabricated (see FIG. 1(D)).

[0089] By performing the heat treatment for the dehydration treatment or the dehydrogenation treatment, Impurities contained (H 2 O, H, OH, etc.) to increase the carrier concentration, and then oxygen After the gradual cooling, an oxide insulating film is formed in contact with the oxide semiconductor layer. The carrier concentration in the oxide semiconductor layer is reduced, and the reliability of the thin film transistor 470 is improved. It can be improved.

[0090] After the oxide insulating film 407 is formed, Then, the thin film transistor 470 is subjected to a heat treatment (preferably at 150° C. or higher and lower than 350° C.). For example, a heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. In this case, the oxide semiconductor layer 432 is heated in contact with the oxide insulating film 407. Therefore, the variation in the electrical characteristics of the thin film transistor 470 can be reduced.

[0091] (Embodiment 2) In this embodiment mode, a semiconductor device and a manufacturing method of the semiconductor device which are different from those in Embodiment Mode 1 will be described with reference to FIGS. 9. The same parts as those in the first embodiment or parts having similar functions, The steps can be performed in the same manner as in the first embodiment, and repeated explanations will be omitted.

[0092] FIG. 9A is a plan view of a thin film transistor 460 included in the semiconductor device described in this embodiment. 9B is a cross-sectional view taken along line D1-D2 in FIG. The transistor 460 is a bottom-gate type thin film transistor, and is a substrate having an insulating surface. On the substrate 450, a gate electrode layer 451, a gate insulating layer 452, a source electrode layer or a drain electrode layer are formed. The thin film transistor 4 includes the electrode layers 455a and 455b and the oxide semiconductor layer 453. An oxide insulating film 457 is provided to cover the oxide semiconductor layer 60 and to be in contact with the oxide semiconductor layer 453 . The oxide semiconductor layer 453 is formed using an In-Ga-Zn-O-based non-single crystal.

[0093] The thin film transistor 460 has a gate insulating layer in the entire region including the thin film transistor 460. A layer 452 is present between the gate insulating layer 452 and a substrate 450 that is a substrate having an insulating surface. A gate electrode layer 451 is provided. A source electrode layer or a drain electrode layer is provided on the gate insulating layer 452. Drain electrode layers 455a and 455b are provided. A gate insulating layer 452 and An oxide semiconductor layer 453 is provided over the source and drain electrode layers 455a and 455b. Although not shown, a source electrode layer or a drain electrode layer is formed on the gate insulating layer 452. In addition to the gate electrode layers 455a and 455b, a wiring layer is provided. It extends outward from the outer periphery.

[0094] The oxide semiconductor layer 453 is formed by removing at least moisture, which is an impurity, from the oxide semiconductor layer 453 after the oxide semiconductor film is formed. Heat treatment to reduce oxygen (heat treatment for dehydration or dehydrogenation) and The material is cooled slowly to reduce the resistance (the carrier concentration increases, preferably 1×10 18 / cm 3 End Next, the oxide insulating film 457 is formed in contact with the oxide semiconductor layer 453. As a result, the resistance increases (the carrier concentration decreases, preferably to 1×10 18 / cm 3 (less than) The oxide semiconductor film can be used as a channel formation region.

[0095] In addition, the water content (H 2 O) and other impurities After the desorption process, the mixture is cooled slowly in an oxygen atmosphere. After heat treatment and slow cooling in an oxygen atmosphere, an oxide insulating film is formed in contact with the oxide semiconductor layer. The carrier concentration of the oxide semiconductor layer is reduced by performing the above-mentioned process. This leads to improved reliability.

[0096] In addition, the source and drain electrode layers 455a and 45 5b: Titanium, aluminum, manganese, magnesium, zirconium, beryllium The material is selected from one or more of the following: aluminum, thorium, and thorium.

[0097] 8A to 8D are cross-sectional views showing a manufacturing process of the thin film transistor 460 shown in FIG. .

[0098] A gate electrode layer 451 is provided over a substrate 450 having an insulating surface. An insulating film serving as the gate electrode layer 451 may be provided between the substrate 450 and the gate electrode layer 451. The material for the gate electrode layer 1 can be formed similarly to that for the gate electrode layer 401 described in Embodiment 1.

[0099] A gate insulating layer 452 is formed on the gate electrode layer 451. The gate insulating layer 452 is preferably The gate insulating layer 402 can be formed in a manner similar to that of the gate insulating layer 402 in the first embodiment.

[0100] A conductive film is formed on the gate insulating layer 452, and an island-shaped source is formed by a photolithography process. The drain electrode layers 455a and 455b are formed (see FIG. 8A). The source or drain electrode layers 455a and 455b are the same as those in the source electrode layer shown in Embodiment 1. Alternatively, the drain electrode layers 405a and 450b can be formed in a similar manner.

[0101] Next, the gate insulating layer 452 and the source and drain electrode layers 455a and 455b are and forming an island-shaped oxide semiconductor layer 48 on the insulating layer 41 by a photolithography process. Then, a first oxide semiconductor layer 3 is formed (see FIG. 8B).

[0102] The oxide semiconductor layer 483 serves as a channel formation region. The same is formed as above.

[0103] Note that before the oxide semiconductor layer 483 was formed by a sputtering method, argon gas was introduced. The reverse sputtering is performed by introducing the silicon into the gate insulating layer 452 to generate plasma, and the silicon is deposited on the surface of the gate insulating layer 452. It is preferable to remove particles that are in contact with the surface of the substrate.

[0104] The oxide semiconductor layer 483 is subjected to heat treatment for dehydration or dehydrogenation and then subjected to a thermal treatment in an oxygen atmosphere. The heat treatment for dehydration or dehydrogenation is carried out in an inert gas atmosphere ( Nitrogen, helium, neon, argon, etc.) or reduced pressure at 200°C or higher The oxide semiconductor layer 4 is then heated at a temperature of 00° C. or lower, preferably at 400° C. or higher and 450° C. or lower. 83 is heat-treated in the above atmosphere and slowly cooled in an oxygen atmosphere, and the resistance is reduced. (The carrier concentration is increased, preferably 1×10 18 / cm 3 (above) and the oxide with low resistance The oxide semiconductor layer 484 (second oxide semiconductor layer) can be used (see FIG. 8C).

[0105] In the heat treatment for dehydration or dehydrogenation, nitrogen, helium, neon, or argon are used. It is preferable that the rare gas such as argon does not contain water, hydrogen, etc. The purity of nitrogen or rare gases such as helium, neon, and argon introduced into the 9999%) or more, preferably 7N (99.99999%) or more (i.e., impurity concentration of 1 ppm or less, preferably 0.1 ppm or less).

[0106] In addition, the oxide semiconductor layer may be subjected to heat treatment in an inert gas atmosphere or under reduced pressure, and then to heat treatment in an oxygen atmosphere. The slow cooling under air can also be performed on an oxide semiconductor film before it is processed into an island-shaped oxide semiconductor layer. In that case, after the heat treatment of the oxide semiconductor film under an inert gas atmosphere or under reduced pressure, Then, the substrate is gradually cooled to above room temperature and below 100°C in an oxygen atmosphere, and then removed from the heating device. Then, a photolithography process is performed.

[0107] Next, an oxide semiconductor layer 484 is formed by sputtering or PCVD. The oxide insulating film 457 is formed to a thickness of 300 nm. The substrate temperature during film formation is set to room temperature or higher and 300°C or lower. In this embodiment, the temperature is set to 100° C. When the oxide insulating film 457, which is a silicon oxide film, is formed by a sputtering method, the resistance is reduced. In the oxide semiconductor layer 484, at least the oxide insulating film 457 which is a silicon oxide film The area in contact with the substrate is made highly resistive (the carrier concentration is reduced, preferably by 1×10 18 / cm 3 Not yet In the manufacturing process of a semiconductor device, , heating in an inert gas atmosphere (or reduced pressure), slow cooling in an oxygen atmosphere, and oxide insulation It is important to increase or decrease the carrier concentration in the oxide semiconductor layer by forming a film or the like. The oxide semiconductor layer 484 is a high-resistance oxide semiconductor layer 453 (third Thus, a thin film transistor 460 can be manufactured (FIG. 8(D) )reference.).

[0108] By performing heat treatment for dehydration or dehydrogenation, Impurities (H 2 After reducing the concentration of oxygen, H, OH, etc., and increasing the carrier concentration, After the gradual cooling, an oxide insulating film is formed in contact with the oxide semiconductor layer. The carrier concentration in the oxide semiconductor layer is reduced, and the reliability of the thin film transistor 460 is improved. can be improved.

[0109] After the silicon oxide film to be the oxide insulating film 457 is formed, The thin film transistor 460 is subjected to a heat treatment (preferably at 150° C. or higher) under an ambient atmosphere (in the air). For example, a heat treatment at 250°C for 1 hour in a nitrogen atmosphere may be performed. The oxide semiconductor layer 453 is heated in contact with the oxide insulating film 457. By performing the heat treatment, it is possible to reduce the variation in electrical characteristics of the thin film transistor 460. can.

[0110] In addition, this embodiment mode can be freely combined with the first embodiment mode.

[0111] (Embodiment 3) A manufacturing process of a semiconductor device including a thin film transistor will be described with reference to FIGS. do.

[0112] In FIG. 10(A), a light-transmitting substrate 100 is made of barium borosilicate glass or aluminum. A glass substrate such as a borosilicate glass substrate can be used.

[0113] Next, a conductive layer is formed on the entire surface of the substrate 100, and then a first photolithography process is performed. A resist mask is formed, and unnecessary parts of the conductive layer are removed by etching to form wiring and electrodes. (Gate wiring including the gate electrode layer 101, the capacitance wiring 108, and the first terminal 121) At this time, a tapered shape is formed at least at the end of the gate electrode layer 101. Etch to.

[0114] The gate wiring including the gate electrode layer 101, the capacitance wiring 108, and the first terminal 121 of the terminal portion are The materials for the gate electrode layer 401 described in Embodiment 1 can be used as appropriate. When the base electrode layer 101 is made of a heat-resistant conductive material, titanium (Ti), tantalum (T a), Tungsten (W), Molybdenum (Mo), Chromium (Cr), Nd (Neodymium), An element selected from scandium (Sc), or an alloy containing the above elements, or The film is formed of an alloy film combining the above elements, or a nitride film containing the above elements as components.

[0115] Next, a gate insulating layer 102 is formed on the entire surface of the gate electrode layer 101. For 02, a sputtering method, PCVD method, or the like is used, and the film thickness is set to 50 to 250 nm.

[0116] For example, a silicon oxide film is formed by sputtering as the gate insulating layer 102. Of course, the gate insulating layer 102 is not limited to such a silicon oxide film. Silicon oxide nitride film, silicon nitride film, aluminum oxide film, tungsten oxide film, etc. It is formed as a single layer or a multilayer structure made of these materials using other insulating films such as tantalum films. You can do that.

[0117] Next, an oxide semiconductor film (In-Ga-Zn-O-based non-single crystal film) is formed on the gate insulating layer 102. After forming the gate insulating layer 102 by a sputtering method, the gate insulating layer 102 is exposed to the air. By forming an In-Ga-Zn-O non-single crystal film without using a gate insulating layer, This is useful in preventing particles and moisture from adhering to the surface. Metal oxide targets containing In, Ga, and Zn (In-Ga-Zn-O metal oxide targets) Get 2 O 3 :Ga 2 O 3 ZnO=1:1:1) was used as the substrate and target. Distance between the electrodes: 170 mm, pressure: 0.4 Pa, DC power: 0.5 kW, oxygen only, The film is formed under an atmosphere of argon only or argon and oxygen. The use of a power source is preferable because it reduces particles and makes the film thickness distribution uniform. The thickness of the Ga—Zn—O-based non-single crystal film is 5 nm to 200 nm. Then, a film was formed by sputtering using an In-Ga-Zn-O metal oxide target. A 50 nm thick In-Ga-Zn-O based non-single crystal film is formed.

[0118] Next, a second photolithography process is performed to form a resist mask, and the oxide semiconductor film For example, wet etching is performed using a solution of phosphoric acid, acetic acid, and nitric acid. In this manner, unnecessary portions of the oxide semiconductor film are removed to form the oxide semiconductor layer 133 (FIG. 10 (See (A)). Note that the etching method here is not limited to wet etching, but may be dry etching. Etching may also be used.

[0119] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0120] In addition, the etching solution after wet etching is washed away together with the etched material. The waste etching solution containing the removed material is purified to remove the contained material. The indium, etc. contained in the oxide semiconductor layer may be reused from the waste liquid after the etching. By recovering and reusing materials, resources can be used more effectively and costs can be reduced. .

[0121] In order to etch into the desired shape, the etching conditions (etching The etching conditions (etching solution, etching time, temperature, etc.) are adjusted appropriately.

[0122] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, e.g. Chlorine (Cl 2 ), boron chloride (BCl 3 ), silicon chloride (SiCl 4 ), carbon tetrachloride ( CCl 4 ) etc.) are preferred.

[0123] In addition, as the etching gas used in dry etching, a gas containing fluorine (fluorine-based gas) Carbon tetrafluoride (CF 4 ), sulfur fluoride (SF 6 ), nitrogen fluoride (NF 3 ), Trifle Oromethane (CHF 3 ), hydrogen bromide (HBr), oxygen (O 2 ), these gases are Gases containing rare gases such as helium (He) and argon (Ar) can be used. Cut.

[0124] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing method and ICP (Inductively Coupled Plasma) A method such as a plasma-coupled plasma etching method can be used. In order to achieve this, the etching conditions (the amount of power applied to the coil-shaped electrode, the amount of power applied to the electrode on the substrate side) were set. The amount of power applied, the temperature of the electrode on the substrate side, etc. are adjusted appropriately.

[0125] Next, heat treatment is performed for dehydration or dehydrogenation of the oxide semiconductor layer 133. The conductor layer 133 is heated under an inert gas atmosphere (nitrogen, helium, neon, argon, etc.) or After the heat treatment is performed under reduced pressure, the mixture is slowly cooled in an oxygen atmosphere.

[0126] Heat treatment is preferably performed at 200°C or higher. For example, heating at 450°C for 1 hour in a nitrogen atmosphere is recommended. After this heat treatment in a nitrogen atmosphere, the material is gradually cooled in an oxygen atmosphere. The oxide semiconductor layer 133 has a low resistance (high carrier concentration, preferably 1×10 18 / cm 3 As a result, the oxide semiconductor layer 134 with low resistance is formed. (see FIG. 10B). The oxide semiconductor layer 134 has an electric conductivity of 1×10 -1 S / cm More than 1×10 2 S / cm or less is preferable.

[0127] Next, a conductive film 132 made of a metal material is formed on the oxide semiconductor layer 134 by a sputtering method or a immersion method. It is formed by vacuum deposition method (see FIG. 10(C)).

[0128] The conductive film 132 can be formed of the same material as the source or drain electrode layer 4 described in Embodiment 1. Materials similar to those for 05a and 405b can be used as appropriate.

[0129] When a heat treatment is performed after the formation of the conductive film 132, the conductive film 132 is required to have a heat resistance sufficient to withstand the heat treatment. It is preferable to have the

[0130] Next, a third photolithography process is performed to form a resist mask, and then etching is performed. The unnecessary portions of the conductive film 132 are removed to form the source electrode layer or the drain electrode layer 105a, 10 5b and the second terminal 122 are formed (see FIG. 10(D)). For example, the conductive film 132 and the dry etching are performed. When using an aluminum film or an aluminum alloy film, a mixture of phosphoric acid, acetic acid, and nitric acid is used. Wet etching can be performed using a solution containing ammonium peroxide. The conductive film 13 was removed by wet etching using a mixture of hydrogen chloride, ammonia, and water (5:2:2). 2 to form the source electrode layer or the drain electrode layer 105a, 105b. In this etching step, the exposed region of the oxide semiconductor layer 134 is also partially etched. Thus, the source or drain electrode layer 105 is formed as an oxide semiconductor layer 135. The oxide semiconductor layer 135 between 105a and 105b is a thin region. In particular, the source and drain electrode layers 105a and 105b and the oxide semiconductor layer 135 The etching is performed by dry etching at one time, so the source electrode layer or the drain electrode The ends of the electrode layers 105a and 105b and the oxide semiconductor layer 135 are aligned to form a continuous structure. is.

[0131] In addition, in the third photolithography process, the source electrode layer or the drain electrode layer The second terminal 122, which is made of the same material as 105a and 105b, is left in the terminal portion. The terminal 122 is a wiring (a wiring including the source electrode layer or the drain electrode layer 105a, 105b). are electrically connected.

[0132] Also, a resist having regions of multiple thicknesses (typically two types) formed by a multi-tone mask is used. By using a photomask, the number of resist masks can be reduced, simplifying the process and reducing costs. Cost reduction is possible.

[0133] Next, the resist mask is removed, and the gate insulating layer 102, the oxide semiconductor layer 103, and the source electrode A protective insulating layer 107 is formed to cover the electrode layers or drain electrode layers 105a and 105b. The insulating layer 107 is formed using a silicon oxynitride film formed by a PCVD method. The oxide semiconductor layer 13 is provided between the source electrode layer 105a and the drain electrode layer 105b. 5 and the silicon oxynitride film which is the protective insulating layer 107 are provided in contact with each other. As a result, the region of the oxide semiconductor layer 135 in contact with the protective insulating layer 107 becomes highly resistive (carrier concentration is reduced, preferably by 1×10 18 / cm 3 (less than 1000 MHz) and the high-resistance channel formation region It is possible to form the oxide semiconductor layer 103 having the above structure (see FIG. 11A).

[0134] Next, after the protective insulating layer 107 is formed, heat treatment may be performed. The heating process may be carried out in an air or nitrogen atmosphere at a temperature of 150° C. or higher and lower than 350° C. When the oxide semiconductor layer 103 is heated in contact with the protective insulating layer 107, Furthermore, the resistance of the oxide semiconductor layer 103 can be increased, thereby improving the electrical characteristics of the transistor. In addition, the variation in electrical characteristics can be reduced.

[0135] Through the above steps, the thin film transistor 170 can be manufactured.

[0136] Next, a fourth photolithography process is performed to form a resist mask, and a protective insulating layer 107 The gate insulating layer 102 is etched to form a contact layer that reaches the drain electrode layer 105b. A hole 125 is formed. Also, a contact that reaches the second terminal 122 is formed by etching here. A contact hole 127 and a contact hole 126 reaching the first terminal 121 are also formed. A cross-sectional view at this stage is shown in FIG.

[0137] Next, the resist mask is removed, and then a transparent conductive film is formed. is indium oxide (In 2 O 3 ) and indium tin oxide (abbreviated as ITO). It is formed by using a sputtering method or a vacuum deposition method. The etching process of such a material is It is done with a hydrochloric acid-based solution. However, ITO etching is particularly prone to leaving residues, so In order to improve the etching processability, an indium oxide zinc oxide alloy (I n 2 O 3 -ZnO) may also be used.

[0138] Next, a fifth photolithography process is performed to form a resist mask and to form a Thus, unnecessary portions of the transparent conductive film are removed to form the pixel electrode layer 110.

[0139] In addition, in this fifth photolithography process, the gate insulating layer 102 in the capacitance section The protective insulating layer 107 serves as a dielectric, and the capacitance wiring 108 and the pixel electrode layer 110 form a storage capacitance. is formed.

[0140] In the fifth photolithography process, the first terminal 121 and the second terminal 1 22 is covered with a resist mask, leaving the transparent conductive films 128 and 129 formed on the terminal portions. The conductive films 128 and 129 serve as electrodes or wiring for connection to an FPC. The transparent conductive film 128 formed on the gate electrode 121 is a connection electrode that functions as an input terminal of the gate wiring. The transparent conductive film 129 formed on the second terminal 122 serves as a terminal electrode of the source line. This is a connection terminal electrode that functions as an input terminal.

[0141] Next, the resist mask is removed. The cross-sectional view at this stage is shown in FIG. The plan view at this stage corresponds to FIG.

[0142] 13(A1) and 13(A2) are plan views and diagrams of the gate line terminal portion at this stage. FIG. 13(A1) is a cross-sectional view taken along line E1-E2 in FIG. 13(A2). In FIG. 13(A1), a transparent insulating film formed on a protective insulating layer 154 is The transparent conductive film 155 is a terminal electrode for connection that functions as an input terminal. In 1), the terminal portion includes a first terminal 151 made of the same material as the gate wiring, and A connection electrode layer 153 made of the same material as the source wiring is overlapped with the gate insulating layer 152 interposed therebetween. The transparent conductive film 155 is electrically conductive. The portion where the first terminal 121 contacts the transparent conductive film 155 in FIG. 13(A1) is the portion where the first terminal 121 contacts the transparent conductive film 155 in FIG. This corresponds to the portion with which terminal 151 is in contact.

[0143] FIG. 13(B1) and FIG. 13(B2) are different from the source wiring terminal portion shown in FIG. 11(C). The plan view and the cross-sectional view of the different source wiring terminal parts are shown. 1) corresponds to a cross-sectional view taken along the line F1-F2 in FIG. 13(B2). In FIG. 13(B1), The transparent conductive film 155 formed on the protective insulating layer 154 is a connection that functions as an input terminal. In FIG. 13B1, the terminal portion is the same as the gate wiring. The electrode layer 156 formed of the material is a second terminal 150 electrically connected to the source line. The electrode layer 156 overlaps the second terminal 150 via the gate insulating layer 102. 1, and the electrode layer 156 is set to a potential different from that of the second terminal 150, e.g., floating. If you set it to GND, GND, 0V, etc., you can set the capacitance for noise prevention or the capacitance for static electricity prevention. A capacitance can be formed. The second terminal 150 is formed by opening the protective insulating layer 154. It is electrically connected to the transparent conductive film 155 via a through hole.

[0144] A plurality of gate lines, source lines, and capacitance lines are provided according to the pixel density. In addition, in the terminal section, a first terminal has the same potential as the gate wiring, a second terminal has the same potential as the source wiring, The terminal 2 and the third terminal of the same potential as the capacitance wiring are arranged in a row. The number of terminals may be any number and may be determined appropriately by the implementer.

[0145] In this way, five photolithography steps were performed using five photomasks to produce the bottom A pixel thin film having a thin film transistor 170 which is a gate-type staggered thin film transistor. The film transistor and storage capacitor can then be completed. By forming a pixel section by correspondingly arranging them in a matrix, an active matrix type It can be one of the substrates for manufacturing a display device. Such a substrate is called an active matrix substrate.

[0146] When manufacturing an active matrix type liquid crystal display device, an active matrix substrate A liquid crystal layer is provided between the active matrix substrate and a counter substrate having a counter electrode. The counter electrode is fixed to the counter substrate. A fourth terminal electrically connected to the common electrode is provided on the active matrix substrate. This fourth terminal is used to set the common electrode to a fixed potential, such as GND or 0V. This is a terminal for

[0147] In addition, the capacitance wiring is not provided, and the pixel electrode is connected to the gate wiring, the protective insulating layer, and the gate A storage capacitor may be formed by stacking the layers with an insulating layer interposed therebetween.

[0148] In an active matrix type liquid crystal display device, pixel electrodes arranged in a matrix form By driving the selected pixels, a display pattern is formed on the screen. A voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode. The liquid crystal layer disposed between the pixel electrode and the counter electrode is optically modulated, and this optical modulation produces a display pattern. is perceived by the observer as

[0149] When displaying moving images on a liquid crystal display device, the response of the liquid crystal molecules themselves is slow, resulting in image retention. In order to improve the moving image characteristics of the LCD device, There is a driving technique called black insertion, which displays black every other frame.

[0150] In addition, the video characteristics can be improved by increasing the normal vertical sync frequency by 1.5 or 2 times or more. A driving technique called double speed driving may be used.

[0151] In addition, in order to improve the video characteristics of liquid crystal display devices, multiple LEDs (light emitting diodes) are used as backlights. A surface light source is formed by using a diode) light source or multiple EL light sources, etc., and a surface light source is formed. There is also a driving technology that drives each light source to light intermittently within one frame period. In addition, three or more types of LEDs may be used, or white-emitting LEDs may be used. Since multiple LEDs can be controlled, the LE can be switched according to the timing of the optical modulation of the liquid crystal layer. The timing of the LEDs can also be synchronized. This is particularly useful when displaying images with a large proportion of black areas occupying the entire screen. This has the effect of reducing power consumption.

[0152] By combining these driving technologies, the display characteristics such as the video characteristics of the LCD device can be improved. can be improved compared to the conventional method.

[0153] The n-channel transistor disclosed in this specification has an oxide semiconductor film as a channel formation region. These drive technologies can be combined due to their good dynamic characteristics. do.

[0154] In addition, when a light-emitting display device is manufactured, one electrode (also called a cathode) of an organic light-emitting element In order to set the low power supply potential, for example GND or 0V, the cathode is connected to the terminal A fourth terminal is provided for setting a potential, for example, GND, 0V, etc. When manufacturing a display device, a power supply line is provided in addition to a source line and a gate line. Therefore, the terminal section is provided with a fifth terminal that is electrically connected to the power supply line.

[0155] By forming the thin film transistor using an oxide semiconductor, the manufacturing cost can be reduced. In particular, the heat treatment for dehydration or dehydrogenation removes the moisture, which is an impurity, In order to reduce these and increase the purity of the oxide semiconductor film, the dew point in the film formation chamber has been lowered. The electrical properties are excellent without using a special sputtering device or an ultra-high purity metal oxide target. A semiconductor device having a good and reliable thin film transistor can be manufactured.

[0156] The oxide semiconductor layer in the channel formation region is a high resistance region, so that the electrical resistance of the thin film transistor is The characteristics are stabilized and the increase in the off-current can be prevented. Therefore, the electrical characteristics are excellent. Therefore, it is possible to obtain a semiconductor device having a thin film transistor with high reliability.

[0157] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0158] (Embodiment 4) In a display device, which is an example of a semiconductor device, at least a part of a driver circuit and a An example of manufacturing a thin film transistor disposed in a pixel portion will be described below.

[0159] The thin film transistor disposed in the pixel portion is formed according to any one of the first to third embodiments. Since the thin film transistors shown in the first to third embodiments are n-channel TFTs, the Of these, a part of the driver circuit that can be configured with n-channel TFTs is a thin-film transistor in the pixel area. The transistor is formed on the same substrate.

[0160] FIG. 1 is a block diagram of an active matrix liquid crystal display device, which is an example of a semiconductor device. The display device shown in FIG. 19(A) is a display device having a display element on a substrate 5300. A pixel portion 5301 having a plurality of pixels, a scanning line driver circuit 5302 for selecting each pixel, and a signal line driver circuit 5303 for controlling input of a video signal to the pixel.

[0161] The thin film transistors described in any of the first to third embodiments are n-channel TFTs. A signal line driver circuit configured with a channel type TFT will be described with reference to FIG.

[0162] The signal line driver circuit shown in FIG. 20 includes a driver IC 5601 and a group of switches 5602_1 to 5602_56. 02_M, a first wiring 5611, a second wiring 5612, a third wiring 5613 and a wiring 56 Each of the switch groups 5602_1 to 5602_M includes A first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor It has a transistor 5603c.

[0163] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, and a third wiring 5613. and are connected to the wirings 5621_1 to 5621_M. 5602_M are a first wiring 5611, a second wiring 5612, a third wiring 561 3 and wiring 5621_1 to 5621_5 corresponding to the switch groups 5602_1 to 5602_M, respectively. Each of the wirings 5621_1 to 5621_M is connected to the first A thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor For example, the wiring 5621 in the Jth column is connected to three signal lines via a resistor 5603c. _J (any one of the wirings 5621_1 to 5621_M) is a switch group 5602 The first thin film transistor 5603a, the second thin film transistor 5603b, and and the third thin film transistor 5603c, the signal line Sj-1, the signal line Sj, the signal line S j+1 is connected to

[0164] The first wiring 5611, the second wiring 5612, and the third wiring 5613 are each connected to a signal line. The number is entered.

[0165] It is preferable that the driver IC 5601 is formed on a single crystal substrate. The switch group 5602_1 to 5602_M is formed on the same substrate as the pixel section. Therefore, the driver IC 5601 and the switch group 5602_1 to 5602_ It is recommended to connect to M via an FPC or similar.

[0166] Next, the operation of the signal line driver circuit shown in FIG. 20 will be described with reference to the timing chart of FIG. The timing chart in FIG. 21 is for when the i-th scanning line Gi is selected. Further, during the selection period of the i-th scanning line Gi, is divided into a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, when a scanning line of another row is selected, the signal line driver circuit of FIG. In this case, the same operation as in FIG. 21 is performed.

[0167] In the timing chart of FIG. 21, the wiring 5621_J in the Jth column is connected to the first thin-film transistor. a second thin film transistor 5603b, and a third thin film transistor 560 When connected to signal line Sj-1, signal line Sj, and signal line Sj+1 via 3c It shows.

[0168] In the timing chart of FIG. 21, the timing when the i-th scanning line Gi is selected, The on / off timing 5703a of the first thin film transistor 5603a, The on / off timing 5703b of the third thin film transistor 56 The on / off timing of 03c is input to 5703c and the wiring 5621_J of the Jth row. 5 shows signal 5721_J.

[0169] The wirings 5621_1 to 5621_M are connected to the first sub-selection period T1 and the second sub-selection period T2. In the first sub-selection period T2 and the third sub-selection period T3, different video signals are input. For example, the video signal input to the wiring 5621_J in the first sub-selection period T1 is The signal is input to the signal line Sj-1 and is input to the wiring 5621_J in the second sub-selection period T2. The video signal to be output is input to the signal line Sj, and the line 5621 is connected to the line Sj during the third sub-selection period T3. The video signal input to the first sub-selection period is input to the signal line Sj+1. In the period T1, the second sub-selection period T2, and the third sub-selection period T3, the wiring 5621_ The video signals input to J are Data_j-1, Data_j, and Data_j+ Let's say it's 1.

[0170] As shown in FIG. 21, in the first sub-selection period T1, the first thin film transistor 5603 a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c At this time, Data_j-1 input to the wiring 5621_J is turned off. The signal is input to the signal line Sj-1 via the transistor 5603a. Second sub-selection period T2 In this case, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a is turned on. and the third thin film transistor 5603c are turned off. At this time, the input The Data_j to be output is input to the signal line Sj via the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on, and the first The first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j+1 input to the wiring 5621_J is input to the third thin film transistor 56 03c and input to the signal line Sj+1.

[0171] From the above, the signal line driver circuit in FIG. 20 divides one gate selection period into three. During one gate selection period, a video signal is input from one wiring 5621 to three signal lines. Therefore, the signal line driver circuit of FIG. The number of connections between the substrate on which the pixel area is formed and the substrate on which the pixel area is formed is reduced to about one-third of the number of signal lines. By reducing the number of connections to about one third, the signal line driver circuit of FIG. This can improve productivity and yield.

[0172] As shown in FIG. 20, one gate selection period is divided into multiple sub-selection periods, and multiple sub-selection periods are During each selection period, a video signal is input from one line to each of multiple signal lines. As long as this can be achieved, the arrangement, number, driving method, etc. of the thin film transistors are not limited.

[0173] For example, three or more signal lines are connected to one wiring during each of three or more sub-selection periods. When a video signal is input to each of them, a thin film transistor and a thin film transistor are controlled. However, it is necessary to divide one gate selection period into four or more sub-selection periods. Therefore, one gate selection period is divided into two. is preferably divided into three sub-selection periods.

[0174] As another example, as shown in the timing chart of FIG. 22, one selection period is precharged. The first sub-selection period T1, the second sub-selection period T2, and the third selection period T3 are Furthermore, in the timing chart of FIG. 22, the i-th scanning line Gi is selected. the timing of turning on and off the first thin film transistor 5603a; a, the on-off timing 5803b of the second thin film transistor 5603b, The on / off timing 5803c of the membrane transistor 5603c and the wiring 562 of the Jth column 22, the signal 5821_J input to the precharge In the period Tp, the first thin film transistor 5603a and the second thin film transistor 5603 At this time, the input to the wiring 5621_J is turned on. The input precharge voltage Vp is applied to the first thin film transistor 5603a, the second thin film transistor 5603b, and the and a third thin film transistor 5603c are connected to the signal line Sj- 1, signal line Sj, and signal line Sj+1. The thin film transistor 5603a is turned on, and the second thin film transistor 5603b and the third thin film transistor At this time, the signal Dat input to the wiring 5621_J is turned off. a_j-1 is input to the signal line Sj-1 via the first thin film transistor 5603a. In the second sub-selection period T2, the second thin film transistor 5603b is turned on, and the first thin film transistor The third thin film transistor 5603a and the third thin film transistor 5603c are turned off. Data_j input to the wiring 5621_J is input to the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor The first thin film transistor 5603a and the second thin film transistor 5603c are turned on. At this time, Data_j+1 input to the wiring 5621_J is The signal is input to the signal line Sj+1 via the third thin film transistor 5603c.

[0175] From the above, the signal line driver circuit of FIG. 20 to which the timing chart of FIG. 22 is applied By providing a precharge selection period before the sub selection period, the signal lines can be precharged. This allows high-speed writing of video signals to the pixels. In this embodiment, the same reference numerals are used for the same parts as those in FIG. 21, and the same parts or similar functions are shown. A detailed description of the functional parts will be omitted.

[0176] The configuration of the scanning line driver circuit will be described. The scanning line driver circuit has a shift register. In some cases, a level shifter, a buffer, etc. may be included. In the operation circuit, a clock signal (CLK) and a start pulse signal (S P) is input to generate a selection signal. The generated selection signal is buffered The signal is buffered and amplified at the 10th line and then supplied to the corresponding scanning line. The gate electrodes of the transistors are connected. must be turned on at the same time, so the buffer must be capable of passing a large current. is used.

[0177] One form of a shift register used as a part of a scanning line driving circuit is shown in FIG. 23 and FIG. 24. He explains.

[0178] The circuit configuration of the shift register is shown in Figure 23. The shift register shown in Figure 23 is a flip-flop. It is composed of multiple flip-flops 5701_1 to 5701_n. A first clock signal, a second clock signal, a start pulse signal, and a reset signal are input. It works as it is.

[0179] The connection relationship of the shift register in Fig. 23 will be described. The shift register in Fig. 23 has i-stage The first flip-flop 5701_i (flip-flops 5701_1 to 5701_n In either one of them, the first wiring 5501 shown in FIG. 24 is connected to the seventh wiring 5717_i-1. 24 is connected to the seventh wiring 5717_i+1. 24 is connected to the seventh wiring 5717_i, The sixth wiring 5506 is connected to the fifth wiring 5715 .

[0180] In addition, the fourth wiring 5504 shown in FIG. 24 corresponds to the second wiring in the odd-numbered flip-flops. 5712, and in the even-numbered flip-flops, it is connected to the third wiring 5713. The fifth wiring 5505 shown in FIG.

[0181] However, the first wiring 5501 shown in FIG. 24 of the first-stage flip-flop 5701_1 is 24 of the n-th flip-flop 5701_n in the n-th stage. The second wiring 5502 is connected to the sixth wiring 5716 .

[0182] The first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 can be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fourth wiring 5714 and the fifth wiring 5715 are respectively connected to the first power supply line and the third power supply line. This may also be called the power line 2.

[0183] Next, the details of the flip-flop shown in FIG. 23 are shown in FIG. The flip-flop includes a first thin film transistor 5571, a second thin film transistor 5572, A third thin film transistor 5573, a fourth thin film transistor 5574, a fifth thin film transistor a sixth thin film transistor 5575, a seventh thin film transistor 5576, and and an eighth thin film transistor 5578. A second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor a fifth thin film transistor 5574, a fifth thin film transistor 5575, a sixth thin film transistor 5576, The seventh thin film transistor 5577 and the eighth thin film transistor 5578 are n-channel A transistor in which the gate-source voltage (Vgs) exceeds the threshold voltage (Vth). When this occurs, the device is in a conductive state.

[0184] Next, the connection configuration of the flip-flop shown in FIG. 23 will be described below.

[0185] A first electrode (either a source electrode or a drain electrode) of the first thin film transistor 5571 is connected to a fifth wiring 5504, and a second electrode (source) of a first thin film transistor 5571 is connected to The other of the source electrode and the drain electrode is connected to a third wiring 5503 .

[0186] A first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506. A second electrode of the thin film transistor 5572 is connected to a third wiring 5503 .

[0187] A first electrode of the third thin film transistor 5573 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5573 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. will be done.

[0188] A first electrode of the fourth thin film transistor 5574 is connected to a sixth wiring 5506. The second electrode of the thin film transistor 5574 is the gate electrode of the second thin film transistor 5572. , and the gate electrode of the fourth thin film transistor 5574 is connected to the first thin film transistor 5 It is connected to the gate electrode of 571.

[0189] A first electrode of the fifth thin film transistor 5575 is connected to a fifth wiring 5505. The second electrode of the thin film transistor 5575 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. will be done.

[0190] A first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5576 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the sixth thin film transistor 5576 is connected to the second thin film transistor 5 It is connected to the gate electrode of 572.

[0191] A first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506. The second electrode of the thin film transistor 5577 is the gate electrode of the first thin film transistor 5571. , and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502. A first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506. The second electrode of the eighth thin film transistor 5578 is connected to the gate of the second thin film transistor 5572. The gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 550. Connected to 1.

[0192] The gate electrode of the first thin film transistor 5571 and the gate electrode of the fourth thin film transistor 5574 the gate electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor The connection point of the second electrode of the seventh thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 is Further, the gate electrode of the second thin film transistor 5572, the gate electrode of the third thin film transistor 5543, a second electrode of the fourth thin film transistor 5573; a second electrode of the fourth thin film transistor 5574; The gate electrode of the sixth thin film transistor 5576 and the gate electrode of the eighth thin film transistor 5578 The connection point of the two electrodes is designated as node 5544.

[0193] The first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5504 are 504 may be called the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively. Furthermore, the fifth wiring 5505 is a first power supply line, and the sixth wiring 5506 is a second power supply line. It may also be called.

[0194] In addition, the signal line driver circuit and the scanning line driver circuit are formed using the n-channel TF The n-channel TFTs shown in the first to third embodiments can be fabricated using only T. Since the mobility of the transistor is large, it is possible to increase the driving frequency of the driving circuit. In addition, since the parasitic capacitance of the n-channel TFT shown in any of the first to third embodiments is reduced, For example, the n-channel T The scanning line driver circuit using FT can operate at high speed, so the frame frequency can be It is also possible to increase the image quality or to insert a black screen.

[0195] Furthermore, the channel width of the transistor of the scanning line driving circuit is increased, and multiple scanning lines By arranging the driver circuit, it is possible to achieve even higher frame frequencies. When multiple scanning line driving circuits are arranged, a scanning line driving circuit for driving the even-numbered scanning lines is provided. The circuit is placed on one side, and the scanning line driving circuit for driving the odd-numbered scanning lines is placed on the opposite side. By placing multiple If signals are output to the same scanning line by the scanning line driving circuit, it is advantageous for making the display device larger. do.

[0196] In addition, when an active matrix type light emitting display device, which is an example of a semiconductor device, is manufactured, In order to arrange at least a plurality of thin film transistors in one pixel, a plurality of scanning line driving circuits are arranged. An example of a block diagram of an active matrix type light emitting display device is shown in FIG. 9(B).

[0197] The light-emitting display device shown in FIG. 19(B) has a plurality of pixels each having a display element over a substrate 5400. A pixel portion 5401 for inputting a signal to a scanning line connected to a selected pixel, and a first scanning line driver 5402 for inputting a signal to a scanning line connected to a selected pixel. A first scanning line driver circuit 5402 and a second scanning line driver circuit 5404, and a signal line connected to a selected pixel and a signal line driver circuit 5403 for controlling input of a video signal to the image forming apparatus.

[0198] In the case where a video signal input to a pixel of the light-emitting display device shown in FIG. 19(B) is in a digital format, When a pixel is turned on, the transistor is switched on and off to make it either emitting light or not. Therefore, gray scale display can be performed using area gray scale or time gray scale. The stacked gray scale method divides one pixel into multiple sub-pixels, and each sub-pixel is independently driven based on a video signal. The time gray scale method is a driving method that displays gray scales by changing the time when the pixel emits light. This is a driving method that displays gradations by controlling the period during which the liquid crystal display is turned on.

[0199] Light-emitting elements have a higher response speed than liquid crystal elements, so they are more suitable for time gray scale modulation than liquid crystal elements. Specifically, when displaying using the time gray scale method, one frame period is divided into multiple subframes. Then, the light emitting element of the pixel is divided into sub-frame periods according to the video signal. By dividing the period into multiple subframes, The total length of time that pixels actually emit light during one frame is controlled by the video signal. It is possible to control the brightness and display gradation.

[0200] In the light-emitting display device shown in FIG. 19B, two switching TFTs are provided for one pixel. When the first scanning line, which is the gate wiring of one of the switching TFTs, is used as the first scanning line, The signal to be outputted is generated by the first scanning line driver circuit 5402 and is applied to the gate of the other switching TFT. A signal input to the second scanning line, which is a wiring, is generated by a second scanning line driver circuit 5404. In this example, the signal input to the first scanning line and the signal input to the second scanning line are Both of these may be generated by a single scanning line driving circuit. The number of switching TFTs in a pixel determines the operation of the switching element. A plurality of scanning lines may be used for each pixel. The signals input to the scanning line driver circuit may all be generated by one scanning line driver circuit, or may be generated by a plurality of scanning line drivers. It may be generated by an automatic circuit.

[0201] In addition, in the light-emitting display device, the driver circuit may be configured with n-channel TFTs. A part of the driver circuit can be formed on the same substrate as the thin film transistor of the pixel portion. In addition, the signal line driver circuit and the scanning line driver circuit are formed by using the n-channel TFTs shown in the embodiments 1 to 3. It is also possible to produce it using only FT.

[0202] The above-mentioned driving circuit is not limited to liquid crystal display devices and light-emitting display devices, but may also be used in devices including switching elements and It may also be used in electronic paper, where electrically connected elements are used to drive electronic ink. Electronic paper is also called an electrophoretic display (electrophoretic display) and has the same properties as paper. The advantages are ease of reading, lower power consumption compared to other display devices, and the possibility of making them thin and lightweight. It has points.

[0203] Electrophoretic displays can take a variety of forms, but the first particle has a positive charge. A microcapsule containing a negatively charged second particle and a negatively charged second particle is immersed in a solvent or solute. By applying an electric field to the microcapsules, The particles in the capsule are moved in opposite directions to each other, and only the color of the particles that have gathered on one side is displayed. The first particles or the second particles contain a dye, and in the absence of an electric field, The first particles and the second particles are different in color (colorless). (including

[0204] Thus, electrophoretic displays operate in such a way that materials with high dielectric constants migrate to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect. No polarizers are required for the display, reducing weight.

[0205] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. A color display is also possible by using a color filter or particles having a pigment.

[0206] In addition, the above microphone is appropriately placed on the active matrix substrate so as to be sandwiched between two electrodes. By arranging multiple microcapsules, an active matrix display device is completed. Display can be achieved by applying an electric field to the cell. An active matrix substrate obtained by using transistors can be used.

[0207] The first particles and the second particles in the microcapsules are made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from the group consisting of magnetochromic material, magnetophoretic material, and a composite material thereof. Just use it.

[0208] Through the above steps, a display device with high reliability as a semiconductor device can be manufactured.

[0209] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0210] (Embodiment 5) A thin film transistor is manufactured, and the thin film transistor is used in a pixel portion and further in a driver circuit. It is possible to manufacture a semiconductor device (also called a display device) having a display function. The transistors and part or the entire driver circuit are integrated on the same substrate as the pixel section, An on-panel can be formed.

[0211] The display device includes a display element. The display element may be a liquid crystal element (also called a liquid crystal display element), a light-emitting A light-emitting element (also called a light-emitting display element) can be used. A light-emitting element is a light-emitting element that emits light by applying a current or a voltage. This category includes elements whose brightness is controlled by a specific factor, such as inorganic EL (Electroluminescent) devices. Also, electronic ink, etc. A display medium in which the contrast changes due to thermal effects can also be used.

[0212] The display device includes a panel in which a display element is sealed, and a controller for the panel. and a module in which an IC or the like including the above is mounted. In the process, the element substrate corresponds to one form before the display element is completed, and the element substrate is The element substrate is provided with a means for supplying a current to the display element in each of the plurality of pixels. The display element may be in a state where only the pixel electrodes of the display element are formed, or a conductive film that becomes the pixel electrodes may be formed. may be in a state after the formation of a film and before etching to form a pixel electrode, All forms apply.

[0213] In this specification, the term "display device" refers to an image display device, a display device, or an optical Also refers to connectors, such as FPC (Flexible Printed Circuit). inted circuit) or TAB (Tape Automated Bon ding tape or TCP (Tape Carrier Package) is used. Modules with printed wiring boards attached to the ends of TAB tape or TCP or the display element is mounted with an IC (integrated circuit) by the COG (Chip On Glass) method. The display device also includes all modules in which a display circuit (or other circuit) is directly mounted.

[0214] The appearance and cross section of a liquid crystal display panel, which is one mode of a semiconductor device, will be described with reference to FIG. FIG. 15 shows a structure of the oxide semiconductor layer shown in the third embodiment formed on a first substrate 4001. Highly reliable thin film transistors 4010 and 4011 including a conductor layer, and a liquid crystal element 4013 4005 between the first substrate 4001 and the second substrate 4006. FIG. 15B corresponds to a cross-sectional view taken along line MN in FIG. 15A1 and FIG. 15A2.

[0215] A pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In this manner, a sealant 4005 is provided. A second substrate 4006 is provided on the path 4004. The line driver circuit 4004 is made up of a first substrate 4001, a sealant 4005, and a second substrate 4006. The liquid crystal layer 4008 is sealed together with the first substrate 4001. In a region different from the region surrounded by the material 4005, a single crystal is formed on a separately prepared substrate. A signal line driver circuit 4003 formed of a semiconductor film or a polycrystalline semiconductor film is mounted.

[0216] The method of connecting the separately formed drive circuit is not particularly limited, and may be a COG method, A wire bonding method, a TAB method, or the like can be used. FIG. 15A shows an example of mounting a signal line driver circuit 4003 by the COG method. This is an example in which a signal line driver circuit 4003 is mounted by the TAB method.

[0217] In addition, a pixel portion 4002 and a scanning line driver circuit 4004 are provided on a first substrate 4001. In FIG. 15B, the thin film transistor included in the pixel portion 4002 is A thin film transistor 4010 and a thin film transistor 401 included in a scanning line driver circuit 4004 The insulating layers 4020 and 4011 are formed on the thin film transistors 4010 and 4011. 21 is provided.

[0218] The thin film transistors 4010 and 4011 are the signal transistors including the oxide semiconductor layer described in Embodiment 3. In addition, a highly reliable thin film transistor can be applied. In the present embodiment, the thin film transistor shown in FIG. The transistors 4010 and 4011 are n-channel thin film transistors.

[0219] In addition, a pixel electrode layer 4030 of the liquid crystal element 4013 is connected to the thin film transistor 4010. The counter electrode layer 4031 of the liquid crystal element 4013 is electrically connected to the second substrate 40. 06. A pixel electrode layer 4030, a counter electrode layer 4031, and a liquid crystal layer 4008 are formed on the liquid crystal layer 4006. The overlapping portion corresponds to a liquid crystal element 4013. The electrode layer 4031 is provided with insulating layers 4032 and 4033 which function as alignment films. A liquid crystal layer 4008 is sandwiched between insulating layers 4032 and 4033 .

[0220] The first substrate 4001 and the second substrate 4006 may be made of glass or metal (typically, stainless steel). Stainless steel, ceramics, and plastics can be used. , FRP (Fiberglass-Reinforced Plastics) board, PV F (polyvinyl fluoride) film, polyester film, polyester film Alternatively, acrylic resin film can be used. Aluminum foil can also be used as a PVF film. A sheet having a structure sandwiched between films or polyester films can also be used.

[0221] Also, 4035 is a columnar spacer obtained by selectively etching the insulating film. In order to control the distance (cell gap) between the pixel electrode layer 4030 and the counter electrode layer 4031, A spherical spacer may be used. 1 is electrically connected to a common potential line provided on the same substrate as the thin film transistor 4010. The common connection portion is used to connect the counter electrode layer 4 to the conductive particles disposed between the pair of substrates. The conductive particles can electrically connect the sealing material 4 to the common potential line. Included in 005.

[0222] Alternatively, a liquid crystal that exhibits a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases. When the temperature of cholesteric liquid crystal is increased, the phase immediately transitions from the cholesteric phase to the isotropic phase. The blue phase appears only in a narrow temperature range, so it is necessary to improve the temperature range. In order to achieve this, a liquid crystal composition containing 5% by weight or more of a chiral agent is used for the liquid crystal layer 4008. A liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent has a response speed of 1 msec. Since the liquid crystal display is optically isotropic, no alignment treatment is required, and the viewing angle dependency is small.

[0223] In addition to the transmissive LCD, the present invention can also be applied to reflective and semi-transmissive LCDs. can.

[0224] In addition, in a liquid crystal display device, a polarizing plate is provided on the outer side (the viewing side) of the substrate, and a colored layer and a display element are provided on the inner side. In the example shown, the polarizing plate is disposed on the inner side of the substrate. In addition, the laminated structure of the polarizing plate and the coloring layer is not limited to the present embodiment, and the materials and The conditions may be appropriately set according to the manufacturing process conditions. A light film may also be provided.

[0225] In addition, in order to reduce the surface unevenness of the thin film transistor and to improve the reliability of the thin film transistor, In order to improve the characteristics of the thin film transistor obtained in the above embodiment, The insulating layer 4020 and the insulating layer 4021 are used to cover the insulating film 4010 and the insulating film 4021. The protective film is designed to prevent the intrusion of polluting impurities such as organic matter, metals, and water vapor suspended in the air. The protective film is preferably a silicon oxide film, which is formed by sputtering. Silicon nitride film, silicon oxynitride film, silicon nitride oxide film, aluminum oxide film, nitride A single layer of aluminum, aluminum oxynitride, or aluminum nitride oxide, or The protective film may be formed by lamination. An example of forming the protective film by sputtering is shown, but the method is not particularly limited. The insulating layer 11 may be formed by various methods.

[0226] Here, an insulating layer 4020 having a laminated structure is formed as a protective film. The first layer of the silicon oxide film is formed by sputtering. By using a silicon film, the hysteresis of the aluminum film used as the source electrode layer and the drain electrode layer can be improved. It is effective in preventing lockup.

[0227] In addition, an insulating layer is formed as the second layer of the protective film. The second layer is a silicon nitride film formed by sputtering. When a silicon film is used, mobile ions such as sodium penetrate into the semiconductor region and change the electrical characteristics of the TFT. It is possible to suppress the change in sex.

[0228] After forming the protective film, the film is heated in a nitrogen atmosphere or in air (300°C). (see below) may be performed.

[0229] In addition, an insulating layer 4021 is formed as a planarization insulating film. Heat-resistant organic compounds such as amide, acrylic, benzocyclobutene, polyamide, and epoxy. In addition to the above organic materials, low-k materials can be used. , siloxane resin, PSG (phosphorus glass), BPSG (borophosphorus glass), etc. are used. In addition, by stacking a plurality of insulating films made of these materials, an insulating layer can be formed. 4021 may be formed.

[0230] Siloxane-based resin is a type of Si-OS formed using siloxane-based materials as starting materials. The siloxane resin corresponds to a resin containing an i bond. Alternatively, the organic group may have a fluoro group. That's fine.

[0231] The method for forming the insulating layer 4021 is not particularly limited, and may be a sputtering method, an SOG method, or the like, depending on the material. , spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, knife A baking process for the insulating layer 4021 and the annealing process for the oxide semiconductor layer can be performed using a baking machine or the like. By using the same as the mold, a semiconductor device can be manufactured efficiently.

[0232] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material may be used.

[0233] The pixel electrode layer 4030 and the counter electrode layer 4031 are made of a conductive polymer. The conductive composition may be used to form the conductive film. The pixel electrode thus fabricated has a sheet resistance of 10,000 Ω / □ or less and a light transmittance of 550 nm. It is preferable that the resistance of the conductive polymer contained in the conductive composition is 70% or more. It is preferable that the electrical conductivity be 0.1 Ω·cm or less.

[0234] As the conductive polymer, a so-called π-electron conjugated conductive polymer can be used. For example, polyaniline or its derivatives, polypyrrole or its derivatives, polythiophene or or a derivative thereof, or a copolymer of two or more of these.

[0235] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials are applied to 002 via FPC4018.

[0236] The connection terminal electrode 4015 is made of the same conductive film as the pixel electrode layer 4030 of the liquid crystal element 4013. The terminal electrode 4016 is formed from the source electrode layers of the thin film transistors 4010 and 4011. The drain electrode layer is formed of the same conductive film as the drain electrode layer.

[0237] The connection terminal electrode 4015 is connected to a terminal of the FPC 4018 via an anisotropic conductive film 4019. The electrodes are electrically connected to each other.

[0238] In FIG. 15, a signal line driver circuit 4003 is formed separately and is mounted on a first substrate 4001. The example shown is implemented as an example, but is not limited to this configuration. Alternatively, only a part of the signal line driver circuit or a part of the scanning line driver circuit may be formed separately. It may be implemented as follows.

[0239] FIG. 25 shows a semiconductor device using a TFT substrate 2600 fabricated by the fabrication method disclosed herein. 1 shows an example in which a liquid crystal display module is configured as a semiconductor device.

[0240] FIG. 25 shows an example of a liquid crystal display module, in which a TFT substrate 2600 and an opposing substrate 2601 are connected. The substrate 2602 is fixed to the substrate 2601 by a bonding material 2602, and a pixel portion 2603 including a TFT and the like and a liquid crystal layer are disposed between the substrate 2601 and the substrate 2602. A display element 2604 and a colored layer 2605 are provided to form a display area. is necessary for color display, and in the case of the RGB method, it corresponds to each color of red, green, and blue. A colored layer is provided corresponding to each pixel. On the outside, a polarizing plate 2606, a polarizing plate 2607, and a diffusion plate 2613 are arranged. It is composed of a cathode ray tube 2610 and a reflector 2611, and a circuit board 2612 is a flexible wiring board. A wiring board 2609 is connected to the wiring circuit section 2608 of the TFT board 2600, and the controller The LCD has external circuits such as a filter circuit and a power supply circuit. The layers may be laminated with a retardation plate interposed therebetween.

[0241] The LCD module is available in TN (Twisted Nematic) mode, IPS (In-plane Switching) mode, n-Plane-Switching mode, FFS (Fringe Field Switching) switching mode, MVA (Multi-domain Vertical A alignment) mode, PVA(Patterned Vertical Alignment) mode nment) mode, ASM(Axially Symmetric aligned Micro-cell mode, OCB (Optical Compensated B) irefringence mode, FLC (Ferroelectric Liqui d Crystal) mode, AFLC (AntiFerroelectric Liq. uid Crystal) mode can be used.

[0242] By the above steps, a highly reliable liquid crystal display panel can be manufactured as a semiconductor device. do.

[0243] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0244] (Embodiment 6) An example of the semiconductor device is electronic paper.

[0245] Electronic paper that uses switching elements and elements electrically connected to drive electronic ink The thin film transistor described in any of the above-mentioned Embodiments 1 to 3 may be used for the electronic paper. Also called electrophoretic display (electrophoretic display), it has the same readability as paper. It has the advantages of consuming less power than other display devices and being thinner and lighter.

[0246] Electrophoretic displays can take a variety of forms, but the first particle has a positive charge. A microcapsule containing a negatively charged second particle and a negatively charged second particle is immersed in a solvent or solute. By applying an electric field to the microcapsules, By moving the particles in the capsule in opposite directions, only the color of the particles that have gathered on one side is displayed. The first particles or the second particles contain a dye, and in the absence of an electric field, The first particles and the second particles are different in color (colorless). (including

[0247] Thus, electrophoretic displays operate in such a way that materials with high dielectric constants migrate to areas of high electric field. This is a display that utilizes the so-called dielectrophoretic effect.

[0248] The microcapsules dispersed in a solvent are called electronic ink. The electronic ink can be printed on surfaces such as glass, plastic, fabric, and paper. A color display is also possible by using a color filter or particles having a pigment.

[0249] In addition, the above-mentioned microstrip line is appropriately sandwiched between two electrodes on the active matrix substrate. By arranging multiple black capsules, an active matrix display device is completed, and a microcapsule is By applying an electric field to the capsule, display can be performed. An active matrix substrate obtained by using transistors can be used.

[0250] The first particles and the second particles in the microcapsules are made of a conductive material, an insulating material, Semiconductor materials, magnetic materials, liquid crystal materials, ferroelectric materials, electroluminescent materials, A material selected from the group consisting of magnetochromic material, magnetophoretic material, and a composite material thereof. Just use it.

[0251] FIG. 14 shows an active matrix type electronic paper, which is an example of a semiconductor device. The thin film transistor 581 used in the device may be the thin film transistor shown in the embodiment 1. The present invention provides a highly reliable thin film transistor including an oxide semiconductor layer, which can be manufactured in the same manner as a conventional thin film transistor. The thin film transistor shown in the second or third embodiment is also applicable to the thin film transistor of this embodiment. It can also be applied as star 581.

[0252] The electronic paper in FIG. 14 is an example of a display device that uses the twisting ball display method. The ball display method uses spherical particles painted black and white on the electrode layer of the display element. A first electrode layer and a second electrode layer are disposed between the first electrode layer and the second electrode layer, and a potential is applied to the first electrode layer and the second electrode layer. This is a method of displaying information by creating a difference and controlling the orientation of spherical particles.

[0253] The thin film transistor 581 is a bottom-gate thin film transistor, and an oxide semiconductor layer The source electrode layer or the drain electrode layer of the thin film transistor 581 is covered with an insulating film 583 that is in contact with the The rain electrode layer and the first electrode layer 587 are in contact with each other through an opening formed in the insulating layer 585. Between the first electrode layer 587 and the second electrode layer 588, there is a black area. 590a and white area 590b, and a cavity 594 filled with liquid therearound. The spherical particles 589 are surrounded by a filler 595 such as a resin. The first electrode layer 587 corresponds to a pixel electrode, and the second electrode layer 588 corresponds to a common electrode. The second electrode layer 588 is formed on the same substrate 580 as the thin film transistor 581. The common connection portion is electrically connected to the common potential line provided on the substrate 580. 96, the second electrode layer 588 and the common potential line are electrically connected via the conductive particles disposed between the first electrode layer 588 and the common potential line. It can be connected.

[0254] Also, instead of the twist ball, an electrophoretic element can be used. and a 10μm to 20μm diameter nanoparticle that contains positively charged white nanoparticles and negatively charged black nanoparticles. Microcapsules with a diameter of about 0 μm are used. When an electric field is applied to the microcapsules by the first and second electrode layers, the microcapsules emit white light. White particles and black particles move in opposite directions, allowing the display to be white or black. A display element that applies this principle is an electrophoretic display element, commonly known as electronic paper. Electrophoretic display elements have a higher reflectivity than liquid crystal display elements, so auxiliary lights are not required. It also consumes little power and the display can be seen even in dimly lit places. Even if power is not supplied to the display, the image that was displayed can be retained. Therefore, the distance between the radio wave source and the semiconductor device with a display function (simply a display device, or a device equipped with a display device) is The displayed image can be stored even if the semiconductor device (also called a semiconductor device equipped with a This makes it possible.

[0255] Through the above steps, electronic paper having high reliability as a semiconductor device can be manufactured. .

[0256] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0257] (Embodiment 7) An example of a light-emitting display device is shown as a semiconductor device. is shown using a light-emitting element that uses electroluminescence. The light-emitting element that uses the light-emitting material is classified into two types according to whether the light-emitting material is an organic compound or an inorganic compound. Generally, the former is called an organic EL element and the latter an inorganic EL element.

[0258] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into layers containing light-emitting organic compounds, causing a current to flow. The rears (electrons and holes) recombine to form an excited state in the light-emitting organic compound. When the excited state returns to the ground state, light is emitted. Such a light-emitting element is called a current-excitation type light-emitting element.

[0259] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements according to their element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor reaction that utilizes the donor and acceptor levels. Thin-film inorganic EL elements are made by sandwiching a light-emitting layer between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0260] FIG. 17 shows an example of a pixel configuration to which digital time gray scale driving can be applied as an example of a semiconductor device. This is a diagram.

[0261] The configuration of a pixel to which digital time gray scale driving can be applied and the operation of the pixel will be described. The figure shows an n-channel transistor that uses an oxide semiconductor layer as a channel formation region in one pixel. Here is an example of using two of them.

[0262] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, The switching transistor 64 has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate.

[0263] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. Note that the low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. Potential < High power supply potential. For example, GND, 0V, etc. are set as low power supply potential. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. In order to make the light emitting element 6404 emit light by passing a current through the light emitting element 6404, a high power supply potential and the low power supply potential is set to be equal to or higher than the forward threshold voltage of the light emitting element 6404. Each potential is set.

[0264] The capacitor 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. It is also possible to set the gate capacitance of the driving transistor 6402 as follows: A capacitance may be formed between the gate electrode and the second electrode.

[0265] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is The driving transistor 6402 is in two states, either fully on or fully off. A video signal is inputted, that is, the driving transistor 6402 is operated in a linear region. In order to operate the driving transistor 6402 in a linear region, the voltage of the power supply line 6407 must be higher than that of the driving transistor 6402. A high voltage is applied to the gate of the driving transistor 6402. A voltage equal to or higher than (power supply line voltage + Vth of the driving transistor 6402) is applied.

[0266] In addition, when analog gray scale driving is performed instead of digital time gray scale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 17 can be used.

[0267] In the case of performing analog gradation driving, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or higher than the forward voltage of the light emitting element 6401 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and should be at least 100% forward voltage. In addition, the video transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The gate potential of the light emitting element 6402 is set higher than that of the gate of the transistor 6403. Analog gradation drive can be performed by passing a current corresponding to a video signal through 6404.

[0268] Note that the pixel configuration shown in FIG. 17 is not limited to this. For example, A switch, a resistive element, a capacitive element, a transistor, a logic circuit, or the like may be added.

[0269] Next, the configuration of the light-emitting element will be described with reference to FIG. 18. Here, the driving TFT is The cross-sectional structure of a pixel will be described below by taking the case of a channel type as an example. ) and (C) are driving TFTs used in the semiconductor device of TFT7001, 7011, and 7 The thin film transistor in accordance with the present invention can be manufactured in a manner similar to that of the thin film transistor in accordance with the first embodiment. In addition, the thin film transistor shown in Embodiment 2 or 3 has high reliability. Thin film transistors can also be applied as TFT7001, 7011, and 7021.

[0270] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is emitted from the surface opposite the substrate. The top surface emission takes the light out from the surface on the substrate side, the bottom surface emission takes the light out from the surface on the substrate side, There are light-emitting elements with a double-sided emission structure that emits light from the opposite surface. The present invention can also be applied to light-emitting devices.

[0271] A light emitting element having a top emission structure will be described with reference to FIG.

[0272] In FIG. 18A, a TFT 7001 which is a driving TFT is an n-channel type, and a light emitting element 700 FIG. 18(A) shows a cross-sectional view of a pixel when light emitted from the cathode 7002 exits to the anode 7005 side. In the example shown in FIG. 1, the cathode 7003 of the light-emitting element 7002 and the TFT 7001 which is the driving TFT are electrically A light-emitting layer 7004 and an anode 7005 are laminated in this order on a cathode 7003. The cathode 7003 can be made of various materials as long as they have a small work function and are conductive films that reflect light. For example, Ca, Al, MgAg, AlLi, etc. are preferable. The light-emitting layer 7004 may be composed of a single layer or a plurality of layers may be laminated. In the case where the cathode 7003 is made up of a plurality of layers, the electron injection layer 7002 is formed on the cathode 7003. The layers are laminated in this order: a layer, an electron transport layer, a light emitting layer, a hole transport layer, and a hole injection layer. It is not necessary to provide all of the anodes 7005. The anode 7005 is made of a conductive material that transmits light. For example, indium oxide containing tungsten oxide, indium oxide containing tungsten oxide Indium zinc oxide, Indium oxide with titanium oxide, Indium with titanium oxide Tin oxide, indium tin oxide, indium zinc oxide, indium doped with silicon oxide A light-transmitting conductive film such as a conductive film of tin oxide may be used.

[0273] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 constitutes the light-emitting element 7002. In the case of the pixel shown in FIG. 18(A), the light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as indicated by the mark.

[0274] Next, a light emitting element having a bottom emission structure will be described with reference to FIG. 011 is an n-channel type, and light emitted from a light-emitting element 7012 is emitted to the cathode 7013 side. FIG. 18B shows a cross-sectional view of a pixel in this case. In FIG. 18B, A cathode 7 of the light-emitting element 7012 is formed on a light-transmitting conductive film 7017 electrically connected to the cathode 7 A cathode 7013 is formed on the substrate 7011, and a light-emitting layer 7014 and an anode 7015 are laminated in this order on the cathode 7013. In addition, when the anode 7015 has a light-transmitting property, a light-reflecting or light-transmitting layer is provided so as to cover the anode. A shielding film 7016 for shielding may be formed on the cathode 7013. As in the case of A), various conductive materials with small work functions can be used. However, the thickness of the film should be such that light can pass through it (preferably about 5 nm to 30 nm). For example, an aluminum film having a thickness of 20 nm can be used as the cathode 7013. The light-emitting layer 7014 may be formed of a single layer, as in FIG. Alternatively, a plurality of layers may be laminated. Although it is not necessary to form the insulating film 110 using a conductive material having a light-transmitting property, the insulating film 110 may be formed using a conductive material having a light-transmitting property as in FIG. The shielding film 7016 can be made of, for example, a light-reflecting metal. However, it is not limited to a metal film. For example, a resin to which a black pigment is added can be used. .

[0275] The region where the light-emitting layer 7014 is sandwiched between the cathode 7013 and the anode 7015 is the light-emitting element 7012. In the case of the pixel shown in FIG. 18B, the light emitted from the light-emitting element 7012 corresponds to The light is emitted toward the cathode 7013 as shown by the arrow.

[0276] Next, a light emitting element having a dual emission structure will be described with reference to FIG. In this example, a conductive film 7027 having a light-transmitting property and electrically connected to the driving TFT 7021 is formed on the substrate 7022. A cathode 7023 of the light emitting element 7022 is formed, and a light emitting layer 7024 is formed on the cathode 7023. , and an anode 7025 are laminated in this order. The cathode 7023 is, as in the case of FIG. Various conductive materials with small work functions can be used. For example, the cathode 7023 is made of Al having a thickness of 20 nm. The light-emitting layer 7024 can be formed of a single layer, as in FIG. The anode 7 may be formed of a single layer or a plurality of layers may be laminated. 025 is formed using a conductive material having light transmitting properties, similar to FIG. 18(A). It is possible.

[0277] The overlapping portion of the cathode 7023, the light-emitting layer 7024, and the anode 7025 constitutes the light-emitting element 70. In the case of the pixel shown in FIG. 18C, the light emitted from the light emitting element 7022 is is emitted toward both the anode 7025 side and the cathode 7023 side as indicated by the arrows.

[0278] Although the organic EL element has been described as the light-emitting element here, inorganic EL elements can also be used as the light-emitting element. It is also possible to provide an L element.

[0279] The light emitting element is connected to a thin film transistor (driving TFT) that controls the driving of the light emitting element. However, a current control TFT is connected between the driving TFT and the light emitting element. The configuration may include:

[0280] The semiconductor device is not limited to the configuration shown in FIG. 18, and may be any of the configurations disclosed in this specification. Various modifications based on the technical concept are possible.

[0281] Next, the appearance and structure of a light-emitting display panel (also called a light-emitting panel) which corresponds to one embodiment of a semiconductor device will be described. The cross section will be described with reference to FIG. 16. FIG. 16 shows a thin film transistor formed on a first substrate. A flat surface of a panel in which a transistor and a light-emitting element are sealed between the second substrate and the substrate by a sealant. 16(B) corresponds to a cross-sectional view taken along line HI in FIG. 16(A).

[0282] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. A sealant 4505 is formed to surround the gate driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealant 4505, and a second substrate 4506. The filling material 4507 is sealed with the sealing material 4507. Highly sealed protective film with little outgassing (lamination film, UV curable resin film) It is preferable to package (enclose) the package in a material such as a film or a cover material.

[0283] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b each have a plurality of thin film transistors. In FIG. 16B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45, a thin film transistor 4509 included in a line driver circuit 4503a is illustrated.

[0284] The thin film transistors 4509 and 4510 are the signal transistors including the oxide semiconductor layer described in Embodiment 3. In addition, a highly reliable thin film transistor can be applied. The thin film transistors 4509 and 4510 may be the thin film transistors shown in FIG. It is an n-channel thin-film transistor.

[0285] In addition, 4511 corresponds to a light-emitting element, and a first electrode which is a pixel electrode of the light-emitting element 4511 is The electrode layer 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The light emitting element 4511 is configured with a first electrode layer 4517, a light emitting layer 4 The light emitting element has a laminated structure of a first electrode layer 512 and a second electrode layer 4513, but is not limited to the structure shown in the figure. The configuration of the light emitting element 4511 is appropriately changed according to the direction of the light to be extracted from the element 4511. It is possible.

[0286] The partition 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable that the inclined surface is formed so as to have a continuous curvature.

[0287] The light-emitting layer 4512 may be composed of a single layer or a plurality of layers may be laminated. Either way is fine.

[0288] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511, the second electrode layer A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be formed of silicon nitride. It is possible to form a silicon oxide nitride film, a DLC film, etc.

[0289] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are It is supplied by b.

[0290] The connection terminal electrode 4515 is formed of the same conductive film as the first electrode layer 4517 of the light-emitting element 4511. The terminal electrode 4516 is formed from the source of the thin film transistors 4509 and 4510. The source electrode layer and the drain electrode layer are formed from the same conductive film.

[0291] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. The electrodes are electrically connected to each other.

[0292] The second substrate 4506 located in the direction in which light is extracted from the light emitting element 4511 must be transparent. In this case, a glass plate, a plastic plate, a polyester film or A light-transmitting material such as an acrylic film is used.

[0293] In addition, filler 4507 can be inert gas such as nitrogen or argon, or ultraviolet-curing resin. It can be made of oil or thermosetting resin, and can be made of PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. For example, nitrogen can be used as a filler. That's good.

[0294] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) is placed on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates), color filters, etc. may be installed as appropriate. In addition, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. Anti-glare treatment can be applied to further diffuse reflected light and reduce glare.

[0295] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving element formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate Also, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be implemented. Only the operating circuit or only a part of it may be separately formed and mounted, and is not limited to the configuration of FIG. stomach.

[0296] Through the above steps, a highly reliable light-emitting display device (display panel) can be manufactured as a semiconductor device. It is possible.

[0297] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0298] (Embodiment 8) The semiconductor device disclosed in this specification can be applied as electronic paper. Par can be used in any electronic device that displays information. For example, electronic paper can be used for electronic books, posters, train rides, etc. It can be used for in-car advertising, display on various cards such as credit cards, etc. Examples of electronic devices are shown in Figures 26 and 27.

[0299] FIG. 26 shows a poster 2631 made of electronic paper. In the case of a physical page, the exchange of advertisements is done manually, but in the case of an electronic page as disclosed in this specification, By using the par, you can change the display of your ad in a short time. Also, the display will not be broken. A stable image can be obtained. The poster may be configured to transmit and receive information wirelessly. .

[0300] FIG. 27 also shows an example of an electronic book 2700. For example, the electronic book 2700 is The device is made up of two housings, a housing 2701 and a housing 2703. The body 2703 is integrated with a shaft portion 2711, and the opening and closing movement is performed around the shaft portion 2711. This configuration allows the device to operate like a paper book. It becomes.

[0301] A display unit 2705 is incorporated in the housing 2701, and a display unit 2707 is incorporated in the housing 2703. The display unit 2705 and the display unit 2707 are configured to display a continuous screen. Alternatively, a different screen may be displayed. For example, a text is displayed on the right display (display 2705 in FIG. 27) and An image can be displayed on the display unit 2707 in FIG.

[0302] FIG. 27 shows an example in which a housing 2701 is provided with an operation unit and the like. 701, a power supply 2721, operation keys 2723, a speaker 2725, etc. The operation keys 2723 can be used to turn pages. The configuration may include a display board, a pointing device, etc. On the front side, there is a terminal for external connection (earphone terminal, USB terminal, or AC adapter and USB cable). A terminal that can be connected to various cables such as a USB cable, a recording medium insertion section, etc. Furthermore, the electronic book 2700 may be configured to have a function as an electronic dictionary. Good too.

[0303] The electronic book 2700 may be configured to transmit and receive information wirelessly. The desired book data can be purchased and downloaded from the electronic book server. is also possible.

[0304] (Embodiment 9) The semiconductor device disclosed in this specification can be applied to various electronic devices (including game machines). The electronic device can be, for example, a television device (television or television receivers), computer monitors, digital cameras and digital video cameras digital photo frames, mobile phones (also called mobile phones or mobile phone devices), ), portable game machines, personal digital assistants, audio playback devices, pachinko machines and other large game machines, etc. Examples include:

[0305] FIG. 28A shows an example of a television device 9600. The display unit 9603 is incorporated in the housing 9601. In addition, the stand 9605 supports the housing 9601. This shows a configuration in which the above is supported.

[0306] The television device 9600 can be operated using an operation switch provided on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the display 9603 shows In addition, the remote control unit 9610 can control the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0307] The television device 9600 includes a receiver and a modem. It can receive more general television broadcasts, and can also be connected to a modem via wired or wireless connection. By connecting to a network, communication can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0308] FIG. 28B shows an example of a digital photo frame 9700. The photo frame 9700 includes a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example images captured by a digital camera. By displaying the image data, it can function like a normal photo frame.

[0309] The Digital Photo Frame 9700 is equipped with an operation unit, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section, etc. These components may be installed on the same surface as the display unit, but they may be installed on the side or back. It is preferable to have a digital photo frame with a built-in memory card because it improves the design. Insert a memory that stores image data taken with a digital camera into the body insertion section to create an image data file. The captured image data can be displayed on the display portion 9703 .

[0310] The digital photo frame 9700 may also be configured to transmit and receive information wirelessly. It is also possible to wirelessly import and display desired image data.

[0311] FIG. 29(A) shows a portable gaming machine, which is composed of two housings, a housing 9881 and a housing 9891. The housing 9881 is connected to a connector 9893 so as to be openable and closable. A display unit 9883 is incorporated in the housing 9891. The portable gaming machine shown in FIG. 29(A) also includes a speaker unit 9884 and a recording medium insertion unit 988. 6, LED lamp 9890, input means (operation keys 9885, connection terminals 9887, sensors 9 888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, Chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration (including functions for measuring movement, odor, or infrared rays), microphone 9889) Of course, the configuration of the portable gaming machine is not limited to the above, and at least It is sufficient that the semiconductor device disclosed in the document is included, and other auxiliary equipment is appropriately provided. The portable game machine shown in FIG. 29(A) can be configured as a game machine having a game data recorded on a recording medium. The function of reading out the program or data and displaying it on the display unit, and wireless communication with other portable gaming machines It has a function to communicate and share information. The function to be performed is not limited to this, and may have various functions.

[0312] FIG. 29(B) shows an example of a slot machine 9900, which is a large-scale gaming machine. The machine 9900 has a display unit 9903 built into a housing 9901. The Machine 9900 also includes other operating means such as a start lever and stop switch, coin The slot machine 9900 is equipped with a slot slot, a speaker, etc. However, the present invention is not limited to the above, and may be configured to include at least the semiconductor device disclosed in this specification. Other auxiliary equipment may be provided as appropriate.

[0313] FIG. 30A is a perspective view showing an example of a portable computer.

[0314] The portable computer of FIG. 30(A) has an upper housing 9301 and a lower housing 9302 connected to each other. The hinge unit is closed to form an upper housing 9301 having a display unit 9303 and a keyboard. The lower housing 9302 having the base 9304 can be stacked on top of each other, making it easy to carry. This is convenient, and when the user wants to type on the keyboard, the hinge unit needs to be opened. The user can perform input operations by looking at the display portion 9303.

[0315] The lower housing 9302 also includes a keyboard 9304 and a pointing device for inputting data. If the display portion 9303 is a touch input panel, Input operations can be performed by touching the touch panel. The lower housing 9302 has a computing function unit such as a hard disk. It has an external connection port 9305 into which a communication cable conforming to the USB communication standard is inserted. There are.

[0316] The upper housing 9301 further includes a display unit 93 that can be slid and stored inside the upper housing 9301. 07, it is possible to realize a wide display screen. The orientation of the screen of the 9307 can be adjusted by the user. If it is a panel, input operations can be performed by touching a part of the retractable display unit.

[0317] The display unit 9303 or the foldable display unit 9307 may be a liquid crystal display panel, an organic light emitting element, or The display device uses an image display device such as a light-emitting display panel using inorganic light-emitting elements.

[0318] The portable computer shown in FIG. 30A is configured with a receiver and the like, and is also a television. It is possible to receive broadcasts and display images on the display unit or the display unit. The hinge unit connecting the display unit 9301 and the lower housing 9302 is closed. 7. Slide the screen to expose the entire screen, and adjust the screen angle to watch TV broadcasts. In this case, the hinge unit can be opened to display the display unit 9303. Furthermore, it only activates the circuits that display TV broadcasts, so it consumes minimal power. This is useful for portable computers with limited battery capacity. do.

[0319] FIG. 30(B) shows a portable electronic device that can be worn on the user's arm like a wristwatch. FIG. 13 is a perspective view showing an example of a story.

[0320] This mobile phone is a main body having at least a communication device having a telephone function and a battery. A band for attaching the body to the arm, and an adjustment unit 92 for adjusting the state of fixation of the band to the arm 05, it is composed of a display unit 9201, a speaker 9207, and a microphone 9208.

[0321] The main body also has an operation switch 9203, which serves as a power input switch and a display switching switch. In addition to the switch and the imaging start command switch, for example, when you press the switch, a program for the Internet Each function can be associated with another function, such as

[0322] Input operations of this mobile phone are performed by touching the display portion 9201 with a finger or an input pen, or by operating the mobile phone. This is done by operating the operation switch 9203 or by voice input to the microphone 9208. FIG. 30B shows a display button 9202 displayed on a display unit 9201. Input can be made by touching the screen.

[0323] The main body also includes an imaging device that converts the subject image formed through the photographic lens into an electronic image signal. The camera unit 9206 has a step. Note that the camera unit does not necessarily have to be provided.

[0324] The mobile phone shown in FIG. 30(B) is equipped with a television broadcast receiver and the like. It can receive TV broadcasts and display the images on the display unit 9201, and can also store data in memory, etc. It is possible to record television broadcasts in memory by using a storage device. The mobile phone shown in B) may have a function capable of collecting location information such as GPS.

[0325] The display unit 9201 is a light-emitting display panel such as a liquid crystal display panel, an organic light-emitting element, or an inorganic light-emitting element. The mobile phone shown in FIG. 30(B) is small and lightweight. Therefore, the battery capacity is limited, and the display device used for the display portion 9201 is a low-power display device. It is preferable to use a force actuable panel.

[0326] Although FIG. 30B illustrates an electronic device that is worn on the arm, the electronic device is not limited to this. It is sufficient that the device has a shape that can be carried around.

[0327] (Embodiment 10) In this embodiment, an example in which some steps are different from those in the first embodiment is shown. After the formation of the source electrode layer or the drain electrode layer 405a, 405b, dehydration or dehydrogenation is performed. An example of the heat treatment is shown in Fig. 31. Note that the same parts as those in Fig. 1 will be described using the same reference numerals. .

[0328] As in the first embodiment, a gate electrode layer 401 and a gate insulator layer 402 are formed on a substrate 400 having an insulating surface. An insulating layer 402 and an oxide semiconductor layer 430 are formed (see FIG. 31A).

[0329] The source and drain electrode layers 405a and 405b are formed over the oxide semiconductor layer 430. Then, the oxide semiconductor layer 430 is partially etched to form an oxide semiconductor layer 441 (FIG. 3). See 1(B). ).

[0330] Next, the oxide semiconductor layer 441 and the source and drain electrode layers 405a and 405b Under inert gas atmosphere (nitrogen, helium, neon, argon, etc.) or reduced pressure After the heat treatment, the material is slowly cooled in an oxygen atmosphere. The oxide semiconductor layer 441 is subjected to dehydration or dehydrogenation treatment to have a low resistance. The oxide semiconductor layer 432 can be formed by arranging the source and drain electrodes 431 and 432 in a dummy state (see FIG. 31C). The material of the electrode layer or drain electrode layer 405a, 405b is a material that can withstand the heat treatment here. For example, tungsten, molybdenum, etc. are preferably used.

[0331] After the heat treatment and slow cooling, the oxide semiconductor layer 432 is contacted with the An oxide insulating film 407 is formed by a sputtering method or a PCVD method. The oxide insulating film 407 in contact with the oxide semiconductor layer 432 is formed by a sputtering method or a PCVD method. When the oxide semiconductor layer 432 is formed by the above-mentioned method, at least the oxide insulating layer 432 is formed in the oxide semiconductor layer 432 with low resistance. The region in contact with the film 407 is made highly resistive (the carrier concentration is reduced, preferably 1×10 18 / cm 3 Therefore, the oxide semiconductor layer 432 is an oxide semiconductor layer 403 (a third oxide semiconductor) having a high resistance oxide semiconductor region. This results in a thin film transistor 470 (see FIG. 31(D)). .

[0332] By performing the heat treatment for the dehydration treatment or the dehydrogenation treatment, Impurities (H 2 After reducing the amount of O, H, OH, etc. to increase the carrier concentration, After the annealing, an oxide insulating film is formed in contact with the oxide semiconductor layer. The carrier concentration in the oxide semiconductor layer is reduced by the above steps, and the reliability of the thin film transistor 470 is improved. can be improved.

[0333] In addition, this embodiment mode can be freely combined with the first embodiment mode.

[0334] (Embodiment 11) A semiconductor device and a manufacturing method thereof will be described with reference to FIG. The parts or parts having similar functions and steps can be performed in the same manner as in embodiment 1. , and a repeated explanation will be omitted.

[0335] A thin film transistor 471 illustrated in FIG. 32 includes a gate electrode layer 401 and an oxide semiconductor layer 403. In this example, a conductive layer 409 is provided so as to overlap with a channel region via an insulating film.

[0336] 32 is a cross-sectional view of a thin film transistor 471 included in the semiconductor device. 471 is a dual-gate type thin film transistor, and is a substrate having an insulating surface. On the substrate 400, a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, a source The electrode or drain electrode layers 405a and 405b, the oxide insulating film 407, and the conductive layer 40 The conductive layer 408 is formed on the oxide insulating film 407 so as to overlap with the gate electrode layer 401. It is provided in.

[0337] The conductive layer 408 is a gate electrode layer 401, a source electrode layer or a drain electrode layer 405a, It can be formed using the same material and method as 05b. When a pixel electrode layer is provided, The conductive layer 40 may be formed using the same material and method as the pixel electrode layer. The film 8 is a laminate of a titanium film, an aluminum film, and a titanium film.

[0338] The conductive layer 408 may have a potential equal to or different from that of the gate electrode layer 401. The conductive layer 408 can also function as a gate electrode layer of the floating gate electrode 404. It may be in a state.

[0339] By providing the conductive layer 408 so as to overlap with the oxide semiconductor layer 403, a thin film transistor In the bias-thermal stress test (hereinafter referred to as BT test) to check the reliability of the As a result, the change in the threshold voltage of the thin film transistor 471 before and after the BT test is reduced. In particular, after the substrate temperature is raised to 150°C, the voltage applied to the gate is reduced to -2 In the -BT test where the voltage is set to 0 V, the variation in the threshold voltage can be suppressed.

[0340] This embodiment mode can be freely combined with the first embodiment mode.

[0341] (Embodiment 12) A semiconductor device and a manufacturing method thereof will be described with reference to FIG. The parts or parts having similar functions and steps can be performed in the same manner as in embodiment 1. , and a repeated explanation will be omitted.

[0342] The thin film transistor 472 illustrated in FIG. 33 includes a gate electrode layer 401 and an oxide semiconductor layer 403. The conductive layer 4 is formed on the insulating layer 410 through the oxide insulating film 407 so as to overlap the channel region. 19 is provided.

[0343] FIG. 33 is a cross-sectional view of a thin film transistor 472 included in the semiconductor device. The transistor 472 is a dual-gate thin-film transistor, and the substrate 472 is a substrate having an insulating surface. On a substrate 400, a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, a solenoid 404, a gate insulating layer 405, a gate insulating layer 406, a gate insulating layer 407, a gate insulating layer 408, a gate insulating layer 409, a gate insulating layer 410, a gate insulating layer 411, a gate insulating layer 412, a gate insulating layer 413, a gate The source or drain regions 404a, 404b, the source or drain electrode layer 40 5a and 405b, the oxide insulating film 407, the insulating layer 410, and the conductive layer 419. A gate electrode layer 419 is provided on the insulating layer 410 so as to overlap with the gate electrode layer 401 .

[0344] The source and drain regions 404a and 404b are formed by the oxide semiconductor layer 403 and the source By providing the gold electrode layer or the drain electrode layer 405a and the gold electrode layer 405b, The metal layers are the source electrode layer 405a and the drain electrode layer 405b, and the oxide semiconductor layer 4 It is possible to achieve a good junction between the GaN and the Schottky barrier layer, and it is thermally stable compared to the Schottky barrier layer. In addition, the low resistance allows good mobility to be maintained even at high drain voltages. This can be done.

[0345] In addition, the present invention is not limited to the structure having the above-mentioned source and drain regions 406a and 406b. For example, a structure in which the source region and the drain region are not provided may be used.

[0346] The thin film transistor described in this embodiment has a structure that functions as a planarization film over the oxide insulating film 407. The insulating layer 410 is then laminated over the oxide insulating film 407 and the insulating layer 410. An oxide insulating film 407 having an opening reaching the rain electrode layer (here, 405b) and an insulating A conductive film is formed in the opening formed in the layer 410 and etched into a desired shape to form a conductive layer 419. In this way, in the process of forming the pixel electrode layer 411, In this embodiment, the pixel electrode layer 411, the conductive layer 419, and the like can be formed. Indium oxide tin oxide alloy containing silicon oxide (In-Sn -O-based oxides) are used.

[0347] The conductive layer 419 is formed on the gate electrode layer 401 and the source or drain electrode layer 405. They may be formed using the same materials and manufacturing methods as those of 405a and 405b.

[0348] The conductive layer 419 may have the same potential as the gate electrode layer 401. The conductive layer 419 can also function as a second gate electrode layer. 419 may be in a floating state.

[0349] By providing the conductive layer 419 so as to overlap with the oxide semiconductor layer 403, a thin film transistor In the BT test to check the reliability of the thin film transistor, The amount of change in the threshold voltage of 472 can be reduced.

[0350] This embodiment mode can be freely combined with the first embodiment mode.

[0351] (Embodiment 13) In this embodiment, an example of a channel stop type thin film transistor 1430 will be described with reference to FIG. 4(A), 34(B) and 34(C). Also, FIG. 34(C) shows a thin film This is an example of a top view of a transistor. A cross-sectional view taken along the chain line Z1-Z2 in the figure is shown in FIG. In addition, the oxide semiconductor layer 1403 of the thin film transistor 1430 is formed of gallium. In the embodiment, an oxide semiconductor material not containing

[0352] In FIG. 34A, a gate electrode layer 1401 is formed over a substrate 1400. An oxide semiconductor layer is formed over the gate insulating layer 1402 which covers the gate electrode layer 1401 .

[0353] In this embodiment, the oxide semiconductor layer 1403 is formed using a Sn—Zn By not using gallium in the oxide semiconductor layer, the valence Since it is possible to form the film without using a high-quality target, costs can be reduced.

[0354] Immediately after the oxide semiconductor film is formed or after the oxide semiconductor film is patterned, the oxide semiconductor film is dehydrated or dehydrated. Perform elementalization.

[0355] For dehydration or dehydrogenation, use an inert gas atmosphere (nitrogen, helium, neon, The mixture is then heated under a gas such as argon or under reduced pressure, and then slowly cooled in an oxygen atmosphere. The heat treatment is carried out at a temperature of 200° C. or higher and 600° C. or lower, preferably 400° C. or higher and 450° C. or lower. The oxide semiconductor layer is subjected to heat treatment in an inert gas atmosphere or under reduced pressure and then to a thermal treatment in an oxygen atmosphere. By slow cooling in the annealing step, the resistance is lowered (the carrier concentration is increased, preferably 1×10 18 / cm 3 As a result, the resistance of the oxide semiconductor layer 1403 can be reduced (see FIG. 34A). (see).

[0356] Next, a channel protective layer 1418 is formed in contact with the oxide semiconductor layer 1403. By forming a channel protection layer 1418 on the semiconductor layer 1403, the source region Damage during the process of forming the drain region 1406a and the drain region 1406b (during etching) This prevents the thin film transistor from being damaged by plasma or etching agents. The reliability of the 1430 can be improved.

[0357] After the dehydration or dehydrogenation, the channel protection layer 141 is continuously formed without being exposed to the air. By continuously treating the film without exposing it to air, the interface It can be contaminated by atmospheric components such as water and hydrocarbons, or by impurities suspended in the air. Since each lamination interface can be formed without any trouble, the variation in thin-film transistor characteristics is reduced. It is possible.

[0358] In addition, a metal oxide is formed on the oxide semiconductor layer 1403 by sputtering or PCVD. When the channel protection layer 1418, which is an oxide insulating film, is formed by using the above method, the resistance of the oxide film is reduced. At least the region of the semiconductor layer 1403 that contacts the channel protection layer 1418 is made highly resistive. (The carrier concentration is reduced, preferably by 1×10 18 / cm 3 less than 1, more preferably ×10 14 / cm 3 The semiconductor device can be formed into a high-resistance oxide semiconductor region by the above-mentioned process. During the manufacturing process, heating under an inert gas atmosphere (or reduced pressure) and heating under an oxygen atmosphere The carrier concentration of the oxide semiconductor layer is increased or decreased by slow cooling and formation of an oxide insulating film. It is important to:

[0359] The channel protection layer 1418 is made of an inorganic material containing oxygen (silicon oxide, silicon oxynitride, etc.). The material used for the fabrication is silicon oxide, silicon oxynitride, etc. The deposition method and the thermal CVD method, as well as the sputtering method, can be used. The protective layer 1418 is formed by etching after deposition. A silicon oxide film is formed by the ring method, and then etched using a photolithography mask. A channel protection layer 1418 is formed by performing a chamfering process.

[0360] Next, a source region 1406a is formed on the channel protection layer 1418 and the oxide semiconductor layer 1403. In this embodiment, the source region or the drain region 1406b is formed. The source region 1406a, which functions as a gate region, and the drain region 1406b are made of Al-Z The oxide semiconductor layer 1403 is a nO-based non-single-crystal film formed under different deposition conditions. The source region 1406a and the drain region 1406b are formed of an oxide semiconductor layer having a lower resistance. The silicon region 1406b is a nitrogen-containing Al-Zn-O-based non-single crystal film, i.e., Al-Zn-O A -N type non-single crystal film (also called an AZON film) may also be used.

[0361] Next, a source electrode layer 1405a is formed on the source region 1406a, and a drain electrode layer 1406b is formed on the drain region 1406b. A drain electrode layer 1405b is formed on each of the first and second electrodes 1405a and 1405b to fabricate a thin film transistor 1430 ( (see FIG. 34B). The source electrode layer 1405a and the drain electrode layer 1405b are The source electrode layer and the drain electrode layer 405a and 405b shown in the first embodiment are formed similarly. can be done.

[0362] The source region 1406 a and the drain region 1406 b are formed by the oxide semiconductor layer 1403 and the By providing the metal layer between the source electrode layer 1405a and the drain electrode layer 1405b, A source electrode layer 1405a, a drain electrode layer 1405b, and an oxide semiconductor layer 1403 It is possible to achieve a good junction between the electrodes, and the junction is more thermally stable than a Schottky junction. In addition, the low resistance makes it possible to maintain good mobility even at high drain voltages. Cut.

[0363] In addition, the present invention is not limited to the structure having the source region 1406a and the drain region 1406b described above. For example, a structure in which the source region and the drain region are not provided may be used.

[0364] After the channel protection layer 1418 is formed, the channel protection layer 1418 is annealed in a nitrogen atmosphere or in an air atmosphere (in the air). The thin film transistor 1430 is subjected to a heat treatment (preferably at 150° C. or higher and lower than 350° C.) For example, a heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. The oxide semiconductor layer 1403 is heated in contact with the channel protective layer 1418. As a result, the variation in the electrical characteristics of the thin film transistor 1470 can be reduced. The heat treatment (preferably at 150° C. or higher and lower than 350° C.) is performed after the formation of the channel protection layer 1418. There are no particular limitations as long as the material is a material that can be used in other processes, for example, when forming an insulating layer that functions as a planarizing film. This process also serves as a heat treatment for reducing the resistance of the transparent conductive film, thereby increasing the number of processes. It can be done without any hassle.

[0365] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0366] (Embodiment 14) A semiconductor device and a manufacturing method thereof will be described with reference to FIGS. 35(A) and 35(B). The parts and steps that are the same as or have similar functions to those in the thirteenth embodiment are the same as those in the thirteenth embodiment. 13, and a repeated explanation will be omitted.

[0367] A thin film transistor 1431 shown in FIG. 35A includes a gate electrode layer 1401 and an oxide semiconductor A channel protection layer 1418 and an insulating layer 1407 are formed so as to overlap the channel region of the dielectric layer 1403. In this example, a conductive layer 1409 is provided through a gap.

[0368] The thin film transistor 1431 is a dual-gate thin film transistor having an insulating surface. A gate electrode layer 1401, a gate insulating layer 1402, an oxide semiconductor layer 1403, and a gate insulating layer 1404 are formed on a substrate 1400 having a gate insulating layer 1401, a gate insulating layer 1402, an oxide semiconductor layer 1404, and a gate insulating layer 1404. The semiconductor layer 1403, the source region 1406a, or the drain region 1406b, the source The electrode layer 1405a or the drain electrode layer 1405b, the insulating layer 1407, and the conductive layer 140 The conductive layer 1409 is formed on the insulating layer 1407 so as to overlap the gate electrode layer 1401. It is provided in.

[0369] The conductive layer 1409 is a gate electrode layer 1401, a source electrode layer 1405a, or a drain electrode layer. The pixel electrode layer can be formed using the same material and method as the pixel electrode layer 1405b. In this case, the conductive layer may be formed using the same material and method as the pixel electrode layer. The conductive layer 1409 is a stack of a titanium film, an aluminum film, and a titanium film.

[0370] The conductive layer 1409 may have the same potential as the gate electrode layer 1401 or may have a different potential. The conductive layer 1409 can also function as a second gate electrode layer. The device may be in a ring state.

[0371] By providing the conductive layer 1409 so as to overlap with the oxide semiconductor layer 1403, a thin film transistor Bias-thermal stress test (hereinafter referred to as BT test) is used to check the reliability of transistors. In this test, the change in the threshold voltage of the thin film transistor 1431 before and after the BT test is reduced. It is possible.

[0372] FIG. 35(B) shows an example that is partially different from FIG. 35(A). The parts and steps having the same functions as those in FIG. 35(A) can be carried out repeatedly. The explanation of this will be omitted.

[0373] The thin film transistor 1432 shown in FIG. 35B includes a gate electrode layer 1401 and an oxide semiconductor A channel protection layer 1418, an insulating layer 1407 and a dielectric layer 1403 are formed so as to overlap the channel region of the dielectric layer 1403. In this example, a conductive layer 1409 is provided with an insulating layer 1408 interposed therebetween.

[0374] In FIG. 35B, an insulating layer 1408 functioning as a planarizing film is laminated over the insulating layer 1407. do.

[0375] In addition, in FIG. 35B, a source region or a drain region is not provided, and the oxide semiconductor layer 14 03 is in direct contact with the source electrode layer 1405a or the drain electrode layer 1405b. It is.

[0376] In the structure of FIG. 35B, the conductive layer 1409 is By providing the BT test for checking the reliability of thin film transistors, The change in the threshold voltage of the thin film transistor 1432 before and after the T test can be reduced. can.

[0377] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0378] (Embodiment 15) In this embodiment, an example in which the structure is partially different from that of the first embodiment is shown in FIG. The same parts or parts having similar functions and steps can be performed in the same manner as in the first embodiment. Therefore, repeated explanation will be omitted.

[0379] In this embodiment, after the first oxide semiconductor layer is patterned, an inert gas atmosphere (nitrogen After heat treatment under nitrogen, helium, neon, argon, etc. or reduced pressure The first oxide semiconductor layer is subjected to heat treatment in the above atmosphere, and then slowly cooled in an oxygen atmosphere. Thus, impurities such as hydrogen and water contained in the oxide semiconductor layer 403 can be removed.

[0380] Next, a source region and a drain region ( n + After forming a second oxide semiconductor film to be used as a conductive layer or a buffer layer, Form.

[0381] Next, the first oxide semiconductor layer, the second oxide semiconductor film, and the conductive film are subjected to an etching process. By etching more selectively, the oxide semiconductor layer 403 and the source region or the drain region 404a, 404b, and source or drain electrode layers 405a, 405b are formed. Note that the oxide semiconductor layer 403 is only partially etched and has a groove (a depression). .

[0382] Next, an oxide semiconductor layer 403 is formed on the oxide semiconductor layer 403 by sputtering or PCVD. The silicon film is formed as the oxide insulating film 407. The oxide insulating film 407 formed by the above-mentioned process is resistant to moisture, hydrogen ions, oxygen ions, OH ions, and the like. - Including First, an inorganic insulating film is used to block these substances from entering from the outside. A silicon film or a silicon oxynitride film is used.

[0383] A sputtering method, a PCVD method, or the like is applied to the oxide semiconductor layer 403 having a low resistance. When the oxide insulating film 407 is formed, the oxide semiconductor layer 403 has a low resistance. In addition, the region in contact with the oxide insulating film 407 is made to have a high resistance (the carrier concentration is reduced, preferably 1×10 18 / cm 3 less than 1×10 14 / cm 3 (See below) and high resistance acid By forming the oxide insulating film 407 in contact with the The high-resistance oxide semiconductor layer 403 is formed, and the thin film transistor 470 can be manufactured. (See Figure 36.)

[0384] In the structure in FIG. 36, the source and drain regions 404a and 404b are Uses In-Ga-Zn-O non-single crystal.

[0385] A source region is formed between the oxide semiconductor layer 403 and the source electrode layer. The drain region is formed between the source region and the drain electrode layer. In the present invention, an oxide semiconductor layer exhibiting a GaN type is used.

[0386] In addition, the source region or drain region 404a, 404b of the thin film transistor 473 The second oxide semiconductor layer used is the oxide semiconductor layer 403 used as a channel formation region. It is preferable that the thickness of the insulating film is thinner than that of the insulating film and has a higher electrical conductivity (electrical conductivity).

[0387] In addition, the oxide semiconductor layer 403 used as a channel formation region has an amorphous structure. The second oxide semiconductor layer used as the gate and drain regions has an amorphous structure with crystal grains (nano). The second layer used as the source and drain regions may include a GaN crystal. The crystal grains (nanocrystals) in the oxide semiconductor layer have a diameter of 1 nm to 10 nm, typically 2 nm. The thickness is about m~4nm.

[0388] After the oxide insulating film 407 is formed, Then, the thin film transistor 473 is subjected to a heat treatment (preferably at 150° C. or higher and lower than 350° C.). For example, a heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere. In this case, the oxide semiconductor layer 403 is heated in contact with the oxide insulating film 407. Therefore, the variation in the electrical characteristics of the thin film transistor 473 can be reduced.

[0389] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is. EXAMPLES

[0390] Here, in an oxide semiconductor layer including a region with a high oxygen concentration and a region with a low oxygen concentration, The results of calculating the change in oxygen concentration before and after the heat treatment were shown in Figures 37 and 38. The calculation software used here is Fujitsu Ltd.'s Mater ials Explorer 5.0 was used.

[0391] FIG. 37 shows a model of the oxide semiconductor layer used in the calculation. Here, the oxide semiconductor layer 70 1 had a structure in which a layer 703 with a low oxygen concentration and a layer 705 with a high oxygen concentration were stacked.

[0392] Here, the layer 703 with a low oxygen concentration is made of 15 In atoms, 15 Ga atoms, and 15 The amorphous structure was composed of 10 Zn atoms and 54 O atoms.

[0393] The oxygen-rich layer 705 is made of 15 In atoms, 15 Ga atoms, and 15 The amorphous structure was composed of a Zn atom and 66 O atoms.

[0394] The density of the oxide semiconductor layer 701 is set to 5.9 g / cm 3 It was decided.

[0395] Next, the oxide semiconductor layer 701 was aged under the conditions of the NVT ensemble and a temperature of 250° C. The change in oxygen concentration was calculated using a standard MD (molecular dynamics) calculation. The time step size was 0.2 fs. The total calculation time was set to 200 ps. The potential was set to the metal-oxygen bond and The Born-Mayer-Huggins type was applied to the oxygen-oxygen bonds. The movement of atoms at the top and bottom ends of the semiconductor layer 701 was fixed.

[0396] Next, the calculation results are shown in Figure 38. The area from 0 nm to 1.15 nm on the z-axis coordinate is the layer with low oxygen concentration. 703, and the region from 1.15 nm to 2.3 nm on the z-axis coordinate is the layer 705 with a high oxygen concentration. The oxygen density distribution before the MD calculation is shown by the solid line 707, and the oxygen density distribution after the MD calculation is shown by the dashed line Shown at 709.

[0397] In the solid line 707, the oxygen concentration is increased from the interface between the low oxygen concentration layer 703 and the high oxygen concentration layer 705. In the layer 705 with high oxygen concentration, the oxygen density is high. The oxygen concentration is uniform in the low oxygen concentration layer 703 and the high oxygen concentration layer 705. It can be seen that...

[0398] From the above, the layer with low oxygen concentration 703 and the layer with high oxygen concentration 705 are stacked as shown below. If there is a bias in the distribution of oxygen concentration, the oxygen will diffuse from the high concentration to the low concentration due to heat treatment. It can be seen that the oxygen concentration becomes homogenous.

[0399] That is, as described in Embodiment 1, the oxide insulating film 407 is formed over the oxide semiconductor layer 431. As a result, the oxygen concentration at the interface between the oxide semiconductor layer 431 and the oxide insulating film 407 is high. Therefore, the oxygen diffuses to the oxide semiconductor layer 431 in a region with a low oxygen concentration. In addition, in the first embodiment, the oxide semiconductor layer is heated in an inert gas atmosphere. After heating under atmospheric pressure (nitrogen, helium, neon, argon, etc.) or reduced pressure The oxide semiconductor layer is gradually cooled in an oxygen atmosphere to form the oxide insulating film 407. Since the oxygen concentration on the surface of the oxide semiconductor layer can be increased, the oxygen The oxygen diffuses toward the oxide semiconductor layer 431 having a low oxygen concentration, and the resistance of the oxide semiconductor layer 431 increases. Therefore, the reliability of the thin film transistor can be improved.

Claims

1. A gate electrode; a gate insulating film on the gate electrode; a first oxide semiconductor layer on the gate insulating film; a second oxide semiconductor layer on the first oxide semiconductor layer; a source electrode electrically connected to the second oxide semiconductor layer; a drain electrode electrically connected to the second oxide semiconductor layer; an oxide insulating film on the source electrode and the drain electrode; an insulating film on the oxide insulating film; a first conductive layer and a second conductive layer on the insulating film; the first conductive layer has a region overlapping with the first oxide semiconductor layer, the second conductive layer is electrically connected to the source electrode or the drain electrode through the oxide insulating film and an opening provided in the insulating film; the first oxide semiconductor layer has a channel formation region, The first oxide semiconductor layer is In—O.

2. A gate electrode; a gate insulating film on the gate electrode; a first oxide semiconductor layer on the gate insulating film; a second oxide semiconductor layer on the first oxide semiconductor layer; a source electrode electrically connected to the second oxide semiconductor layer; a drain electrode electrically connected to the second oxide semiconductor layer; an oxide insulating film on the source electrode and the drain electrode; an insulating film on the oxide insulating film; a first conductive layer and a second conductive layer on the insulating film; the first conductive layer has a region overlapping with the first oxide semiconductor layer, the second conductive layer is electrically connected to the source electrode or the drain electrode through the oxide insulating film and an opening provided in the insulating film; the first conductive layer and the second conductive layer have the same material; the first oxide semiconductor layer has a channel formation region, The first oxide semiconductor layer is In—O.

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