Underfill Vacuum Process

Abstract

An electronic device is formed by applying an underfill material around a perimeter of an integrated circuit (IC) chip bonded to a support substrate. A void is present in the underfill material present between the IC chip and the support substrate. An opening is present through at least one of the IC chip and the support substrate in communication with the void. A vacuum may be applied to the void through the opening present through the IC chip to reduce a size of the void to a first volume. The opening present through the IC chip is sealed by a sealing plate. The underfill material is cured after sealing of the opening to reduce the void to at least a second volume less than the first volume.

Description

[Technical field]

[0001] The present disclosure relates to solder joints between connectors and electrical (electronic) devices, and more particularly to the underfill process employed in forming the solder joints. [Background technology]

[0002] The use of underfill allows for structural bonding of the chip and the substrate, effectively reducing shear stresses and thus applied strain in the solder joints. However, underfill voids can form during the underfill process. Underfill voids are defects that cause reliability issues. The presence of voids between the solder bumps, i.e., the solder balls of the solder joints, can result in solder pumping, which can result in open electrical shorts in devices containing underfill. Additionally, voids can create stress concentrations that can result in crack formation or delamination.

[0003] Voidless underfilling is becoming more challenging due to a number of trends in device manufacturing. For example, larger chips are more susceptible to void formation. Devices with finer pitches and tighter gaps between device features are also more likely to contain voids during the underfill process. In addition, complex devices, such as those involving direct bonded heterogeneous integration (DBHi), are also found to be more likely to contain underfill voids. In view of the above, a need exists to provide a more uniform underfill process that eliminates void formation. Summary of the Invention

[0004] In some embodiments, the methods, apparatus, and structures provided herein can provide uniform, potentially void-free underfill material in solder bonded devices through a mechanism that can apply a vacuum during a process flow beginning with underfill deposition and continuing with thermal curing of the underfill.

[0005] In one embodiment, a method of manufacturing an electronic device is described that includes dispensing an underfill material around a periphery of an integrated circuit (IC) chip bonded to a support substrate. A void is present in the underfill material present between the IC chip and the support substrate. An opening is present through at least one of the IC chip and the support substrate that communicates with the void. A vacuum can be applied to the void through the opening present through the IC chip to reduce the size of the void to a first volume. The opening present through the IC chip is sealed by a sealing plate. The underfill material is cured after sealing of the opening to reduce the void to at least a second volume that is smaller than the first volume.

[0006] In one embodiment, curing is continued until the voids in the underfill material are completely removed.

[0007] In another embodiment, a method of manufacturing an electrical device includes applying an underfill material around a periphery of an integrated circuit (IC) chip bonded to a support substrate, where a void exists in the underfill material between the IC chip and the support substrate, and an opening exists through at least one of the IC chip and the support substrate that communicates with the void. The method further includes applying a vacuum to the void through the opening that exists through the IC chip to reduce the size of the void to a first volume, and sealing the opening with a sealing plate and at least one solder actuator. The at least one solder actuator includes at least one spring for moving the sealing plate. In some embodiments, the method further includes curing the underfill material after sealing the opening to reduce the void to a second volume that is at least smaller than the first volume. The solder actuator does not include an electrical connection for providing power to a servo motor, and has several advantages when used in a vacuum chamber.

[0008] In another aspect, an apparatus is provided for removing voids from an underfill material during the formation of an electrical device. In one embodiment, the apparatus for forming the electrical device includes a tray fixture for receiving an assembly of integrated circuits engaged to a support substrate by solder bonds and underfill material. The tray fixture includes an aperture for exposing at least one vacuum opening in the assembly. The apparatus for forming the electrical device may further include a sealing plate arranged to be inserted into the aperture, and at least one actuator connected to the tray fixture and the sealing plate for moving the sealing plate into engagement with at least one vacuum opening in the assembly.

[0009] In one embodiment, the at least one actuator includes at least one guide pin connected to the tray fixture and the sealing plate, and a spring for moving the sealing plate through an aperture in the tray fixture, the at least one actuator further includes a spring retainer on the at least one guide pin for connecting the spring to the at least one guide pin, and a spring set bar on the tray fixture for connecting the spring to the tray fixture.

[0010] In some embodiments, the actuator does not require an electrical signal to actuate the sealing plate into sealing engagement with the vacuum opening in the assembly. In some embodiments, the actuator may be a solder actuator. The solder actuator may have a spring compressed when the solder is in a solid state, causing the sealing plate to move away from the at least one vacuum opening. The solder actuator may also have a spring relaxed when the solder is in a liquid state. When the solder is in a liquid state, the sealing plate is engaged with the at least one vacuum opening.

[0011] In one example, an apparatus for forming an electrical device includes a tray fixture for receiving an assembly of integrated circuits engaged to a support substrate by solder bonds and underfill material, the tray fixture including an aperture for exposing at least one vacuum opening in the assembly, and may also include a sealing plate positioned for insertion into the aperture and a solder actuator connected to the tray fixture and the sealing plate for moving the sealing plate into engagement with the at least one vacuum opening in the assembly.

[0012] In yet another aspect, an electrical device is provided that includes an integrated circuit chip and a supporting substrate connected by a solder bond. Vacuum openings exist through at least one of the integrated circuit chip and the packaging substrate. In some embodiments, an underfill material fills a space between the integrated circuit chip and the supporting substrate, the underfill material filling the vacuum openings.

[0013] The following detailed description is provided by way of example and not intended to merely limit the disclosure thereto, and is best understood in conjunction with the accompanying drawings, in which like reference numerals refer to like elements and components, and in which: [Brief description of the drawings]

[0014] [Figure 1] FIG. 2 is a vertical cross-sectional view illustrating solder bonding of an integrated circuit (IC) chip to a supporting substrate and deposition of an underfill material, where voids are present in the underfill, according to one embodiment of the present disclosure. [Diagram 2] FIG. 1 is a vertical cross-sectional view showing the flow in a vacuum chamber to draw underfill material from the edge of the IC chip toward the central portion of the IC chip, according to one embodiment of the present disclosure, where vacuum can be applied to voids in the underfill through slits / openings in the substrate of the IC chip. [Diagram 3] FIG. 3 is a plan view of an IC chip bonded to a supporting substrate after depositing an underfill material and applying a vacuum, as shown in FIG. 2. [Figure 4] FIG. 13 is a vertical cross-sectional view of sealing a slit / opening through a substrate of an IC while the structure is in a vacuum. [Diagram 5] FIG. 5 is a vertical cross-sectional view of the structure shown in FIG. 4 with the vacuum adjusted to atmospheric pressure and an underfill cure applied. [Figure 6] FIG. 1 is a plan view of IC chip 5 bonded to support substrate 15 after sealing slits / openings 24, adjusting pressure to atmospheric pressure, and high temperature curing. [Figure 7]FIG. 1 is a vertical cross-sectional view of an apparatus for engaging a sealing plate with a slit / opening in a substrate of an IC chip, which may be a component of a tray or fixture in a vacuum chamber, according to one embodiment of the present disclosure. [Figure 8] FIG. 2 is an enlarged vertical cross-sectional view of a first embodiment of a plate engaged in a sealing engagement with a slit / opening in an IC chip. [Figure 9] 1 is an enlarged vertical cross-sectional view of a second embodiment of a plate including a ridge at the periphery and a centrally located trench, the plate being engaged in a sealing engagement with a slit / opening in an IC chip. [Figure 10] FIG. 13 is a side cross-sectional view of an actuator with a lock in a closed position according to one embodiment of the present disclosure. [Figure 11] FIG. 1 is a side cross-sectional view of an actuator with a lock in an open position according to one embodiment of the present disclosure. [Figure 12] FIG. 2 is a vertical cross-sectional view of an assembly of an IC chip and a supporting substrate bonded together using solder bumps loaded into a tray fixture according to one embodiment of the present disclosure. [Figure 13] FIG. 2 is a vertical cross-sectional view of an assembly of an IC chip and a supporting substrate bonded together using solder bumps loaded into a tray fixture according to one embodiment of the present disclosure. [Figure 14] A vertical cross-sectional view showing the rear and front housing assembly including the IC chip and support substrate assembly engaged in a retailing slot in the side wall of the tray fixture housing 46. [Figure 15] FIG. 13 is a side cross-sectional view showing the spring lock bar connecting to the side of the tray fixture housing and engaging the actuator and guide pin with the connecting plate linkage 26 according to one embodiment of the present disclosure. [Figure 16]FIG. 13 is a vertical cross-sectional view showing the lock being opened to release the holding force on the guide pin to move the guide pin upward and pull the plate into sealing engagement with the slit / hole according to one embodiment of the present disclosure. [Figure 17] FIG. 13 is a side cross-sectional view of a solder pin assembly that can provide a locking mechanism to release a compressed spring to bring the plate into sealing engagement with the slit / aperture, according to one embodiment of the present disclosure. [Figure 18] 18 is a vertical cross-sectional view showing melting solder in the solder pin assembly shown in FIG. 17. [Figure 19] 17 and 18 in conjunction with a sequence for sealing the slits / openings, as described with respect to FIGS. 1-6. FIG. 18 is a plot showing one embodiment of pressure and temperature distributions that provide for melting the solder for the solder pin design shown in FIGS. 17 and 18 in conjunction with a sequence for sealing the slits / openings, as described with respect to FIGS. [Figure 20] FIG. 1 is a vertical cross-sectional view of one embodiment of Direct Bonded Heterogeneous Integration (DBHi) where the underfill material has been processed to provide a completely void and void free underfill. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] Although detailed embodiments of the claimed structures and methods are disclosed herein, it should be understood that the disclosed embodiments are merely exemplary of the claimed structures and methods that may be embodied in various forms. In addition, each example shown in connection with the various embodiments is intended to be illustrative and not restrictive. Furthermore, the drawings are not necessarily to scale, and some features may be exaggerated to show details of particular components. Thus, specific structural and functional details disclosed herein should not be construed as limiting, but merely as representative principles to teach those skilled in the art to variously use the disclosed methods and structures. For purposes of the following description, the terms "upper", "lower", "right", "left", "vertical", "horizontal", "top", "bottom" and their derivatives relate to the disclosed embodiments when oriented in the drawings. The term "disposed on" means that a first element, such as a first structure, is on a second element, such as a second structure, and an intervening element, such as an interface structure, e.g., an interface layer, may be present between the first and second elements. The term "direct contact" means that a first element, such as a first structure, and a second element, such as a second structure, are connected without the presence of any intermediate conducting, insulating, or semiconducting layer at the interface of the two elements.

[0016] The methods and structures described herein provide for forming an underfill material in a structure that includes electrical connections that use solder joints while minimizing or eliminating the formation of underfill voids. The methods and structures described herein can provide an underfill process without special tools and extra areas for applying the underfill material. In some embodiments, the methods and structures of the present disclosure use slits and / or holes formed in the substrates on which the solder joints are formed. In some embodiments where the solder joint containing structure includes two substrates, the slits and / or holes may be formed in the top or bottom substrate, or both the top and bottom substrates. In some embodiments, when forming the underfill, the underfill is applied to fill the gap between the substrates to form a fillet. The fillet is formed at atmospheric pressure. The formation of the fillet may be performed at room temperature or at an elevated temperature, and the formation of the fillet does not require a vacuum environment.

[0017] In the next step, the structure including the fillet of underfill material is placed in a vacuum chamber. A vacuum environment is applied before any slits and / or holes present in the substrate are filled with the underfill material. When the vacuum is applied, the underfill flows and can further fill the space between the two structures connected by the solder joints disposed between them. At this stage, the flow of the underfill material can be characterized as a capillary effect. Additionally, during the step where the vacuum is applied, the temperature can be increased to further aid the flow of the underfill material, which reduces the size of any voids.

[0018] In a next step, after application of the vacuum, the slits and / or holes are plugged. Once the slits and / or holes are plugged and any remaining voids are sealed, the applied vacuum may be released and the pressure of the assembly can return to atmospheric pressure.

[0019] The underfill curing process may also be performed in atmospheric or high pressure environments. During the underfill curing process, the size of the voids may be further reduced and / or eliminated. In addition to a method for reducing the occurrence of voids, an apparatus is also provided that can provide the process sequence described above, including the application of a plate to seal the slits and / or holes after the application of a vacuum.

[0020] The methods and structures of the present disclosure will now be described in more detail with reference to Figures 1-20.

[0021] FIG. 1 shows one embodiment of an integrated circuit (IC) chip 5 solder-bonded to a support substrate 15 (also called a support carrier), such as a printed circuit board (PCB). An integrated circuit or monolithic integrated circuit (also called an IC, chip, or microchip) is a set of electronic circuits on one small flat piece (or "chip") of semiconductor material. The semiconductor material may be a group IV semiconductor, such as silicon (Si), or a group III-V semiconductor material, such as gallium arsenide (GaAs). A number of field effect transistors (FETs), such as MOSFETs (metal-oxide semiconductor field effect transistors), may be incorporated into the chip. The types of semiconductor devices, such as FETs, may include horizontally oriented devices, vertically oriented devices, fin-type field effect transistors, nanowire- or nanosheet-channel type devices, or combinations thereof. Any field effect transistor (FET), such as a gate structure that includes a channel separating source and drain regions, may be incorporated into the chip. The above examples of FET types are provided for illustrative purposes only and are not intended to be limiting.

[0022] The printed circuit board (PCB) 15 includes electrical contact pads and paths for transmitting electrical signals to the IC chip 5 coupled to the electrical contact pads. The printed circuit board (PCB) 15 may be a metal core printed circuit board (MCPB). In some embodiments, other materials such as FR4 may also be employed. It is noted that the support substrate 15 may also be a semiconductor wafer, for example, another silicon substrate.

[0023] The electrical connection between the integrated circuit (IC) chip 5 and the support substrate 15 may be a solder-type bond, such as solder bumps 10, solder balls, or the like. Traditionally, solder bumps 10 (also called "solder balls"), such as C4 (Controlled Collapse Chip Connection) bumps, have been used to bond the chip to the chip carrier. As used herein, the term "solder" refers to any metal or metal compound or alloy that is melted and then cooled to join two or more metallic surfaces. The plurality of solder bumps 10 may be comprised of a metal suitable for soldering. For example, in some embodiments, the solder bumps 10 may be comprised of a eutectic alloy of tin and lead or a lead-free solder composition. In some embodiments, the solder joints have a height in the range of 0.5 mm to 3 mm. In other examples, the solder bumps 10 have a height greater than 1 mm. In some embodiments, the array of solder bumps 10 may have a total area greater than 30 mm by 200 mm.

[0024] Typically, solder has a melting temperature in the range of 150° C. to 250° C. Solder bumps may be small spheres of solder (solder balls) that are bonded to contact areas, interconnect lines or pads of a semiconductor device. In some embodiments, the solder bumps may be formed from a lead-free solder mix or a tin-lead solder.

[0025] The under-ball metal (UBM) is a solder wettable terminal metal that defines the size and area of ​​the soldered connection between the solder ball and the component with which the solder ball is placed in electrical communication. The UBM restricts the flow of the solder ball to the desired area. In some embodiments, the UBM provides adhesion and contact to the chip wiring. In some examples, the UBM may include adhesive layers, barrier layers, and conductive layers that provide a path for interconnection between the back-end-of-line structure of the device and the electrical structure connected to the device back-end-of-line structure using the solder bump. The adhesive layers, barrier layers, and conductive layers provide a path for interconnection between the device and the chip. The adhesive layers can be a metal such as titanium (Ti) or an alloy of titanium (Ti) and tungsten (W). The barrier layers can be made of nickel (Ni). The primary conductive layer is typically copper (Cu). A typical plated BLM layer may consist of a metal stack including a sputtered Ti and W alloy layer, a sputtered Cu layer, a plated Ni layer, and a plated Cu layer. The process involves subtractive etching of a copper seed layer. In this process, a portion of the copper top layer is etched away by a wet etch process. If electromigration improvement is required, a Cu layer is introduced under the 2 microns of nickel to improve current distribution and reduce peak current density. A Cu layer is then plated first to a thickness of 10 microns, followed by a 2 micron Ni layer and then the top Cu layer.

[0026] It should be noted that the above metals described for the solder bumper 10 are provided for illustrative purposes only and are not intended to limit the present disclosure thereto.

[0027] 1, underfill material 20 is shown applied to a support substrate 10 (also called a chip carrier), which may be a printed circuit board, around the perimeter of the area where an IC chip 5 will be bonded. "Underfill" is a composite material comprised of an epoxy polymer with a significant amount of filler. Additional components added to the underfill 20 formulation are flow agents, adhesion promoters, and dyes.

[0028] In some embodiments, the underfill 20 can be an epoxy-based resin. In some examples, the underfill 20 can be an epoxy resin with filler, an epoxy acrylic with filler, or a polymer with a suitable filler. The underfill 20 is non-conductive. In some examples, an epoxy resin formulation suitable for the underfill 20 can include, for example, high purity diglycidyl ether of bisphenol F or diglycidyl ether of bisphenol A, along with a high performance or multi-functional resin, such as a diglycidyl ether of naphthalene diol or a triepoxide of paraaminophenol. It should be noted that this is only one example of an epoxy composition that can be used as the underfill 20 of the present disclosure. Other compositions and other epoxy-based resins are similarly suitable for the underfill 20.

[0029] The underfill 20 has a composition to enhance the attachment of the IC chip 5 to the supporting substrate 15. The composition of the underfill 20 has dielectric properties and also electrically isolates the solder bumps 10 from one another.

[0030] 1, underfill 20 is applied around the periphery of integrated circuit chip 5. Underfill 20 may be applied using an injection process, such as inkjet type printing technology. Underfill 20 may be applied at atmospheric pressure.

[0031] The underfill 20 can be applied at room temperature.

[0032] 1, underfill 20 is present around the perimeter of the chip, but a discernible void is centrally located between the IC chip 5 and the supporting substrate 15. In the example shown in FIG. 1, the void extends from a first solder bump 10 on a first side of the IC chip 5 to a second solder bump 10 on a second side of the IC chip 5.

[0033] As will be described in further detail below, a process flow is provided in which a vacuum is applied to draw the underfill material 20 from the edges of the IC chip 5 towards the central portion of the IC chip to remove voids. To apply the vacuum, a slit / opening 6 is present through the substrate of the IC chip 5. As shown, the slit / opening 6 extends from the top surface of the IC chip 5 and penetrates entirely through the IC chip 5. In this example, the slit / opening 6 is centrally located with respect to the width of the IC chip and is therefore positioned to communicate with the voids 7 in the underfill 20.

[0034] In some embodiments, the slits / openings 6 can be combined with cavity structures. For example, the openings / slits 6 can be formed in a molded package or a fan-out wafer level package. "Fan-out" packaging can be defined as any package with fan-out connections on the chip surface, allowing for more external I / O. Fan-out packaging can use epoxy molding material to completely embed the die, rather than placing it on a substrate or interposer. Fan-out packaging can include dicing the chips on a silicon wafer, then placing the chips on a thin "rebuilt" or carrier wafer / panel, which is then molded, then forming a redistribution layer (RDL) over the molded areas (chips and fan-out areas), and then forming solder balls on top.

[0035] The Si chip is sometimes already embedded before being attached to the laminate, such as in a molded package or fan-out wafer level package. In such cases, the slits / openings 6 can be formed in the molded package or fan-out wafer level package instead of the silicon chip (IC chip 5) or the laminate (e.g., support substrate 5).

[0036] The voids 7 are air gaps. The air gaps are evacuated by applying a vacuum through the slits / openings, which draws the underfill material 20 from the edges of the IC chip towards the central portion of the IC chip 5.

[0037] FIG. 2 illustrates the flow in a vacuum chamber drawing underfill material 20 from the edge of IC chip 5 toward the central portion of IC chip 5. As shown, the substantially circular cross-sectional shape of underfill material 20 at the periphery of IC chip 5 is changed by drawing vacuum. By drawing underfill material 20 toward the central portion of IC chip 5, the voids are evacuated and the size of the voids is reduced, as shown by comparing void 7 before application of vacuum in FIG. 1 and void 7' during application of vacuum in FIG. 2. A vacuum chamber is a rigid enclosure from which air and other gases are removed by a vacuum pump. This results in a low pressure environment within the chamber, commonly referred to as a vacuum. For comparison, atmospheric pressure is about 760 Torr. In some embodiments, application of vacuum creates a low vacuum in the range of 760 Torr to 25 Torr. In some embodiments, application of vacuum creates a low vacuum in the range of 25 to 1×10 -3 This creates an intermediate vacuum in the Torr range that can draw the underfill material 20 from the edges of the IC chip 5 toward the center of the IC chip 5. In some embodiments, the application of the vacuum is at least 1×10 -3 Torr~1×10 -9This creates a hard vacuum in the Torr range, which can draw the underfill material 20 from the edges of the IC chip 5 toward the center of the IC chip 5. In some embodiments, the application of the vacuum is an ultra-high vacuum of 1×10 -9 ~1×10 -12 Torr, this ultra-high vacuum can draw the underfill material 20 from the edges of the IC chip 5 toward the center portion of the IC chip 5. In one example, an intermediate vacuum is preferred.

[0038] The flow of the underfill material 20 may further be promoted by capillary action. In addition, the temperature within the vacuum chamber may be elevated. For example, if the room temperature is in the range of 20° C. to 25° C., the elevated temperature to increase the flow of the underfill material in a vacuum environment may be in the range of 70° C. to 130° C. A furnace element may be present in the vacuum chamber to provide the elevated temperature.

[0039] 3 is a plan view of an IC chip 5 bonded to a support substrate 15 after depositing an underfill material 20 and applying a vacuum. The underfill material has an outer perimeter identified by reference numeral 21 and an inner perimeter indicated by reference numeral 22. Voids are present in the area indicated within the inner perimeter indicated by reference numeral 23. A slit / aperture is indicated by reference numeral 24. Although the slit / aperture 24 is shown as oval, the slit / aperture 24 may also be circular. It should be noted that although only one slit / aperture 24 is shown, the application is not limited to only this example. There may be multiple apertures for applying a vacuum.

[0040] 4 shows at least one hole or slit 24 that is plugged and closed by a plate 25 that seals the hole / slit in the presence of a vacuum. The plate 25 may comprise a plug or sealing element made of one of PTFE, adhesive, rubber, a hard facing material and combinations thereof. The plate 25 may be embedded in a tray or a fixture assembly in a vacuum chamber. After blocking the slit / opening 24, the environment is changed from vacuum to atmospheric pressure. The atmospheric pressure is about 760 Torr.

[0041] FIG. 5 shows one embodiment of the structure after curing. The underfill curing process occurs in an atmospheric or high pressure environment. In some embodiments, curing occurs at temperatures typically between 130° C. and 160° C., although a "snap cure" can occur in a matter of seconds. Atmospheric pressure is approximately 760 Torr. In some embodiments, high pressure curing involves pressures ranging from 1520 to 7600 Torr. Cure times can be less than a few minutes, and in some instances, a matter of seconds.

[0042] The steps of sealing the slits / openings 24, adjusting the pressure to atmospheric pressure, and performing a high temperature cure of the underfill 30 cause the underfill to further fill the voids that exist between the IC chip 5 and the support substrate 10. Figure 6 is a top view of the IC chip 5 bonded to the support substrate 15 after sealing the slits / openings 24, adjusting the pressure to atmospheric pressure, and performing a high temperature cure. With reference to Figures 5 and 6, the underfill material has completely filled the voids that existed in the area shown inside the inner edge indicated by reference numeral 23 in Figure 3.

[0043] FIG. 7 is a vertical cross-sectional view of an apparatus for engaging a sealing plate 25 with a slit / opening 24 in a substrate of an IC chip 5, which is a component of a tray or fixture in a vacuum chamber for the steps of applying a vacuum as described with reference to FIG. 2 and then sealing the slit / opening 24 as described with reference to FIG. 4.

[0044] The plate 25 can be moved upward or downward along the Z-axis. The plate 25 can be a component of a plate assembly 35 made of a metal-based material. The plate assembly 35 can include a plurality of plates 25, each corresponding to an IC chip housed in a tray fixture 40. The plates 25 can be connected by a connecting plate linkage 26, and each plate 25 can rest on a post 27 that connects the plate 25 to the connecting plate linkage 26.

[0045] 8 and 9 show close-up views of plates 25 engaged for sealing engagement with slits / openings 24 of IC chip 5. Each plate 25 can include a base 28 constructed of metal. In the embodiment shown in FIG. 8, the sealing member of plate 25 can include a silicone adhesive layer 29 and a polytetrafluoroethylene sheet 30. In the embodiment shown in FIG. 9, base 28 can include a ridge on the periphery and a centrally located trench. The sealing member for sealing slits / openings 24 can include a porous silicone rubber structure 32 present in the trench of base 28 and a porous PTFE sheet 31 present on silicone rubber structure 32. The assembly of porous PTFE sheet 31 and porous silicone rubber structure 32 can engage and seal slits / openings 24 of IC chip. A silicone adhesive O-ring 33 can be present on the ridge of base 28. The silicone adhesive O-ring 33 can contact the portion of the IC chip substrate surrounding the slit / opening 24 when the slit / opening is sealed by the assembly of the porous PTFE sheet 31 and the porous silicone rubber structure 32. It is noted that the sealing structures of the plate 25 described with reference to Figures 8 and 9 illustrate some embodiments of the present disclosure. It is not intended that the present disclosure is limited to only these examples. The plate structure can include sufficient space for gas to escape, etc.

[0046] The tray fixture 40 can accommodate an assembly of an IC chip 5 bonded to a support substrate 15 during a process sequence for removing voids from the underfill material 20 present with the solder bumps 10. In some embodiments, the IC chip 5 can reside between a rear housing, indicated by reference numeral 43, and a front housing, indicated by reference numeral 42. The front housing 42 has an opening present therethrough through which the plate 25 can move to engage the slit / opening 24 during a process sequence for removing voids from the underfill 20. The assembly of the front housing 42 and rear housing 43 can be engaged with an actuation structure including a spring set bar 54 (not shown in FIG. 7) and a spring lock bar 41. The interaction of the spring set bar 54 and the spring lock bar 41 will be described in further detail with reference to FIGS. 10 and 11.

[0047] The sample, i.e., IC chip 5, is accommodated in the tray fixture 40. The plate 25 is guided by the guide pin 34 along the Z axis to engage with the sample at a fixed position in the tray fixture 26, for example, between the front housing 42 and the rear housing 43. The tray fixture 26 is mounted in a vacuum chamber. The end of the guide pin 34 includes an actuator 50. The actuator 50 can be an electrical or temperature triggered actuator 50. As shown in Figs. 10 and 11, the actuator 50 can adopt a spring pin design, in which the lock 53 is switched from a closed to an open position to actuate the plate 25 in sealing the slit / opening 24. An electrical or temperature signal is used to switch the lock 53 from a closed to an open position. Fig. 10 shows the actuator 50 with the lock 53 in a closed position. In this position, the plate 25 does not seal the hole / opening 24. Fig. 11 shows the actuator 50 with the lock in an open position. In this position, the plate 25 seals the hole / opening 24 .

[0048] FIG. 10 shows one embodiment of a spring pin actuator 50 including a spring 51 disposed between a spring set bar 54 and a spring retainer 52 on a guide pin 34. The spring 51 may be a bimetallic spring. The guide pin 34 passes through a hole in the spring set bar 54 and is in a sliding relationship with the spring set bar 54. The spring retainer 52 is in a fixed position on the guide pin 34. An end of the guide pin 34 extends through an opening in the spring lock bar 41. In FIG. 10, the spring 51 is compressed as the end of the guide pin 34 is housed within the spring lock bar 41 and held down by the spring lock 53 in the closed position. The other side of the guide pin 34 is connected to the connecting plate linkage 26. In the position shown in Figure 10, the spring 51 is compressed and the connecting plate linkage 26 is fully extended, positioning the plate 25 away from the slit / opening 24. This is consistent with the positioning of the plate in Figure 2 while a vacuum is applied to the structure including the underfill 20 in which the voids 7 are present. Application of the vacuum reduces the size of the voids shown in Figure 2 as compared to Figure 1.

[0049] In FIG. 11, the lock 53 of the actuator 50 has been moved to an open position. In this position, the end of the guide pin 34 is no longer held down by the spring lock bar 41. Under this circumstance, the force that held the spring 51 in a relaxed position is released. The spring 51 relaxes from compression. The relaxation of the spring 51 exerts an upward force on the spring retainer 52 of the guide pin 34, causing the guide pin 34 to move upward along the Z axis. The guide pin 34, attached to the connecting plate linkage 26, pulls the plate 25 into sealing engagement with the slit / opening 24. This is consistent with the arrangement of the plates in FIG. 4 and FIG. 5, during which a vacuum is still applied to the structure while the slit / hole 24 is sealed and a curing temperature is applied. The curing reduces the size of the voids as shown in FIG. 5 when compared to FIG. 2.

[0050] 12-18 illustrate one embodiment of using an exemplary tray fixture 40 with the method described with reference to FIGS. 1-6. Referring first to FIG. 12, an assembly of an IC chip 5 and a support substrate 15 bonded together using solder bumps 10 is first loaded into the tray fixture 40. At this stage of the process flow, underfill 20 has been placed around the periphery of the IC chip 5, but substantial voids 7 may exist in the space between the solder bumps 10, the IC chip 5, and the support substrate. Slits / openings 34 may exist through the substrate of the IC chip 5 and communicate with the voids 7 voids. A rear housing 43 may be in contact with the support substrate 15, while a front housing 42 is in contact with the IC chip side of the assembly of the IC chip 5 and the support substrate 15. The front housing 42 may include an opening therethrough through which the plate 25 may move to engage the slits / openings 24 during a process sequence for removing voids from the underfill 20. There are also openings for later positioned guide pins 34, and actuators 50.

[0051] 13 shows the tray fixture housing 46 placed in a vacuum chamber. At the base of the tray fixture housing 46 is placed the plate 25 and connecting plate linkage 26 assembly, and at the opposite face of the tray fixture housing 45 is placed the spring set bar 54.

[0052] 14 shows the assembly of the rear housing 43 and front housing 42, including the IC chip 5 and support substrate 15 assembly engaged in a retailing slot in the side wall of the tray fixture housing 46. The rear housing 43 and front housing 42 assembly, including the IC chip 5 and support substrate assembly, is disposed between the spring set bar 54 and the plate 25 and connecting plate linkage 26 assembly.

[0053] FIG. 15 shows connecting the spring lock bar 41 to the side of the tray fixture housing 46 opposite the location of the assembly of the plate 25 and the connecting plate linkage 26. At this point, the spring 51 may be in a relaxed state. A force may be applied to the end of the guide pin 34 opposite the side engaged with the connecting plate linkage 26 to compress the spring 51. Compressing the spring 51 and engaging the lock 53 provides that the plate 25 is spaced from the slit / opening 24 as shown. The positioning of the plate 25 relative to the slit / opening 24 is consistent with the application of the vacuum described with reference to FIG. 2. As described above with reference to FIG. 2, the application of the vacuum reduces the size of the voids 7' in the underfill 20 compared to the size of the voids before the application of the vacuum, as shown in FIG. 1.

[0054] FIG. 16 shows one embodiment of opening the lock 53. Opening the lock 53 releases the retaining force on the guide pin 34. Releasing the retaining force on the guide pin 34 causes the spring to relax (decompress), which causes the guide pin 34 to move upward along the Z direction in FIG. 16. The end of the guide pin 34 opposite the end that the retaining lock 53 may engage is connected to the connecting plate linkage 26. The connecting plate linkage 26 is connected to the plate 25. Opening the lock 53 causes the spring to relax, providing a force to pull the connecting plate linkage 26 upward along the Z direction, which pulls the plate 25 into sealing engagement with the slit / hole 24. This is consistent with the arrangement of the plates in FIGS. 4 and 5, during which a vacuum is still applied to the structure and a curing temperature is applied while the slit / hole 24 is sealed.

[0055] The actuator for the lock 53 may be electrical or temperature triggered. In some scenarios, the vacuum chamber may not have electrical wiring inside the chamber. In this example, an actuator that does not rely on electrical signals and servo ports to activate the lock 53 may be provided.

[0056] 17 and 18, in some embodiments, a solder pin assembly 60 can provide a locking mechanism that relaxes the compressed spring 51 and allows the plate 25 to enter sealing engagement with the slit / opening 24. The solder pin assembly 60 can include a solder retaining housing 61 and a solder ball 62. The solder pin assembly 60 can be used in place of the lock 53 shown in FIGS. 10 and 11, and 15 and 16. The solder retaining housing 61 resides on the spring lock bar 41 and over the end of the guide pin 34 that is held to compress the spring 51. The solder 62 resides on the end of the guide pin 34 and is enclosed within the solder retaining housing 61. In the solder pin example, the solder pin 60 is used to release the spring lock by using a temperature trigger (higher than the melting temperature of the solder 62) instead of an electrical signal. The solder 62 may have the composition of any of the types of solders described above to provide the solder bumps 10 .

[0057] When below the melting temperature of the solder 62, the solder is in a solid state, which maintains the spring 51 in compression when pressed between the rear wall of the solder retention housing 61 and the top surface of the guide pin 34. Compressing the spring 51 moves the plate 25 away from the slit / opening 24, as shown in FIG. 17. The positioning of the plate 25 relative to the slit / opening 24 is consistent with the application of a vacuum as described with reference to FIG. 2. As described above with reference to FIG. 2, the application of a vacuum reduces the size of the voids 7' in the underfill 20 compared to the size of the voids before the application of the vacuum, as shown in FIG. 1.

[0058] As the temperature rises to the melting temperature of the solder 61 , the solder 61 is caused to melt, releasing the tray so that the springs 51 cause the plates 25 to seal the vacuum holes, eg slits / openings 24 in the substrate 5 .

[0059] FIG. 19 shows pressure and temperature profiles for melting solder 61 in the appropriate timing with the sequence for sealing the slits / openings as described with reference to FIGS. 1-6. Plot line 71 is the pressure profile. Plot line 72 is the temperature profile. For example, the intersection of the line when the voids are closed, indicated by reference numeral 74, with the line when solder 61 melts, indicated by reference numeral 75, shows the temperature and pressure for melting solder 61. The temperatures and pressures shown in FIG. 19 are suitable for at least one embodiment of triggering plate 25 to seal slits / openings 24 as shown in FIG. 4 for the method sequence described with reference to FIGS. 1-6.

[0060] It should be noted that the methods and apparatus described herein are applicable to any electrical device that includes an underfill material, for example, a device that uses a solder bond to provide electrical communication between two structures, where the solder bond is insulated and mechanically reinforced by a dielectric underfill.

[0061] FIG. 20 shows one embodiment of a direct bonded heterogeneous integration (DBHi) structure in which the underfill material 20 has been processed as described with reference to FIGS. 1-19 to provide a completely void and void-free underfill. The first integrated circuit (IC) chip 5 may be comprised of a semiconductor substrate, such as a group IV semiconductor, e.g., silicon, or a group III-V semiconductor, GaAs. The first integrated circuit (IC) chip 5 may include a plurality of doped regions and gate structures to provide any number of field effect transistors. The first integrated circuit (IC) chip 5 may also include passive electrical devices, such as capacitors and resistors. The support substrate 15 may be a printed circuit board (PCB). The support substrate 15 may be a laminate structure, e.g., a polymer, and may have a plurality of electrical paths present therein. In another example, the support substrate 15 may be comprised of glass. In yet another example, the support substrate may be another semiconductor material, such as a group IV semiconductor, e.g., silicon, or a group III-V semiconductor, GaAs. To provide electrical communication between the support substrate 15 and the first integrated circuit (IC) chip 5, solder bumps 10 are present between them and may be in direct electrical contact with the electrical paths of the first IC chip 5 and the support substrate 15. The solder bumps 10 bond the first IC chip 5 and the support substrate 15 together, i.e., are the molten metal connections.

[0062] In the embodiment shown in FIG. 20, a second integrated circuit chip (IC chip) 80 resides between the first IC chip and the supporting substrate. The second integrated circuit chip 80 may be a bridge chip. The bridge chip may be comprised of a semiconductor substrate such as a Group IV semiconductor, e.g., silicon, or a Group III-V semiconductor, GaAs. The bridge chip may include a plurality of doped regions and gate structures to provide any number of field effect transistors. The bridge chip may also include passive electrical devices such as capacitors and resistors.

[0063] To provide electrical communication between the bridge chip (second integrated circuit (IC) chip 80) and the first integrated circuit (IC) chip 5, solder bumps 81 may be present therebetween and in direct electrical contact with the electrical paths of the first IC chip 5 and the bridge chip (second integrated circuit (IC) chip 80). The solder bumps 10 electrically communicate and bond, i.e., molten metal connect, the first IC chip 5 and the bridge chip (second integrated circuit (IC) chip 80) to one another.

[0064] An underfill material 20 is present, which separates the solder bumps 10 from one another and provides structural rigidity to the bonded connection of multiple chips and substrates shown in FIG. 20. The underfill material 20 is present, which completely fills the spacers between adjacent solder bonds 10 and completely fills the space between the support substrate 15 and the first integrated circuit (IC) chip 5. As shown, the underfill material 20 completely fills the space between the support substrate 15 and the second integrated circuit (IC) chip 80, e.g., a bridge chip. The underfill material 20 is completely free of voids, e.g., voids.

[0065] To provide that the underfill material 20 is completely void free, a vacuum and curing method is applied to the structure using the method described with reference to Figures 1-19. There is a slit / opening 24 through at least one of the first IC chip 5 and the supporting substrate 15 to apply the vacuum. It should be noted that although only one hole 24 is shown, the disclosure is not limited to this example only and any number of holes and / or slits may be present as long as their number and shape allow for the application of a vacuum and sealing using the plate structure 25 (described with reference to Figures 1-19) and being permanently sealed by the underfill material as shown in Figure 20.

[0066] Note that Figure 20 shows plate 25 sealing opening / slit 24. This is for illustration purposes. In the final device structure, plate 25 is not present. In some examples, a ball grid array (BGA) or other surface mount structure may be present in the position of plate 25 in Figure 20.

[0067] It should be noted that although the slits / apertures 24 are shown in Figure 20 as being present throughout the width of the support substrate 15, the methods and structures of the present disclosure are not limited to this example. For example, Figures 1-6 show that the slits / apertures are formed through the IC chip 15. The slits / apertures 24 can be formed using an etching process.

[0068] The methods and structures of the present disclosure provide that the slits / openings 24 are also filled with the underfill material 20. The underfill material 20 may fill the entirety of the slits / openings 24, which is one distinguishing feature of the structures disclosed herein versus conventional devices that use underfill materials. In some embodiments, by being completely filled with the underfill material 20, in the final device structure, the slits / openings 24 are completely free of voids and / or voids.

[0069] The composition of the underfill material 20 shown in Figure 20 is described above with reference to Figures 1-19. Thus, the description of the underfill material 20 described with reference to Figures 1-19 is equally applicable to the underfill composition of the underfill material shown in Figure 20 and identified by the same reference number, i.e., "20."

[0070] While the disclosed method and structure for underfill vacuum processing has been particularly shown and described with respect to preferred embodiments thereof, it will be understood by those skilled in the art that the above and other changes in form and detail may be made therein without departing from the spirit and scope of the present disclosure. It is therefore intended that the present disclosure not be limited to the exact forms and details described and illustrated, but fall within the scope of the appended claims.

Claims

1. 1. A method of manufacturing an electronic device, comprising: applying an underfill material around a periphery of an integrated circuit (IC) chip bonded to a support substrate, wherein voids exist in the underfill material between the IC chip and the support substrate, and openings exist through at least one of the IC chip and the support substrate that communicate with the voids; applying a vacuum to the void through the opening; sealing the opening with a sealing plate; curing the underfill material after sealing the opening; A method for manufacturing an electronic device comprising:

2. 2. The method of claim 1, wherein the voids in the underfill material are reduced to a first volume by applying the vacuum and reduced to a second volume, the second volume being smaller than the first volume, by curing.

3. The method of claim 1 , wherein the sealing of the opening with the sealing plate occurs under the application of the vacuum.

4. The method of claim 1, wherein the vacuum is in the range of 10 Pa to 2000 Pa.

5. The method of claim 1, wherein the curing is carried out at a temperature in the range of 80°C to 120°C.

6. The method of claim 1 , wherein the curing occurs at atmospheric pressure with the opening sealed.

7. The method of claim 1 , wherein the underfill material fills the opening.

8. 1. A method of manufacturing an electronic device, comprising: applying an underfill material around a periphery of an integrated circuit (IC) chip bonded to a support substrate, wherein voids exist in the underfill material between the IC chip and the support substrate, and openings exist through at least one of the IC chip and the support substrate that communicate with the voids; applying a vacuum to the void through the opening present through the IC chip; sealing the opening with a sealing plate and at least one solder actuator, the at least one solder actuator including at least one spring for moving the sealing plate; curing the underfill material after sealing the opening; A method for manufacturing an electronic device comprising:

9. 9. The method of claim 8, wherein the spring is compressed when the solder of the solder actuator is in a solid state and the sealing plate is spaced from the opening, and the spring is relaxed when the solder is in a liquid state and the sealing plate is engaged with the opening.

10. 1. An apparatus for manufacturing an electrical device, comprising: a tray fixture for receiving an assembly of an integrated circuit engaged to a support substrate by solder bonds and underfill material, said tray fixture including an aperture for exposing at least one vacuum opening in said assembly; a sealing plate positioned for insertion into said aperture; at least one actuator connected to the tray fixture and the sealing plate for moving the sealing plate into engagement with the at least one vacuum opening in the assembly; 1. An apparatus for manufacturing an electrical device comprising:

11. 11. The apparatus of claim 10, wherein the at least one actuator comprises at least one guide pin connected to the tray fixture and the sealing plate, and a spring for moving the sealing plate through the aperture in the tray fixture.

12. 11. The apparatus of claim 10, wherein the at least one actuator further comprises: a spring retainer at the at least one guide pin for connecting the spring to the at least one guide pin; and a spring set bar at the tray fixture for connecting the spring to the tray fixture.

13. The apparatus of claim 10 , wherein the actuator comprises an electrically triggered servo motor.

14. 1. An apparatus for manufacturing an electrical device, comprising: a tray fixture for receiving an assembly of an integrated circuit engaged to a support substrate by solder bonds and underfill material, said tray fixture including an aperture for exposing at least one vacuum opening in said assembly; a sealing plate positioned for insertion into said aperture; a solder actuator connected to the tray fixture and to the sealing plate for moving the sealing plate into engagement with the at least one vacuum opening in the assembly; 1. An apparatus for manufacturing an electrical device comprising:

15. 15. The apparatus of claim 14, wherein the solder actuator comprises at least one guide pin connected to the tray fixture and to the sealing plate, and a spring for moving the sealing plate through the aperture in the tray fixture.

16. 16. The apparatus of claim 15, wherein the solder actuator further comprises: a spring retainer at the at least one guide pin for connecting the spring to the at least one guide pin; and a spring set bar at the tray fixture for connecting the spring to the tray fixture.

17. 17. The apparatus of claim 16, wherein the spring is compressed when the solder of the solder actuator is in a solid state and the sealing plate is spaced from the at least one vacuum opening, and the spring is relaxed when the solder is in a liquid state and the sealing plate is engaged with the at least one vacuum opening.

18. 1. An electrical device comprising: an integrated circuit chip and a supporting substrate connected by a solder bond, the integrated circuit chip and the supporting substrate having a vacuum opening through at least one of the integrated circuit chip and the supporting substrate; an underfill material filling a space between the integrated circuit chip and the support substrate, the underfill material also filling the vacuum openings; An electronic device comprising:

19. 20. The electrical device of claim 18, further comprising a bridge chip between the integrated circuit chip and the support substrate.

20. 20. The electrical device of claim 18, wherein an underfill material filling a space between the integrated circuit chip and the supporting substrate is potentially void-free.

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