Semiconductor device, display and electronic equipment

Abstract

To provide a semiconductor device or display with high reliability.SOLUTION: A semiconductor device with a function to suppress hot carrier degradation of transistors includes a switch with a plurality of transistors connected in series and a diode connected to the node between the transistors. The appropriate potential supplied from the diode to the node allows the source-to-drain voltage to drop before the transistor enters the on state, thus suppressing hot carrier degradation.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device.

[0002] Note that one embodiment of the present invention is not limited to the above technical field. Examples of the technical field of one embodiment of the present invention include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, an electronic device, a lighting device, an input device (e.g., a touch sensor), an input / output device (e.g., a touch panel), a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device refers to any device that can function by utilizing semiconductor characteristics. Semiconductor elements such as transistors, semiconductor circuits, arithmetic devices, and memory devices are all embodiments of semiconductor devices. Display devices (such as liquid crystal display devices and light-emitting display devices), projection devices, lighting devices, electro-optical devices, power storage devices, memory devices, semiconductor circuits, imaging devices, electronic devices, and the like may be considered to include semiconductor devices. [Background technology]

[0004] In recent years, display devices have been used in a variety of applications. Applications of large display devices include home television devices, digital signage, and public information displays (PIDs). Display devices are also widely used in smartphones and tablet terminals equipped with touch panels.

[0005] As a display device, a light-emitting device having a light-emitting device (also called a light-emitting element) has been developed. A light-emitting device (also called an EL device or an EL element) utilizing the electroluminescence (hereinafter referred to as EL) phenomenon has features such as being easily thin and lightweight, being capable of high-speed response to an input signal, and being capable of being driven by a DC constant voltage power supply. For example, Patent Document 1 discloses an example of a display device using an organic EL element.

[0006] Furthermore, in order to reduce the production cost and mounting area of ​​a driver IC provided in a display device, Patent Document 2 discloses a technique in which part of the circuitry constituting the source driver is formed on a glass substrate in the same manner as the pixel circuits. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2002-324673 A [Patent Document 2] JP 2019-20687 A Summary of the Invention [Problem to be solved by the invention]

[0008] The display device is provided with a drive circuit (gate driver) that selects pixels and a drive circuit (source driver) that supplies data to the selected pixels. In addition, a display device having a touch panel function is also provided with a drive circuit that drives a touch sensor.

[0009] IC chips are used for some or all of these driving circuits. The IC chips can be mounted on the frame of the substrate on which the pixel circuits are formed, but as the number of IC chips mounted increases, the manufacturing cost of the display device increases. This also hinders efforts to narrow the frame. To address these issues, it is desirable to form some or all of the driving circuits monolithically on the same substrate as the pixel circuits.

[0010] To form a driver circuit, it is necessary to use transistors suitable for high-speed operation. In general, it is preferable to use transistors with high on-state current in order to improve charge / discharge characteristics.

[0011] One way to increase the on-current of a transistor is to shorten the channel length, but shortening the channel length of a transistor makes it more susceptible to several adverse effects collectively known as the short channel effect. For example, it is known that hot carriers accelerated by a strong electric field between the source and drain are injected and accumulated in the gate insulating film, which changes the transistor characteristics with respect to the gate voltage.

[0012] Therefore, it is desirable to devise a method for suppressing hot carrier degradation in transistors used in drive circuits.

[0013] Therefore, an object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object is to provide a semiconductor device capable of suppressing hot carrier degradation. Another object is to provide a narrow-frame display device. Another object is to provide a highly reliable display device. Another object is to provide an electronic device including the display device. Another object is to provide a novel semiconductor device, display device, or electronic device.

[0014] Note that the description of these problems does not preclude the existence of other problems. One embodiment of the present invention does not necessarily have to solve all of these problems. Problems other than these can be extracted from the description of the specification, drawings, and claims. [Means for solving the problem]

[0015] One embodiment of the present invention relates to a highly reliable semiconductor device or a display device including the semiconductor device.

[0016] One embodiment of the present invention includes a first switch and a second switch. The first switch includes first to third transistors. A drain of the first transistor is electrically connected to a high potential power line. A source of the first transistor is electrically connected to a drain of a second transistor. A drain of the second transistor is electrically connected to a gate and a drain of a third transistor. A source of the second transistor is electrically connected to a source of the third transistor. A gate of the first transistor is electrically connected to a gate of the second transistor. The second switch is a source of the fourth transistor is electrically connected to a low potential power line, a drain of the fourth transistor is electrically connected to a source of the fifth transistor, a source of the fifth transistor is electrically connected to a source of the sixth transistor, a drain of the fifth transistor is electrically connected to a gate and a drain of the sixth transistor, a gate of the fourth transistor is electrically connected to a gate of the fifth transistor, and a source of the second transistor and a drain of the fifth transistor are electrically connected.

[0017] The third transistor has a first backgate, and the sixth transistor has a second backgate, where the first backgate can be electrically connected to a source of the second transistor, and the second backgate can be electrically connected to a source of the fourth transistor.

[0018] The first to sixth transistors preferably include a metal oxide in a semiconductor layer and have a channel formation region along a side surface of an insulating layer.

[0019] Another embodiment of the present invention includes a first switch and a second switch. The first switch includes first to seventh transistors. A drain of the first transistor is electrically connected to a high potential power line. A source of the first transistor is electrically connected to a drain of a second transistor and a gate and a drain of a fifth transistor. A source of the second transistor is electrically connected to a drain of a third transistor, a source of the fifth transistor, and a gate and a drain of a sixth transistor. A source of the third transistor is electrically connected to a drain of a fourth transistor, a source of the sixth transistor, and a gate and a drain of a seventh transistor. A source of the fourth transistor is electrically connected to a source of the seventh transistor. Gates of the first to seventh transistors are electrically connected to each other. The second switch includes eighth to seventh transistors. A semiconductor device including a 14th transistor, a source of the 8th transistor being electrically connected to a low potential power line, a drain of the 8th transistor being electrically connected to a source of the 9th transistor and a source of the 12th transistor, a drain of the 9th transistor being electrically connected to a source of the 10th transistor, a gate and a drain of the 12th transistor, and a source of the 13th transistor, a drain of the 10th transistor being electrically connected to a source of the 11th transistor, a gate and a drain of the 13th transistor, and a source of the 14th transistor, a drain of the 11th transistor being electrically connected to a gate and a drain of the 14th transistor, gates of the 8th to 14th transistors being electrically connected to each other, and a source of the 4th transistor and a drain of the 11th transistor being electrically connected to each other.

[0020] The fifth transistor has a first backgate, the sixth transistor has a second backgate, the seventh transistor has a third backgate, the twelfth transistor has a fourth backgate, the thirteenth transistor has a fifth backgate, and the fourteenth transistor has a sixth backgate, where the first backgate is electrically connected to a source of the third transistor, the second backgate and the third backgate are electrically connected to a source of the fourth transistor, the fourth backgate is electrically connected to a source of the eighth transistor, the fifth backgate is electrically connected to a source of the ninth transistor, and the sixth backgate is electrically connected to a source of the tenth transistor.

[0021] Alternatively, the fifth transistor has a first backgate, the sixth transistor has a second backgate, the seventh transistor has a third backgate, the twelfth transistor has a fourth backgate, the thirteenth transistor has a fifth backgate, and the fourteenth transistor has a sixth backgate, and the first to third backgates are electrically connected to the source of the fourth transistor, and the fourth to sixth backgates are electrically connected to the source of the eighth transistor.

[0022] The first to fourteenth transistors preferably include a metal oxide in a semiconductor layer and have a channel formation region along a side surface of an insulating layer.

[0023] Further, a display device including the above-described semiconductor device in a driver circuit of a pixel, and an electronic device including the display device and a speaker are also embodiments of the present invention. Effect of the Invention

[0024] According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. Alternatively, a semiconductor device capable of suppressing hot carrier degradation can be provided. Alternatively, a display device with a narrow frame can be provided. Alternatively, a display device having a monolithic driver circuit can be provided. Alternatively, a highly reliable display device can be provided. Alternatively, an electronic device including the display device can be provided. Alternatively, a novel semiconductor device, display device, or electronic device can be provided.

[0025] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims. [Brief description of the drawings]

[0026] [Figure 1] 1A to 1C are circuit diagrams illustrating a semiconductor device. [Diagram 2] 2A to 2D are diagrams for explaining the operation of a conventional semiconductor device. [Diagram 3] 3A to 3D are diagrams illustrating the operation of the semiconductor device. [Figure 4] 4(A) and 4(B) are circuit diagrams illustrating the semiconductor device. [Diagram 5] 5(A) and 5(B) are diagrams illustrating the operation of the semiconductor device. [Figure 6] 6(A) and 6(B) are diagrams illustrating the operation of the semiconductor device. [Figure 7] 7(A) and 7(B) are circuit diagrams illustrating a semiconductor device. [Figure 8] 8(A) and 8(B) are diagrams illustrating the operation of the semiconductor device. [Figure 9] 9(A) and 9(B) are diagrams illustrating the operation of the semiconductor device. [Figure 10]FIG. 10 is a diagram illustrating a shift in the threshold voltage of a transistor. [Figure 11] FIG. 11 is a diagram illustrating a shift in the threshold voltage of a transistor. [Figure 12] Fig. 12A is a circuit diagram illustrating a semiconductor device, and Fig. 12B is a block diagram illustrating the semiconductor device. [Figure 13] Fig. 13(A) is a diagram illustrating the operation of the semiconductor device, and Fig. 13(B) is a circuit diagram illustrating the semiconductor device. [Figure 14] 14(A) and 14(B) are diagrams illustrating the operation of the semiconductor device. [Figure 15] FIG. 15 is a circuit diagram illustrating a shift register circuit. [Figure 16] Fig. 16(A) is a block diagram illustrating a sequential circuit, and Fig. 16(B) and Fig. 16(C) are timing charts illustrating the operation of the shift register circuit. [Figure 17] 17(A) and 17(B) are diagrams illustrating a vertical transistor. [Figure 18] 18(A) and 18(B) are diagrams illustrating a vertical transistor. [Figure 19] FIG. 19 is a diagram illustrating a vertical transistor. [Figure 20] FIG. 20 is a diagram for explaining the layout of a semiconductor device. [Figure 21] 21(A) and 21(B) are cross-sectional views illustrating a semiconductor device. [Figure 22] 22A to 22C are cross-sectional views illustrating a semiconductor device. [Diagram 23] 23(A) and 23(B) are cross-sectional views illustrating a semiconductor device. [Figure 24] Fig. 24(A) is a block diagram illustrating an example of a display device, and Fig. 24(B) and Fig. 24(C) are circuit diagrams illustrating an example of a pixel circuit. [Diagram 25]25A to 25C are diagrams illustrating examples of the configuration of a display panel. [Figure 26] 26(A) and 26(B) are diagrams for explaining a configuration example of a display panel. [Figure 27] 27A to 27F are diagrams illustrating examples of pixel configurations. [Figure 28] 28A to 28E are diagrams illustrating examples of electronic devices. [Figure 29] 29A to 29G are diagrams illustrating examples of electronic devices. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details of the present invention can be modified in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention is not interpreted as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same reference numerals are used in common between different drawings for the same parts or parts having similar functions, and repeated explanations may be omitted. In addition, hatching of the same elements constituting the drawings may be omitted or changed as appropriate between different drawings.

[0028] In addition, even if a circuit diagram shows a single element, the element may be configured as a plurality of elements as long as there is no functional problem. For example, a plurality of transistors operating as a switch may be connected in series or parallel. A capacitor may also be divided and placed in multiple positions.

[0029] In addition, one conductor may have multiple functions such as wiring, electrode, and terminal, and in this specification, multiple names may be used for the same element. Even if elements are shown as being directly connected to each other on a circuit diagram, the elements may actually be connected to each other via one or more conductors, and in this specification, such a configuration is also included in the category of direct connection.

[0030] In addition, in this specification, "electrically connected" includes a case where a connection is made via "something having some electrical action." Here, "something having some electrical action" is not particularly limited as long as it allows transmission and reception of an electrical signal between the objects to be connected. For example, "something having some electrical action" includes electrodes or wiring, as well as switching elements such as transistors, resistive elements, coils, and other elements having various functions.

[0031] (Embodiment 1) One embodiment of the present invention is a semiconductor device having a function of suppressing hot carrier degradation of a transistor. The semiconductor device can be used as an element of a driver circuit of a display device, for example.

[0032] The semiconductor device includes a switch having a number of transistors connected in series and a diode connected to a node between the transistors. An appropriate potential is applied from the diode to the node to prevent the source-drain voltage (V ds ) can be reduced, and hot carrier degradation can be suppressed.

[0033] It is preferable to use a vertical transistor as the transistor that is a component of the switch. A vertical transistor has a channel formation region along the side of an opening provided in an insulator, and has a structure that makes it easy to shorten the channel length and widen the channel width, and therefore it is easy to increase the on-current. Vertical transistors are suitable for circuits that perform high-speed operations. In addition, vertical transistors can reduce the area they occupy, so by applying them to a drive circuit of a display device, there is also the advantage that the frame of the display device can be easily narrowed.

[0034] In this specification and the like, the term "series connection of transistors" refers to the fact that, among two adjacent transistors, the drain of one transistor is connected to the source of the other transistor. Although the conductivity type of the transistors used in the semiconductor device of one embodiment of the present invention is assumed to be n-type, this is not limiting, and p-type conductivity transistors can also be used by switching the level of the power supply to be supplied.

[0035] 1A to 1C are circuit diagrams illustrating a semiconductor device of one embodiment of the present invention. A configuration of the semiconductor device will be described with reference to FIG. 1A. The semiconductor device includes a switch SW1 and a switch SW2. The switch SW1 and the switch SW2 are electrically connected to each other through a first conductor such as a wiring or an electrode.

[0036] In the semiconductor device, the first conductor is called a node ND. The node ND is also electrically connected to a second conductor such as a wiring or an electrode of a circuit to which the semiconductor device is applied. That is, in a circuit to which the semiconductor device is applied, the first conductor and the second conductor can be called a node ND. The node ND can be put into a floating state by the operation of an element connected to the node ND.

[0037] The switch SW1 is connected to a high potential power supply line, and can supply a high potential (VDD) to the node ND by being in a conductive state. The switch SW2 is connected to a low potential power supply line, and can supply a low potential (VSS) to the node ND by being in a conductive state. The semiconductor device alternately repeats an operation in which the switch SW1 is conductive and the switch SW2 is non-conductive, and an operation in which the switch SW1 is non-conductive and the switch SW2 is conductive, depending on the operation of the applied circuit. In other words, the potential of the node ND can be VDD or VSS in a steady state.

[0038] Each of the switches SW1 and SW2 includes a plurality of transistors connected in series and a diode. By using a plurality of transistors connected in series, it is possible to reduce leakage current and improve the functionality of the switches.

[0039] Although a configuration in which each of the switches SW1 and SW2 has two transistors and one diode will be described here, the present invention is not limited to this, and each of the switches SW1 and SW2 may have three or more transistors and two or more diodes. These configurations will be described later.

[0040] In the switches SW1 and SW2, the direction of current flow is always constant when the transistors are conductive. Therefore, in the following description, the terminal that is on the high potential side when the transistors are conductive is fixedly referred to as the drain, and the terminal that is on the low potential side is fixedly referred to as the source.

[0041] The switch SW1 has a series-connected transistor M1 and transistor M2, and a diode D1. The drain of the transistor M1 is electrically connected to a high-potential power line. The source of the transistor M1 is electrically connected to the drain of the transistor M2 and the anode of the diode D1, and the source of the transistor M2 is electrically connected to the cathode of the diode D1. The gate of the transistor M1 is electrically connected to the gate of the transistor M2.

[0042] The switch SW2 includes a series-connected transistor M3 and transistor M4, and a diode D2. The source of the transistor M4 is electrically connected to the low-potential power line. The drain of the transistor M4 is electrically connected to the source of the transistor M3 and the cathode of the diode D2, and the drain of the transistor M3 is electrically connected to the anode of the diode D2. The gate of the transistor M3 is electrically connected to the gate of the transistor M4.

[0043] The switches SW1 and SW2 have the above-described configuration, and the source of the transistor M2 and the drain of the transistor M3 are electrically connected at a node ND.

[0044] In one embodiment of the present invention, hot carrier degradation of a transistor is suppressed by a diode function in a switch. In order to explain the function, a structure and operation of a conventional semiconductor device that does not have a diode will first be described.

[0045] FIG. 2A is a circuit diagram showing an example of a conventional semiconductor device, which has a configuration in which the diode is omitted from FIG. 1A.

[0046] FIG. 2A shows a high potential (V H ) is supplied to the gates of the transistors M3 and M4, and a low potential (V L ) is supplied to the switch SW1. In other words, the switch SW1 is in a conductive state, and the switch SW2 is in a non-conductive state. This steady state is defined as the first state, and the steady state in which the switch SW1 is in a non-conductive state and the switch SW2 is in a conductive state is defined as the second state. The operation will be described below.

[0047] In the first state, the switch SW1 is in a conductive state and the switch SW2 is in a non-conductive state, so the potential of the node ND is a high potential (VDD). At this time, in the switch SW1, the potential of the node N1 between the transistors M1 and M2 is also VDD. In the switch SW2, the potential of the node N2 between the transistors M3 and M4 is VSS.

[0048] In the state (second state) before the first state, when the transistors M3 and M4 are on, the nodes ND and N2 are at a low potential (VSS). Therefore, when the first state is reached (the transistors M3 and M4 are off), the node N2 is held at VSS.

[0049] Next, the transition from the first state to the second state will be described with reference to Fig. 2(B) Fig. 2(B) shows the state immediately after switch SW2 becomes conductive.

[0050] First, the switch SW1 is turned off, and then the switch SW2 is turned on. A high potential (V H ) is supplied, the potential of the node ND is VDD and the potential of the node N2 is VSS. Therefore, the source-drain voltage (V ds ) is VDD-VSS. VDD-VSS is a relatively large potential difference that occurs in the circuit, and in transistor M3, V ds Current starts to flow when the potential is large. Therefore, hot carriers are more likely to be generated in transistor M3.

[0051] A current flows through the switch SW2 until the potential of the node ND drops to VSS, and the switch SW2 enters a steady state, which is the second state shown in FIG.

[0052] Next, the transition period from the second state to the first state will be described with reference to Fig. 2(D) Fig. 2(D) shows the state immediately after the switch SW1 becomes conductive.

[0053] First, the switch SW2 is turned off, and then the switch SW1 is turned on. A high potential (V H ) is supplied, the potential of the node ND is VSS and the potential of the node N1 is VDD. Therefore, the source-drain voltage (V ds ) is VDD-VSS, and V ds Current starts to flow when the potential is large. Therefore, hot carriers are more likely to be generated in the transistor M2.

[0054] A current flows through the switch SW1 until the potential of the node ND rises to VDD, and the switch SW1 enters a steady state, which is the first state shown in FIG.

[0055] As described above, the semiconductor device repeats the operation of alternately turning on the switch SW1 and the switch SW2, which causes hot carriers to be repeatedly injected into the gate insulating film of the transistor M2 and the transistor M3, resulting in hot carrier degradation in which the threshold voltage increases.

[0056] 3A to 3D are diagrams illustrating the operation of the semiconductor device of one embodiment of the present invention illustrated in Fig. 1A. The semiconductor device alternately turns on and off the switches SW1 and SW2.

[0057] FIG. 3A shows a case where a high potential (V H ) is supplied to the gates of the transistors M3 and M4, and a low potential (V L ) is supplied to the switch SW1. In other words, the switch SW1 is in a conductive state, and the switch SW2 is in a non-conductive state. This steady state is defined as the first state, and the steady state in which the switch SW1 is in a non-conductive state and the switch SW2 is in a conductive state is defined as the second state. The operation will be described below.

[0058] In the first state, the switch SW1 is in a conductive state and the switch SW2 is in a non-conductive state, so that the potential of the node ND is a high potential (VDD). In the switch SW1, the potential of the node N1 between the transistors M1 and M2 is also VDD.

[0059] In the switch SW2, in the state (second state) before the first state, when the transistors M3 and M4 are on, the nodes ND and N2 are at a low potential (VSS). Therefore, when the transistors M3 and M4 are off, the node N2 is held at VSS.

[0060] However, in the process of the potential of the node ND rising to VDD, the potential difference between the nodes ND and N2 becomes equal to the forward voltage of the diode D2 (V f ), current starts to flow through diode D2. Then, when the potential of node ND rises to VDD, the potential of node N2 rises to VDD-V f That is, in the first state, the switch SW2 is in a non-conductive state, but the potential of the node N2 rises to VDD-V f It is.

[0061] Next, the transition from the first state to the second state will be described with reference to Fig. 3(B) Fig. 3(B) shows the state immediately after the switch SW2 becomes conductive.

[0062] First, the switch SW1 is turned off, and then the switch SW2 is turned on. A high potential (V H ) is supplied, the potential of the node ND is VDD and the potential of the node N2 is VDD-V f Therefore, the source-drain voltage of transistor M3 (V ds ) is VDD-(VDD-V f )=V f And V ds Current starts to flow when the potential is relatively small. Therefore, hot carriers are less likely to be generated in transistor M3.

[0063] Also, the V of transistor M4 ds is VDD-V f However, this is smaller than VDD-VSS, and it can be said that the generation of hot carriers can be reduced more than in the conventional semiconductor device.

[0064] A current flows through the switch SW2 until the potential of the node ND drops to VSS, and the switch SW2 enters a steady state, which is the second state shown in FIG.

[0065] In the switch SW1, in the first state, when the transistors M1 and M2 are on, the nodes ND and N1 are at a high potential (VDD. Therefore, when the transistors M1 and M2 are off, the node N1 is held at VDD.

[0066] However, in the process of the potential of the node ND decreasing to VSS, the potential difference between the nodes N1 and ND becomes equal to the forward voltage (V f ), current begins to flow through diode D1. Then, when the potential of node ND drops to VSS, the potential of node N1 becomes VSS+V f That is, in the second state, the switch SW1 is in a non-conductive state, but the potential of the node N1 drops to VSS+V f It is.

[0067] Next, the transition period from the second state to the first state will be described with reference to Fig. 3(D) Fig. 3(D) shows the state immediately after the switch SW1 becomes conductive.

[0068] First, the switch SW2 is turned off, and then the switch SW1 is turned on. A high potential (V H ) is supplied, the potential of the node ND is VSS, and the potential of the node N1 is VSS+V f Therefore, the source-drain voltage of transistor M2 (Vds ) is VSS+V f -VSS=V f And V ds Current starts to flow when the potential difference between the gate and the gate of the transistor M2 is relatively small. Therefore, hot carriers are less likely to be generated in the transistor M2.

[0069] Also, the V of transistor M1 ds VDD-(VSS+V f ), which is smaller than VDD-VSS, and it can be said that the generation of hot carriers can be mitigated more effectively than in the conventional semiconductor device.

[0070] A current flows through the switch SW1 until the potential of the node ND rises to VDD, and the switch SW1 enters a steady state, which is the first state shown in FIG.

[0071] As mentioned above, by providing a diode to the switch, the V ds Therefore, the transistor can be V ds In other words, the generation of hot carriers can be suppressed, and degradation of the transistor can be prevented.

[0072] 1A and 3A to 3D, the diodes D1 and D2 in the circuit diagrams are indicated by diode symbols. That is, the diodes D1 and D2 may be pn junction diodes or pin junction diodes.

[0073] However, if the diodes cannot be fabricated in the same manufacturing process as the transistors, the number of manufacturing steps will increase. Therefore, it is preferable to use diode-connected transistors, in which the gate and drain of the transistor are electrically connected, as the diodes D1 and D2, as shown in FIG.

[0074] The switch SW1 shown in FIG. 1B is configured using a diode-connected transistor M5 as the diode D1, and the connection configuration of each element is as follows: The drain of the transistor M1 is electrically connected to the high-potential power line. The source of the transistor M1 is electrically connected to the drain of the transistor M2 and the gate and drain of the transistor M5. The source of the transistor M2 is electrically connected to the source of the transistor M5. The gate of the transistor M1 is electrically connected to the gate of the transistor M2.

[0075] 1B is configured using a diode-connected transistor M6 as the diode D2, and the connection configuration of each element is as follows: The source of the transistor M4 is electrically connected to the low-potential power line. The drain of the transistor M4 is electrically connected to the source of the transistor M3 and the source of the transistor M6. The drain of the transistor M3 is electrically connected to the gate and drain of the transistor M6. The gate of the transistor M3 is electrically connected to the gate of the transistor M4.

[0076] The circuit in FIG. 1(A) and the circuit in FIG. 1(B) are equivalent. When using a diode-connected transistor, the forward voltage (V f ) to the threshold voltage (V th ) can be replaced with

[0077] In addition, as shown in FIG. 1C, when a diode-connected transistor is used, a back gate may be provided to the transistor. By supplying an appropriate potential to the back gate, the V th 3B, the V ds , and V of the transistor M1 in FIG. ds can be made smaller.

[0078] 1C, the backgate of the transistor M5 can be electrically connected to the source of the transistor M2, and the backgate of the transistor M6 can be electrically connected to the source of the transistor M4.

[0079] In addition, the V of the transistor th In order to increase the potential, it is preferable to supply a potential lower than the source potential of the transistor to the back gate. If there is no suitable potential supply source, the source potential may be supplied to the back gate. By supplying the source potential to the back gate, the transistor characteristics can be stabilized. Note that a separate potential supply source may be provided to supply a suitable potential to each back gate.

[0080] Next, an example of a semiconductor device in which a switch has three or more series-connected transistors will be described. Fig. 4(A) shows a configuration in which switch SW1 has n (n is an integer of 3 or more) series-connected transistors (transistors M(1) to (n)) and n-1 diodes (diodes D(1) to (n-1)). Note that the configuration of switch SW2 can be the same as that of switch SW1, so a description thereof will be omitted.

[0081] In a switch, the more transistors connected in series, the higher the channel resistance becomes, and therefore the smaller the leakage current becomes. On the other hand, the on-current also becomes smaller, so the number of series connections can be set according to the circuit to which it is applied.

[0082] 4A, the transistors other than the one connected to the power supply line are connected in parallel with the diodes, and the diodes D(1) to (n-1) are connected in series. Therefore, the source potential of the transistor connected to the power supply line is strongly affected by the voltage drop of the diodes.

[0083] That is, as shown in FIG. 3D, in the initial state of the transition from the second state to the first state, V ds VDD-(VSS+V f), but if the number of transistors connected in series is n, then the V ds is VDD-(VSS+(n-1)×V f ) Therefore, the more transistors connected in series, the higher the V ds The V of the series-connected diodes can be reduced. f are all assumed to be equal.

[0084] As a specific example, FIG. 4B shows an example in which the switch has four transistors connected in series.

[0085] The switch SW1 has transistors M11 to M14 and diodes D11 to D13 connected in series. The drain of the transistor M11 is electrically connected to the high potential power line. The source of the transistor M11 is electrically connected to the drain of the transistor M12 and the anode of the diode D11. The source of the transistor M12 is electrically connected to the drain of the transistor M13, the cathode of the diode D11, and the anode of the diode D12. The source of the transistor M13 is electrically connected to the drain of the transistor M14, the cathode of the diode D12, and the anode of the diode D13. The source of the transistor M14 is electrically connected to the cathode of the diode D13. The gates of the transistors M11 to M14 are electrically connected to each other.

[0086] Here, the node between the transistor M11 and the transistor M12 is referred to as a node N11, the node between the transistor M12 and the transistor M13 is referred to as a node N12, and the node between the transistor M13 and the transistor M14 is referred to as a node N13.

[0087] The switch SW2 has transistors M15 to M18 and diodes D14 to D16 connected in series. The source of the transistor M18 is electrically connected to the low potential power line. The drain of the transistor M18 is electrically connected to the source of the transistor M17 and the cathode of the diode D16. The drain of the transistor M17 is electrically connected to the source of the transistor M16, the anode of the diode D16, and the cathode of the diode D15. The drain of the transistor M16 is electrically connected to the source of the transistor M15, the anode of the diode D15, and the cathode of the diode D14. The drain of the transistor M15 is electrically connected to the anode of the diode D14. The gates of the transistors M15 to M18 are electrically connected to each other.

[0088] Here, the node between the transistor M15 and the transistor M16 is referred to as a node N14, the node between the transistor M16 and the transistor M17 is referred to as a node N15, and the node between the transistor M17 and the transistor M18 is referred to as a node N16.

[0089] The switches SW1 and SW2 have the above-described configuration, and the source of the transistor M14 and the drain of the transistor M15 are electrically connected at a node ND.

[0090] Next, the operation of the semiconductor device shown in FIG. 4B will be described with reference to FIGS.

[0091] FIG. 5A shows a high potential (V H ) is supplied to the gates of the transistors M15 to M18, and a low potential (V L ) is supplied to the switch SW1. In other words, the switch SW1 is in a conductive state, and the switch SW2 is in a non-conductive state. This steady state is defined as the first state, and the steady state in which the switch SW1 is in a non-conductive state and the switch SW2 is in a conductive state is defined as the second state. The operation will be described below.

[0092] In the first state, the switch SW1 is in a conductive state and the switch SW2 is in a non-conductive state, so that the potential of the node ND is a high potential (VDD). In the switch SW1, the potentials of the nodes N11 to N13 are also VDD.

[0093] In the switch SW2, in the state (second state) before the first state, when the transistors M15 to M18 are on, the node ND and the nodes N14 to N16 are at a low potential (VSS). Therefore, when the transistors M15 to M18 are turned off, the nodes N14 to N16 are held at VSS.

[0094] However, in the process in which the potential of the node ND rises to VDD, the potential difference between the node ND and the node N14 becomes equal to the forward voltage (V f ), current begins to flow through diode D14. Also, when the potential difference between node N14 and node N15 reaches the forward voltage (V f ), current begins to flow through diode D15. Also, when the potential difference between node N15 and node N16 reaches the forward voltage (V f ) current begins to flow through diode D16.

[0095] When the potential of the node ND rises to VDD, the potential of the node N14 rises to VDD-V f In addition, the potential of the node N14 rises to VDD-V f When this voltage rises to VDD-2V, the potential at node N15 becomes f Also, the potential of node N15 rises to VDD-2V. f When this voltage rises to VDD-3V, the potential at node N16 becomes f It rises to.

[0096] That is, in the first state, the switch SW2 is in a non-conductive state, but the potential of the node N14 is VDD-V f , the potential of node N15 is VDD-2V f, the potential of node N16 is VDD-3V f It is.

[0097] Next, the transition from the first state to the second state will be described with reference to Fig. 5(B) Fig. 5(B) shows the state immediately after switch SW2 becomes conductive.

[0098] First, the switch SW1 is turned off, and then the switch SW2 is turned on. A high potential (V H ) is supplied, the potential of the node ND is VDD and the potential of the node N14 is VDD-V f Therefore, the source-drain voltage of transistor M15 (V ds ) is VDD-(VDD-V f )=V f It is.

[0099] In addition, the potential of node N14 is VDD-V f The potential of node N15 is VDD-2V. f Therefore, the source-drain voltage of transistor M16 (V ds ) is VDD-V f -(VDD-2V f )=V f It is.

[0100] In addition, the potential of node N15 is VDD-2V. f The potential of the node N16 is VDD-3V. f Therefore, the source-drain voltage of transistor M17 (V ds ) is VDD-2V f -(VDD-3V f )=V f It is.

[0101] Therefore, transistors M15 to M17 are connected to V ds Therefore, hot carriers are unlikely to be generated in the transistors M15 to M17.

[0102] Also, the V of transistor M18 ds is VDD-3V f -VSS, which is smaller than VDD-VSS, and it can be said that the generation of hot carriers can be mitigated more than in the conventional semiconductor device. ds It can be seen that becomes smaller.

[0103] A current flows through the switch SW2 until the potential of the node ND drops to VSS, and the switch SW2 enters a steady state, which is the second state shown in FIG.

[0104] In the switch SW1, in the first state, when the transistors M11 to M14 are on, the nodes ND and N2 are at a high potential (VDD. Therefore, when the transistors M11 to M14 are off, the nodes N11 to N13 are held at VDD.

[0105] However, in the process of the potential of the node ND decreasing to VSS, the potential difference between the node N13 and the node ND becomes equal to the forward voltage (V f ), current begins to flow through diode D13. Also, when the potential difference between node N13 and node N12 reaches the forward voltage (V f ), current begins to flow through diode D12. Also, when the potential difference between node N12 and node N11 reaches the forward voltage (V f ) current begins to flow through diode D11.

[0106] When the potential of the node ND drops to VSS, the potential of the node N13 becomes VSS+V f In addition, the potential of the node N13 drops to VSS+V f When the potential at node N12 drops to VSS+2V, f In addition, the potential of the node N12 drops to VSS+2V. f When the voltage at node N11 drops to VSS+3V, f It drops to.

[0107] That is, in the second state, the switch SW1 is in a non-conductive state, but the potential of the node N13 is VSS+V f , the potential of node N12 is VSS+2V f , the potential of node N11 is VSS+3V f It is.

[0108] Next, the transition period from the second state to the first state will be described with reference to Fig. 6(B) Fig. 6(B) shows the state immediately after the switch SW1 becomes conductive.

[0109] First, the switch SW2 is turned off, and then the switch SW1 is turned on. A high potential (V H ) is supplied, the potential of the node ND is VSS, and the potential of the node N13 is VSS+V f Therefore, the source-drain voltage of transistor M14 (V ds ) is VSS+V f -VSS=V f It becomes.

[0110] In addition, the potential of node N13 is VSS+V f The potential of the node N12 is VSS+2V. f Therefore, the source-drain voltage of transistor M13 (V ds ) is VSS+2V f -(VSS+V f )=V f It becomes.

[0111] In addition, the potential of node N12 is VSS+2V. f The potential of the node N11 is VSS+3V. f Therefore, the source-drain voltage of transistor M12 (V ds ) is VSS+3V f -(VSS+2V f )=V f It becomes.

[0112] Therefore, transistors M12 to M14 are connected to V ds Therefore, hot carriers are unlikely to be generated in the transistors M12 to M14.

[0113] Also, the V of transistor M11 ds VDD-(VSS+3V f ), which is smaller than VDD-VSS, it can be said that the generation of hot carriers can be mitigated more than in conventional semiconductor devices. ds It can be seen that becomes smaller.

[0114] A current flows through the switch SW1 until the potential of the node ND rises to VDD, and the switch SW1 enters a steady state, which is the first state shown in FIG.

[0115] As mentioned above, by providing a diode to the switch, the V ds Therefore, the generation of hot carriers can be suppressed and the deterioration of the transistor can be prevented.

[0116] Note that the semiconductor device illustrated in FIG. 4B can use a diode-connected transistor as a diode, similarly to the example illustrated in FIG. 1B.

[0117] 7A, in the switch SW1, a diode-connected transistor M21 can be used as the diode D11, a diode-connected transistor M22 can be used as the diode D12, and a diode-connected transistor M23 can be used as the diode D13.

[0118] The connection of each element in the switch SW1 is as follows: The drain of the transistor M11 is electrically connected to the high potential power line. The source of the transistor M11 is electrically connected to the drain of the transistor M12 and the gate and drain of the transistor M21. The source of the transistor M12 is electrically connected to the drain of the transistor M13, the source of the transistor M21, and the gate and drain of the transistor M22. The source of the transistor M13 is electrically connected to the drain of the transistor M14, the source of the transistor M22, and the gate and drain of the transistor M23. The source of the transistor M14 is electrically connected to the source of the transistor M23. The gates of the transistors M11 to M14 are electrically connected to each other.

[0119] In the switch SW2, the diode D14 may be replaced by a diode-connected transistor M24, the diode D15 may be replaced by a diode-connected transistor M25, and the diode D16 may be replaced by a diode-connected transistor M26.

[0120] The connection configuration of each element of the switch SW2 is as follows: The source of the transistor M18 is electrically connected to the low potential power line. The drain of the transistor M18 is electrically connected to the source of the transistor M17 and the source of the transistor M26. The drain of the transistor M17 is electrically connected to the source of the transistor M16, the gate and drain of the transistor M26, and the source of the transistor M25. The drain of the transistor M16 is electrically connected to the source of the transistor M15, the gate and drain of the transistor M25, and the source of the transistor M24. The drain of the transistor M15 is electrically connected to the gate and drain of the transistor M24. The gates of the transistors M15 to M18 are electrically connected to each other.

[0121] The circuit in FIG. 4(B) and the circuit in FIG. 7(A) are equivalent. When using a diode-connected transistor, the forward voltage (V f ) to the threshold voltage (V th ) can be replaced with

[0122] In addition, as shown in FIG. 7B, when a diode-connected transistor is used, the transistor may be provided with a back gate. By supplying an appropriate potential to the back gate, the V th can be increased.

[0123] For example, the backgate of the transistor M21 may be electrically connected to the source of the transistor M22, and the backgate of the transistor M22 and the backgate of the transistor M23 may be electrically connected to the source of the transistor M23.

[0124] The back gate of the transistor M24 can be electrically connected to the source of the transistor M25. The back gate of the transistor M25 can be electrically connected to the source of the transistor M26. The back gate of the transistor M26 can be electrically connected to the low potential power line.

[0125] 8A and 8B are diagrams illustrating the potentials applied to the back gates before the switch SW1 is turned on.

[0126] FIG. 8(A) corresponds to the state of FIG. 5(B), and shows the potentials (V N12 , V N13 ), the backgate potential of transistors M21, M22, and M23 (V bg_M21 , V bg_M22 , V bg_M23 At this time, the back gate potential is all VDD.

[0127] FIG. 8B corresponds to the state of FIG. 6A, and shows the V N12 , V N13 , V bg_M21 , V bg_M22 , V bg_M23 In the following explanation, V th_ (Transistor symbol) indicates the threshold voltage of the transistor.

[0128] Here, the source potential of the transistor M23 and V bg_M23 is the potential of the node ND, which is VSS. In other words, the potential of the back gate (V bg ) is the source potential (V s ) (V bg =V s ).

[0129] The source potential of transistor M22 is V N13 And VSS+V th_M23 It is. bg_M22 is the potential of the node ND, which is VSS. In other words, the potential of the back gate (V bg ) is the source potential (V s ) is lower than (V bg <V s ).

[0130] The source potential of transistor M21 is V N12 And VSS+V th_M23 +V th_M22 The back gate potential is V N13 And VSS+V th_M23 In other words, the back gate potential (V bg ) is the source potential (V s ) is lower than (V bg <V s ).

[0131] 9A and 9B are diagrams illustrating the potentials applied to the back gates before the switch SW2 is turned on.

[0132] FIG. 9A corresponds to the state of FIG. 6B, and shows the potentials (V N14 , V N15 , V N16 ), the backgate potential of transistors M24, M25, and M26 (V bg_M24 , V bg_M25 , V bg_M26 At this time, the back gate potential is all VSS.

[0133] FIG. 9B corresponds to the state of FIG. 5A, and shows the V N14 , V N15 , V N16 , V bg_M24 , V bg_M25 , V bg_M26 This shows that.

[0134] Here, the source potential of transistor M24 is V N14 Where VDD-V th_M24 is 。 V bg_M24 is V N15 Where VDD-V th_M24 -V th_M25 In other words, the back gate potential (V bg ) is the source potential (V s ) is lower than (V bg <V s ).

[0135] The source potential of transistor M25 is V N15 Where VDD-V th_M24 -V th_M25 It is. bg_M25 is V N16 Where VDD-V th_M24 -V th_M25 -V th_M26 In other words, the back gate potential (V bg ) is the source potential (V s ) is lower than (V bg<V s ).

[0136] The source potential of transistor M26 is V N16 Where VDD-V th_M24 -V th_M25 -V th_M26 It is. bg_M26 is the potential of the node ND, which is VSS. In other words, the potential of the back gate (V bg ) is the source potential (V s ) is lower than (V bg <V s ).

[0137] As a result, in the switches SW1 and SW2, the back gate potential is set to the same as the source potential (V bg =V s ), or make the backgate potential lower than the source potential (V bg <V s ) can be done. V bg <V s In the case of , the backgate potential becomes negative with respect to the source potential, which contributes to preventing the formation of a channel in an n-channel transistor. In other words, the I d -V d (V g ) characteristic, the threshold voltage (V th ) can be shifted in the positive direction.

[0138] Figure 11 shows the V th Shift amount (ΔV th ) back gate voltage (V bg The size of the vertical transistor is L / W=1.2 μm / 6.3 μm (2 μmφ), and the gate insulating film (T GI ) is 50 nm thick, and the gate insulating film on the back gate side (B GI ) is 120 nm thick.

[0139] V th is the drain voltage (V d) to 0.1V and 5.1V, V bg is -5V to +5V, and each V d and V bg In this case, the front gate voltage (V g ) from -10V to +10V. d -V g It is calculated from the curve.

[0140] The transistor for which the data was obtained was not diode-connected, but rather had different potentials applied to the front gate and drain. As shown in Figure 11, d Since the difference due to the difference is small, the diode-connected transistor also has almost the same V th It can be said that this is the case.

[0141] From Figure 11, V bg The larger the absolute value of the negative potential applied to th It can be seen that the shift in the V th is about 0.5V to 1V, so the V th is a value obtained by adding about 0.5V to 1V to the value in FIG.

[0142] Here, V in the semiconductor device according to one embodiment of the present invention ds The V of the transistor M18 shown in the switch SW2 in FIG. ds is VDD-3V f -VSS, and if a diode-connected transistor is used for switch SW2, VDD-3V th -VSS.

[0143] For example, VDD is 15V, VSS is 0V, and V th is 1V, the V of transistor M18 ds is 12V, but due to the action of the back gate, V th If it becomes 2V, V ds can be 9V. V bg =V s In the case of V dsIt is not necessarily true that V bg Since the potential of the transistor can be determined, the characteristics of the transistor can be stabilized.

[0144] 12A, all of the diode-connected transistors of the switch SW1 may have their back gates connected to the node ND, and all of the diode-connected transistors of the switch SW2 may have their back gates connected to the low-potential power supply line. bg <V s It can be said that:

[0145] In addition, the number of switches SW1 and SW2 is not limited to one, and may be multiple. For example, as shown in FIG. 12B, n switches SW1 (n is an integer of 2 or more) and n switches SW2 can be connected in parallel. In this way, by connecting multiple switches SW1 and multiple switches SW2 in parallel, it is possible to compensate for the decrease in on-current caused by the series connection of transistors.

[0146] In addition, when the semiconductor device is energized for the first time, hot carriers may be generated in the switch SW1. For example, as shown in FIG. 13A, the potential of the node ND is uncertain, and the potential of the node N11 (V N11 ) is 0V, the V of transistor M11 ds There is a possibility that VDD will be a relatively large value of 0. In such a case, hot carriers are more likely to be generated.

[0147] 13B, a transistor M27 may be provided in the switch SW1. The drain of the transistor M27 is electrically connected to the high-potential power line, and the source of the transistor M27 is electrically connected to the gate and drain of the transistor M21. An initial reset signal (signal INI) can be supplied to the gate of the transistor M27 before the transistors M11 to M14 are turned on.

[0148] FIG. 14A shows the potentials of each node and each back gate after the signal INI is supplied. The signal INI is a pulsed signal V H is the signal that supplies V N11 When V becomes V, transistor M21 turns on and V N12 VDD-V th (M21). Then, transistors M22 and M23 turn on in sequence, and V N13 VDD-V th (M21)-V th (M22) and V ND VDD-V th (M21)-V th (M22)-V th (M23).

[0149] At this time, the source potential of transistor M21 is V N12 Where VDD-V th_M21 The back gate potential is V N13 Where VDD-V th (M21)-V th (M22). In other words, the back gate potential (V bg ) is the source potential (V s ) is lower than (V bg <V s ).

[0150] The source potential of transistor M22 is V N13 Where VDD-V th (M21)-V th (M22). bg_M22 is the potential of the node ND, and VDD-V th (M21)-V th (M22)-V th (M23). In other words, the back gate potential (V bg ) is the source potential (V s ) is lower than (V bg <V s ).

[0151] The source potential of transistor M23 and V bg_M23is the potential of the node ND, and VDD-V th (M21)-V th (M22)-V th (M23). In other words, the back gate potential (V bg ) is the source potential (V s ) (V bg =V s ).

[0152] In this way, even when the transistor M27 is provided in the switch SW1, the back gate potential of the diode-connected transistor is set to the same potential as the source potential (V bg =V s ), or make the backgate potential lower than the source potential (V bg <V s ) can be done.

[0153] Also, as shown in FIG. 14B, immediately after the switch SW1 is turned on, the V ds is VDD-VDD=0, V of transistor M12 ds is VDD-(VDD-V th (M21))=V th (M21), V of transistor M13 ds is VDD-V th (M21)-(VDD-V th (M21)-V th (M22))=V th (M22), V of transistor M14 ds is VDD-V th (M21)-V th (M22)-(VDD-V th (M21)-V th (M22)-V th (M23))=V th (M23).

[0154] Therefore, when the switch SW1 is turned on, V ds Therefore, the generation of hot carriers can be suppressed.

[0155] 15 is a circuit diagram illustrating an example in which the semiconductor device of one embodiment of the present invention is used in a shift register circuit. Here, an example is shown in which the semiconductor device illustrated in FIG 7B is used in the shift register circuit SR.

[0156] The shift register circuit SR has switches SW1a and SW1b as the switch SW1, and switches SW2a and SW2b as the switch SW2. The switch SW1a is electrically connected to the switch SW2a at a node NC. The switch SW1b is electrically connected to the switch SW2b at a node NB. The nodes will be described in detail later.

[0157] The shift register circuit also includes switches SW3, SW4, and SW5, each of which includes a plurality of transistors connected in series, and two capacitance elements (capacitance elements Ca and Cb).

[0158] 15 shows an example in which four transistors are connected in series to the switches SW3 to SW5, similar to the switches SW1a, etc., but the number of transistors is not limited to this and may be one or more. By connecting multiple transistors in series, it is possible to reduce leakage current and stabilize circuit operation.

[0159] In the following description, for simplicity, each switch is regarded as one transistor, and the gates of the multiple transistors connected in series in each switch are called the gates of the switches. Also, among the multiple transistors connected in series in each switch, the drain of the transistor at the end to which a high potential is supplied is called the drain of the switch, and the source of the transistor at the end to which a low potential is supplied is called the source of the switch. Note that here, a description of the connection configuration of the diode-connected transistors in the switches SW1 and SW2 is omitted.

[0160] The source of the switch SW1a is electrically connected to the drain of the switch SW2a and one of the source or drain of the switch SW3. The gate of the switch SW2a is electrically connected to one electrode of the capacitance element Ca, the source of the switch SW1b, the drain of the switch SW2b, and the gate of the switch SW5. The other of the source or drain of the switch SW3 is electrically connected to the gate of the switch SW4 and one electrode of the capacitance element Cb. The other of the source or drain of the switch SW4 is electrically connected to the other electrode of the capacitance element Cb and the drain of the switch SW5.

[0161] A high-potential power supply line is electrically connected to the drain of the switch SW1a, the drain of the switch SW1b, and the gate of the switch SW3. A low-potential power supply line is electrically connected to the source of the switch SW2a, the source of the switch SW2b, the source of the switch SW5, and the other electrode of the capacitive element Ca.

[0162] The gates of the switches SW1a and SW2b function as a signal input unit LIN. The gate of the switch SW1b functions as a signal input unit RIN. The other of the source or drain of the switch SW4 functions as a clock signal input unit CLK. One of the source or drain of the switch SW4, the other electrode of the capacitive element Cb, and the drain of the switch SW5 function as a signal output unit SOUT.

[0163] Here, a point (such as a wiring or electrode) electrically connected to the other of the source or drain of switch SW3, the gate of switch SW4, and one electrode of the capacitance element Cb is referred to as a node NA. A point (such as a wiring or electrode) electrically connected to the gate of switch SW2a, one electrode of the capacitance element Ca, the source of switch SW1b, the drain of switch SW2b, and the gate of switch SW5 is referred to as a node NB. A point (such as a wiring or electrode) electrically connected to the source of switch SW1a, the drain of switch SW2a, and one of the source or drain of switch SW3 is referred to as a node NC.

[0164] As shown in FIG. 16(A), the shift register circuit SR can be configured as a sequential circuit by cascading n stages (n is an integer equal to or greater than 2). A start pulse signal (SSP) is input to the signal input section LIN of the first-stage shift register circuit SR, and the signal output section SOUT

[01] is electrically connected to the signal input section LIN of the second-stage shift register circuit. The signal output section SOUT

[02] of the second-stage shift register circuit SR is electrically connected to the signal input section RIN of the first-stage shift register circuit SR. An end pulse (SEP) is input to the signal input section RIN of the n-th stage shift register circuit SR. A dummy shift register circuit SR that generates an SEP may be provided.

[0165] With this configuration, pulse signals can be output sequentially to the signal output units SOUT

[01] to [n], and the device can be used in a gate driver circuit for selecting pixels of a display device or a touch sensor driver circuit. In addition, the device can be used in a source driver circuit for supplying data to pixels by combining it with a latch circuit and an amplifier circuit.

[0166] Next, the operation of the sequential circuit shown in Fig. 16(A) when applied to a gate driver circuit will be described. Fig. 16(B) is a timing chart explaining the operation of the shift register circuit SR electrically connected to the gate line in the kth row (k is an odd number equal to or smaller than n-1). Fig. 16(C) is a timing chart explaining the operation of the shift register circuit SR electrically connected to the gate line in the k+1th row.

[0167] As shown in Fig. 16(A), the clock signals input to the odd-numbered stages are different from those input to the even-numbered stages. However, the basic operations are almost the same, and here, the operation of the shift register circuit SR electrically connected to the k-th row gate line will be mainly described with reference to Fig. 16(B).

[0168] Here, the signal input to the signal input unit LIN is referred to as the LIN signal, the signal input to the clock signal input unit CLK is referred to as the CLK signal, the signal input to the signal input unit RIN is referred to as the RIN signal, and the signal output from the signal output unit SOUT is referred to as the SOUT signal.

[0169] During the period T1, a high-level LIN signal is input to the gate of the switch SW1a from the SSP or the gate line of the n-1th row, the switch SW1a is turned on, the potential of the node NC becomes high-level potential (VDD), and the node NA is precharged. At this time, in the switch SW2a, a current flows through the diode-connected transistor, and the V ds becomes smaller.

[0170] In addition, a high-level LIN signal is input to the gate of the switch SW2b from the SSP or the gate line of the (n-1)th row, the switch SW2b is turned on, and the node NB is discharged to a low-level potential. At this time, in the switch SW1b, a current flows through the diode-connected transistor, and the V ds becomes smaller.

[0171] Also, the switch SW4 is in a conductive state due to the precharging of the node NA, the switch SW5 is in a non-conductive state due to the discharging of the node NB, and the CLK signal is at a low level potential (VSS), so the SOUT signal is at a low level potential. Also, the capacitance element Cb is charged with the potential difference between VDD and VSS.

[0172] In period T2, when the CLK signal is switched to a high-level potential (VDD), the switch SW4 is turned on, the switch SW5 is turned off, and the SOUT signal goes to a high-level potential.

[0173] In addition, as the k-th gate line is charged, the potential of the node NA rises due to the capacitive coupling of the capacitance element Cb, and the gate voltage of the switch SW4 increases to compensate for the charging of the k-th gate line. At this time, since there is a potential difference of VDD-VSS in the capacitance element Cb, the node NA rises to 2×VDD-VSS.

[0174] Here, the source potential of the switch SW3 becomes higher than the gate potential, and the switch SW3 becomes non-conductive. Therefore, the potential of the node NC does not become higher than VDD. Therefore, the source-drain voltage (V ds ) does not increase unnecessarily, and the stress on the transistor can be suppressed.

[0175] At this time, the SOUT signal at high level potential is input as a LIN signal to the next-stage shift register circuit SR, and in the next-stage shift register circuit SR, the node NA is precharged and the node NB is discharged.

[0176] In the period T3, the CLK signal is switched to a low level potential. Also, the SOUT signal of the next-stage shift register circuit SR, which is at a high level potential, is input to the gate of the switch SW1b as the RIN signal, the switch SW1b is turned on, and the node NB is charged to a high level potential. At this time, in the switch SW2b, a current flows through the diode-connected transistor, and the V ds becomes smaller.

[0177] In addition, when the switch SW2a is turned on, the node NC becomes a low-level potential. At this time, in the switch SW1a, a current flows through the diode-connected transistor, and the V ds becomes smaller.

[0178] When the node NC becomes low level potential, the switch SW3 becomes conductive, the node NA is discharged to low level potential, and the switch SW4 becomes non-conductive. Also, the switch SW5 becomes conductive, and the SOUT signal becomes low level potential. Also, the capacitance element Ca is charged with the potential difference between VDD and VSS.

[0179] The above operation completes the operation of the shift register circuit SR that is electrically connected to the gate line of the kth row. After that, until another operation is performed in the next frame, the switch SW5 is maintained in a conductive state by the potential difference held in the capacitance element Ca, and the SOUT signal is maintained at a low level potential.

[0180] The above is a description of the shift register circuit to which the semiconductor device of one embodiment of the present invention is applied. Note that although the above shift register circuit has both the switch SW1 and the switch SW2 included in the semiconductor device, one of the switches SW1 and SW2 may be used.

[0181] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification.

[0182] (Embodiment 2) In this embodiment mode, a vertical transistor that can be used in the semiconductor device shown in Embodiment 1 will be described. The vertical transistor has a structure that can be easily miniaturized and can operate at high speed. Note that the vertical transistor can also be used in a pixel circuit and a pixel driver circuit.

[0183] 17(A) and (B) are diagrams for explaining a vertical transistor. Fig. 17(A) is a top view. Fig. 17(B) is a cross-sectional perspective view taken along line A1-A2, illustrating the depth direction of region d shown in Fig. 17(A). For clarity, some elements are omitted in Figs. 17(A) and (B).

[0184] The transistor 100T, which is a vertical transistor, can be provided over a substrate 102. The transistor 100T includes a conductive layer 104, a conductive layer 104e, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, and a conductive layer 112b. The conductive layer 104 is a gate line and is electrically connected to the conductive layer 104e that functions as a gate electrode. Note that the conductive layer 104e may be a part of the conductive layer 104. A part of the insulating layer 106 functions as a gate insulating layer. The conductive layer 112a functions as one of a source electrode and a drain electrode. The conductive layer 112b functions as the other of the source electrode and the drain electrode.

[0185] A conductive layer 112a is provided on the substrate 102, an insulating layer 107 is provided on the conductive layer 112a, and a conductive layer 112b is provided on the insulating layer 107. The insulating layer 107 has a region sandwiched between the conductive layer 112a and the conductive layer 112b. The conductive layer 112a has a region overlapping with the conductive layer 112b via the insulating layer 107. The insulating layer 107 and the conductive layer 112b have an opening 141 that reaches the conductive layer 112a.

[0186] 17B, ​​the conductive layers 112a and 112b have a single-layer structure, but this is not limited to one embodiment of the present invention. The conductive layers 112a and 112b can each have a stacked-layer structure.

[0187] The top surface shape of the opening 141 can be, for example, circular or elliptical. By making the top surface shape of the opening 141 circular, the processing accuracy when forming the opening 141 can be improved, and the opening 141 can be formed in a fine size. The top surface shape of the opening 141 can also be a polygon such as a triangle, a quadrangle (including a rectangle, a rhombus, and a square), or a pentagon, or a polygon with rounded corners. The opening 141 can be formed by using, for example, a resist mask.

[0188] The semiconductor layer 108 is provided to cover the opening 141. The semiconductor layer 108 has a region in contact with the upper surface and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 107, and the upper surface of the conductive layer 112a. The semiconductor layer 108 is electrically connected to the conductive layer 112a through the opening 141. The semiconductor layer 108 has a shape that follows the shapes of the upper surface and side surfaces of the conductive layer 112b, the side surfaces of the insulating layer 107, and the upper surface of the conductive layer 112a.

[0189] Of the semiconductor layer 108 provided along the side surface of the insulating layer 107, between the source electrode and the drain electrode, the entire region overlapping with the gate electrode via the gate insulating layer functions as a channel formation region. In addition, of the semiconductor layer 108, the region in contact with the source electrode functions as a source region, and the region in contact with the drain electrode functions as a drain region.

[0190] 17B and the like, the semiconductor layer 108 has a single-layer structure, but one embodiment of the present invention is not limited to this. The semiconductor layer 108 can also have a stacked structure of two or more layers.

[0191] The insulating layer 106, which functions as a gate insulating layer of the transistor 100T, is provided over the semiconductor layer 108, the conductive layer 112b, and the insulating layer 107 so as to cover the recess resulting from the opening 141.

[0192] The conductive layer 104e of the transistor 100T is provided on the insulating layer 106 so as to cover a recess resulting from the opening 141. Here, an insulating layer (not shown) is preferably provided on the conductive layer 104e and the insulating layer 106. An opening reaching the conductive layer 104e is provided in the insulating layer, and the conductive layer 104 functioning as a gate line and the conductive layer 104e are electrically connected to each other through the opening.

[0193] In the opening 141, the conductive layer 104e has a region overlapping with the semiconductor layer 108 with the insulating layer 106 interposed therebetween. The conductive layer 104e also has a region overlapping with the conductive layer 112a and a region overlapping with the conductive layer 112b with the insulating layer 106 and the semiconductor layer 108 interposed therebetween. The conductive layer 104e preferably covers an end of the conductive layer 112b on the opening 141 side.

[0194] The transistor 100T is a so-called top-gate transistor having a gate electrode above the semiconductor layer 108. Furthermore, since the bottom surface of the semiconductor layer 108 is in contact with the source electrode or the drain electrode, the transistor 100T can be called a TGBC (Top Gate Bottom Contact) transistor.

[0195] The conductive layer 112a, the conductive layer 112b, and the conductive layer 104 can each function as a wiring, and the transistor 100T can be provided in a region where these wirings overlap. That is, in a circuit including the transistor 100T and the wiring, the area occupied by the transistor 100T and the wiring can be reduced. Therefore, the area occupied by the circuit can be reduced.

[0196] In the transistor of one embodiment of the present invention, the conductive layers 112a, 112b, and 104 functioning as wirings can be formed by processing different conductive films. Therefore, any conductive layer can be overlapped with one or more other conductive layers, which increases the freedom of layout and reduces the area occupied by the circuit.

[0197] Next, the channel length and the channel width of the transistor 100T will be described. In the semiconductor layer 108, a region in contact with the conductive layer 112a functions as one of a source region and a drain region, a region in contact with the conductive layer 112b functions as the other of the source region and the drain region, and a region between the source region and the drain region functions as a channel formation region.

[0198] The channel length of the transistor 100T is the distance between the source region and the drain region. In Fig. 17(B), the channel length L100 of the transistor 100T is indicated by a dashed double-headed arrow. The channel length L100 is the distance between the end of the region where the semiconductor layer 108 and the conductive layer 112a contact each other and the end of the region where the semiconductor layer 108 and the conductive layer 112b contact each other in a cross-sectional view.

[0199] That is, the channel length L100 is determined by the film thickness of the insulating layer 107 and the angle between the side surface of the insulating layer 107 on the opening 141 side and the upper surface of the conductive layer 112a, and is not affected by the performance of the exposure device used to fabricate the transistor. Therefore, the channel length L100 can be set to a value smaller than the limit resolution of the exposure device, and a transistor of a fine size can be realized.

[0200] By reducing the channel length L100, the on-state current of the transistor 100T can be increased. By using the transistor 100T, a circuit capable of high-speed operation can be manufactured. Furthermore, since the transistor can be miniaturized, the area occupied by the circuit can be reduced.

[0201] 17B and the like show a structure in which the side surface of the insulating layer 107 on the opening 141 side has a straight line in a cross-sectional view; however, one embodiment of the present invention is not limited to this. In a cross-sectional view, the side surface of the insulating layer 107 on the opening 141 side can have a curved line. Alternatively, the side surface can have both a straight line region and a curved line region.

[0202] The channel width of the transistor 100T is the width of the source region or the width of the drain region in a direction perpendicular to the channel length direction. That is, the channel width is the width of the region where the semiconductor layer 108 and the conductive layer 112a contact each other, or the width of the region where the semiconductor layer 108 and the conductive layer 112b contact each other, in a direction perpendicular to the channel length direction. Here, the channel width of the transistor 100T is described as the width of the region where the semiconductor layer 108 and the conductive layer 112b contact each other, in a direction perpendicular to the channel length direction. In FIGS. 17(A) and 17(B), the channel width W100 of the transistor 100T is indicated by a solid double-headed arrow. The channel width W100 is the length of the lower end of the conductive layer 112b on the opening 141 side, as viewed from above.

[0203] Channel width W100 is determined by the top surface shape of opening 141. When opening 141 has a circular top surface shape, the diameter of opening 141 is D441, and the film thickness of conductive layer 112b can be ignored, then channel width W100 can be calculated as "D441 x π."

[0204] In other words, the transistor 100T has a large channel width relative to the area it occupies. By increasing the channel width W100, the on-state current of the transistor 100T can be increased, and a circuit capable of high-speed operation can be manufactured.

[0205] 18(A) and (B) are diagrams illustrating an example in which a back gate is added to the configuration of FIG. 17(A) and (B). A conductive layer 115 acting as a back gate electrode is provided so as to be embedded in the insulating layer 107 (insulating layers 107a and 107c), and a part of the insulating layer 107b provided between the semiconductor layer 108 and the conductive layer 115 functions as a gate insulating layer.

[0206] Note that an insulating layer different from the insulating layer 107b may be used as the gate insulating layer. For example, as shown in FIG. 19, a sidewall-type insulating layer 109 may be provided on side walls of the conductive layer 112a, the insulating layer 107a, the conductive layer 115, the insulating layer 107b, the insulating layer 107c, and the conductive layer 112b, and the insulating layer 109 may function as a gate insulating layer. Note that the insulating layer 109 is preferably formed using a similar material to the insulating layer 106 or the insulating layer 107b.

[0207] The components included in the transistor 100T of this embodiment will be described below.

[0208] [Components of a transistor] [Semiconductor layer 108] The semiconductor material that can be used for the semiconductor layer 108 is not particularly limited. For example, an elemental semiconductor or a compound semiconductor can be used. As the elemental semiconductor, for example, silicon or germanium can be used. As the compound semiconductor, for example, gallium arsenide and silicon germanium can be used. As the compound semiconductor, an organic substance having semiconductor properties or a metal oxide (also called an oxide semiconductor) having semiconductor properties can be used. Note that these semiconductor materials can also contain impurities as dopants.

[0209] The crystallinity of a semiconductor material used for the semiconductor layer 108 is not particularly limited, and any of an amorphous semiconductor and a crystalline semiconductor (a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or a semiconductor having a crystalline region in part) can be used. Use of a crystalline semiconductor is preferable because it can suppress deterioration of transistor characteristics.

[0210] The semiconductor layer 108 preferably has a metal oxide (oxide semiconductor). Examples of metal oxides that can be used for the semiconductor layer 108 include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably contains at least indium (In) or zinc (Zn). The metal oxide preferably has two or three elements selected from indium, element M, and zinc. The element M is one or more elements selected from gallium, aluminum, silicon, boron, yttrium, tin, antimony, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, cobalt, and magnesium. In particular, the element M is preferably one or more elements selected from aluminum, gallium, yttrium, and tin. The element M is more preferably gallium.

[0211] The semiconductor layer 108 can be made of, for example, indium oxide, indium gallium oxide (In-Ga oxide), indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), gallium zinc oxide (Ga-Zn oxide), indium aluminum zinc oxide (In-Al-Zn oxide, also written as IAZO), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also written as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also written as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also written as IGAZO or IAGZO), etc. Alternatively, indium tin oxide containing silicon can be used.

[0212] Here, the composition of the metal oxide in the semiconductor layer 108 greatly affects the electrical characteristics and reliability of the transistor 100T. For example, a transistor with a large on-state current can be realized by increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements contained in the metal oxide.

[0213] When an In-Zn oxide is used for the semiconductor layer 108, it is preferable to use a metal oxide in which the atomic ratio of indium is equal to or greater than the atomic ratio of zinc. For example, a metal oxide in which the atomic ratio of metal elements is In:Zn=1:1, In:Zn=2:1, In:Zn=3:1, In:Zn=4:1, In:Zn=5:1, In:Zn=7:1, or In:Zn=10:1, or a ratio close to these can be used.

[0214] When an In-Sn oxide is used for the semiconductor layer 108, it is preferable to use a metal oxide in which the atomic ratio of indium is equal to or greater than the atomic ratio of tin. For example, a metal oxide in which the atomic ratio of metal elements is In:Sn=1:1, In:Sn=2:1, In:Sn=3:1, In:Sn=4:1, In:Sn=5:1, In:Sn=7:1, or In:Sn=10:1, or a ratio close to these can be used.

[0215] When an In-Sn-Zn oxide is used for the semiconductor layer 108, a metal oxide in which the atomic ratio of indium is higher than that of tin can be used. Furthermore, it is preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of tin. For example, the atomic ratios of metal elements are In:Sn:Zn=2:1:3, In:Sn:Zn=3:1:2, In:Sn:Zn=4:2:3, In:Sn:Zn=4:2:4.1, In:Sn:Zn=5:1:3, In:Sn:Zn=5:1:6, In:Sn:Zn=5:1:7, In:Sn:Zn=5:1:8, In:Sn:Zn=6:1:6, In :Sn:Zn=10:1:3, In:Sn:Zn=10:1:6, In:Sn:Zn=10:1:7, In:Sn:Zn=10:1:8, In:Sn:Zn=5:2:5, In:Sn:Zn=10:1:10, In:Sn:Zn=20:1:10, In:Sn:Zn=40:1:10, or metal oxides close to these can be used.

[0216] When In-Al-Zn oxide is used for the semiconductor layer 108, a metal oxide in which the atomic ratio of indium is higher than that of aluminum can be used. Furthermore, it is preferable to use a metal oxide in which the atomic ratio of zinc is higher than that of aluminum. For example, metal oxides having an atomic ratio of metal elements of In:Al:Zn=2:1:3, In:Al:Zn=3:1:2, In:Al:Zn=4:2:3, In:Al:Zn=4:2:4.1, In:Al:Zn=5:1:3, In:Al:Zn=5:1:6, In:Al:Zn=5:1:7, In:Al:Zn=5:1:8, In:Al:Zn=6:1:6, In:Al:Zn=10:1:3, In:Al:Zn=10:1:6, In:Al:Zn=10:1:7, In:Al:Zn=10:1:8, In:Al:Zn=5:2:5, In:Al:Zn=10:1:10, In:Al:Zn=20:1:10, In:Al:Zn=40:1:10, or similar thereto can be used.

[0217] When an In-Ga-Zn oxide is used for the semiconductor layer 108, a metal oxide in which the atomic ratio of indium to the sum of the atomic numbers of all contained metal elements is higher than the atomic ratio of gallium can be used. Furthermore, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of gallium. For example, the semiconductor layer 108 may use metal oxides having an atomic ratio of metal elements of In:Ga:Zn=2:1:3, In:Ga:Zn=3:1:2, In:Ga:Zn=4:2:3, In:Ga:Zn=4:2:4.1, In:Ga:Zn=5:1:3, In:Ga:Zn=5:1:6, In:Ga:Zn=5:1:7, In:Ga:Zn=5:1:8, In:Ga:Zn=6:1:6, In:Ga:Zn=10:1:3, In:Ga:Zn=10:1:6, In:Ga:Zn=10:1:7, In:Ga:Zn=10:1:8, In:Ga:Zn=5:2:5, In:Ga:Zn=10:1:10, In:Ga:Zn=20:1:10, In:Ga:Zn=40:1:10, or a ratio thereof close to these.

[0218] When an In-M-Zn oxide is used for the semiconductor layer 108, a metal oxide in which the atomic ratio of indium to the sum of the atomic numbers of all contained metal elements is higher than the atomic ratio of element M can be used. Furthermore, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of element M. For example, the semiconductor layer 108 may use a metal oxide having an atomic ratio of metal elements of In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=10:1:3, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10, or a metal oxide having an atomic ratio of metal elements of the above or a ratio close to these.

[0219] By increasing the indium content of the metal oxide, a transistor with a large on-state current can be obtained. By using the transistor as a transistor that is required to have a high on-state current, a circuit with excellent electrical characteristics can be formed.

[0220] The composition of the metal oxide can be analyzed by, for example, energy dispersive X-ray spectrometry (EDX), X-ray photoelectron spectrometry (XPS), inductively coupled plasma-mass spectrometry (ICP-MS), or inductively coupled plasma-atomic emission spectrometry (ICP-AES). Alternatively, the analysis can be performed by combining a plurality of these techniques. Note that for elements with low content, the actual content and the content obtained by analysis may differ due to the influence of analytical accuracy. For example, when the content of element M is low, the content of element M obtained by analysis may be lower than the actual content.

[0221] In the present specification, the term "nearby composition" includes a range of ±30% of the desired atomic ratio. For example, when the atomic ratio is described as In:M:Zn=4:2:3 or a composition in the vicinity thereof, it includes the case where, when the atomic ratio of indium is 4, the atomic ratio of M is 1 or more and 3 or less, and the atomic ratio of zinc is 2 or more and 4 or less. When the atomic ratio is described as In:M:Zn=5:1:6 or a composition in the vicinity thereof, it includes the case where, when the atomic ratio of indium is 5, the atomic ratio of M is greater than 0.1 and 2 or less, and the atomic ratio of zinc is 5 or more and 7 or less. When the atomic ratio is described as In:M:Zn=1:1:1 or a composition in the vicinity thereof, it includes the case where, when the atomic ratio of indium is 1, the atomic ratio of M is greater than 0.1 and 2 or less, and the atomic ratio of zinc is greater than 0.1 and 2 or less.

[0222] The metal oxide can be preferably formed by a sputtering method or an atomic layer deposition (ALD) method. When the metal oxide is formed by a sputtering method, the atomic ratio of the target may differ from the atomic ratio of the metal oxide. In particular, the atomic ratio of zinc in the metal oxide may be smaller than the atomic ratio of the target. Specifically, the atomic ratio of zinc in the metal oxide may be about 40% to 90% of the atomic ratio of zinc contained in the target.

[0223] The semiconductor layer 108 can also have a stacked structure having two or more metal oxide layers. The two or more metal oxide layers included in the semiconductor layer 108 can have the same or approximately the same composition. By using a stacked structure of metal oxide layers having the same composition, for example, the same sputtering target can be used to form the layers, which reduces manufacturing costs.

[0224] The two or more metal oxide layers in the semiconductor layer 108 may each have a different composition. For example, a stacked structure of a first metal oxide layer having a composition of In:M:Zn=1:3:4 [atomic ratio] or a composition close thereto, and a second metal oxide layer having a composition of In:M:Zn=1:1:1 [atomic ratio] or a composition close thereto provided on the first metal oxide layer, may be preferably used. In addition, it is particularly preferable to use gallium or aluminum as the element M. For example, a stacked structure of any one selected from indium oxide, indium gallium oxide, and IGZO, and any one selected from IAZO, IAGZO, and ITZO (registered trademark) may be used.

[0225] It is preferable to use a metal oxide layer having crystallinity for the semiconductor layer 108. For example, a metal oxide layer having a c-axis aligned crystal (CAAC) structure, a polycrystal structure, a nanocrystal (nc) structure, or the like can be used. By using a metal oxide layer having crystallinity for the semiconductor layer 108, the density of defect states in the semiconductor layer 108 can be reduced, and a highly reliable transistor can be realized.

[0226] The higher the crystallinity of the metal oxide layer used in the semiconductor layer 108, the more the density of defect states in the semiconductor layer 108 can be reduced. On the other hand, by using a metal oxide layer with low crystallinity, a transistor capable of passing a large current can be realized. Note that the CAAC structure is a crystal structure in which a plurality of microcrystals (typically, a plurality of IGZO microcrystals) have a c-axis orientation and are connected without being oriented in the ab plane. The CAAC structure has fewer crystal grain boundaries and grains in the ab plane than a polycrystalline structure, and therefore can realize a highly reliable semiconductor device.

[0227] The semiconductor layer 108 may have a stacked structure of two or more metal oxide layers with different crystallinity. For example, a stacked structure of a first metal oxide layer and a second metal oxide layer provided on the first metal oxide layer may be used, and the second metal oxide layer may have a region with higher crystallinity than the first metal oxide layer. Alternatively, the second metal oxide layer may have a region with lower crystallinity than the first metal oxide layer. The two or more metal oxide layers in the semiconductor layer 108 may have the same or approximately the same composition. By using a stacked structure of metal oxide layers with the same composition, for example, the same sputtering target may be used to form the stacked structure, which may reduce manufacturing costs. For example, the same sputtering target may be used to form a stacked structure of two or more metal oxide layers with different crystallinity by changing the oxygen flow rate ratio. Note that the two or more metal oxide layers in the semiconductor layer 108 may have metal oxide layers with different compositions.

[0228] In the case where an oxide semiconductor is used for the semiconductor layer 108, the carrier concentration of the oxide semiconductor in a region functioning as a channel formation region is 1×10 18 cm -3 It is preferable that the value is less than 1×10 17 cm -3 More preferably, it is less than 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 More preferably, it is less than 1×10 12 cm -3 Note that the lower limit of the carrier concentration of the oxide semiconductor in the region functioning as a channel formation region is not particularly limited, but is preferably, for example, 1×10 -9 cm -3 It can be said that:

[0229] A transistor using an oxide semiconductor (hereinafter referred to as an OS transistor) has an extremely high field-effect mobility compared to a transistor using amorphous silicon. In addition, an OS transistor has an extremely small source-drain leakage current in an off state (hereinafter also referred to as an off-current) and can hold charge accumulated in a capacitor connected in series with the transistor for a long period of time. Furthermore, the use of an OS transistor can reduce the power consumption of a semiconductor device.

[0230] [Insulating layer 107] When an oxide semiconductor is used for the semiconductor layer 108, an inorganic insulating material can be suitably used for the insulating layer 107 (insulating layer 107a, insulating layer 107b, and insulating layer 107c). Note that the insulating layer 107 can also have a stacked structure of an inorganic insulating material and an organic insulating material.

[0231] The inorganic insulating material can be one or more of an oxide, an oxynitride, a nitride oxide, and a nitride. For example, the insulating layer 107 can be one or more of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, yttrium oxide, zirconium oxide, gallium oxide, tantalum oxide, magnesium oxide, lanthanum oxide, cerium oxide, neodymium oxide, silicon nitride, silicon nitride oxide, and aluminum nitride.

[0232] In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen. A nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0233] The insulating layer 107b is preferably formed using an oxide or an oxynitride. The insulating layer 107b is preferably formed using a film that releases oxygen when heated. The insulating layer 107b can be formed using, for example, silicon oxide or silicon oxynitride.

[0234] By releasing oxygen from the insulating layer 107b, oxygen can be supplied from the insulating layer 107b to the semiconductor layer 108. By supplying oxygen from the insulating layer 107b to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen vacancies (V O ) and V O H (defects in which hydrogen enters oxygen vacancies) can be reduced, resulting in a transistor with good electrical characteristics and high reliability. The insulating layer 107b preferably has a high oxygen diffusion coefficient. By increasing the oxygen diffusion coefficient of the insulating layer 107b, oxygen can be easily diffused in the insulating layer 107b, and oxygen can be efficiently supplied from the insulating layer 107b to the semiconductor layer 108. Other treatments for supplying oxygen to the semiconductor layer 108 include heat treatment in an atmosphere containing oxygen and plasma treatment in an atmosphere containing oxygen.

[0235] Oxygen vacancies in the channel formation region of transistor 100T (V O ) and V O It is preferable that H is small. In particular, when the channel length L100 is short, oxygen vacancies (V O ) and V O The effect of H on the electrical characteristics and reliability is large. For example, V O The diffusion of H increases the carrier concentration in the channel formation region, which may cause a shift in the threshold voltage of the transistor 100T or a decrease in reliability. O The influence of the diffusion of H on the electrical characteristics and reliability becomes greater as the channel length L100 of the transistor 100T becomes shorter. By supplying oxygen from the insulating layer 107b to the semiconductor layer 108, particularly to the channel formation region of the semiconductor layer 108, oxygen deficiency (V O ) and V O H can be reduced. Therefore, a transistor having a short channel length with good electrical characteristics and high reliability can be realized.

[0236] The insulating layer 107a and the insulating layer 107c are preferably impermeable to oxygen. The insulating layer 107a and the insulating layer 107c function as blocking films that suppress oxygen from being released from the insulating layer 107b. Furthermore, the insulating layer 107a and the insulating layer 107c are preferably impermeable to hydrogen. The insulating layer 107a and the insulating layer 107c function as blocking films that suppress hydrogen from diffusing from the outside of the transistor to the semiconductor layer 108 through the insulating layer 107. The insulating layer 107a and the insulating layer 107c are preferably high in film density. By increasing the film density of the insulating layer 107a and the insulating layer 107c, the blocking properties of oxygen and hydrogen can be improved. The film density of the insulating layer 107a and the insulating layer 107c are preferably higher than the film density of the insulating layer 107b. When silicon oxide or silicon oxynitride is used for the insulating layer 107b, the insulating layers 107a and 107c can each preferably be made of, for example, silicon nitride, silicon nitride oxide, or aluminum oxide. The insulating layers 107a and 107c each preferably have a region having a higher nitrogen content than the insulating layer 107b. The insulating layers 107a and 107c can each preferably be made of, for example, a material having a higher nitrogen content than the insulating layer 107b. The insulating layers 107a and 107c can each preferably be made of, for example, a nitride or a nitride oxide. The insulating layers 107a and 107c can each preferably be made of, for example, silicon nitride or silicon nitride oxide.

[0237] When oxygen contained in the insulating layer 107b diffuses upward from a region of the insulating layer 107b that is not in contact with the semiconductor layer 108 (for example, the upper surface of the insulating layer 107b), the amount of oxygen supplied from the insulating layer 107b to the semiconductor layer 108 may decrease. By providing the insulating layer 107c on the insulating layer 107b, it is possible to suppress the diffusion of oxygen contained in the insulating layer 107b from a region of the insulating layer 107 that is not in contact with the semiconductor layer 108. Similarly, by providing the insulating layer 107a below the insulating layer 107b, it is possible to suppress the diffusion of oxygen downward from a region of the insulating layer 107 that is not in contact with the semiconductor layer 108. Therefore, the amount of oxygen supplied from the insulating layer 107b to the semiconductor layer 108 increases, and the oxygen deficiency (V O ) and V O H can be reduced. Therefore, a transistor having good electrical characteristics and high reliability can be obtained.

[0238] The oxygen contained in the insulating layer 107b may oxidize the conductive layer 112a and the conductive layer 112b, resulting in an increase in resistance. In addition, the oxygen contained in the insulating layer 107b may oxidize the conductive layer 112a and the conductive layer 112b, resulting in a decrease in the amount of oxygen supplied from the insulating layer 107b to the semiconductor layer 108. By providing the insulating layer 107a between the insulating layer 107b and the conductive layer 112a, it is possible to prevent the conductive layer 112a from being oxidized and the resistance from increasing. Similarly, by providing the insulating layer 107c between the insulating layer 107b and the conductive layer 112b, it is possible to prevent the conductive layer 112b from being oxidized and the resistance from increasing. At the same time, the amount of oxygen supplied from the insulating layer 107b to the semiconductor layer 108 increases, which reduces the oxygen deficiency (V O ) and V O H can be reduced, and a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0239] When hydrogen diffuses into the semiconductor layer 108, it reacts with oxygen atoms contained in the oxide semiconductor to form water, which causes oxygen deficiency (V O ) may be formed. Furthermore, V OBy providing the insulating layers 107a and 107c, oxygen vacancies (V O ) and V O H can be reduced, and a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0240] The insulating layer 107a and the insulating layer 107c preferably have a thickness that functions as a blocking film for oxygen and hydrogen. If the insulating layer 107a and the insulating layer 107c are thin, the blocking film function may be reduced. On the other hand, if the insulating layer 107a and the insulating layer 107c are thick, the region of the semiconductor layer 108 in contact with the insulating layer 107b may be narrowed, and the amount of oxygen supplied from the insulating layer 107b to the semiconductor layer 108 may be reduced. The insulating layer 107a and the insulating layer 107c may each be thinner than the insulating layer 107b.

[0241] In the transistor 100T, oxygen is supplied from the insulating layer 107 to the semiconductor layer 108, so that oxygen vacancies (V O ) and V O H is reduced. Therefore, a transistor having good electrical characteristics and high reliability can be obtained.

[0242] Note that either the insulating layer 107a or the insulating layer 107c, or both of them may be omitted.

[0243] [Conductive layer 112a, conductive layer 112b, conductive layer 104, conductive layer 104e, conductive layer 115] The conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 104e, and the conductive layer 115, which function as a source electrode, a drain electrode, or a gate electrode, can be formed using one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, or an alloy containing one or more of the above metals. The conductive layer 112a, the conductive layer 112b, the conductive layer 104e, and the conductive layer 115 can be formed using a low-resistance conductive material containing one or more of copper, silver, gold, and aluminum. In particular, copper or aluminum is preferable because of its excellent mass productivity.

[0244] A metal oxide film (also called an oxide conductor) can be used for each of the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 104e, and the conductive layer 115. Examples of the oxide conductor (OC) include In-Sn oxide (ITO), In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Zn oxide, In-Sn-Si oxide (ITSO), and In-Ga-Zn oxide.

[0245] Here, oxide conductors (OC) will be explained. For example, when oxygen vacancies are formed in a metal oxide having semiconductor properties and hydrogen is added to the oxygen vacancies, a donor level is formed near the conduction band. As a result, the metal oxide becomes highly conductive and becomes a conductor. A metal oxide that has become a conductor can be called an oxide conductor.

[0246] The conductive layer 112a, the conductive layer 112b, the conductive layer 104, and the conductive layer 104e can each have a stacked structure of a conductive film containing the above-mentioned oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, wiring resistance can be reduced.

[0247] A Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta, or Ti) can be applied to each of the conductive layers 112a, 112b, 104, and 104e. By using the Cu-X alloy film, it is possible to process it by a wet etching process, so that the manufacturing cost can be reduced.

[0248] Note that the same material can be used for the conductive layer 112a, the conductive layer 112b, the conductive layer 104, the conductive layer 104e, and the conductive layer 115. Alternatively, different materials can be used for the conductive layer 112a, the conductive layer 112b, and the conductive layer 104e.

[0249] Here, the conductive layers 112a and 112b will be specifically described using an example in which the semiconductor layer 108 is formed using a metal oxide.

[0250] When an oxide semiconductor is used for the semiconductor layer 108, the conductive layers 112a and 112b may be oxidized by oxygen contained in the semiconductor layer 108, resulting in an increase in resistance. The conductive layers 112a and 112b may be oxidized by oxygen contained in the insulating layer 107b, resulting in an increase in resistance. In addition, the conductive layers 112a and 112b may be oxidized by oxygen contained in the semiconductor layer 108, resulting in an oxygen deficiency (V O ) may increase. When the conductive layers 112a and 112b are oxidized by oxygen contained in the insulating layer 107b, the amount of oxygen supplied from the insulating layer 107b to the semiconductor layer 108 may decrease.

[0251] The conductive layer 112a and the conductive layer 112b are preferably made of a material that is not easily oxidized. The conductive layer 112a and the conductive layer 112b are preferably made of an oxide conductor. For example, In-Sn oxide (ITO) or In-Sn-Si oxide (ITSO) can be suitably used. The conductive layer 112a can also be made of a nitride conductor. Examples of nitride conductors include tantalum nitride and titanium nitride. The conductive layer 112a can also be a laminated structure of the above-mentioned materials.

[0252] By using a material that is not easily oxidized for the conductive layer 112a and the conductive layer 112b, it is possible to prevent the resistance from increasing due to oxidation caused by oxygen contained in the semiconductor layer 108 or oxygen contained in the insulating layer 107b. O ) is suppressed, and the amount of oxygen supplied from the insulating layer 107b to the semiconductor layer 108 can be increased. O ) and V O H can be reduced, and a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0253] Similarly, by using a material that is not easily oxidized for the conductive layer 112b, an increase in resistance can be suppressed. Note that the conductive layer 112a and the conductive layer 112b can be formed using the same material. Alternatively, the conductive layer 112a and the conductive layer 112b can be formed using different materials.

[0254] The conductive layer 112b has a region in contact with the transistor 100T. By using a material that is not easily oxidized for the conductive layer 112b, oxygen vacancies (V O ) and V O H can be reduced.

[0255] As described above, it is preferable that the conductive layers 112a and 112b in contact with the semiconductor layer 108 are made of a material that is not easily oxidized. However, when a material that is not easily oxidized is used, the resistance may become high. Since the conductive layers 112a and 112b function as wiring, it is preferable that the resistance is low. Therefore, the conductive layers 112a and 112b can be configured as a stack of a material that is not easily oxidized and a material with low resistance, with the material that is not easily oxidized being in contact with the semiconductor layer 108. With this configuration, the resistance of the conductive layers 112a and 112b can be reduced. Furthermore, oxygen deficiencies (V O ) and V O H can be reduced, and a highly reliable transistor can be obtained that exhibits favorable electrical characteristics.

[0256] As the material that is not easily oxidized, for example, one or more of an oxide conductor and a nitride conductor can be preferably used. As the material that has low resistance, for example, one or more of copper, aluminum, titanium, tungsten, and molybdenum, or an alloy containing one or more of the above-mentioned metals as a component can be preferably used.

[0257] [Insulating layer 106] The insulating layer 106, which functions as a gate insulating layer, preferably has a low defect density. When the insulating layer 106 has a low defect density, the transistor can have favorable electrical characteristics. Furthermore, the insulating layer 106 preferably has a high withstand voltage. When the insulating layer 106 has a high withstand voltage, the transistor can have high reliability.

[0258] The insulating layer 106 can be formed using, for example, one or more of an oxide, an oxynitride, a nitride oxide, and a nitride having insulating properties. The insulating layer 106 can be formed using, for example, one or more of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, and Ga-Zn oxide. The insulating layer 106 is not limited to a single layer, and can also be a stacked layer. The insulating layer 106 can be formed using, for example, a stacked structure of an oxide and a nitride.

[0259] In a miniaturized transistor, if the thickness of the gate insulating layer becomes thin, the leakage current may become large. By using a material with a high relative dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to reduce the voltage during transistor operation while maintaining the physical thickness. Examples of high-k materials include gallium oxide, hafnium oxide, zirconium oxide, oxide containing aluminum and hafnium, oxynitride containing aluminum and hafnium, oxide containing silicon and hafnium, oxynitride containing silicon and hafnium, and nitride containing silicon and hafnium.

[0260] It is preferable that the insulating layer 106 releases little impurities (for example, water and hydrogen) from itself. When the insulating layer 106 releases little impurities, the impurities are prevented from diffusing into the semiconductor layer 108, and a transistor having good electrical characteristics and high reliability can be obtained.

[0261] Here, the insulating layer 106 will be specifically described taking as an example a structure in which a metal oxide is used for the semiconductor layer 108.

[0262] In order to improve the interface characteristics with the semiconductor layer 108, it is preferable to use an oxide for at least the side of the insulating layer 106 that is in contact with the semiconductor layer 108. For example, the insulating layer 106 can be preferably made of one or more of silicon oxide and silicon oxynitride. It is more preferable to use a film that releases oxygen by heating for the insulating layer 106.

[0263] Note that the insulating layer 106 can also have a stacked structure. The insulating layer 106 can have a stacked structure of an oxide film on the side in contact with the semiconductor layer 108 and a nitride film on the side in contact with the conductive layer 104e. As the oxide film, for example, one or more of silicon oxide and silicon oxynitride can be preferably used. As the nitride film, silicon nitride can be preferably used.

[0264] [Substrate 102] There are no significant limitations on the material of the substrate 102, but it is necessary that the material has at least a heat resistance sufficient to withstand subsequent heat treatment. For example, a single crystal semiconductor substrate made of silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate can be used as the substrate 102. Furthermore, any of these substrates on which a semiconductor element is provided can also be used as the substrate 102. The shape of the semiconductor substrate and the insulating substrate may be circular or rectangular.

[0265] A flexible substrate can be used as the substrate 102, and the transistor 100T and the like can be formed directly on the flexible substrate. Alternatively, a peeling layer can be provided between the substrate 102 and the transistor 100T and the like. The peeling layer can be used to separate a semiconductor device that is partially or entirely completed thereon from the substrate 102 and transfer the semiconductor device to another substrate. In this case, the transistor 100T and the like can also be transferred to a substrate with poor heat resistance or a flexible substrate.

[0266] The above is a description of the components of the transistor 100T.

[0267] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification.

[0268] (Embodiment 3) In this embodiment, an example of a layout of a semiconductor device of one embodiment of the present invention will be described.

[0269] 20 is a top view illustrating an example of a layout of the switch SW2 in the semiconductor device illustrated in FIG. 7B of Embodiment 1. The transistors M15 to M18 and the transistors M24 to M26 (diodes D14 to D16) illustrated in FIG.

[0270] 20, the same reference numerals as those in FIGS. 17A, 17B, 18A, and 18B describing the vertical transistor shown in the second embodiment are used to indicate the conductive layers 112a (conductive layers 112a_1 and 112a_2), the conductive layers 112b (conductive layers 112b_1 to 112b_3), the conductive layers 104 (conductive layers 104_1 to 104_4), and the conductive layers 115 (conductive layers 115_1 to 115_3). Note that the semiconductor layers and various insulating layers are not shown.

[0271] Also shown are openings 161 to 168 for connecting different conductive layers to each other. Also shown are conductive layers 151 to 153 that can be manufactured in the same process as the conductive layer 104. The conductive layer 151 functions as a part of a low-potential power line that supplies VSS, the conductive layer 152 functions as a part of a node ND, and the conductive layer 153 functions as a connecting wiring.

[0272] Next, the connection form of each element of the semiconductor device will be described with reference to cross-sectional views. Fig. 21(A) is a cross-sectional view taken along line A1-A2 in Fig. 20, and shows transistors M15 to M18 and a conductive layer 151 (low potential power line) that have a common gate electrode (conductive layer 104_1) and are directly connected to each other.

[0273] In the vertical transistor, one of the conductive layers 112a and 112b acts as a source electrode, and the other of the conductive layers 112a and 112b acts as a drain electrode. Therefore, when transistors are connected in series, the configuration can be simplified by connecting the lower electrodes or the upper electrodes of adjacent transistors to each other.

[0274] For example, as shown in Fig. 21A, it is preferable to electrically connect the transistors M15 and M16 to each other so that they share a conductive layer 112a_1, which is a lower electrode. It is also preferable to electrically connect the transistors M16 and M17 to each other so that they share a conductive layer 112b_2, which is an upper electrode. It is also preferable to electrically connect the transistors M17 and M18 to each other so that they share a conductive layer 112a_1, which is a lower electrode.

[0275] Here, the conductive layer 112a_1 serves as a source electrode in the transistor M15 and as a drain electrode in the transistor M16. The conductive layer 112b_2 serves as a source electrode in the transistor M16 and as a drain electrode in the transistor M17. The conductive layer 112a_1 serves as a source electrode in the transistor M17 and as a drain electrode in the transistor M18. The conductive layer 112b_1 serves as a source electrode in the transistor M18.

[0276] With this configuration, there is no need to provide an opening for connecting the upper electrode and the lower electrode, and the area occupied by the circuit can be reduced.

[0277] The conductive layer 151 corresponding to the low potential power supply line can be manufactured using the same material and process as the conductive layer 104 used as the gate wiring of the transistor. The conductive layer 151 is electrically connected to the conductive layer 112b_1 in an opening 162 provided in the insulating layer 106. The conductive layer 151 is also electrically connected to the conductive layer 115_3 in an opening 161 provided in the insulating layers 107b and 107c, the conductive layer 112b, and the insulating layer 106. The conductive layer 115_3 is extended to the position of the transistor M26 as shown in FIG. 21B, and functions as a backgate electrode.

[0278] FIG. 21B is a cross-sectional view taken along line B1-B2 in FIG. 20, and shows transistors M24 through M26 which act as diodes D14 through D16, and the gate-drain connection of transistor M24.

[0279] The transistor M24 is electrically connected to the transistor M25 in a form in which the conductive layer 112a_2, which is a lower electrode, is shared by the transistor M24 and the transistor M25. Here, the conductive layer 112a_2 is a source electrode in the transistor M24 and a drain electrode in the transistor M25.

[0280] In addition, in the transistor M24, the conductive layer 104_2 and the conductive layer 112b_3 are electrically connected to each other through an opening 163 provided in the insulating layer 106. Here, the conductive layer 104_2 is a gate electrode, and the conductive layer 112b_3 is a drain electrode. That is, this connection is a diode connection, and the transistor M24 can operate as a diode D14.

[0281] The transistor M25 is electrically connected to the transistor M26 in a form in which the conductive layer 112b_2, which is an upper electrode, is shared. Here, the conductive layer 112b_2 is a source electrode in the transistor M25 and a drain electrode in the transistor M26. The conductive layer 112a_1 is a source electrode in the transistor M26. The diode connection of the transistors M25 and M26 will be described later.

[0282] The transistors M24 to M26 each have a conductive layer 115 that functions as a back gate. The conductive layer 115 is provided so as to be embedded in the insulating layer 107 (insulating layers 107a, 107b, and 107c), and a part of the insulating layer 107b functions as a gate insulating film.

[0283] FIG. 22A is a cross-sectional view taken along line C1-C2 shown in FIG. 20, and shows the transistor M15, the transistor M24 acting as the diode D14, and the conductive layer 104_3 connected to the back gate of the transistor M24.

[0284] The transistor M15 is electrically connected to the transistor M24 in a configuration in which the transistor M15 and the transistor M24 share the conductive layer 112b_3, where the conductive layer 112b serves as a drain electrode of both the transistors M15 and M24, and the conductive layer 112b_3 is electrically connected to the node ND.

[0285] The conductive layer 115_1 acting as the back gate of the transistor M24 is electrically connected to the conductive layer 104_3 through an opening 164 provided in the insulating layers 107b, 107c, and the insulating layer 106. The conductive layer 104_3 is the gate electrode of the transistor M26 and is connected to the source of the transistor M25. This connection will be described later.

[0286] FIG. 22B is a cross-sectional view taken along line segment D1-D2 shown in FIG. 20, and shows transistor M16 and transistor M25 acting as diode D15.

[0287] The transistor M16 is electrically connected to the transistor M25 in a manner that the conductive layer 112a_2 is shared between the transistor M16 and the transistor M25, where the conductive layer 112a_2 serves as a drain electrode in both transistors.

[0288] The conductive layer 104_4, which is the gate electrode of the transistor M25, is electrically connected to the conductive layer 112a_2 through an opening 165 provided in the insulating layer 107 and the insulating layer 106. That is, this connection is a diode connection, and the transistor M25 can operate as a diode D15.

[0289] Note that the position of the opening 165 for diode connection is not limited to that shown in Fig. 22(B). For example, as shown in Fig. 22(C), the opening 165 may be provided at a position overlapping with the transistor M25. In this case, the opening 165 can be provided in the semiconductor layer 108 and the insulating layer 106 so as to overlap with the opening for manufacturing the transistor M25. By performing the diode connection at such a position, the area occupied by the circuit can be reduced in some cases.

[0290] FIG. 23A is a cross-sectional view taken along line segment E1-E2 shown in FIG. 20, and shows transistor M17 and transistor M26 acting as diode D16.

[0291] The transistor M17 is electrically connected to the transistor M26 in a form in which the conductive layer 112b_2 is shared between the transistors, where the conductive layer 112a serves as the drain electrode of both the transistors.

[0292] The conductive layer 104_3 serving as the gate electrode of the transistor M26 is electrically connected to the conductive layer 112b_2 through an opening 166 provided in the insulating layer 106. That is, this connection is a diode connection, and the transistor M26 can operate as a diode D16. In addition, the conductive layer 104_3 is electrically connected to the conductive layer 115_1 functioning as the backgate electrode of the transistor M24, as shown in FIG.

[0293] FIG. 23B is a cross-sectional view taken along line F1-F2 in FIG. 20, and shows the transistor M18 and the connection between the conductive layer 153 and other wiring.

[0294] The conductive layer 112a_1, which is the lower electrode of the transistor M18, acts as a drain and is electrically connected to the conductive layer 153 at an opening 167 provided in the insulating layers 107 and 106. The conductive layer 153 is also electrically connected to the conductive layer 115_2 at an opening 168 provided in the insulating layers 107b and 107c and the insulating layer 106. The conductive layer 115_2 extends to the position of the transistor M25 and functions as a backgate electrode.

[0295] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification.

[0296] (Embodiment 4) This embodiment describes a display device which can use the semiconductor device described in Embodiment 1. The semiconductor device can be used as an element of a driver circuit of a pixel included in the display device.

[0297] 24A is a block diagram illustrating a display panel. The display panel includes a pixel array 74, a circuit 75, and a circuit 76. The pixel array 74 includes pixels 70 arranged in columns and rows.

[0298] A pixel 70 can have multiple sub-pixels 71. The sub-pixels 71 have a function of emitting light for display. A full-color display can be achieved by assigning colors such as R (red), G (green), and B (blue) to the light emitted by the sub-pixels 71.

[0299] The sub-pixel 71 has a light-emitting element (also called a light-emitting device) that emits visible light. As the light-emitting element, it is preferable to use an EL element such as an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode). Examples of the light-emitting material that the EL element has include a material that emits fluorescence (fluorescent material), a material that emits phosphorescence (phosphorescent material), a material that exhibits thermally activated delayed fluorescence (thermally activated delayed fluorescence: TADF material), and an inorganic compound (such as a quantum dot material). In addition, an LED such as a micro LED (Light Emitting Diode) can also be used as the light-emitting element. In addition, a non-light-emitting element such as a liquid crystal device can also be used for the sub-pixel 71. In this embodiment, the above-mentioned sub-pixel may also be simply called a pixel.

[0300] The circuit 75 and the circuit 76 are driver circuits for driving the sub-pixel 71. The circuit 75 can function as a source driver circuit, and the circuit 76 can function as a gate driver circuit. The circuit 75 is electrically connected to the pixels via the source lines SL. The circuit 76 is electrically connected to the pixels via the gate lines GL.

[0301] For example, the shift register circuit described in Embodiment 1 can be used for the circuit 75 and the circuit 76. That is, the semiconductor device of one embodiment of the present invention can be used for the circuit 75 and the circuit 76, which can improve the reliability of the display panel.

[0302] Fig. 24(B) shows an example of a pixel circuit that can be applied to a pixel. The pixel circuit includes a transistor Tr1, a transistor Tr2, a transistor Tr3, a capacitor C1, and a light-emitting element EL. A gate line GL and a source line SL are electrically connected to the pixel circuit (see Fig. 24(A)).

[0303] The gate of the transistor Tr1 is electrically connected to the gate line GL, one of the source or drain is electrically connected to the source line SL, and the other is electrically connected to one electrode of the capacitance C1 and the gate of the transistor Tr2. The source or drain of the transistor Tr2 is electrically connected to the wiring AL, and the other of the source or drain is electrically connected to one electrode of the light-emitting element EL, the other electrode of the capacitance C1, and one of the source or drain of the transistor Tr3. The gate of the transistor Tr3 is electrically connected to the gate line GL, and the other of the source or drain is electrically connected to the wiring RL. The other electrode of the light-emitting element EL is electrically connected to the wiring CL.

[0304] A data potential is applied to the source line SL, and a selection signal is applied to the gate line GL. The selection signal includes a potential for turning on a transistor and a potential for turning off a transistor.

[0305] A reset potential is applied to the wiring RL. An anode potential is applied to the wiring AL. A cathode potential is applied to the wiring CL. The anode potential is higher than the cathode potential. The reset potential applied to the wiring RL can be a potential such that the potential difference between the reset potential and the cathode potential is smaller than the threshold voltage of the light-emitting element EL. The reset potential can be a potential higher than the cathode potential, the same potential as the cathode potential, or a potential lower than the cathode potential.

[0306] The transistors Tr1 and Tr3 function as switches. The transistor Tr2 functions as a transistor for controlling a current flowing through the light-emitting element EL. For example, it can be said that the transistor Tr1 functions as a selection transistor, and the transistor Tr3 functions as a drive transistor.

[0307] Here, the transistors Tr1 to Tr3 can be transistors having metal oxide in their channel formation regions (hereinafter, OS transistors). Alternatively, all of the transistors Tr1 to Tr3 can be transistors having silicon (single crystal silicon, polycrystalline silicon, microcrystalline silicon, or amorphous silicon) in their channel formation regions (hereinafter, Si transistors). Alternatively, OS transistors can be used for the transistors Tr1 and Tr3, and a Si transistor can be used for the transistor Tr2.

[0308] One or more of the transistors included in the circuits 75 and 76 may be Si transistors and the remaining transistors may be OS transistors. One or more of the circuits 75 and 76 may be Si transistors and the remaining transistors may be OS transistors.

[0309] As the OS transistor, a transistor using an oxide semiconductor for a semiconductor layer in which a channel is formed can be used. The semiconductor layer preferably contains, for example, indium, M (M is one or more selected from gallium, aluminum, silicon, boron, yttrium, tin, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium), and zinc. In particular, M is preferably one or more selected from aluminum, gallium, yttrium, and tin. In particular, an oxide containing indium, gallium, and zinc (also referred to as IGZO) is preferably used as the semiconductor layer of the OS transistor. Alternatively, an oxide containing indium, tin, and zinc is preferably used. Alternatively, an oxide containing indium, gallium, tin, and zinc is preferably used.

[0310] A transistor using an oxide semiconductor having a wider band gap and a smaller carrier concentration than silicon can realize an extremely small off-current. Therefore, due to the small off-current, it is possible to hold the charge stored in the capacitor connected in series with the transistor for a long period of time. Therefore, it is preferable to use transistors to which an oxide semiconductor is applied, particularly for the transistors Tr1 and Tr3 connected in series with the capacitor C1. By applying transistors having an oxide semiconductor as the transistors Tr1 and Tr3, it is possible to prevent the charge held in the capacitor C1 from leaking through the transistor Tr1 or Tr3. In addition, since the charge held in the capacitor C1 can be held for a long period of time, it is possible to display a still image for a long period of time without rewriting pixel data.

[0311] Note that although the transistors are shown as n-channel transistors in FIG. 24B, p-channel transistors can also be used.

[0312] As a transistor included in a pixel circuit, a transistor having a pair of gates overlapping with a semiconductor layer therebetween can be used.

[0313] In a transistor having a pair of gates, when the pair of gates are electrically connected to each other and supplied with the same potential, there are advantages in that the on-state current of the transistor is increased and saturation characteristics are improved. In addition, a potential for controlling a threshold voltage of the transistor can be supplied to one of the pair of gates. In addition, by supplying a constant potential to one of the pair of gates, the stability of the electrical characteristics of the transistor can be improved. For example, one gate of the transistor can be electrically connected to a wiring to which a constant potential is supplied. Alternatively, one gate of the transistor can be electrically connected to a source or drain.

[0314] The pixel circuit shown in Figure 24(C) is an example in which transistors Tr1 and Tr3 each have a pair of gates. The transistors Tr1 and Tr3 each have a pair of gates electrically connected to each other. With this configuration, the period for writing data to the pixel circuit can be shortened.

[0315] Next, an example of a display panel having light-emitting elements as display elements will be described. The display panel has two or more pixels that emit light of different colors. Each pixel has a light-emitting element. Each light-emitting element has a pair of electrodes and an EL layer therebetween. The light-emitting element is preferably an organic EL element (organic electroluminescent element). The two or more light-emitting elements that emit different colors each have an EL layer containing a different light-emitting material. For example, a full-color display panel can be realized by having three types of light-emitting elements that emit red (R), green (G), or blue (B) light, respectively.

[0316] When manufacturing a display panel having a plurality of light-emitting elements each having a different light-emitting color, it is necessary to form at least a layer (light-emitting layer) containing a light-emitting material in an island shape. When manufacturing a part or the whole of an EL layer separately, a method of forming an island-shaped organic film by a deposition method using a shadow mask such as a metal mask is known. However, with this method, due to various influences such as the accuracy of the metal mask, the positional deviation between the metal mask and the substrate, the deflection of the metal mask, and the spread of the contour of the film formed due to the scattering of vapor, the shape and position of the island-shaped organic film deviate from the design, making it difficult to achieve high resolution and high aperture ratio of the display panel. In addition, during deposition, the contour of the layer may become blurred and the thickness of the edge may become thin. In other words, the thickness of the island-shaped light-emitting layer may vary depending on the location. In addition, when manufacturing a large-sized, high-resolution, or high-definition display panel, there is a concern that the manufacturing yield may be low due to the low dimensional accuracy of the metal mask and deformation due to heat, etc. For this reason, measures have been taken to artificially increase the definition (also called pixel density) by adopting a special pixel arrangement method such as a pentile arrangement.

[0317] In this specification, the term "island-like" refers to a state in which two or more layers formed using the same material in the same process are physically separated. For example, an island-like light-emitting layer refers to a state in which the light-emitting layer is physically separated from the adjacent light-emitting layer.

[0318] In the example of this embodiment, the EL layer is processed into a fine pattern by photolithography without using a shadow mask such as a fine metal mask (FMM). This makes it possible to realize a display panel with high definition and a large aperture ratio, which have been difficult to achieve so far. Furthermore, since the EL layer can be produced separately, a display panel that is extremely vivid, has high contrast, and has high display quality can be realized. Note that, for example, the EL layer may be processed into a fine pattern by using both a metal mask and photolithography.

[0319] In addition, the EL layer can be partially or entirely separated physically. This makes it possible to suppress leakage current between light-emitting elements via a layer shared between adjacent light-emitting elements (also called a common layer). This makes it possible to prevent light emission due to unintended crosstalk, and to realize a display panel with extremely high contrast. In particular, a display panel with high current efficiency at low luminance can be realized.

[0320] One embodiment of the present invention can also be a display panel in which a white light-emitting light-emitting element and a color filter are combined. In this case, light-emitting elements having the same configuration can be applied to light-emitting elements provided in pixels (sub-pixels) that emit light of different colors, and all layers can be common layers. Furthermore, a part or all of each EL layer may be divided by a process using a photolithography method. This suppresses leakage current through the common layer, and a display panel with high contrast can be realized. In particular, in an element having a tandem structure in which a plurality of light-emitting layers are stacked via a highly conductive intermediate layer, leakage current through the intermediate layer can be effectively prevented, and therefore a display panel with high brightness, high definition, and high contrast can be realized.

[0321] When the EL layer is processed using a photolithography method, a part of the light-emitting layer may be exposed, which may cause deterioration. Therefore, it is preferable to provide an insulating layer that covers at least the side surface of the island-shaped light-emitting layer. The insulating layer may be configured to cover a part of the upper surface of the island-shaped EL layer. As the insulating layer, it is preferable to use a material that has a barrier property against water and oxygen. For example, an inorganic insulating film that does not easily diffuse water or oxygen can be used. This makes it possible to suppress deterioration of the EL layer and realize a highly reliable display panel.

[0322] Furthermore, there is a region (recess) between two adjacent light-emitting elements where the EL layer of neither light-emitting element is provided. When a common electrode, or a common electrode and a common layer, is formed to cover the recess, a phenomenon occurs in which the common electrode is divided by a step at the end of the EL layer (also called step discontinuity), and the common electrode on the EL layer may be insulated. Therefore, it is preferable to use a configuration in which the local step located between two adjacent light-emitting elements is filled with a resin layer that functions as a planarizing film (also called LFP: Local Filling Planarization). The resin layer functions as a planarizing film. This makes it possible to suppress step discontinuity in the common layer or common electrode and realize a highly reliable display panel.

[0323] A more specific example of a structure of a display panel according to one embodiment of the present invention will be described below with reference to the drawings.

[0324] [Configuration example 1] 25A shows a schematic top view of a display panel 200 according to one embodiment of the present invention. The display panel 200 includes a plurality of red light-emitting elements 210R, a plurality of green light-emitting elements 210G, and a plurality of blue light-emitting elements 210B over a substrate 201. In FIG. 25A, the symbols R, G, and B are assigned within the light-emitting regions of the light-emitting elements in order to easily distinguish between the light-emitting elements.

[0325] The light emitting elements 210R, 210G, and 210B are arranged in a matrix. Fig. 25(A) shows a so-called stripe arrangement in which light emitting elements of the same color are arranged in one direction. Note that the arrangement method of the light emitting elements is not limited to this, and arrangement methods such as S stripe arrangement, delta arrangement, Bayer arrangement, zigzag arrangement, etc. may be applied, and a pentile arrangement, diamond arrangement, etc. may also be used.

[0326] As the light emitting element 210R, the light emitting element 210G, and the light emitting element 210B, for example, it is preferable to use an OLED (Organic Light Emitting Diode) or a QLED (Quantum-dot Light Emitting Diode). As the light emitting material of the EL element, not only an organic compound but also an inorganic compound (such as a quantum dot material) can be used.

[0327] 25(A) also shows a connection electrode 211C electrically connected to the common electrode 213. The connection electrode 211C is given a potential (for example, an anode potential or a cathode potential) to be supplied to the common electrode 213. The connection electrode 211C is provided outside the display area in which the light emitting elements 210R and the like are arranged.

[0328] The connection electrode 211C can be provided along the periphery of the display area. For example, it may be provided along one side of the periphery of the display area, or it may be provided over two or more sides of the periphery of the display area. That is, when the top surface shape of the display area is rectangular, the top surface shape of the connection electrode 211C can be a strip shape (rectangle), an L-shape, a U-shape (square bracket shape), a square shape, or the like. In this specification and the like, the top surface shape refers to the shape in a plan view, that is, the shape seen from above.

[0329] Fig. 25(B) and Fig. 25(C) are schematic cross-sectional views corresponding to dashed lines A1-A2 and A3-A4 in Fig. 25(A), respectively. Fig. 25(B) shows schematic cross-sectional views of light-emitting element 210R, light-emitting element 210G, and light-emitting element 210B, and Fig. 25(C) shows a schematic cross-sectional view of connection portion 240 where connection electrode 211C and common electrode 213 are connected.

[0330] The light-emitting element 210R has a pixel electrode 211R, an organic layer 212R, a common layer 214, and a common electrode 213. The light-emitting element 210G has a pixel electrode 211G, an organic layer 212G, a common layer 214, and a common electrode 213. The light-emitting element 210B has a pixel electrode 211B, an organic layer 212B, a common layer 214, and a common electrode 213. The common layer 214 and the common electrode 213 are provided in common to the light-emitting element 210R, the light-emitting element 210G, and the light-emitting element 210B.

[0331] The organic layer 212R of the light emitting element 210R has a light emitting organic compound that emits at least red light. The organic layer 212G of the light emitting element 210G has a light emitting organic compound that emits at least green light. The organic layer 212B of the light emitting element 210B has a light emitting organic compound that emits at least blue light. The organic layer 212R, the organic layer 212G, and the organic layer 212B can also be called EL layers, and have at least a layer containing a light emitting substance (light emitting layer).

[0332] In the following, when describing matters common to light emitting element 210R, light emitting element 210G, and light emitting element 210B, they may be referred to as light emitting element 210. Similarly, when describing matters common to components distinguished by alphabets, such as organic layer 212R, organic layer 212G, and organic layer 212B, they may be described using symbols without the alphabets.

[0333] The organic layer 212 and the common layer 214 can each independently have one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer. For example, the organic layer 212 can have a laminated structure of a hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer from the pixel electrode 211 side, and the common layer 214 can have an electron injection layer.

[0334] The pixel electrode 211R, the pixel electrode 211G, and the pixel electrode 211B are provided for each light-emitting element. The common electrode 213 and the common layer 214 are provided as a continuous layer common to each light-emitting element. A conductive film having translucency to visible light is used for either one of the pixel electrodes or the common electrode 213, and a conductive film having reflective properties is used for the other. By making each pixel electrode translucent and the common electrode 213 reflective, a bottom emission type display panel can be obtained. Conversely, by making each pixel electrode reflective and the common electrode 213 translucent, a top emission type display panel can be obtained. Note that by making both the pixel electrodes and the common electrode 213 translucent, a dual emission type display panel can also be obtained.

[0335] A protective layer 221 is provided on the common electrode 213 to cover the light emitting elements 210R, 210G, and 210B. The protective layer 221 has a function of preventing impurities such as water from diffusing into each light emitting element from above.

[0336] It is preferable that the end of the pixel electrode 211 has a tapered shape. When the end of the pixel electrode 211 has a tapered shape, the organic layer 212 provided along the end of the pixel electrode 211 can also have a shape having an inclined portion. By making the end of the pixel electrode 211 tapered, the coverage of the organic layer 212 provided over the end of the pixel electrode 211 can be improved. In addition, by making the side surface of the pixel electrode 211 tapered, foreign matter (for example, also called dust or particles) during the manufacturing process can be easily removed by a process such as cleaning, which is preferable.

[0337] In this specification and the like, the tapered shape refers to a shape in which at least a part of the side surface of the structure is inclined with respect to the substrate surface. For example, it is preferable to have a region in which the angle (also called the taper angle) between the inclined side surface and the substrate surface is less than 90°.

[0338] The organic layer 212 is processed into an island shape using a photolithography method. Therefore, the organic layer 212 has a shape in which the angle between the top surface and the side surface at the end is close to 90 degrees. On the other hand, an organic film formed using an FMM (Fine Metal Mask) or the like tends to be gradually thinner as it approaches the end, and for example, the top surface is formed in a slope shape over a range of 1 μm to 10 μm from the end, resulting in a shape in which it is difficult to distinguish between the top surface and the side surface.

[0339] Between two adjacent light emitting elements, there are an insulating layer 225, a resin layer 226 and a layer 228.

[0340] Between two adjacent light-emitting elements, the side surfaces of the organic layers 212 face each other with the resin layer 226 interposed therebetween. The resin layer 226 is located between the two adjacent light-emitting elements, and is provided so as to fill the ends of each of the organic layers 212 and the region between the two organic layers 212. The resin layer 226 has a smooth convex upper surface shape, and the common layer 214 and the common electrode 213 are provided to cover the upper surface of the resin layer 226.

[0341] The resin layer 226 functions as a planarizing film that fills in the step between two adjacent light-emitting elements. By providing the resin layer 226, it is possible to prevent the phenomenon that the common electrode 213 is divided by the step at the end of the organic layer 212 (also called step disconnection), which occurs and the common electrode 213 on the organic layer 212 is insulated.

[0342] An insulating layer having an organic material can be suitably used as the resin layer 226. For example, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimideamide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenol resin, precursors of these resins, etc. can be applied as the resin layer 226. In addition, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinylpyrrolidone, polyethylene glycol, polyglycerin, pullulan, water-soluble cellulose, or alcohol-soluble polyamide resin can be used as the resin layer 226.

[0343] Moreover, a photosensitive resin can be used as the resin layer 226. A photoresist can be used as the photosensitive resin. The photosensitive resin can be a positive type material or a negative type material.

[0344] The resin layer 226 may contain a material that absorbs visible light. For example, the resin layer 226 itself may be made of a material that absorbs visible light, or the resin layer 226 may contain a pigment that absorbs visible light. As the resin layer 226, for example, a resin that can be used as a color filter that transmits red, blue, or green light and absorbs other light, or a resin that contains carbon black as a pigment and functions as a black matrix can be used.

[0345] The insulating layer 225 is provided in contact with a side surface of the organic layer 212. The insulating layer 225 is also provided to cover an upper end portion of the organic layer 212. A portion of the insulating layer 225 is provided in contact with the upper surface of the substrate 201.

[0346] The insulating layer 225 is located between the resin layer 226 and the organic layer 212, and functions as a protective film for preventing the resin layer 226 from contacting the organic layer 212. If the organic layer 212 and the resin layer 226 come into contact with each other, the organic layer 212 may be dissolved by an organic solvent or the like used when forming the resin layer 226. Therefore, by providing the insulating layer 225 between the organic layer 212 and the resin layer 226, it is possible to protect the side surface of the organic layer 212.

[0347] The insulating layer 225 may be an insulating layer containing an inorganic material. For example, an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film may be used for the insulating layer 225. The insulating layer 225 may have a single-layer structure or a laminated structure. Examples of the oxide insulating film include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, an indium gallium zinc oxide film, a gallium oxide film, a germanium oxide film, an yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, and a tantalum oxide film. Examples of the nitride insulating film include a silicon nitride film and an aluminum nitride film. Examples of the oxynitride insulating film include a silicon oxynitride film and an aluminum oxynitride film. Examples of the nitride oxide insulating film include a silicon nitride oxide film and an aluminum nitride oxide film. In particular, by applying an inorganic insulating film such as an aluminum oxide film or a hafnium oxide film formed by the ALD method to the insulating layer 225, an insulating layer 225 with few pinholes and excellent function of protecting the EL layer can be formed.

[0348] In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen, and a nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0349] The insulating layer 225 can be formed by a sputtering method, a CVD method, a PLD method, an ALD method, etc. The insulating layer 225 is preferably formed by an ALD method, which has good coverage.

[0350] In addition, a reflective film (e.g., a metal film containing one or more selected from silver, palladium, copper, titanium, aluminum, etc.) may be provided between the insulating layer 225 and the resin layer 226, and the light emitted from the light-emitting layer may be reflected by the reflective film. This can improve the light extraction efficiency.

[0351] The layer 228 is a remaining portion of a protective layer (also referred to as a mask layer or a sacrificial layer) for protecting the organic layer 212 during etching of the organic layer 212. The layer 228 can be made of a material that can be used for the insulating layer 225. In particular, it is preferable to use the same material for the layer 228 and the insulating layer 225 because a common processing device or the like can be used for both layers.

[0352] In particular, inorganic insulating films such as aluminum oxide films, metal oxide films such as hafnium oxide films, and silicon oxide films formed by the ALD method have few pinholes and therefore have excellent functionality for protecting the EL layer, and can be suitably used for the insulating layer 225 and the layer 228.

[0353] The protective layer 221 may have, for example, a single-layer structure or a multilayer structure including at least an inorganic insulating film. Examples of the inorganic insulating film include oxide films or nitride films such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film. Alternatively, the protective layer 221 may be made of a semiconductor material or a conductive material such as indium gallium oxide, indium zinc oxide, indium tin oxide, or indium gallium zinc oxide.

[0354] The protective layer 221 may be a laminated film of an inorganic insulating film and an organic insulating film. For example, it is preferable to have a configuration in which an organic insulating film is sandwiched between a pair of inorganic insulating films. Furthermore, it is preferable that the organic insulating film functions as a planarizing film. This allows the upper surface of the organic insulating film to be flat, improving the coverage of the inorganic insulating film thereon and enhancing the barrier properties. In addition, since the upper surface of the protective layer 221 is flat, it is preferable that when a structure (e.g., a color filter, an electrode of a touch sensor, or a lens array) is provided above the protective layer 221, the influence of the uneven shape caused by the structure below can be reduced.

[0355] 25(C) shows a connection portion 240 where the connection electrode 211C and the common electrode 213 are electrically connected. In the connection portion 240, an opening is provided in the insulating layer 225 and the resin layer 226 above the connection electrode 211C. The connection electrode 211C and the common electrode 213 are electrically connected in the opening.

[0356] 25(C) shows the connection part 240 where the connection electrode 211C and the common electrode 213 are electrically connected, but the common electrode 213 may be provided on the connection electrode 211C via the common layer 214. In particular, when a carrier injection layer is used for the common layer 214, the electrical resistivity of the material used for the common layer 214 is sufficiently low and the common layer 214 can be formed thin, so that there are many cases where no problem occurs even if the common layer 214 is located at the connection part 240. This allows the common electrode 213 and the common layer 214 to be formed using the same masking mask, thereby reducing manufacturing costs.

[0357] [Configuration example 2] The following describes a display panel having a part of its configuration that is different from that of the above-mentioned Configuration Example 1. Note that parts common to the above-mentioned Configuration Example 1 will be referred to, and descriptions thereof may be omitted.

[0358] 26(A) shows a schematic cross-sectional view of the display panel 200a. The display panel 200a differs from the display panel 200 mainly in that the display panel 200a has a different configuration of light-emitting elements and has colored layers.

[0359] The display panel 200a has a light-emitting element 210W that emits white light. The light-emitting element 210W has a pixel electrode 211, an organic layer 212W, a common layer 214, and a common electrode 213. The organic layer 212W emits white light. For example, the organic layer 212W can be configured to include two or more types of light-emitting materials whose emitted light colors are complementary to each other. For example, the organic layer 212W can be configured to include a light-emitting organic compound that emits red light, a light-emitting organic compound that emits green light, and a light-emitting organic compound that emits blue light. The organic layer 212W may also be configured to include a light-emitting organic compound that emits blue light, and a light-emitting organic compound that emits yellow light.

[0360] Between two adjacent light emitting elements 210W, the organic layers 212W are separated from each other. This makes it possible to suppress leakage current flowing between adjacent light emitting elements 210W via the organic layers 212W, and to suppress crosstalk caused by the leakage current. As a result, a display panel with high contrast and color reproducibility can be realized.

[0361] An insulating layer 222 that functions as a planarizing film is provided on the protective layer 221, and a coloring layer 216R, a coloring layer 216G, and a coloring layer 216B are provided on the insulating layer 222.

[0362] An organic resin film or an inorganic insulating film with a flattened upper surface can be used as the insulating layer 222. Since the insulating layer 222 forms the surface on which the colored layers 216R, 216G, and 216B are formed, the flat upper surface of the insulating layer 222 allows the thickness of the colored layers 216R, etc. to be uniform, thereby improving color purity. If the thickness of the colored layers 216R, etc. is not uniform, the amount of light absorbed varies depending on the location of the colored layer 216R, which may result in a decrease in color purity.

[0363] [Configuration example 3] FIG. 26(B) shows a schematic cross-sectional view of the display panel 200b.

[0364] The light emitting element 210R has a pixel electrode 211, a conductive layer 215R, an organic layer 212W, and a common electrode 213. The light emitting element 210G has a pixel electrode 211, a conductive layer 215G, an organic layer 212W, and a common electrode 213. The light emitting element 210B has a pixel electrode 211, a conductive layer 215B, an organic layer 212W, and a common electrode 213. The conductive layer 215R, the conductive layer 215G, and the conductive layer 215B each have light transmitting properties and function as an optical adjustment layer.

[0365] A microresonator (microcavity) structure can be realized by using a film that reflects visible light for the pixel electrode 211 and using a film that is both reflective and transparent to visible light for the common electrode 213. In this case, by adjusting the thicknesses of the conductive layers 215R, 215G, and 215B so as to provide optimal optical path lengths, light with intensified wavelengths of different wavelengths can be obtained from the light-emitting elements 210R, 210G, and 210B, even when the organic layer 212W that emits white light is used.

[0366] Furthermore, by providing the colored layers 216R, 216G, and 216B on the optical paths of the light emitting elements 210R, 210G, and 210B, respectively, it is possible to obtain light with high color purity.

[0367] In addition, an insulating layer 223 is provided to cover the ends of the pixel electrode 211, the conductive layer 215R, the conductive layer 215G, and the conductive layer 215B. The insulating layer 223 preferably has a tapered end. By providing the insulating layer 223, it is possible to improve the coverage by the organic layer 212W, the common electrode 213, the protective layer 221, and the like formed thereon.

[0368] The organic layer 212W and the common electrode 213 are each provided as a continuous film common to each light emitting element. This structure is preferable because it can greatly simplify the manufacturing process of the display panel.

[0369] Here, it is preferable that the pixel electrode 211 has an end shape close to vertical. This allows a steeply inclined portion to be formed on the surface of the insulating layer 223, and allows a thin portion to be formed in a portion of the organic layer 212W covering this portion, or allows a portion of the organic layer 212W to be divided. Therefore, it is possible to suppress leakage current occurring through the organic layer 212W between adjacent light-emitting elements without processing the organic layer 212W using a photolithography method or the like.

[0370] This concludes the description of the exemplary configuration of the display panel.

[0371] [Pixel layout] The following mainly describes pixel layouts that are different from that shown in Fig. 25(A). There are no particular limitations on the arrangement of light-emitting elements (sub-pixels), and various methods can be applied.

[0372] Examples of the top surface shape of the sub-pixel include a triangle, a quadrangle (including a rectangle and a square), a polygon such as a pentagon, a shape with rounded corners of these polygons, an ellipse, a circle, etc. Here, the top surface shape of the sub-pixel corresponds to the top surface shape of the light-emitting region of the light-emitting element.

[0373] An S-stripe arrangement is applied to the pixel 250 shown in Fig. 27(A). The pixel 250 shown in Fig. 27(A) is composed of three sub-pixels, namely, light-emitting elements 210a, 210b, and 210c. For example, the light-emitting element 210a may be a blue light-emitting element, the light-emitting element 210b may be a red light-emitting element, and the light-emitting element 210c may be a green light-emitting element.

[0374] The pixel 250 shown in FIG. 27(B) has a light-emitting element 210a having a top surface shape of a substantially trapezoid or a substantially triangular shape with rounded corners, a light-emitting element 210b having a top surface shape of a substantially trapezoid or a substantially triangular shape with rounded corners, and a light-emitting element 210c having a top surface shape of a substantially rectangular or substantially hexagonal shape with rounded corners. The light-emitting element 210a has a larger light-emitting area than the light-emitting element 210b. In this manner, the shape and size of each light-emitting element can be determined independently. For example, the more reliable the light-emitting element, the smaller the size can be. For example, the light-emitting element 210a may be a green light-emitting element, the light-emitting element 210b may be a red light-emitting element, and the light-emitting element 210c may be a blue light-emitting element.

[0375] The pixels 224a and 224b shown in Fig. 27(C) are arranged in a Pentile array. Fig. 27(C) shows an example in which a pixel 224a having a light-emitting element 210a and a light-emitting element 210b and a pixel 224b having a light-emitting element 210b and a light-emitting element 210c are arranged alternately. For example, the light-emitting element 210a may be a red light-emitting element, the light-emitting element 210b may be a green light-emitting element, and the light-emitting element 210c may be a blue light-emitting element.

[0376] The pixels 224a and 224b shown in Fig. 27(D) and Fig. 27(E) are arranged in a delta arrangement. The pixel 224a has two light-emitting elements (light-emitting elements 210a and 210b) in the upper row (first row) and one light-emitting element (light-emitting element 210c) in the lower row (second row). The pixel 224b has one light-emitting element (light-emitting element 210c) in the upper row (first row) and two light-emitting elements (light-emitting elements 210a and 210b) in the lower row (second row). For example, the light-emitting element 210a may be a red light-emitting element, the light-emitting element 210b may be a green light-emitting element, and the light-emitting element 210c may be a blue light-emitting element.

[0377] FIG. 27(D) shows an example in which each light-emitting element has a substantially rectangular shape with rounded corners when viewed from above, and FIG. 27(E) shows an example in which each light-emitting element has a circular shape when viewed from above.

[0378] 27(F) shows an example in which light-emitting elements of each color are arranged in a zigzag pattern. Specifically, when viewed from above, the positions of the upper sides of two light-emitting elements (e.g., light-emitting elements 210a and 210b, or light-emitting elements 210b and 210c) arranged in a row direction are misaligned. For example, light-emitting element 210a may be a red light-emitting element, light-emitting element 210b may be a green light-emitting element, and light-emitting element 210c may be a blue light-emitting element.

[0379] In photolithography, the finer the pattern to be processed, the more the effect of light diffraction cannot be ignored, so that the fidelity is lost when the photomask pattern is transferred by exposure, and it becomes difficult to process the resist mask into the desired shape. Therefore, even if the photomask pattern is rectangular, a pattern with rounded corners is likely to be formed. Therefore, the top surface shape of the light-emitting element may become a polygon with rounded corners, an ellipse, a circle, or the like.

[0380] Furthermore, in the manufacturing method of the display panel according to one embodiment of the present invention, the EL layer is processed into an island shape using a resist mask. The resist film formed on the EL layer needs to be cured at a temperature lower than the heat resistance temperature of the EL layer. Therefore, depending on the heat resistance temperature of the material of the EL layer and the curing temperature of the resist material, the resist film may not be cured sufficiently. A resist film that is not cured sufficiently may have a shape different from the desired shape during processing. As a result, the top surface shape of the EL layer may be a polygon with rounded corners, an ellipse, a circle, or the like. For example, when a resist mask with a square top surface shape is formed, a resist mask with a circular top surface shape is formed, and the top surface shape of the EL layer may become circular.

[0381] In order to make the top surface shape of the EL layer into a desired shape, a technique for correcting the mask pattern in advance (OPC (Optical Proximity Correction) technique) may be used so that the design pattern and the transfer pattern match. Specifically, the OPC technique adds a correction pattern to the corners of figures on the mask pattern.

[0382] This concludes the description of the pixel layout.

[0383] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification.

[0384] (Embodiment 5) In this embodiment, electronic devices of one embodiment of the present invention will be described with reference to FIGS.

[0385] The electronic devices of this embodiment have a display device using the semiconductor device of one embodiment of the present invention in a display portion. The display device using the semiconductor device of one embodiment of the present invention has high reliability and can withstand long-term use. Therefore, the lifetime of the product can be extended.

[0386] Examples of electronic devices include electronic devices with relatively large screens, such as television sets, desktop or notebook personal computers, computer monitors, digital signage, large game machines such as pachinko machines, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices.

[0387] The display device of one embodiment of the present invention preferably has an extremely high resolution such as HD (number of pixels: 1280×720), FHD (number of pixels: 1920×1080), WQHD (number of pixels: 2560×1440), WQXGA (number of pixels: 2560×1600), 4K (number of pixels: 3840×2160), or 8K (number of pixels: 7680×4320). In particular, a resolution of 4K, 8K, or more is preferable. The screen ratio (aspect ratio) of the display device of one embodiment of the present invention is not particularly limited. For example, the display device can support various screen ratios such as 1:1 (square), 4:3, 16:9, and 16:10.

[0388] The electronic device of this embodiment may have a sensor (including a function to sense, detect, or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays).

[0389] The electronic device of the present embodiment can have various functions, such as a function of displaying various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function of displaying a calendar, date, time, etc., a function of executing various software (programs), a wireless communication function, a function of reading out a program or data recorded on a recording medium, etc.

[0390] An electronic device 6500 shown in FIG. 28A is a portable information terminal that can be used as a smartphone.

[0391] The electronic device 6500 includes a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, and the like. The display portion 6502 has a touch panel function. A display device using the semiconductor device of one embodiment of the present invention can be used for the display portion 6502.

[0392] 28B illustrates an example of a television set. In a television set 7100, a display portion 7000 is incorporated in a housing 7101. Here, the housing 7101 is supported by a stand 7103. A display device using the semiconductor device of one embodiment of the present invention can be used for the display portion 7000.

[0393] The television device 7100 can be operated using an operation switch provided on the housing 7101 and a separate remote control 7111. Alternatively, the display unit 7000 may be provided with a touch sensor, and the television device 7100 may be operated by touching the display unit 7000 with a finger or the like. The remote control 7111 may have a display unit that displays information output from the remote control 7111. Using operation keys or a touch panel provided on the remote control 7111, it is possible to operate the channel and volume, and to operate the video displayed on the display unit 7000.

[0394] The television device 7100 includes a receiver and a modem. The receiver can receive general television broadcasts. By connecting to a wired or wireless communication network via a modem, one-way (from sender to receiver) or two-way (between sender and receiver, or between receivers, etc.) information communication can be performed.

[0395] 28C shows an example of a laptop personal computer. The laptop personal computer 7200 includes a housing 7211, a keyboard 7212, a pointing device 7213, an external connection port 7214, and the like. A display portion 7000 is incorporated in the housing 7211. A display device using the semiconductor device of one embodiment of the present invention can be applied to the display portion 7000.

[0396] 28(D) and (E) show examples of digital signage. A digital signage 7300 shown in Fig. 28(D) includes a housing 7301, a display unit 7000, and a speaker 7303. The digital signage 7300 may further include an LED lamp, an operation key (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, and the like.

[0397] 28E illustrates a digital signage 7400 attached to a cylindrical pillar 7401. The digital signage 7400 includes a display portion 7000 provided along a curved surface of the pillar 7401. In FIGS. 28D and 28E, a display device using the semiconductor device of one embodiment of the present invention can be used for the display portion 7000.

[0398] The larger the display unit 7000, the more information can be provided at one time. Also, the larger the display unit 7000, the more easily it catches people's attention, which can increase the advertising effect of, for example, advertisements.

[0399] Applying a touch panel to the display unit 7000 is preferable because it not only displays images or videos on the display unit 7000 but also allows the user to intuitively operate it. Furthermore, when used for providing information such as route information or traffic information, the intuitive operation can improve usability.

[0400] Moreover, it is preferable that the digital signage 7300 or the digital signage 7400 can wirelessly cooperate with an information terminal 7311 or an information terminal 7411 such as a smartphone carried by a user. For example, advertising information displayed on the display unit 7000 can be displayed on the screen of the information terminal 7311 or the information terminal 7411. Moreover, by operating the information terminal 7311 or the information terminal 7411, the display on the display unit 7000 can be switched.

[0401] In addition, a game can be executed on the digital signage 7300 or the digital signage 7400 using the screen of the information terminal 7311 or the information terminal 7411 as an operation means (controller). This allows an unspecified number of users to participate in and enjoy the game at the same time.

[0402] The electronic devices shown in Figures 29(A) to (G) have a housing 9000, a display unit 9001, a speaker 9003, operation keys 9005 (including a power switch or an operation switch), a connection terminal 9006, a sensor 9007 (including a function to sense, detect or measure force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays), a microphone 9008, etc.

[0403] 29(A) to (G) have various functions. For example, the electronic devices may have a function of displaying various information (still images, videos, text images, etc.) on a display unit, a touch panel function, a function of displaying a calendar, date, or time, a function of controlling processing by various software (programs), a wireless communication function, a function of reading and processing a program or data recorded on a recording medium, and the like. Note that the functions of the electronic devices are not limited to these, and the electronic devices may have various functions. The electronic devices may have multiple display units. In addition, the electronic devices may have a function of providing a camera or the like in the electronic device, taking still images or videos, and storing them in a recording medium (external or built-in to the camera), a function of displaying the taken images on the display unit, and the like.

[0404] 29A to 29G will be described in detail below. Note that a display device including a semiconductor device according to one embodiment of the present invention can be applied to these electronic devices.

[0405] FIG. 29A is a perspective view showing a mobile information terminal 9101. The mobile information terminal 9101 can be used as, for example, a smartphone. Note that the mobile information terminal 9101 may be provided with a speaker 9003, a connection terminal 9006, a sensor 9007, and the like. The mobile information terminal 9101 can display text and image information on a plurality of surfaces. FIG. 29A shows an example in which three icons 9050 are displayed. Information 9051 shown in a dashed rectangle can also be displayed on another surface of the display unit 9001. Examples of the information 9051 include notifications of incoming e-mail, SNS, and phone calls, titles of e-mail or SNS, sender names, date and time, time, remaining battery power, and radio wave intensity. Alternatively, the icon 9050 or the like may be displayed at a position where the information 9051 is displayed.

[0406] 29(B) is a perspective view showing a mobile information terminal 9102. The mobile information terminal 9102 has a function of displaying information on three or more sides of a display unit 9001. Here, an example is shown in which information 9052, information 9053, and information 9054 are displayed on different sides. A user can check information 9053 displayed in a position that can be observed from above the mobile information terminal 9102 while the mobile information terminal 9102 is placed in a breast pocket of clothes. The user can check the display without taking the mobile information terminal 9102 out of the pocket and decide whether to answer a call or not.

[0407] 29(C) is a perspective view showing a tablet terminal 9103. The tablet terminal 9103 is capable of executing various applications such as mobile phone, e-mail, text browsing and creation, music playback, Internet communication, computer games, etc. The tablet terminal 9103 has a display unit 9001, a camera 9002, a microphone 9008, and a speaker 9003 on the front side of a housing 9000, operation keys 9005 as operation buttons on the left side of the housing 9000, and a connection terminal 9006 on the bottom.

[0408] 29(D) is a perspective view showing a wristwatch-type mobile information terminal 9200. The mobile information terminal 9200 can be used as, for example, a smart watch (registered trademark). The display surface of the display unit 9001 is curved, and display can be performed along the curved display surface. The mobile information terminal 9200 can also perform hands-free conversation by communicating with a headset capable of wireless communication. The mobile information terminal 9200 can also perform data transmission and charging with another information terminal through a connection terminal 9006. Note that charging may be performed by wireless power supply.

[0409] 29(E) to 29(G) are perspective views showing a foldable mobile information terminal 9201. FIG. 29(E) is a perspective view of the mobile information terminal 9201 in an unfolded state, FIG. 26(G) is a perspective view of the mobile information terminal 9201 in a folded state, and FIG. 29(F) is a perspective view of a state in the middle of changing from one of FIG. 29(E) and FIG. 29(G) to the other. The mobile information terminal 9201 has excellent portability in a folded state, and has excellent viewability of the display due to a seamless wide display area in an unfolded state. A display portion 9001 of the mobile information terminal 9201 is supported by three housings 9000 connected by a hinge 9055. For example, the display portion 9001 can be bent with a curvature radius of 0.1 mm or more and 150 mm or less.

[0410] This embodiment mode can be implemented by appropriately combining at least a part of it with other embodiment modes described in this specification. [Explanation of symbols]

[0411] D11 Diode D12 Diode D13 Diode D14 Diode D15 Diode D16 Diode GL Gate line M11 Transistor M12 Transistor M13 Transistor M14 Transistor M15 Transistor M16 Transistor M17 Transistor M18 Transistor M21 Transistor M22 Transistor M23 Transistor M24 Transistor M25 Transistor M26 Transistor M27 Transistor N11 Node N12 Node N13 Node N14 Node N15 Node N16 Node NA Node NB Node NC Node ND Node RL Wiring SL Source Line SR Shift Register Circuit 70 pixels 71 subpixels 74 pixel array 75 circuits 76 Circuits 100T transistor 102 Substrate 104_1 Conductive layer 104_2 Conductive layer 104_3 Conductive layer 104_4 Conductive layer 104e conductive layer 104 Conductive layer 106 Insulating Layer 107a Insulating layer 107b Insulating layer 107c Insulating layer 107 Insulating layer 108 Semiconductor layer 109 Insulating Layer 112a conductive layer 112a_1 Conductive layer 112a_2 Conductive layer 112b Conductive layer 112b_1 Conductive layer 112b_2 Conductive layer 112b_3 Conductive layer 115_1 Conductive layer 115_2 Conductive layer 115_3 Conductive layer 115 Conductive Layer 141 Aperture 151 Conductive layer 152 Conductive layer 153 Conductive Layer 161 Opening 162 Opening 163 Opening 164 Opening 165 Opening 166 Opening 167 Opening 168 Opening 200a Display panel 200b Display panel 200 Display Panel 201 Substrate 210a Light emitting element 210B Light emitting element 210b Light emitting element 210c Light emitting element 210G Light emitting element 210R Light emitting element 210W light emitting element 210 Light emitting element 211B Pixel electrode 211C Connection electrode 211G Pixel electrode 211R Pixel electrode 211 Pixel electrode 212B Organic layer 212G organic layer 212R Organic layer 212W organic layer 212 Organic layer 213 Common electrode 214 Common layer 215B Conductive layer 215G conductive layer 215R conductive layer 216B Colored layer 216G colored layer 216R colored layer 221 Protective layer 222 Insulating layer 223 Insulating Layer 224a pixels 224b pixels 225 Insulating Layer 226 Resin layer 228 layers 240 Connection 250 pixels 6500 Electronic equipment 6501 Case 6502 Display section 6503 Power button 6504 Button 6505 Speaker 6506 Microphone 6507 Camera 6508 Light source 7000 Display 7100 Television equipment 7101 Case 7103 Stand 7111 Remote control device 7200 Notebook Personal Computer 7211 Case 7212 Keyboard 7213 Pointing Device 7214 External connection port 7300 Digital Signage 7301 Case 7303 Speaker 7311 Information terminal 7400 Digital Signage 7401 Pillar 7411 Information terminal 9000 Chassis 9001 Display section 9002 Camera 9003 Speaker 9005 Operation key 9006 Connection terminal 9007 Sensor 9008 Microphone 9050 Icon 9051 Information 9052 Information 9053 Information 9054 Information 9055 Hinge 9101 Portable information terminal 9102 Portable information terminal 9103 Tablet PC 9200 Mobile Information Terminal 9201 Portable information terminals

Claims

1. A first switch and a second switch, the first switch includes first to third transistors; a drain of the first transistor electrically connected to a high potential power supply line; a source of the first transistor electrically connected to a drain of the second transistor; a drain of the second transistor electrically connected to a gate and a drain of the third transistor; a source of the second transistor electrically connected to a source of the third transistor; a gate of the first transistor is electrically connected to a gate of the second transistor; the second switch includes fourth to sixth transistors, a source of the fourth transistor is electrically connected to a low potential power line; a drain of the fourth transistor electrically connected to a source of the fifth transistor; a source of the fifth transistor is electrically connected to a source of the sixth transistor; a drain of the fifth transistor electrically connected to a gate and a drain of the sixth transistor; a gate of the fourth transistor is electrically connected to a gate of the fifth transistor; The semiconductor device, wherein the source of the second transistor and the drain of the fifth transistor are electrically connected to each other.

2. In claim 1, the third transistor has a first back gate; the sixth transistor has a second back gate; the first back gate is electrically connected to the source of the second transistor; the second back gate is electrically connected to the source of the fourth transistor.

3. In claim 1, The first to sixth transistors are transistors having a metal oxide in a semiconductor layer and a channel formation region provided along a side surface of an insulating layer.

4. A first switch and a second switch, the first switch includes first to seventh transistors; a drain of the first transistor electrically connected to a high potential power supply line; a source of the first transistor is electrically connected to a drain of the second transistor and to a gate and a drain of the fifth transistor; a source of the second transistor is electrically connected to a drain of the third transistor, a source of the fifth transistor, and a gate and a drain of the sixth transistor; a source of the third transistor is electrically connected to a drain of the fourth transistor, a source of the sixth transistor, and a gate and a drain of the seventh transistor; a source of the fourth transistor is electrically connected to a source of the seventh transistor; the gates of the first to seventh transistors are electrically connected to each other; the second switch includes eighth to fourteenth transistors; a source of the eighth transistor is electrically connected to a low potential power line; a drain of the eighth transistor is electrically connected to a source of the ninth transistor and a source of the twelfth transistor; a drain of the ninth transistor is electrically connected to a source of the tenth transistor, a gate and a drain of the twelfth transistor, and a source of the thirteenth transistor; a drain of the tenth transistor is electrically connected to a source of the eleventh transistor, a gate and a drain of the thirteenth transistor, and a source of the fourteenth transistor; the drain of the eleventh transistor is electrically connected to the gate and the drain of the fourteenth transistor; the gates of the eighth to fourteenth transistors are electrically connected to each other; A semiconductor device in which the source of the fourth transistor and the drain of the eleventh transistor are electrically connected to each other.

5. In claim 4, the fifth transistor has a first back gate; the sixth transistor has a second back gate; the seventh transistor has a third back gate; the twelfth transistor has a fourth back gate; the thirteenth transistor has a fifth back gate; the fourteenth transistor has a sixth back gate; the first back gate is electrically connected to the source of the third transistor; the second back gate and the third back gate are electrically connected to a source of the fourth transistor; the fourth back gate is electrically connected to the source of the eighth transistor; the fifth back gate is electrically connected to the source of the ninth transistor; the sixth back gate is electrically connected to the source of the tenth transistor.

6. In claim 4, the fifth transistor has a first back gate; the sixth transistor has a second back gate; the seventh transistor has a third back gate; the twelfth transistor has a fourth back gate; the thirteenth transistor has a fifth back gate; the fourteenth transistor has a sixth back gate; the first to third back gates are electrically connected to a source of the fourth transistor; the fourth to sixth back gates are electrically connected to a source of the eighth transistor.

7. In claim 4, The first to fourteenth transistors are transistors having a metal oxide in a semiconductor layer and a channel formation region provided along a side surface of an insulating layer.

8. A display device comprising the semiconductor device according to claim 1 in a driver circuit for a pixel.

9. An electronic device comprising the display device according to claim 8 and a speaker.

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