Liquid crystal display device

Abstract

To provide a semiconductor device with driving circuit, having high opening ratio, including a capacitive element with increased charge capacitance, and consuming less power.SOLUTION: The semiconductor device comprises: a driving circuit including a first transistor with gate electrodes above and below a semiconductor film in an overlapping manner; a pixel having a second transistor including the semiconductor film; a capacitive element including a dielectric film between a pair of electrodes provided in the pixel; and a capacitance line electrically connected to one electrode of the pair of electrodes. The gate electrode provided on the semiconductor film of the first transistor is electrically connected to the capacitance line.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The invention disclosed in this specification and elsewhere relates to a semiconductor device. [Background technology]

[0002] In recent years, flat panel displays such as liquid crystal displays (LCDs) have become widespread. In a display device such as a flat panel display, the pixels are arranged in the row and column directions. In the pixel, a transistor which is a switching element and an electric A liquid crystal element is connected in series with the liquid crystal element, and a capacitance element is connected in parallel with the liquid crystal element. do.

[0003] The semiconductor material constituting the semiconductor film of the transistor is amorphous. Silicon semiconductors such as silicon or polysilicon (polycrystalline) are widely used.

[0004] Metal oxides that exhibit semiconductor properties (hereinafter, referred to as oxide semiconductors) are used in transistors. It is a semiconductor material that can be applied to the semiconductor film of the following: zinc oxide or In-Ga-Zn system oxide Techniques for fabricating transistors using nitride semiconductors have been disclosed (Patent Document 1 and Patent Document 2). (See Patent Document 2). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0006] The capacitance element has a pair of electrodes and a dielectric film between them. The other electrode is a gate electrode, a source electrode, a drain electrode, or the like that constitutes a transistor. In many cases, the light-shielding conductive film is used.

[0007] In addition, the larger the capacitance of the capacitance element, the more the liquid crystal element will dissipate when an electric field is applied. The period during which the orientation of the crystal molecules can be kept constant can be extended. In a display device in which the period can be extended, the number of times that image data is rewritten can be reduced. This makes it possible to reduce power consumption.

[0008] In order to increase the charge capacity of the capacitance element, the area occupied by the capacitance element is increased. However, there is a method for increasing the area where the pair of electrodes overlap. In a display device, a light-shielding conductive film is used to increase the area where a pair of electrodes overlap. If the area of ​​the conductive film is increased, the aperture ratio of the pixel is reduced, and the display quality of the image is degraded.

[0009] In addition, a process for forming a transistor in a pixel of a display device is used to form a display device. A transistor that constitutes a driving circuit of the device can be formed. The transistors for switching the pixel have an operating speed faster than that of the transistors provided in the pixel. A transistor that constitutes a driver circuit is required to be formed by overlapping a semiconductor film with the semiconductor film. A transistor with gate electrodes on the top and bottom of the .) can be used to improve the operating speed of transistors. In the case of using a dual gate transistor, a semiconductor film is overlapped with the semiconductor film. A structure (wiring, terminals, power supply, etc.) is required above and below the film to control the potential of the gate electrode. This increases the power consumption of the driver circuit, and may also increase the power consumption of the display device.

[0010] In view of the above, one embodiment of the present invention is to provide a semiconductor device having a driver circuit with a high aperture ratio and The object of the present invention is to provide a semiconductor device having a capacitive element capable of increasing the charge capacity. In addition, one embodiment of the present invention is a semiconductor device including a driver circuit, US201002233333A1 - Semiconductor device having a capacitance element capable of increasing charge capacity and reducing power consumption - Google Patents One of the objectives of the project is to provide a place where [Means for solving the problem]

[0011] In view of the above problem, one embodiment of the present invention is a semiconductor film having a gate electrode formed above and below the semiconductor film. A driving circuit including a first transistor having a gate electrode and a second transistor including a semiconductor film. A pixel including a capacitor and a pair of electrodes provided in the pixel, between which a dielectric film is provided. and a capacitance line electrically connected to one of the pair of electrodes. A gate electrode provided on the semiconductor film of the transistor is electrically connected to a capacitance line. The semiconductor device is characterized in that

[0012] More specifically, one embodiment of the present invention is a semiconductor film having a semiconductor layer, A driving circuit including a first transistor having a gate electrode and a second transistor including a semiconductor film. A capacitor in which a dielectric film is provided between a pixel including a transistor and a pair of electrodes provided in the pixel. a capacitance line electrically connected to one of the pair of electrodes; and a second transistor. a pixel electrode electrically connected to the first transistor, the pixel electrode being provided on the semiconductor film of the first transistor; The gate electrode and the capacitance line are electrically connected to each other, and the capacitance element is The semiconductor film is formed on the same surface as the semiconductor film of the transistor. The pixel electrode functions as the other electrode of the pair of electrodes, and the conductive layer functions as the conductive layer. The semiconductor film is an insulating film provided on the semiconductor film of the second transistor. It is a semiconductor device.

[0013] In the capacitor, one electrode is formed of a light-transmitting semiconductor film of the second transistor. The other electrode of the light-transmitting pixel transistor is electrically connected to the second transistor. The dielectric film is provided on the light-transmitting semiconductor film of the second transistor. In other words, since the capacitance element is light-transmitting, It is possible to form the transistor in a large area in a region other than the region where the transistor is formed. Therefore, a semiconductor device having an increased aperture ratio and an increased charge capacity can be obtained. Moreover, by improving the aperture ratio, a semiconductor device with excellent display quality can be obtained.

[0014] In addition, like the first transistor, a semiconductor film is provided on the channel formation region. A gate electrode (hereinafter referred to as a back gate electrode) is electrically connected to one electrode of the capacitance element. By electrically connecting to the connected capacitance line, the potential of the capacitance line can be controlled. The potential of the back gate electrode can be controlled. The configuration for controlling the first transistor can be omitted, and the first transistor can be a dual gate transistor. In other words, the operation speed of the drive circuit can be increased. When the first transistor is operated as a gate transistor, Therefore, it is possible to achieve both an increase in operating speed and a reduction in power consumption. Thus, a semiconductor device capable of performing the above-mentioned process can be obtained.

[0015] The light-transmitting semiconductor film can be formed using an oxide semiconductor. Semiconductors have a large energy gap of 3.0 eV or more, and have high transmittance for visible light. In the following description, a light-transmitting semiconductor film is simply referred to as an oxide semiconductor film. Therefore, the second transistor is a transistor using an oxide semiconductor film. One electrode of the capacitor is an oxide semiconductor film.

[0016] The light-transmitting capacitor element can be manufactured by utilizing the formation process of the second transistor. One electrode of the capacitor is formed by using a process for forming an oxide semiconductor film of the second transistor. The dielectric film of the capacitance element can be an insulating film provided on the semiconductor film of the second transistor. The other electrode of the capacitor is electrically connected to the second transistor. A process for forming a pixel electrode that is connected to the semiconductor device can be utilized.

[0017] The first transistor constituting the driver circuit is also formed using the same process as the second transistor. The back gate electrode of the first transistor is formed by It can be formed by utilizing the process for forming the pixel electrode to which it is electrically connected. The gate electrode is a conductive film made of the same material as the pixel electrode.

[0018] In the above, the insulating film provided over the oxide semiconductor film of the second transistor is an oxide insulating film. By forming a laminated structure of an oxide insulating film and a nitride insulating film, the dielectric film is formed of a laminated structure of an oxide insulating film and a nitride insulating film. The structure may be:

[0019] In addition, the insulating film provided on the semiconductor film of the second transistor is an oxide insulating film and a nitride insulating film. When a laminated film structure is used, the oxide insulating film is removed only in the region above the capacitance element. The dielectric film of the element can be made into a single-layer structure consisting of the nitride insulating film alone. The nitride insulating film is in contact with the oxide semiconductor film which functions as one electrode of the capacitor. When the nitride insulating film is in contact with the oxide semiconductor film, a defect level is generated at the interface between the nitride insulating film and the oxide semiconductor film. Or / and, the nitride insulating film is formed by plasma CVD or spat When a semiconductor film is formed by a plasma deposition method, the semiconductor film is exposed to plasma, and oxygen vacancies are generated. Furthermore, nitrogen and / or hydrogen contained in the nitride insulating film migrate to the semiconductor film. When hydrogen contained in the nitride insulating film enters the level or oxygen vacancy, electrons that act as carriers are generated. As a result, the conductivity of the semiconductor film increases, it becomes an n-type, and it becomes a conductive film. The oxide semiconductor film can be made to function sufficiently and easily as one electrode of a capacitor. In addition, since the thickness of the dielectric film can be made thin, the charge capacity of the capacitance element can be increased. The amount can be increased.

[0020] One embodiment of the present invention is a first semiconductor device having gate electrodes above and below a semiconductor film overlapping the semiconductor film. a driver circuit including the transistor; a pixel including a second transistor including a semiconductor film; a capacitance element having a pair of electrodes and a dielectric film provided between the pair of electrodes; a capacitance line electrically connected to one electrode of the first transistor and a capacitance line electrically connected to the second transistor; a pixel electrode formed on the first transistor and a gate electrode provided on the semiconductor film of the first transistor; and a capacitance line are electrically connected to each other, and in at least the second transistor, an insulating film having a stacked structure of an oxide insulating film and a nitride insulating film is provided on the semiconductor film; the capacitor element has a semiconductor film formed on the same surface as the semiconductor film of the second transistor; The semiconductor film functions as one of a pair of electrodes, and the pixel electrode functions as the other of the pair of electrodes. The semiconductor device is characterized in that the dielectric film functions as a pole and is a nitride insulating film.

[0021] The insulating film provided over the oxide semiconductor film of the second transistor is an oxide insulating film and a nitride insulating film. In the case of a laminated structure of an oxide insulating film, the oxide insulating film is difficult to transmit nitrogen. It is preferable that the film has a barrier property sufficient to prevent the film from being damaged.

[0022] In this manner, nitrogen is prevented from diffusing into the oxide semiconductor film of the second transistor. This can suppress the fluctuation in the electrical characteristics of the second transistor. When an oxide semiconductor film is used for a transistor, the oxide insulating film does not easily allow nitrogen to pass therethrough. In other words, it is preferable that the film has a barrier property against nitrogen. Fluctuations in the electrical characteristics of the first transistor can be suppressed.

[0023] In addition, in the capacitor, one electrode is a source electrode or a drain electrode of the second transistor. The conductive film formed in the step of forming the contact electrode can be used to electrically connect the contact electrode to the capacitance line. In addition, an oxide semiconductor film that functions as one electrode of the capacitance line is formed in direct contact with the capacitance line. This allows one electrode to be electrically connected to the capacitance line.

[0024] In the capacitor, the conductive film electrically connecting one electrode and the capacitor line is For example, the oxide semiconductor film may be provided in contact with an end portion of the oxide semiconductor film that functions as an electrode. The oxide film can be provided along the outer periphery of the semiconductor film. The conductivity of the oxide semiconductor film can be increased. In this way, the oxide semiconductor film can easily function as one electrode of a capacitor. do.

[0025] In the above, the capacitance line is connected to the scanning line which also functions as the gate electrode of the second transistor. The first transistor may extend in a parallel direction to the first transistor and may be provided on the same surface. It extends in a direction parallel to the signal line, which also functions as a source electrode or a drain electrode, and is on the same surface as the signal line. It may be provided on the

[0026] In the above, a pixel electrode electrically connected to the second transistor; An organic insulating film may be provided between the insulating film provided on the oxide semiconductor film of the photoresist. In this way, the pixel electrode and the source electrode or drain electrode of the second transistor are This can reduce the parasitic capacitance between the electrode and other conductive films, improving the electrical characteristics of the semiconductor device. For example, signal delays in a semiconductor device can be reduced.

[0027] In this case, it is effective to make the thickness of the dielectric film thin in order to increase the capacitance of the capacitive element. Therefore, it is preferable to remove the organic insulating film on the region where the capacitance element is to be formed. Hydrogen, water, and the like contained in the organic insulating film are transferred to the oxide semiconductor film of the second transistor. In order to prevent diffusion, a region overlapping with the oxide semiconductor film of the second transistor is It is preferable to remove the organic insulating film.

[0028] In the above, an oxide semiconductor film of the second transistor is used as one electrode of the capacitor. In the case where the oxide semiconductor film formed in the forming step is used, the conductivity of the oxide semiconductor film is increased. In other words, in the capacitor element, one electrode is connected to the second transistor. The insulating film is formed on the same surface as the oxide semiconductor film of the insulating film and has a higher electrical conductivity than the oxide semiconductor film. In this way, the oxide semiconductor film can be formed by using the oxide semiconductor film having a thin region. This makes it possible to make the semiconductor film function sufficiently and easily as one electrode of a capacitance element.

[0029] To increase the electrical conductivity, for example, boron, nitrogen, fluorine, aluminum, phosphorus, One or more elements selected from arsenic, indium, tin, antimony and rare gas elements are added to the oxide. It is preferable that the element be added to the oxide semiconductor film. The method includes an ion implantation method, an ion doping method, and the like, and the oxide semiconductor film is The above elements can also be added by exposing the material to plasma containing the above elements. The conductivity of the oxide semiconductor film that functions as one of the electrodes of the cell is 10 S / cm or more and 1000 S / cm or less, preferably 100 S / cm or more and 1000 S / cm or less.

[0030] As described above, in the capacitor, The nitride insulating film of the insulating film provided in the insulating film 1 is in contact with the oxide semiconductor film, The process of adding an element to increase the electrical conductivity, such as by ion doping or ion implantation, can be omitted. As a result, the yield of semiconductor devices can be improved and manufacturing costs can be reduced.

[0031] Note that a manufacturing method of a semiconductor device according to one embodiment of the present invention is also Included in. Effect of the Invention

[0032] According to one embodiment of the present invention, in a semiconductor device having a driver circuit, it is possible to increase the aperture ratio while reducing the charge It is possible to provide a semiconductor device having a capacitor element with increased capacitance. The semiconductor device has a high aperture ratio and a capacitance element with a large charge capacity, A semiconductor device with reduced power consumption can be provided. [Brief description of the drawings]

[0033] [Figure 1] 1A to 1C are a diagram illustrating a semiconductor device according to one embodiment of the present invention and a circuit diagram of a pixel. [Diagram 2] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 3] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 4] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 5] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 8] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 9] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 10]FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 11] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 12] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 13] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 14] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 15] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 16] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 17] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 18] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 19] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 20] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 21] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 22] 1 is a cross-sectional view illustrating a transistor that can be used in a semiconductor device according to one embodiment of the present invention. [Figure 23] 1 is a cross-sectional view illustrating a transistor that can be used in a semiconductor device according to one embodiment of the present invention. [Figure 24] 1 is a cross-sectional view illustrating a transistor that can be used in a semiconductor device according to one embodiment of the present invention. [Diagram 25] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 26] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 27] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 28] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 29] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 30] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 31] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 32] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Diagram 33] 1A to 1C are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Diagram 34] 1 is a cross-sectional view illustrating a transistor that can be used in a semiconductor device according to one embodiment of the present invention. [Diagram 35] FIG. 1 is a top view illustrating a semiconductor device according to one embodiment of the present invention. [Diagram 36] FIG. 1 is a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 37] 1A and 1B are a top view and a cross-sectional view illustrating a semiconductor device according to one embodiment of the present invention. [Figure 38] 1A to 1C are diagrams illustrating electronic devices using a semiconductor device which is one embodiment of the present invention. [Figure 39] 1A to 1C are diagrams illustrating electronic devices using a semiconductor device which is one embodiment of the present invention. [Diagram 40] FIG. 2 is a diagram illustrating a sample structure. [Diagram 41] FIG. 1 is a diagram illustrating sheet resistance. [Diagram 42] FIG. 1 is a diagram for explaining the measurement results of SIMS. [Diagram 43] FIG. 1 is a diagram illustrating the measurement results of ESR. [Diagram 44] FIG. 1 is a diagram illustrating the measurement results of ESR. [Diagram 45] FIG. 1 is a diagram illustrating sheet resistance. [Diagram 46] FIG. 1 is a diagram illustrating sheet resistance. [Figure 47] A diagram explaining a bulk model of InGaZnO4. [Figure 48] A diagram illustrating the formation energies and thermodynamic transition levels of VoH. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0034] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and it is understood by those skilled in the art that various modifications may be made to the modes and details. The present invention is not limited to the description of the following embodiments. It is not something that can be done.

[0035] In the configuration of the present invention described below, the same parts or parts having similar functions are designated by the same reference numerals. The same reference numerals are used in different drawings, and the repeated explanations are omitted. When referring to a part having a function, the hatch pattern is the same and no symbol is attached. be.

[0036] In each figure described in this specification, the size of each structure, the thickness of the film, or the area is not shown for the sake of clarity. The figures may be exaggerated for illustrative purposes and are not necessarily limited to that scale.

[0037] In this specification and elsewhere, ordinal numbers such as 1st, 2nd, etc. are used for convenience. In addition, the order of steps or stacking is not intended to specify the invention in the present specification and the like. It does not indicate a specific name for the purpose of reference.

[0038] In addition, the function of the "source" and "drain" in the present invention is to control the flow of current during circuit operation. In cases where the direction is changed, the positions may be reversed. The terms "source" and "drain" may be used interchangeably.

[0039] Voltage is the potential difference between two points, and potential is the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a particle. Generally, the potential difference between a potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. In this specification, voltage may be read as potential.

[0040] In this specification, when etching is performed after photolithography, The mask formed by the photolithography process is removed.

[0041] (Embodiment 1) In this embodiment, a semiconductor device which is one embodiment of the present invention will be described with reference to drawings. Note that in this embodiment, a liquid crystal display device is used as an example of a semiconductor device according to one embodiment of the present invention. explain.

[0042] <Configuration of Semiconductor Device> FIG. 1A illustrates an example of a semiconductor device. The element portion 100, the scanning line driving circuit 104, and the signal line driving circuit 106 are parallel or substantially parallel to each other. m scanning lines 107 arranged in rows and whose potentials are controlled by a scanning line driving circuit 104 The signal line driving circuit 106 controls the potential of each of the signal lines. The pixel section 100 is arranged in a matrix. The pixel array has a plurality of pixels 101 arranged parallel or approximately parallel to each other along a scanning line 107. The capacitance lines 115 are arranged along the signal line 109. They may be arranged in a row or substantially parallel to each other. Additionally, m and n are both integers of 1 or more.

[0043] Each scanning line 107 corresponds to one of the pixels 101 arranged in m rows and n columns in the pixel section 100. The signal lines 109 are electrically connected to the n pixels 101 arranged in any row. is m pixels 101 arranged in m rows and n columns, and m pixels 101 arranged in any one of the columns 1. Each capacitance line 115 is electrically connected to one of the pixels 101 arranged in m rows and n columns. Among them, the n pixels 101 arranged in any one row are electrically connected. 115 are arranged parallel or approximately parallel to each other along the signal line 109, Among the pixels 101 arranged in n columns, m pixels 101 arranged in any one of the columns are electrically connected. It is connected to the target.

[0044] FIG. 1B is an example of a circuit diagram of a pixel 101 included in the semiconductor device shown in FIG. The pixel 101 shown in FIG. 1B is electrically connected to a scanning line 107 and a signal line 109. One electrode of the transistor 103 is electrically connected to a capacitor line 115 that supplies a constant potential. The other electrode of the capacitor 1 is electrically connected to the drain electrode of the transistor 103. 05, the pixel electrode is the drain electrode of the transistor 103 and the other electrode of the capacitor 105. An electrode (counter electrode) that is electrically connected to the pixel electrode supplies a counter potential. and a liquid crystal element 108 electrically connected to the wiring.

[0045] A semiconductor film having a channel formation region of a transistor is processed under appropriate conditions. The off-state current of a transistor can be significantly reduced by using an oxide semiconductor film. The semiconductor film included in the transistor 103 is an oxide semiconductor film 111 .

[0046] The capacitor 105 can be formed by utilizing the same process as that of the transistor 103. One electrode of the capacitor 105 is formed of a light-transmitting semiconductor film, specifically, an oxide semiconductor film. That is, the capacitance element 105 is a MOS (Metal Oxide Se The MOSFET can be considered a microconductor capacitor.

[0047] The liquid crystal element 108 faces the substrate on which the transistor 103 and the pixel electrode 121 are formed. The optical modulation effect of the liquid crystal sandwiched between the substrate on which the electrode 154 is formed causes the transmission or The optical modulation of the liquid crystal is achieved by controlling the electric field (horizontal) applied to the liquid crystal. The electric field may be axial, longitudinal or oblique.

[0048] The scanning line driver circuit 104 and the signal line driver circuit 106 are each composed of a logic circuit section and a switch section or a buffer section. A detailed configuration of the scanning line driving circuit 104 and the signal line driving circuit 106 Although not described, the scanning line driver circuit 104 and the signal line driver circuit 106 include transistors. The data is included.

[0049] A transistor included in one or both of the scanning line driver circuit 104 and the signal line driver circuit 106 The transistor 103 of the pixel 101 can be formed by utilizing the same process for forming the transistor 103. In other words, the scanning line driver circuit 104 and / or the signal line driver circuit 106 are The first transistor 103 and the pixel electrode 121 may be provided on the same substrate. In this way, one or both of the scanning line driver circuit 104 and the signal line driver circuit 106 are formed on the same substrate. By forming the semiconductor device as a body, the number of components in the semiconductor device can be reduced, and the manufacturing cost can be reduced. It is possible.

[0050] In order to increase the speed at which the pixels 101 are scanned, the operation of the scanning line driving circuit 104 is It is necessary to increase the speed. Specifically, the transistors included in the scanning line driving circuit 104 Increase in the operating speed of the transistor and increase in the drain current (on-current) that flows when the transistor is conductive In order to achieve these, it is necessary to increase the field effect mobility of the transistor. The transistors included in the scanning line driving circuit 104 are dual-gate transistors. In addition, a dual gate transistor has gates above and below a semiconductor film that overlap the semiconductor film. The provision of the electrodes can increase the operating speed of the transistor. In addition, since an electric field is applied from above and below the semiconductor film, a sufficient channel can be formed, and the transistor The on-current and field effect mobility of the transistor can be increased. The transistor included in the circuit 106 can also be a dual gate transistor. Cut.

[0051] Next, in the semiconductor device according to one embodiment of the present invention, a capacitance line provided in the pixel portion 100 and a back gate electrode of a dual gate transistor included in the scanning line driving circuit 104. The laminated structure with the wiring including the wiring will be described. FIG. 2 shows a diagram for explaining the laminated structure. FIG. 2(A) is a top view of a part of the semiconductor device, and FIG. 2(B) is a dashed line X1-X in FIG. 2 and the cross section taken along dashed line Y1-Y2.

[0052] FIG. 2A shows a pixel section 100, a capacitance line 115, a scanning line driving circuit 104, and a scanning line A circuit including a back gate electrode of the dual gate transistor 15 included in the driving circuit 104 For clarity of the drawing, the capacitance line 92 is shown in the pixel section 100. Components other than 115 (pixels, signal lines, transistors, capacitors, liquid crystal elements, etc.) are not included. In addition, in the scanning line driving circuit 104, in order to clarify the drawing, The components are omitted.

[0053] As shown in FIG. 2A, the semiconductor device according to one embodiment of the present invention includes a capacitor line 115 and a wiring 9 2 are electrically connected through the opening 94. That is, the capacitance line 115 and the wiring 92 are The back gate electrode of the dual gate transistor 15 and the capacitor An oxide semiconductor serving as one electrode of the capacitance element 105 electrically connected to the capacitance line 115 The conductive film 119 has the same potential (see FIG. 1(B)).

[0054] FIG. 2B illustrates the structure of the dual gate transistor 15 and the opening 94. The dual gate transistor 15 is fabricated using the same process as the transistor 103. It can be formed.

[0055] As shown in FIG. 2B, the semiconductor device according to one embodiment of the present invention has a cross section taken along line X1-X2. A gate electrode 17a is provided on the substrate 102, and a gate An insulating film 12 is provided, and a gate insulating film 12 is provided on a region overlapping with the gate electrode 17a. An oxide semiconductor film 11 is provided, and a source electrode 19a and a A gate insulating film 12, a source electrode 19a, and a drain electrode 13a are provided. An insulating film 29, an insulating film 31, and an insulating film 32 are provided on the semiconductor film 11 and the drain electrode 13a. A back gate electrode is formed on the region of the insulating film 32 that overlaps with the oxide semiconductor film 11. A wiring 92 including the wiring 92 is provided.

[0056] In addition, the semiconductor device according to one aspect of the present invention has a structure in which, in the cross section Y1-Y2, a A capacitance line 115 is provided on the same surface as the gate electrode 17a. A conductive film 16, an insulating film 29, an insulating film 31 and an insulating film 32 are provided on the gate electrode 5. An opening is formed in the insulating film 12, the insulating film 29, the insulating film 31, and the insulating film 32, and reaches the conductive film 16. An opening 94 is provided, and a wiring 92 is provided in the opening 94. 5 and the wiring 92 are electrically connected by a conductive film 16. The conductive film 16 is It can be formed by utilizing the process for forming the electrode 19a and the drain electrode 13a.

[0057] The capacitance line 115 and the wiring 92 are electrically connected to each other by using a conductive material as described above. In addition to the configuration in which the conductive film 16 is electrically connected, the capacitor line 115 and the wiring are not provided with the conductive film 16. 92 may be in direct contact with each other.

[0058] The substrate 102, the gate electrode 17a, the capacitance line 115, and the gate insulating film 12 are A base insulating film may be provided between them.

[0059] In addition, the capacitance line 115 and the dual gate transistor included in the scanning line driving circuit 104 are A configuration in which the transistor 15 is electrically connected to the wiring 92 including the back gate electrode is described. However, the semiconductor device according to one embodiment of the present invention is not limited to this structure. Wiring including the back gate electrode of the dual gate transistor included in the line driving circuit 106 The configuration may be such that the signal line is electrically connected to the signal line.

[0060] As described above, the semiconductor device according to one embodiment of the present invention has a capacitance line 115 and a dual gate transistor. The back gate electrode of the transistor 15 is electrically connected to the wiring 92. By controlling the potential of the line 115, the potential of the back gate electrode can be controlled. In other words, according to one embodiment of the present invention, it is possible to omit a configuration for controlling the potential of the back gate electrode. The transistors included in the scanning line driving circuit 104 are dual-gate transistors. 15, the operating speed of the driver circuit can be increased. It is possible to obtain a semiconductor device that can achieve both increased speed and reduced power consumption. Since the configuration for controlling the potential of the back gate electrode can be omitted, the number of components of the semiconductor device can be reduced. Therefore, the manufacturing cost of the semiconductor device according to one embodiment of the present invention can be reduced. do.

[0061] Next, a specific configuration example of the pixel 101 included in the semiconductor device according to one embodiment of the present invention will be described. A top view of the pixel 101 is shown in FIG. 3. For clarity of the drawing, FIG. Some of the components of the semiconductor device (eg, liquid crystal element 108, etc.) are omitted.

[0062] In FIG. 3, the scanning lines 107 extend in a direction substantially perpendicular to the signal lines 109 (the left-right direction in the figure). The signal lines 109 extend in a direction substantially perpendicular to the scanning lines 107 (the vertical direction in the figure). The capacitance line 115 is provided so as to extend in a direction parallel to the scanning line 107. The scanning line 107 and the capacitance line 115 are included in the scanning line driving circuit 104. Wiring 92 including the back gate electrode of the dual gate transistor 15 (see FIG. 2(A)) The signal line 109 is electrically connected to a signal line driver circuit 106 (see FIG. 1A). and is electrically connected to

[0063] The transistor 103 is provided in a region where the scanning line 107 and the signal line 109 intersect. The transistor 103 includes at least an oxide semiconductor film 11 having a channel formation region. 1, a gate electrode, a gate insulating film (not shown in FIG. 3), a source electrode, and a drain electrode. and an electrode.

[0064] Since the transistor 103 includes the oxide semiconductor film 111, the off-state current of the transistor Therefore, the current can be significantly reduced, and the power consumption of the semiconductor device can be reduced.

[0065] The scanning line 107 includes a region that functions as a gate electrode of the transistor 103. The line 109 includes a region that functions as a source electrode of the transistor 103. includes a region that functions as the drain electrode of the transistor 103, and is exposed through an opening 117. It is electrically connected to the pixel electrode 121. In FIG. 3, the pixel electrode 121 is The link is omitted in the illustration.

[0066] The region functioning as a gate electrode is formed by forming the oxide semiconductor film 1 The area that functions as a source electrode is a small area in the signal line 109. The region that functions as a drain electrode is a region that overlaps with at least the oxide semiconductor film 111. indicates a region of the conductive film 113 that overlaps with at least the oxide semiconductor film 111. In the following, the gate electrode of the transistor 103 is referred to as a gate electrode 107a. The source electrode of the transistor 103 is referred to as a source electrode 109a, and the drain of the transistor 103 is referred to as a The in-electrode of the transistor 103 may be referred to as the drain electrode 113a. The gate electrode is written as the scanning line 107, and the source electrode of the transistor 103 is written as the scanning line 107. 109.

[0067] The capacitance element 105 is provided in a region surrounded by the capacitance line 115 and the signal line 109 in the pixel 101. The capacitor element 105 is connected to a capacitor line through a conductive film 125 provided in the opening 123. The capacitor 105 is electrically connected to the light-transmitting oxide semiconductor film 115. 19, a pixel electrode 121 having light transmitting properties, and a dielectric film included in the transistor 103. The capacitor element 10 is made up of a transparent insulating film (not shown in FIG. 3). 5 has translucency.

[0068] Since the capacitor 105 has a light-transmitting property, the capacitor 105 is large and can be placed in the pixel 101. Therefore, it is possible to form a semiconductor device with an increased aperture ratio and an increased charge capacity. In addition, a semiconductor device with excellent display quality can be obtained by improving the aperture ratio. A semiconductor device can be obtained.

[0069] The capacitance of the capacitor 105 varies depending on the area where the pair of electrodes overlap. If the pixel size is reduced to increase the resolution, the size of the capacitance element will increase accordingly. The charge capacity is also reduced, and the liquid crystal element can be operated satisfactorily. Since the capacitor 105 has a light-transmitting property, the liquid crystal element 108 The capacitance element 105 can be formed in the entire range in which the device operates, and the capacitance element 105 can be formed as large as possible within the pixel. The capacitor element 105 can be formed (in a large area). The liquid crystal element 108 can be operated sufficiently. As long as the charge capacity can be secured, the pixel density and resolution can be increased. can.

[0070] Therefore, one aspect of the present invention is to provide a liquid crystal display having a pixel density of 200 ppi or more, or even 300 ppi or more. The present invention can be suitably used for a high-resolution display device. This allows the aperture ratio to be improved even in high-speed display devices, making it possible to improve the light source such as backlight. The light from the light source can be used efficiently, and the power consumption of the display device can be reduced. .

[0071] Here, the characteristics of a transistor using an oxide semiconductor will be described. The transistor used is an n-channel transistor. Oxygen vacancies can generate carriers, which can degrade the electrical characteristics and reliability of transistors. For example, the threshold voltage of a transistor may be shifted in the negative direction, causing a gate When the gate voltage is 0V, the drain current may flow. The fact that drain current flows when the gate voltage is 0V is called a normally-on characteristic. A transistor that can be considered as having no drain current when the drain voltage is 0V is called a This is called a normally-off characteristic.

[0072] In this regard, when an oxide semiconductor film is used, defects contained in the oxide semiconductor film, typically oxygen, It is preferable to reduce defects as much as possible. For example, the direction of the magnetic field is parallel to the film surface. The spin density (g value = 1.93 in the oxide semiconductor film) measured by electron spin resonance was It is preferable that the defect density is reduced to below the detection limit of the measuring instrument. It is desirable to reduce defects, typically oxygen vacancies, contained in an oxide semiconductor film as much as possible. In this way, it is possible to prevent the transistor from becoming normally on, and thus the electric field of the semiconductor device can be improved. The thermal characteristics and reliability can be improved.

[0073] The negative shift in the threshold voltage of a transistor is not only due to oxygen vacancies, but also due to oxide It can also be caused by hydrogen (including hydrogen compounds such as water) contained in the semiconductor film. Hydrogen contained in the oxide semiconductor film reacts with oxygen that is bonded to metal atoms to form water. In both cases, a defect (which can also be called an oxygen defect) is created in the lattice from which oxygen has been removed (or in the part from which oxygen has been removed). In addition, some of the hydrogen reacts with oxygen to generate electrons, which act as carriers. Therefore, a transistor including an oxide semiconductor film containing hydrogen is a normally-on transistor. This tends to result in poor performance.

[0074] Therefore, hydrogen is reduced as much as possible in the oxide semiconductor film 111 of the transistor 103. Specifically, the oxide semiconductor film 111 is preferably (SIMS: Secondary Ion Mass Spectrometry) The hydrogen concentration obtained is 5×10 18 atoms / cm 3 Less than 1 x 10 18 atoms / cm 3 Less than or equal to 5×10 17 atoms / cm 3 Further details are below. Preferably 1 x 10 16 atoms / cm 3 The following applies.

[0075] The oxide semiconductor film 111 is formed of an alkali metal or is the concentration of alkaline earth metals, 1×10 18 atoms / cm 3 Below, preferably 2 x 1 0 16 atoms / cm 3 Alkali metals and alkaline earth metals are oxide semiconductors. When the conductor is bonded, carriers may be generated, increasing the off-current of the transistor 103. This can sometimes be done.

[0076] In addition, when nitrogen is contained in the oxide semiconductor film, electrons that serve as carriers are generated, and the carriers The density increases and the oxide semiconductor film containing nitrogen is easily converted to n-type. The transistor tends to be normally on. It is preferable that the nitrogen is reduced as much as possible. For example, the nitrogen concentration is 5×10 1 8 atoms / cm 3 It is preferable to do the following:

[0077] In addition, when the oxide semiconductor film contains a Group 14 element such as silicon or carbon, the carrier The electrons that are positively charged are generated, the carrier density increases, and the oxide semiconductor film becomes easily n-type. In the transistor 103 having the gate insulating film 127 (not shown in FIG. 3), At the interface between the oxide semiconductor film 111 and the oxide semiconductor film 112, a secondary ion mass spectrometry The silicon concentration is 3×10 18 atoms / cm 3 Less than or equal to 3×10 17 ato ms / cm 3 In addition, the following is the result of secondary ion mass spectrometry at the interface. The carbon concentration is 3×1018 atoms / cm 3 Less than or equal to 3×10 17 atom s / cm 3 The following applies.

[0078] From the above, impurities (hydrogen, nitrogen, silicon, carbon, alkali metals or alkaline earth metals By using the oxide semiconductor film 111 which is highly purified by reducing the amount of oxide and the like as much as possible, The transistor 103 can be prevented from becoming a normally-on transistor. Therefore, it is possible to fabricate a semiconductor device having excellent electrical characteristics. In addition, a semiconductor device with improved reliability can be manufactured.

[0079] The reason why the off-state current of a transistor using a highly purified oxide semiconductor film is low is that This can be proved by various experiments. For example, when the channel width W is 1×10 6 Channel length in μm Even with an element with L of 10 μm, the voltage between the source and drain electrodes (drain voltage) In the range of 1V to 10V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. Bottom, i.e. 1×10 -13 In this case, the transistor The off-state current, which is equivalent to the value divided by the channel width of the MOSFET, must be 100zA / μm or less. In addition, by connecting the capacitor and the transistor, the current flowing into the capacitor or out of the capacitor can be seen. The off-state current was measured using a circuit in which the transistor controls charge flowing out. In the measurement, a highly purified oxide semiconductor film was formed in a channel formation region of the transistor. The off-state current of the transistor is measured based on the change in the amount of charge per unit time of the capacitor. As a result, when the voltage between the source and drain electrodes of the transistor is 3V, several It was found that an even lower off-current of 10 yA / μm could be obtained. A transistor including such an oxide semiconductor film has an extremely small off-state current.

[0080] Next, cross-sectional views of the dashed lines A1-A2 and B1-B2 in FIG. 4 shows a configuration including a liquid crystal element 108.

[0081] The cross-sectional structure of the pixel 101 is as follows. A scanning line 107 including the scanning line 107 and a capacitance line 115 provided on the same surface as the scanning line 107 are provided. A gate insulating film 127 is provided on the scanning line 107 and the capacitance line 115. The oxide semiconductor film 111 is provided over a region of the insulating film 127 that overlaps with the scan line 107. The oxide semiconductor film 119 is provided over the gate insulating film 127. A signal line 109 including a source electrode 109a and a drain electrode 109b are provided on the gate insulating film 127. A conductive film 113 functioning as an electrode 113a is provided. An opening 123 reaching the capacitance line 115 is provided, and the conductive film 125 is The gate insulating film 127 is provided in contact with the oxide semiconductor film 119 and in the opening 123. , over the signal line 109, over the oxide semiconductor film 111, over the conductive film 113, over the conductive film 125, and over the oxide semiconductor film 112. an insulating film 129 which functions as a protective insulating film for the transistor 103 over the nitride semiconductor film 119; The insulating film 131 and the insulating film 132 are provided. The insulating film 132 is provided with an opening 117 that reaches the conductive film 113. The substrate 102 is connected to the scanning line 107 and the capacitance line 115. A base insulating film may be provided between the gate insulating film 127 and the second insulating film 128 .

[0082] The pixel 101 also has a liquid crystal element 108. The cross-sectional structure of the liquid crystal element 108 is as follows. The surface of the substrate 150 facing the substrate 102 overlaps with at least the transistor 103. A light-shielding film 152 is provided in the folding region, and a light-transmitting film is provided to cover the light-shielding film 152. A counter electrode 154, which is a conductive film, is provided and covers the light-shielding film 152 and the counter electrode 154. The alignment film 156 is provided on the pixel electrodes 121 and the insulating film 132. A liquid crystal 160 is sandwiched between the substrate 102 and the substrate 150. The liquid crystal 160 is arranged on the alignment film 156 provided on the substrate 150 side and on the substrate 102 side. It is in contact with the alignment film 158 .

[0083] Note that when the semiconductor device according to one embodiment of the present invention is used as a liquid crystal display device, The light source device, the optical members such as a polarizing plate provided on the substrate 102 side and the substrate 150 side, (Optical substrate) A seal material for fixing the substrate 102 and the substrate 150 is required. The above will be discussed later.

[0084] In the capacitor 105 described in this embodiment, one of a pair of electrodes is made of an oxide semiconductor. The other electrode of the pair of electrodes is a pixel electrode 121. The dielectric films provided therebetween are an insulating film 129 , an insulating film 131 , and an insulating film 132 .

[0085] Here, the operating principle of the capacitive element 105 will be described.

[0086] Although the oxide semiconductor film 119 has the same structure as the oxide semiconductor film 111, This functions as one electrode of the pixel electrode 121 as the gate electrode and the insulating film 129 as the gate electrode. The insulating film 131 and the insulating film 132 are used as a gate insulating film, and the capacitance line 115 is used as a source electrode or a drain electrode. As a result, the capacitor element 105 can be regarded as a transistor. This is because the capacitance can be increased to make the oxide semiconductor film 119 conductive. The element 105 can be a MOS capacitor, and the potential applied to the capacitance line 115 can be By controlling the temperature, the oxide semiconductor film 119 is turned on and the oxide semiconductor film 119 is turned on as a capacitive element. In this case, the potential applied to the capacitance line 115 can be The potential of the pixel electrode 121 is set as follows to operate the liquid crystal element 108. The capacitance element 105 (MOS capacitor) is always conductive. In order to keep the pixel electrode in this state, the potential of the capacitance line 115 is always equal to the potential applied to the pixel electrode 121. It is necessary to set the value lower than the threshold voltage of the capacitance element 105 (MOS capacitor). That is, since the oxide semiconductor film 119 and the oxide semiconductor film 111 have the same structure, The potential of the capacitor line 115 should be set lower by the threshold voltage of the transistor 103 or more. In this manner, a channel is formed in the oxide semiconductor film 119. 5 (MOS capacitor) can be made to be constantly conductive.

[0087] The components of the above structure are described in detail below.

[0088] There is no particular restriction on the material of the substrate 102, but at least in the manufacturing process of the semiconductor device, For example, a glass substrate, There are ceramic substrates, plastic substrates, etc., and glass substrates are barium borosilicate Non-alkali glass such as acid glass, aluminoborosilicate glass or aluminosilicate glass It is also preferable to use a non-transparent substrate such as a stainless steel alloy. In this case, it is preferable to provide an insulating film on the surface of the substrate. 2. Quartz substrate, sapphire substrate, single crystal semiconductor substrate, polycrystalline semiconductor substrate, compound semiconductor substrate It is also possible to use a solid substrate, SOI (Silicon On Insulator) substrate, etc. can.

[0089] The scanning line 107 and the capacitance line 115 are preferably formed of a metal film since they carry a large current. Typically, molybdenum (Mo), titanium (Ti), tungsten (W) and tantalum are used. (Ta), Aluminum (Al), Copper (Cu), Chromium (Cr), Neodymium (Nd), A single-layer structure using metal materials such as candium (Sc) or alloy materials mainly composed of these. It is provided in a laminated or laminated structure.

[0090] As an example of the scanning line 107 and the capacitance line 115, aluminum containing silicon is used. Single layer structure, double layer structure with titanium laminated on aluminum, titanium laminated on titanium nitride Two-layer structure with tungsten on titanium nitride, two-layer structure with tungsten on tantalum nitride Two-layer structure with stainless steel laminated, two-layer structure with copper laminated on copper-magnesium-aluminum alloy Structure: Three-layer structure in which copper is layered on titanium nitride and tungsten is formed on top of that There is.

[0091] In addition, the scanning line 107 and the capacitance line 115 are made of a transparent material applicable to the pixel electrode 121. A conductive material having a high conductivity can be used. In the case of a reflective display device, the pixel electrode 121 is made of a conductive material that does not have light-transmitting properties (e.g., In this case, the substrate 102 may be a substrate that does not have light-transmitting properties. It can be used.

[0092] Furthermore, as the material of the scanning line 107 and the capacitance line 115, a metal oxide containing nitrogen, specifically The following oxides are considered: In-Ga-Zn oxides containing nitrogen, In-Sn oxides containing nitrogen, and In-Ga oxides containing nitrogen, In-Zn oxides containing nitrogen, and Sn oxides containing nitrogen Materials that can be used include In-based oxides that contain nitrogen, and metal nitride films (InN, SnN, etc.). These materials have a work function of 5 eV (electron volts) or more. By using a metal oxide as the scanning line 107 (gate electrode 107a), the transistor 1 The threshold voltage of MOSFET 03 can be changed in the positive direction, providing what is called a normally-off characteristic. For example, a transistor using an In-Ga-Zn oxide containing nitrogen can be realized. In this case, the nitrogen concentration is at least higher than that of the oxide semiconductor film 111, specifically, the nitrogen concentration is 7 atomic % or more of an In-Ga-Zn based oxide can be used.

[0093] The scanning lines 107 and the capacitance lines 115 are made of low resistance materials such as aluminum and copper. It is preferable to use aluminum or copper to reduce signal delay and improve display quality. Aluminum has low heat resistance and can form hillocks, whiskers, or Defects due to migration are likely to occur. To prevent aluminum migration, Therefore, aluminum is more susceptible to the presence of other metals that melt faster than aluminum, such as molybdenum, titanium, and tungsten. It is preferable to use a metal material with a high migration resistance. In order to prevent defects caused by ions and the diffusion of copper elements, copper is mixed with molybdenum, titanium, tungsten, etc. It is preferable to laminate a metal material having a higher melting point than copper.

[0094] As shown in FIG. 3 and FIG. 4, the scanning line 107 (gate electrode 107a) is made of an oxide. The semiconductor film 111 can be provided in the region of the scanning line 107 (gate electrode 107a). As shown in FIG. 3, the oxide semiconductor film 111 is preferably provided in a shape similar to that of the scan line 107. In this way, the scanning line of the substrate 102 is preferably provided on the side of the substrate 102. The light (liquid crystal display) irradiated from the opposite surface (the back surface of the substrate 102) to the surface on which the 107 is provided is In a display device, the scanning line 107 blocks light from a light source device such as a backlight. The electrical characteristics (e.g., threshold voltage) of the transistor 103 are prevented from fluctuating or decreasing. This can be done.

[0095] The gate insulating film 127 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, Silicon nitride, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn metal The oxide semiconductor film is provided to have a single layer structure or a stacked layer structure using an insulating material such as an oxide. In order to improve the interface characteristics with 111, at least an oxide semiconductor is formed in the gate insulating film 127. The region in contact with the conductive film 111 is preferably formed of an oxide insulating film.

[0096] In addition, the gate insulating film 127 is formed of an insulating film having a barrier property against oxygen, hydrogen, water, etc. By providing the insulating layer, oxygen contained in the oxide semiconductor film 111 can be diffused to the outside, and oxide can be transferred from the outside to the insulating layer. It is possible to prevent hydrogen, water, and the like from entering the semiconductor film 111. Examples of insulating films having a barrier property include an aluminum oxide film, an aluminum oxynitride film, and an oxide film. gallium oxide film, gallium oxynitride film, yttrium oxide film, yttrium oxynitride film, oxide Examples of the film include hafnium nitride film, hafnium oxynitride film, and silicon nitride film.

[0097] The gate insulating film 127 is made of hafnium silicate (HfSiO x ), nitrogen-containing Hafnium silicate (HfSi x O y N z ), hafnium aluminate with nitrogen HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor 103 can be reduced.

[0098] The gate insulating film 127 preferably has the following laminated structure: A silicon nitride film with few defects is provided as a contact film, and a second silicon nitride film is formed on the first silicon nitride film. As the silicon nitride film, a silicon nitride film with a small amount of hydrogen desorption and ammonia desorption is provided. On the second silicon nitride film, any one of the oxide insulating films listed in the gate insulating film 127 is formed. It is preferable to provide:

[0099] The second silicon nitride film is a film that has a hydrogen molecule desorption rate of 5.0 or more in thermal desorption gas spectrometry. ×10 21 molecules / cm 3 Less than 3 x 10 21 molecules / cm 3 The following is more preferable: 1×10 21 molecules / cm 3 The number of ammonia molecules released is less than 1×10 22 molecule / cm 3 Less than 5 x 10 21 molecules / cm 3 Less than 1×10, more preferably 2 1 molecules / cm 3 It is preferable to use a nitride insulating film having the following properties: The gate insulating film 127 is formed by using the first silicon nitride film and the second silicon nitride film as a part of the gate insulating film 127. The insulating film 127 is a gate insulating film having a small amount of defects and a small amount of hydrogen and ammonia desorbed. As a result, the hydrogen and nitrogen contained in the gate insulating film 127 can be prevented from being depleted. In this case, the amount of oxygen transferred to the oxide semiconductor film 111 can be reduced.

[0100] In a transistor using an oxide semiconductor, If a trap state (also called an interface state) exists in the gate insulating film, the threshold of the transistor The negative shift of the threshold voltage, typically the negative shift of the threshold voltage, and the The subthreshold voltage required to change the drain current by one order of magnitude when the device is turned on. This causes an increase in the shock coefficient (S value). As a result, the electrical characteristics of each transistor For this reason, silicon nitride with fewer defects is used as the gate insulating film. In addition, an oxide insulating film can be provided in a region in contact with the oxide semiconductor film 111. This reduces the negative shift of the threshold voltage and suppresses the increase in the S value. Cut.

[0101] The thickness of the gate insulating film 127 is preferably 5 nm or more and 400 nm or less, more preferably 10 nm or less. The thickness is preferably at most 300 nm, and more preferably at least 50 nm and at most 250 nm.

[0102] The oxide semiconductor film 111 can have an amorphous structure, a single crystal structure, or a polycrystalline structure. The thickness of the oxide semiconductor film 111 is greater than or equal to 1 nm and less than or equal to 100 nm, preferably greater than or equal to 1 nm. m or more and 30 nm or less, more preferably 1 nm or more and 50 nm or less, and even more preferably 3 nm or less The upper limit is 20 nm or less.

[0103] As an oxide semiconductor applicable to the oxide semiconductor film 111, an oxide semiconductor having an energy gap of 2 eV The energy is preferably 2.5 eV or more, and more preferably 3 eV or more. By using an oxide semiconductor with a wide energy gap, the off-state current of the transistor 103 can be reduced. It can be reduced.

[0104] The oxide semiconductor applicable to the oxide semiconductor film 111 is at least indium (In) or It is preferable that the alloy contains zinc (Zn). It is also preferable that the alloy contains both In and Zn. In addition, in order to reduce variation in electrical characteristics of a transistor including the oxide semiconductor, Together with them it is preferable to have one or more stabilizers.

[0105] The stabilizers are gallium (Ga), tin (Sn), hafnium (Hf), and aluminium. Aluminum (Al) or zirconium (Zr). Also, with other stabilizers The lanthanides lanthanum (La), cerium (Ce), and praseodymium (P r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium Er, Thulium, Tm, Ytterbium, Lutetium, etc. do.

[0106] Examples of oxide semiconductors that can be used for the oxide semiconductor film 111 include indium oxide, Tin oxide, zinc oxide, In-Zn oxide, which is an oxide containing two types of metals, Sn-Zn oxides, Al-Zn oxides, Zn-Mg oxides, Sn-Mg oxides, In-Mg In-Ga-Zn oxide, which is an oxide containing three metals, oxide (also written as IGZO), In-Al-Zn oxide, In-Sn-Zn oxide Materials, Sn-Ga-Zn oxides, Al-Ga-Zn oxides, Sn-Al-Zn oxides , In-Hf-Zn oxide, In-Zr-Zn oxide, In-Ti-Zn oxide, In-Sc-Zn oxide, In-Y-Zn oxide, In-La-Zn oxide, In -Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In- Sm-Zn oxide, In-Eu-Zn oxide, In-Gd-Zn oxide, In-T b-Zn oxide, In-Dy-Zn oxide, In-Ho-Zn oxide, In-Er -Zn oxide, In-Tm-Zn oxide, In-Yb-Zn oxide, In-Lu- Zn-based oxides, In-Sn-Ga-Zn-based oxides, which are oxides containing four types of metals, In -Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al-Z n-based oxide, In-Sn-Hf-Zn-based oxide, In-Hf-Al-Zn-based oxide It is possible.

[0107] Here, the In-Ga-Zn oxide is an oxide having In, Ga, and Zn as the main components. The ratio of In, Ga, and Zn does not matter. The metal elements may be included.

[0108] In addition, as an oxide semiconductor, InMO3(ZnO) m Using materials expressed as (m>0) M may be one or more metal elements selected from Ga, Fe, Mn, and Co. or the above-mentioned elements as a stabilizer.

[0109] For example, In:Ga:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), In:Ga: Zn=2:2:1 (=2 / 5:2 / 5:1 / 5), or In:Ga:Zn=3:1: The In-Ga-Zn metal oxide with an atomic ratio of 2 (=1 / 2:1 / 6:1 / 3) is used. Alternatively, In:Sn:Zn=1:1:1 (=1 / 3:1 / 3:1 / 3), In:Sn:Zn=2:1:3(=1 / 3:1 / 6:1 / 2) or In:Sn:Zn In-Sn-Zn metal oxide with an atomic ratio of =2:1:5 (=1 / 4:1 / 8:5 / 8) The atomic ratio of the metal oxide should be calculated by multiplying the atomic ratio by the above amount. Includes a 20% fluctuation in ins.

[0110] However, the present invention is not limited to these, and the semiconductor properties and electrical properties required (field effect mobility, etc.) The ratio of atoms should be selected according to the required semiconductor characteristics (e.g., threshold voltage, etc.). In order to obtain the physical properties, the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, It is preferable to make the interatomic distance, density, etc. appropriate. For example, In-Sn-Zn system Metal oxides are relatively easy to obtain high field effect mobility. -Zn-based metal oxides can also have improved field-effect mobility by reducing the bulk defect density. It can be done.

[0111] The oxide semiconductor film 119 is formed using an oxide semiconductor that can be used for the oxide semiconductor film 111. The oxide semiconductor film 111 and the oxide semiconductor film 119 can be formed. Therefore, the oxide semiconductor film 119 can be formed by the oxide semiconductor film 111. Contains the metallic elements of the conductor.

[0112] The signal line 109, the conductive film 113, and the oxide semiconductor film 119 of the capacitor 105 and the capacitor line 1 The conductive film 125 electrically connecting the scanning line 107 and the capacitance line 115 can be applied to the scanning line 107 and the capacitance line 115. The insulating layer 110 may have a single layer structure or a laminate structure using the material.

[0113] An insulating film that functions as a protective insulating film for the transistor 103 and a dielectric film for the capacitor 105 The film 129, the insulating film 131, and the insulating film 132 are made of a material that can be used for the gate insulating film 127. In particular, the insulating films 129 and 131 are oxide insulating films. It is preferable that the insulating film 132 is a nitride insulating film. Impurities such as hydrogen and water are introduced from the outside into the transistor 103 (particularly the oxide semiconductor film 111). The insulating film 129 may not be provided.

[0114] One or both of the insulating films 129 and 131 may contain oxygen having a stoichiometric composition. It is preferable that the oxide insulating film contains more oxygen than the oxide insulating film. The oxygen elimination from the semiconductor film 111 is prevented, and the oxygen contained in the oxygen excess region is prevented. The oxygen vacancies can be filled by transferring the oxygen to the oxide semiconductor film 111. For example, The amount of released oxygen molecules measured by thermal desorption spectrometry (hereinafter referred to as TDS analysis) , 1.0×10 18 molecules / cm 3 By using the oxide insulating film described above, the oxide semiconductor film 1 The insulating film 129 and the insulating film 131 can fill oxygen vacancies in the insulating film 131. A region containing more oxygen than the stoichiometric composition in one or both of the above (oxygen excess region) The oxide insulating film may be an oxide semiconductor film having at least the oxide semiconductor film 111 and The presence of an oxygen excess region in the overlapping region reduces oxygen release from the oxide semiconductor film 111. In addition, the oxygen contained in the oxygen excess region is moved to the oxide semiconductor film 111. This makes it possible to compensate for oxygen deficiencies.

[0115] The insulating film 131 is an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. In this case, the insulating film 129 is preferably an oxide insulating film that transmits oxygen. In the insulating film 129, all oxygen that enters the insulating film 129 from the outside passes through the insulating film 129 and migrates. Some oxygen does not move and remains in the insulating film 129. Some oxygen migrates from the insulating film 129 to the outside. It is preferable that the insulating oxide film has a large coefficient.

[0116] In addition, the insulating film 129 is in contact with the oxide semiconductor film 111 and therefore allows only oxygen to pass through. It is preferable that the insulating film be an oxide insulating film having a low interface state with the oxide semiconductor film 111. For example, the insulating film 129 is an oxide insulating film having a lower defect density than the insulating film 131. Specifically, the g value measured by electron spin resonance is preferably 2.001 (E'-ce nter) has a spin density of 3.0×10 17 spins / cm 3 Below 5.0, preferably ×10 16 spins / cm 3 The oxide insulating film is shown below. The spin density of g=2.001 is due to the presence of dangling bonds in the insulating film 129. corresponds to the quantity.

[0117] The thickness of the insulating film 129 is 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less. The thickness of the insulating film 131 can be set to 10 nm or less and preferably 30 nm or less. The thickness can be set to 30 nm or more and 500 nm or less, preferably 150 nm or more and 400 nm or less. Cut.

[0118] In addition, the insulating film 129 provided over the oxide semiconductor film 111 is The insulating film 131 is an oxide insulating film having a low interface state with the oxide semiconductor film 111. An oxide insulating film including an excess region or an oxide film including more oxygen than the oxygen that satisfies the stoichiometric composition By using the insulating film, oxygen can be easily supplied to the oxide semiconductor film 111. The desorption of oxygen from the semiconductor film 111 is prevented, and the oxygen contained in the insulating film 131 is oxidized. The oxygen vacancies in the oxide semiconductor film 111 are compensated for by transferring the oxygen vacancies to the oxide semiconductor film 111. As a result, the transistor 103 is prevented from becoming a normally-on transistor. At the same time, the capacitance element 105 (MOS capacitor) is always in a conductive state. In this way, since the potential applied to the capacitance line 115 can be controlled, the electrical The characteristics and reliability can be improved.

[0119] Note that one or both of the insulating film 129 and the insulating film 131 may be formed using silicon oxynitride or silicon oxynitride. When using an oxide insulating film containing nitrogen, such as silicon oxide, the nitrogen concentration obtained by SIMS is SIMS detection limit above 3×10 20 atoms / cm 3 Less than 1 x 10 18 a toms / cm 3 More than 1×10 20 atoms / cm 3 It is preferable to set the following: In this way, nitrogen is transferred to the oxide semiconductor film 111 included in the transistor 103. In addition, by doing so, the amount of the nitrogen-containing oxide insulating film itself can be reduced. The amount of defects can be reduced.

[0120] When the insulating film 132 is a nitride insulating film, one or both of the insulating film 129 and the insulating film 131 It is preferable that the insulating film has a barrier property against nitrogen. For example, a dense oxide insulating film is preferable. By forming a film, it is possible to provide a barrier against nitrogen. Specifically, at 25° C. Oxide insulating film with an etching rate of 10 nm / min or less when using 0.5% by weight hydrofluoric acid. A membrane is preferred.

[0121] The insulating film 132 can be a nitride insulating film with a low hydrogen content. For example, the insulating film is one that has a hydrogen molecule release rate of 5.0× 10 21 atoms / cm 3 less than 3.0×10 21 atoms / cm 3 and more preferably less than 1.0×10 21 atoms / cm 3 Less than nitriding insulation The velum.

[0122] The insulating film 132 has a thickness capable of suppressing the intrusion of impurities such as hydrogen and water from the outside. For example, the thickness is 50 nm or more and 200 nm or less, preferably 50 nm or more and 150 nm or less. The thickness can be set to 50 nm or less and more preferably 100 nm or less.

[0123] In addition, by using a nitride insulating film as the insulating film 132 provided over the insulating film 131, Impurities such as hydrogen and water from the outside penetrate into the oxide semiconductor film 111 and the oxide semiconductor film 119. Furthermore, the insulating film 132 can be made of a nitride insulating film having a low hydrogen content. By providing the film, the electric field of the transistor 103 and the capacitor element 105 (MOS capacitor) Fluctuations in characteristics can be suppressed.

[0124] The pixel electrode 121 is made of indium tin oxide, indium oxide containing tungsten oxide, Indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, acid Indium tin oxide with titanium dioxide, indium zinc oxide, indium with silicon dioxide The insulating layer 11 is formed of a light-transmitting conductive material such as zinc tin oxide.

[0125] The substrate 150 may be any base material that can be applied to the substrate 102 .

[0126] The light-shielding film 152 is also called a black matrix, and serves as a backlight in a liquid crystal display device. The suppression of light leakage from light source devices such as those mentioned above, and the suppression of color leakage that occurs when using color filters to display colors The light-shielding film 152 is provided to suppress a decrease in contrast due to color mixing. For example, a metal or a face can be used as a light-shielding material. The light-shielding film 152 may be an organic resin containing a material such as a material for preventing the transistor of the pixel 101 from being damaged. In addition to the above 103, a scanning line driver circuit 104, a signal line driver circuit 106 (see FIG. 1A), etc. It may be provided in a region other than the pixel portion 100 .

[0127] In addition, a colored film having a function of transmitting light of a predetermined wavelength is provided between adjacent light-shielding films 152. Furthermore, an overcoat may be provided between the light-shielding film 152 and the colored film and the counter electrode 154. A coating film may be provided.

[0128] The counter electrode 154 is provided by appropriately using a material that can be applied to the pixel electrode 121 .

[0129] The alignment film 156 and the alignment film 158 are provided using a commonly used material such as polyamide. It is possible.

[0130] The liquid crystal 160 may be a thermotropic liquid crystal, a low molecular weight liquid crystal, a polymer liquid crystal, a polymer dispersed liquid crystal, Ferroelectric liquid crystals, antiferroelectric liquid crystals, etc. can be used. These liquid crystal materials can be used under certain conditions. Therefore, cholesteric phase, smectic phase, cubic phase, chiral nematic phase, etc. It shows the directions, etc.

[0131] The liquid crystal 160 may be a liquid crystal that exhibits a blue phase without using an alignment film. is one of the liquid crystal phases, and when the temperature of cholesteric liquid crystal is increased, the cholesteric phase changes to the equilibrium phase. This is the phase that appears just before the transition to the lattice phase. The blue phase appears only in a narrow temperature range. In order to improve the temperature range, a liquid crystal composition containing a chiral agent is used. The organic resin is composed of an organic resin, and the organic resin contains hydrogen or water, etc. There is a risk that the electrical characteristics of the transistors in such semiconductor devices may be degraded. By using a blue phase as the semiconductor layer 160, it is possible to obtain a semiconductor layer according to one embodiment of the present invention without using an organic resin. Thus, a semiconductor device with high reliability can be obtained.

[0132] The liquid crystal element 108 is configured to switch between the pixel electrodes 12 according to the display mode of the liquid crystal element 108. The shape of the electrode 1 and the counter electrode 154 may be changed, and protrusions called ribs may be formed. It can be changed.

[0133] In the semiconductor device according to one embodiment of the present invention, the polarization axis of the polarizing member (polarizing substrate) is blocked. The display mode of the semiconductor device is controlled by applying a voltage. When the liquid crystal element 108 is not in the normal state, the liquid crystal element 108 does not transmit light from a light source device such as a backlight. By providing a leak-black, the area in which the light-shielding film 152 of the pixel 101 is provided can be reduced or eliminated. As a result, pixel densities of over 200ppi and even over 300ppi can be achieved. Even in cases where each pixel is small, such as in high-resolution display devices, the aperture ratio can be improved. In addition, the aperture ratio can be further improved by using a light-transmitting capacitor element. Cut.

[0134] <Method for manufacturing semiconductor device> Next, a method for manufacturing the above semiconductor device will be described with reference to FIGS.

[0135] In this embodiment, the scanning line driver of the semiconductor device is provided on the same substrate as the pixel section 100. The dual gate transistor 15 included in the operation circuit 104 is formed by a dual The process for forming the dual gate transistor 15 is also described. The gate electrode 17a of the transistor 15 is formed of the same material as the gate electrode 107a of the transistor 103. The gate insulating film 12 of the dual gate transistor 15 is It is formed of the same material as the gate insulating film 127. Oxidation of the dual gate transistor 15 The oxide semiconductor film 11 is formed of the same material as the oxide semiconductor film 111 of the transistor 103. The source electrode 19a and the drain electrode 13a of the dual gate transistor 15 are The source electrode 109a and the drain electrode 113a of the transistor 103 are formed of the same material. The insulating films 29, 31, and 32 of the dual gate transistor 15 are These are the insulating films 129, 131, and 132 of the transistor 103, respectively. It is formed of the same material as

[0136] First, the scanning line 107 including the gate electrode 107a and the capacitance line 115 are formed on the substrate 102. The insulating film 127 is formed later so as to cover the scanning line 107 and the capacitance line 115. An insulating film 126 is formed, and the oxide semiconductor film 11 is formed in a region of the insulating film 126 that overlaps with the scanning line 107. 1, and then an oxide semiconductor film 11 is formed so as to overlap an area where a pixel electrode 121 is to be formed later. 9 is formed on the insulating film 126 (see FIG. 5(A)).

[0137] By carrying out this process, the gate electrode 17a of the dual gate transistor 15, The gate insulating film 12 and the oxide semiconductor film 11 can be formed (see FIG. 5B). .

[0138] The scanning line 107 and the capacitance line 115 are formed of a conductive film using the above-listed materials. The conductive film can be formed by forming a mask on the conductive film and processing the conductive film using the mask. The film is formed using various deposition methods such as vapor deposition, CVD, sputtering, and spin coating. The thickness of the conductive film is not particularly limited, and the formation time and the desired resistance can be selected. The mask can be determined by taking into consideration the rate of light emission, etc. The conductive film can be processed by dry etching. This can be achieved by either or both of dry etching and wet etching.

[0139] The insulating film 126 is formed by a CVD method or a sputtering method using a material that can be used for the gate insulating film 127. The insulating film can be formed by using various film formation methods such as a deposition method.

[0140] In addition, when gallium oxide is used for the gate insulating film 127, MOCVD (Metal Using the Organic Chemical Vapor Deposition method An insulating film 126 can be formed.

[0141] The oxide semiconductor film 111 and the oxide semiconductor film 119 are formed using any of the oxide semiconductors listed above. an oxide semiconductor film is formed by etching the oxide semiconductor film using the mask; The oxide semiconductor film can be formed by a sputtering method, a coating method, or a It can be formed by using a pulsed laser deposition method, a laser ablation method, or the like. By using a printing method, the oxide semiconductor film 111 and the oxide semiconductor film 119 are isolated from each other. The oxide semiconductor film can be formed directly over the insulating film 126 by a sputtering method. When forming a plasma, the power supply for generating the plasma can be an RF power supply or an AC power supply. Alternatively, a DC power supply device or the like can be used as appropriate. The sputtering gas is a rare gas (represented by Typically, an argon atmosphere, an oxygen atmosphere, or a mixture of rare gas and oxygen is used as appropriate. In the case of a mixture of rare gas and oxygen, it is preferable to increase the gas ratio of oxygen to rare gas. The target may be appropriately selected depending on the composition of the oxide semiconductor film to be formed. The mask is, for example, a resist mask formed by a photolithography process. The oxide semiconductor film can be processed by dry etching and wet etching. This can be done by either etching or both. The etching conditions (etching gas, etching solution, etching time, etc.) are adjusted according to the material. Set the temperature etc. appropriately.

[0142] After the oxide semiconductor film 111 and the oxide semiconductor film 119 are formed, heat treatment is performed. The semiconductor film 111 and the oxide semiconductor film 119 are preferably dehydrogenated or dehydrated. The temperature of the heat treatment is typically 150° C. or higher and lower than the substrate distortion point, preferably 200° C. The heating temperature is preferably from 300° C. to 450° C., more preferably from 300° C. to 450° C. The treatment is performed on the oxide semiconductor film before it is processed into the oxide semiconductor film 111 and the oxide semiconductor film 119. This is also possible.

[0143] In this heat treatment, the heat treatment device is not limited to an electric furnace, and a medium such as heated gas may be used. The heat source may be a device that heats the workpiece by thermal conduction or thermal radiation from the workpiece. For example, GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (La Rapid Thermal Anneal (RTA) equipment The LRTA device is a halogen lamp. lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high pressure sodium The treated object is irradiated with light (electromagnetic waves) emitted from lamps such as mercury lamps and high-pressure mercury lamps. The GRTA device is a device that uses high-temperature gas to perform heat treatment. do.

[0144] The heat treatment is carried out in the presence of nitrogen, oxygen, or ultra-dry air (with a water content of 20 ppm or less, preferably 1 ppm or less, preferably 10 ppb or less, air), or rare gas (argon, helium, etc. In addition, the above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be mixed with hydrogen, water, etc. It is preferable that the material does not contain the above. After heating in an inert gas atmosphere, the material is heated in an oxygen atmosphere. The treatment time is set to 3 minutes to 24 hours.

[0145] In addition, between the substrate 102 and the scanning line 107, the capacitance line 115, and the gate insulating film 127 In the case where a base insulating film is provided, the base insulating film may be made of silicon oxide, silicon oxynitride, or nitride. Silicon oxide, silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, The insulating film may be formed of aluminum oxide, aluminum oxynitride, or the like. As examples, silicon nitride, gallium oxide, hafnium oxide, yttrium oxide, and aluminum oxide By forming the ion implantation layer using a material such as tungsten, impurities, typically alkali metals, water, and water, can be removed from the substrate 102. The base insulating film can be formed by sputtering. The film can be formed by using a coating method or a CVD method.

[0146] Next, an opening 123 is formed in the insulating film 126 to reach the capacitance line 115, and a gate insulating film 127 is formed. After forming the electrodes, the signal line 109 including the source electrode 109a and the drain electrode 113a are formed. The conductive film 113 electrically connects the oxide semiconductor film 119 to the capacitor line 115. A conductive film 125 is formed (see FIG. 5(B)).

[0147] By carrying out this process, the source electrode 19a of the dual gate transistor 15, A drain electrode 13a and a conductive film 16 can be formed (see FIG. 2(B)). When forming the opening 123, an opening reaching the capacitance line 115 is formed in the gate insulating film 12. The conductive film 16 can be formed in contact with the capacitance line 115 .

[0148] The opening 123 is formed so that a part of the region of the insulating film 126 overlapping the capacitance line 115 is exposed. The mask can be formed and processed using the mask. This processing can be performed in the same manner as the scanning line 107 and the capacitance line 115.

[0149] The signal line 109, the conductive film 113 and the conductive film 125 are A conductive film is formed using a material applicable to the conductive film 125, and a mask is formed on the conductive film; The mask and the processing can be performed by scanning lines. This can be done in the same manner as 107 and the capacitance line 115.

[0150] Next, the oxide semiconductor film 111, the oxide semiconductor film 119, the signal line 109, the conductive film 113, An insulating film 128 is formed on the conductive film 125 and the gate insulating film 127. An insulating film 130 is formed, and an insulating film 133 is formed on the insulating film 130 (see FIG. 6(A)). It is preferable that the insulating films 128, 130, and 133 be formed in succession. In this way, the interfaces of the insulating film 128, the insulating film 130, and the insulating film 133 This can prevent impurities from being mixed into the

[0151] The insulating film 128 is formed by depositing a material applicable to the insulating film 129 using a CVD method or a sputtering method. The insulating film 130 can be formed by using various film formation methods such as a deposition method. The insulating film 133 can be formed using a material applicable to the insulating film 132. It can be formed using:

[0152] When an oxide insulating film having a low interface state with the oxide semiconductor film 111 is used as the insulating film 129, In this case, the insulating film 128 can be formed under the following conditions. As an example, a case where a silicon oxide film or a silicon oxynitride film is formed will be described. The formation conditions were as follows: the substrate was placed in the evacuated processing chamber of the plasma CVD apparatus and heated to 180°C. The temperature is kept at 400°C or higher, and more preferably 200°C or higher and 370°C or lower. The pressure in the processing chamber is increased to 20° C. by introducing a deposition gas containing silicon and an oxidizing gas. The pressure in the processing chamber is set to 40 Pa or more and 250 Pa or less, and more preferably 40 Pa or more and 200 Pa or less. This is a condition for supplying high frequency power to the electrodes provided in the

[0153] Representative examples of silicon-containing deposition gases include silane, disilane, trisilane, and fluoride. Silane, etc. Oxidizing gases include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. There is.

[0154] In addition, by increasing the amount of oxidizing gas to 100 times or more the amount of deposition gas containing silicon, It is possible to reduce the hydrogen content in the insulating film 128 (insulating film 129) and Therefore, the number of dangling bonds contained in the insulating film 128 (insulating film 129) can be reduced. The oxygen that moves from the insulating film 130 (insulating film 131) moves to the insulating film 128 (insulating film 129). Since the insulating film 128 (insulating film 128) may be captured by the dangling bonds contained therein, 129) is reduced, at least the oxide semiconductor film In this way, oxygen contained in the insulating film 130 (insulating film 131) can be efficiently transferred to the insulating film 111. In this way, oxygen vacancies in the oxide semiconductor film 111 can be filled. The amount of hydrogen entering the oxide semiconductor film 111 can be reduced. It is possible to reduce the oxygen vacancies that occur.

[0155] The insulating film 131 is an oxide insulating film including the oxygen excess region or an oxygen insulating film having a stoichiometric composition. When the insulating film 130 is an oxide insulating film containing more oxygen than Note that a silicon oxide film or a silicon oxynitride film can be used as the oxide insulating film here. The formation conditions are as follows: The substrate placed in the processing chamber is heated to 180° C. or higher and 260° C. or lower, more preferably 180° C. or lower. The temperature was kept at 230°C or higher, and the raw material gas was introduced into the treatment chamber to reduce the pressure in the treatment chamber to 10 The pressure is set to 0 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less. 0.17W / cm2 at the electrode installed in the room 2 More than 0.5W / cm 2 The following is more preferable: is 0.25W / cm 2 More than 0.35W / cm 2 The aim is to supply the following high frequency power: .

[0156] The source gas for the insulating film 130 may be a source gas that can be used for forming the insulating film 128. Cut.

[0157] The conditions for forming the insulating film 130 are as follows: high frequency power of the above power density in a processing chamber at the above pressure. By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas progresses, the oxygen content in the insulating film 130 becomes lower than the stoichiometric composition. In addition, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is Therefore, it is possible to remove some of the oxygen in the film by the heat treatment in the subsequent process. As a result, the mixture contains more oxygen than satisfies the stoichiometric composition, and the oxygen is released by heating. In addition, the oxide semiconductor film 111 can be formed by removing a part of the oxide semiconductor film 111. Therefore, in the process of forming the insulating film 130, the insulating film 128 is The oxide semiconductor film 128 serves as a protective film for the oxide semiconductor film 111. Even if the insulating film 130 is formed using this material, damage to the oxide semiconductor film 111 can be suppressed.

[0158] In addition, by increasing the thickness of the insulating film 130, the amount of oxygen desorbed by heating is increased. Therefore, it is preferable that the insulating film 130 is thicker than the insulating film 128. By providing the insulating film 128, it is possible to improve the coverage even when the insulating film 130 is provided thick. can.

[0159] The insulating film 132 can be formed by a sputtering method, a CVD method, or the like. In the case where the insulating film 132 is formed using a nitride insulating film with a low hydrogen content, the insulating film 132 is formed under the following conditions: In this embodiment, a silicon nitride film is used as the nitride insulating film. The formation conditions are as follows: The substrate is heated at a temperature of 80° C. to 400° C., preferably 200° C. to 370° C. The pressure in the processing chamber is maintained at 100 Pa or more and 250 Pa or less by introducing the raw material gas into the processing chamber. a or less, preferably 100 Pa or more and 200 Pa or less, and an electrode provided in the treatment chamber The object of the present invention is to supply high frequency power to the

[0160] The source gas for the insulating film 132 is a deposition gas containing silicon, nitrogen, and ammonia. Representative examples of deposition gases containing silicon include silane, disilane, etc. The nitrogen flow rate is about 10 times that of ammonia. The ratio is preferably 5 to 50 times, more preferably 10 to 50 times. By using ammonia as a source gas, the deposition gas containing silicon and nitrogen are decomposed. This is because ammonia can be heated by plasma energy or thermal energy. The energy generated by dissociation breaks down the bonds and This is because it contributes to breaking down the bonds of nitrogen molecules. The silicon nitride film is formed to prevent the intrusion of impurities such as hydrogen and water from the outside. It is possible.

[0161] After forming at least the insulating film 130, a heat treatment is performed to form the insulating film 128 or the insulating film 13 At least oxygen contained in the oxide semiconductor film 111 is moved to the oxide semiconductor film 111. Note that the heat treatment is preferably performed to fill oxygen vacancies in the oxide semiconductor film 111 and the oxide semiconductor film 112. The heat treatment for dehydrogenating or dehydrating the oxide semiconductor film 119 is performed as appropriate with reference to the details of the heat treatment. It is possible.

[0162] Next, the insulating film 128, the insulating film 130, and the insulating film 133 are Then, an opening 117 is formed down to the conductive film 113, and the insulating film 129, the insulating film 131 and the insulating film 1 32, and a pixel electrode 121 is formed on the opening 117 and the insulating film 132 (FIG. 6(B)). reference).

[0163] By carrying out this process, the insulating film 29 of the dual gate transistor 15 and the insulating film 31, an insulating film 32, an opening 94, and a wiring 92 can be formed (see FIG. 2(B)). By this process, the capacitance line 115 and the dual gate transistor included in the scanning line driving circuit 104 are The wiring 92 including the back gate electrode of the transistor 15 is electrically connected through the conductive film 16. will be done.

[0164] The opening 117 can be formed in the same manner as the opening 123. A conductive film is formed using the above-listed materials in contact with the conductive film 113 through the opening 117, The conductive film can be formed by forming a mask over the conductive film and processing the conductive film using the mask. The mask and processing can be performed in the same manner as for the scanning line 107 and the capacitance line 115. can.

[0165] Next, an alignment film 158 is formed on the insulating film 132 and the pixel electrode 121, and then, on the substrate 150 A light-shielding film 152 is formed. A counter electrode 154 is formed so as to cover the light-shielding film 152. An alignment film 156 is formed on the counter electrode 154. A liquid crystal 160 is provided on the alignment film 158 to adjust the alignment. The substrate 150 is provided on the substrate 102 so that the film 156 contacts the liquid crystal 160. The substrate 102 and the substrate 150 are fixed together by a bonding agent (not shown).

[0166] The alignment film 156 and the alignment film 158 are formed by using the above-mentioned materials by a method such as spin coating or printing. The film can be formed by appropriately using various film forming methods.

[0167] The light-shielding film 152 is formed by sputtering using the above-listed materials, and is then removed using a mask. In addition, when a resin is used as the light shielding film 152, the light shielding film 152 can be formed by processing the resin. It can be formed by a lithography process.

[0168] The counter electrode 154 is formed by using a material that can be applied to the pixel electrode 121 and is deposited by a CVD method or a sputtering method. The film can be formed by using various film formation methods such as a coating method.

[0169] The liquid crystal 160 can be directly applied onto the alignment film 158 by a dispenser method (dropping method). After the substrate 102 and the substrate 150 are bonded together, the liquid crystal 16 is applied by using capillary action or the like. In addition, the liquid crystal 160 is provided with an alignment film 156 to facilitate alignment. In addition, it is preferable to perform a rubbing process on the alignment film 158 .

[0170] Through the above steps, a semiconductor device according to one embodiment of the present invention can be manufactured (see FIG. 4). see).

[0171] <Variation 1> In the semiconductor device according to one embodiment of the present invention, a semiconductor The connection between the semiconductor film (specifically, the oxide semiconductor film) and the capacitance line can be changed as appropriate. For example, in order to further increase the aperture ratio, a structure in which the semiconductor film is in direct contact with the capacitance line without the conductive film is used. It can be said that:

[0172] In the following drawings showing the modified examples, the substrate 150, the light-shielding film 152, the counter electrode 154, the alignment film 156, the alignment film 158, and the liquid crystal 160 are omitted. .

[0173] This structure will be described with reference to Figures 7 and 8. Figure 7 is a top view of a pixel 141 having this structure. 8 is a cross-sectional view taken along dashed lines A1-A2 and B1-B2 in FIG. Here, the capacitance element 145, which is different from the capacitance element 105 described with reference to FIGS. 7 and 8, other configurations are the same as those in FIGS. Same here.

[0174] In the pixel 141, the oxide semiconductor film 11 functions as one electrode of the capacitor 145. 9 is in direct contact with the capacitance line 115 at the opening 143. In this way, the oxide semiconductor film 119 and the capacitor line 115 are in direct contact with each other without the conductive film 125 therebetween. Since the conductive film 125 that serves as a light shielding film is not provided, the aperture ratio of the pixel 141 can be further increased. can be done.

[0175] In the semiconductor device according to one embodiment of the present invention, a semiconductor film is in direct contact with a capacitance line. In the method, no opening is provided in the gate insulating film, and a region is provided in which a part of the capacitance line and the substrate are exposed. 9 is a top view of a pixel 101 having this structure, and FIG. 1 is a cross-sectional view taken along dashed line A1-A2 and dashed dotted line B1-B2.

[0176] 9 and 10, in the pixel 101 of this structure, a part of the gate insulating film 127 is removed. A part of each of the capacitor line 115 and the substrate 102 is exposed. In this region, the capacitor line 115 and the oxide semiconductor film 119 are in direct contact with each other. This makes it possible to increase the area where the capacitor line 115 and the oxide semiconductor film 119 are in contact with each other. Therefore, the aperture ratio can be increased and the capacitance element 146 can be easily brought into a conductive state. It is possible.

[0177] <Variation 2> In the semiconductor device according to one embodiment of the present invention, The conductive film that electrically connects the semiconductor film (specifically, the oxide semiconductor film) and the capacitance line is appropriately For example, the conductive film can be modified to increase the conductivity of the semiconductor film. A specific example of this structure is shown in FIG. 11 and 12. Here, the conductive film 12 described with reference to FIG. Only the conductive film 167, which is different from that in FIG. 5, will be described. 12(A) is a cross-sectional view taken along dashed lines A1-A2 and B1-B2 in FIG. 12B is a cross-sectional view taken along dashed line D1-D2 in FIG.

[0178] In the pixel 161, the conductive film 167 is in contact with the outer periphery of the oxide semiconductor film 119. The conductive film 1 is provided in contact with the capacitance line 115 through the opening 123 (see FIG. 11). 67 denotes a signal line 109 including a source electrode 109a of the transistor 103 and a transistor The conductive film 113 that functions as the drain electrode 113a (not shown) of the component 103 is formed by the same process. Since the insulating layer 14 is formed in a loop shape, it may have a light-shielding effect. stomach.

[0179] As shown in FIG. 12(A) and FIG. 12(B), in a pixel 161 of this configuration, a conductive film 1 The insulating film 67 is provided to cover an end portion of the oxide semiconductor film 119 of the capacitor 105. Other configurations of the pixel 161 in FIGS. 11 and 12 are similar to those in FIGS.

[0180] In addition, in the configuration shown in FIG. 11 and FIG. 12, the conductive film 167 is formed in a loop shape. However, the entire part of the conductive film 167 that is in contact with the oxide semiconductor film 119 is the capacitance line 11 5. In other words, it is not necessary to electrically connect the conductive film 167 to the conductive film 167. The conductive film 167 is provided in contact with the oxide semiconductor film 119. It may be possible.

[0181] <Modification 3> In the semiconductor device according to one embodiment of the present invention, The connection between the semiconductor film (specifically, the oxide semiconductor film) and the capacitance line can be appropriately changed. A specific example of this structure will be described with reference to Figs. 13 and 14. 4. The oxide semiconductor film 119 and the capacitance line 115 are different from those described with reference to FIG. Only the capacitor line 77 and the capacitor line 175 will be described. The line 175 is provided so as to extend in a direction parallel to the signal line 109. The capacitor line 175 is electrically connected to the signal line driving circuit 106 (see FIG. 1(A)). .

[0182] The capacitance element 173 is connected to a capacitance line 175 extending in a direction parallel to the signal line 109. The capacitor 173 is formed by utilizing the formation process of the oxide semiconductor film 111. A light-transmitting oxide semiconductor film 177, a light-transmitting pixel electrode 121, and a dielectric film The insulating film (not shown in FIG. 13) included in the transistor 103 has a light-transmitting property. That is, the capacitor 173 has a light-transmitting property.

[0183] Next, cross-sectional views taken along dashed lines A1-A2 and B1-B2 in FIG. Shown in Figure 14.

[0184] In the capacitor 173, one of a pair of electrodes is an oxide semiconductor film 177. The other electrode of the pair of electrodes is a pixel electrode 121, and a conductive layer is provided between the pair of electrodes. The conductive films are an insulating film 129 , an insulating film 131 , and an insulating film 132 .

[0185] The capacitance line 175 can be formed by utilizing the process for forming the signal line 109 and the conductive film 113. By providing the capacitance line 175 in contact with the oxide semiconductor film 177, It is possible to increase the contact area between the oxide semiconductor film 177 and the capacitor line 175. The electrode of the capacitor 173 can easily function as one electrode of the capacitor 173.

[0186] 13, the pixel 171 has a length greater than the length of the signal line 109 in the extension direction of the scanning line 107. 15, the pixel 172 has a shape in which the length in the extension direction is longer than the length in the extension direction. The length of the scanning line 107 in the extension direction is longer than the length of the scanning line 109 in the extension direction. In addition, the capacitance line 176 may be provided so as to extend in a direction parallel to the signal line 109. The signal line 109 and the capacitance line 176 are electrically connected to the signal line driver circuit 106 (see FIG. 1A). Connected.

[0187] The capacitance element 174 is connected to a capacitance line 176 that is provided extending in a direction parallel to the signal line 109. The capacitor 174 is formed by utilizing the formation process of the oxide semiconductor film 111. A light-transmitting oxide semiconductor film 178, a light-transmitting pixel electrode 121, and a dielectric film The transistor 103 includes a light-transmitting insulating film (not shown in FIG. 15). That is, the capacitor 174 has a light-transmitting property.

[0188] Next, cross-sectional views taken along dashed lines A1-A2 and B1-B2 in FIG. Shown in Figure 16.

[0189] The capacitor 174 has a pair of electrodes, one of which is an oxide semiconductor film 178. The other electrode is a pixel electrode 121, and a dielectric film is provided between the pair of electrodes. are the insulating film 129, the insulating film 131, and the insulating film 132.

[0190] The capacitance line 176 can be formed by utilizing the process for forming the signal line 109 and the conductive film 113. By providing the capacitance line 176 in contact with the oxide semiconductor film 178, It is possible to increase the contact area between the pixel 172 and the capacitance line 176. In this case, the length of the scanning line 107 in the extension direction is longer than the length of the signal line 109 in the extension direction. 13. Therefore, compared with the pixel 171 shown in FIG. The overlapping area can be reduced, and the aperture ratio can be improved.

[0191] <Variation 4> In addition, in the above-mentioned pixels 101, 141, 161, 171, and 172, , a parasitic capacitance occurring between the pixel electrode 121 and the conductive film 113, or a parasitic capacitance occurring between the pixel electrode 121 and the conductive film In order to reduce the parasitic capacitance between the MOSFET 125 and the MOSFET 125, the parasitic capacitance is An organic insulating film 134 can be provided in the region where the amount of the organic EL element is generated. The configuration other than the insulating film 134 is the same as that in FIG. 4. Only the organic insulating film 134 will be described.

[0192] The organic insulating film 134 may be made of a photosensitive or non-photosensitive organic resin. For example, acrylic resin may be used. resin, benzocyclobutene resin, epoxy resin, siloxane resin, etc. The organic insulating film 134 may be made of polyamide.

[0193] The organic insulating film 134 is an organic resin film formed using the above-listed materials. The organic insulating film 134 can be formed by processing a photosensitive organic resin. This eliminates the need for a resist mask when forming the organic insulating film 134, simplifying the process. Therefore, the method for forming the organic insulating film is not particularly limited, and can be appropriately selected depending on the material to be used. For example, CVD, sputtering, spin coating, dip, spray Applying coating, droplet ejection method (inkjet method), screen printing, offset printing, etc. It is possible.

[0194] Generally, organic resin contains a large amount of hydrogen and water, and the organic resin is When the organic resin is provided on the oxide semiconductor film 111, hydrogen and water contained in the organic resin are absorbed by the transistor. The oxide semiconductor film 111 is diffused into the transistor 103 (particularly the oxide semiconductor film 111), and the electrical characteristics of the transistor 103 are deteriorated. Therefore, at least the insulating film 132 overlapping with the oxide semiconductor film 111 In other words, it is preferable not to provide the organic insulating film 134 on the oxide semiconductor layer. It is preferable to remove the organic resin film on the region overlapping the conductive film 111 in advance.

[0195] A top view of the pixel 101 shown in FIG. 17 is shown in FIG. 18. The cross-sectional view of FIG. 17 is taken at a point Corresponding to the cross section between dashed lines A1-A2, dashed lines B1-B2, and dashed lines C1-C2 In FIG. 18, the organic insulating film 134 is not shown for clarity, but is indicated by a two-dot chain line. The region within is a region where the organic insulating film 134 is not provided.

[0196] <Variation 5> In the semiconductor device according to one embodiment of the present invention, The wire can be a semiconductor film (specifically, an oxide semiconductor film). Note that the oxide semiconductor film 119 and the capacitor line 115 described with reference to FIG. Only the oxide semiconductor film 198, which is different from the pixel 19, will be described. 6, an oxide semiconductor film 198 is provided which serves as one electrode of a capacitor 197 and a capacitor line. In the oxide semiconductor film 198, a region extending in a direction parallel to the signal line 109 In the oxide semiconductor film 198, the pixel electrode 1 The region overlapping with the oxide semiconductor 21 functions as one electrode of the capacitor 197. When an electric field is applied to the film 198, the maximum depletion layer width becomes extremely wide, and the film 198 becomes conductive.

[0197] The oxide semiconductor film 198 is an oxide semiconductor film of the transistor 103 provided in the pixel 196. It can be formed by utilizing the process for forming the conductive film 111.

[0198] The oxide semiconductor film 198 is formed so as to overlap with the scan line 107 in each of the pixels 196. In other words, one oxide semiconductor film can be provided for all the pixels 196 in one row. The oxide semiconductor film can be provided as a continuous film without any space therebetween.

[0199] In addition, the oxide semiconductor film 198 is formed in a continuous oxide film without being spaced apart from one another in all the pixels 196 in one row. In the case where the oxide semiconductor film 198 is provided as an oxide semiconductor film, the oxide semiconductor film 198 overlaps with the scan line 107. The potential change of the scanning line 107 is sufficient to cause the capacitance line and one electrode of the capacitance element 197 to be Therefore, the oxide semiconductor film 198 may not function properly as shown in FIG. In the pixel 196, the oxide semiconductor film is provided at a distance from the signal line 109. The conductive film 199 can be formed by utilizing the process of forming the conductive film 113. It is preferable that

[0200] In FIG. 19, a region of the oxide semiconductor film 198 that functions as a capacitance line is arranged in a direction parallel to the signal line 109. The area that functions as a capacitance line extends in a direction parallel to the scanning line 107. Note that a region of the oxide semiconductor film 198 that functions as a capacitance line may be a region of the scan line 198. In the case of extending in a direction parallel to the transistor 103 and the capacitor 197, In the above, the oxide semiconductor film 111, the oxide semiconductor film 198, the signal line 109, and the conductive film It is necessary to provide an insulating film between them and 113 to electrically isolate them.

[0201] From the above, as in the pixel 196, one electrode of the capacitor element and the capacitor line provided in the pixel are By providing a light-transmitting oxide semiconductor film, the aperture ratio of a pixel can be improved. .

[0202] <Variation 6> In addition, in the semiconductor device according to one embodiment of the present invention, the configuration of the capacitance line can be changed as appropriate. This structure will be described with reference to FIG. 20. The difference compared to the capacitance line 115 is that the capacitance line is located between two adjacent pixels. .

[0203] FIG. 20 shows the upper part of a pixel 401_1 and a pixel 401_2 adjacent to each other in the extension direction of a signal line 409. FIG.

[0204] The scanning line 407_1 and the scanning line 407_2 are parallel to each other and connected to the signal line 409. The scanning lines 407_1 and 407_2 are disposed so as to extend in directions substantially perpendicular to each other. A capacitance line 415 is provided in parallel to the scanning line 407_1 and the scanning line 407_2. Note that the capacitor line 415 is connected to the capacitor 405_1 provided in the pixel 401_1 and the The pixel 401_1 and the pixel 401_2 are connected to a capacitor 405_2 provided in the pixel 401_1 and the pixel 401 The top shape of the element _2 and the arrangement positions of the components are symmetrical with respect to the capacitance line 415.

[0205] The pixel 401_1 includes a transistor 403_1 and a transistor connected to the transistor 403_1. A capacitor 405_1 is provided.

[0206] The transistor 403_1 is provided in a region where the scanning line 407_1 and the signal line 409 intersect. The transistor 403_1 is a semiconductor having at least a channel formation region. A film 411_1, a gate electrode, a gate insulating film (not shown in FIG. 20), a source electrode, and a drain electrode. The overlapping region functions as a gate electrode of the transistor 403_1. The region overlapping with the semiconductor film 411_1 functions as a source electrode of the transistor 403_1. In the conductive film 413_1, a region overlapping with the semiconductor film 411_1 is a transistor. The conductive film 413_1 and the pixel electrode 421_1 function as a drain electrode of the pixel electrode 421_1. The connection is made at the opening 417_1.

[0207] The capacitor 405_1 is connected to the capacitor line 415 through a conductive film 425 provided in an opening 423. The capacitor 405_1 is formed using a light-transmitting oxide semiconductor. A semiconductor film 419_1 is formed on the substrate 419, a pixel electrode 421_1 is formed on the substrate 419, and a dielectric film is formed on the substrate 419. The transistor 403_1 includes a light-transmitting insulating film (not shown in FIG. 20). That is, the capacitor 405_1 has a light-transmitting property.

[0208] The pixel 401_2 includes a transistor 403_2 and a transistor connected to the transistor 403_2. A capacitor 405_2 is provided.

[0209] The transistor 403_2 is provided in a region where the scanning line 407_2 and the signal line 409 intersect. The transistor 403_2 is a semiconductor having at least a channel formation region. A film 411_2, a gate electrode, a gate insulating film (not shown in FIG. 20), and a source electrode. In addition, in the scan line 407_2, the semiconductor film 411_2 and The overlapping region functions as a gate electrode of the transistor 403_2. The region overlapping with the semiconductor film 411_2 serves as a source electrode of the transistor 403_2. In the conductive film 413_2, a region overlapping with the semiconductor film 411_2 functions as a transistor. The conductive film 413_2 and the pixel electrode 421_2 function as a drain electrode of the pixel electrode 421_2. connect at opening 417_2.

[0210] The capacitor 405_2 is formed by a conductive film provided in an opening 423, similarly to the capacitor 405_1. The capacitor 405_2 is electrically connected to the capacitor line 415 through a light-transmitting and a light-transmitting pixel electrode 42 1_2, and a light-transmitting insulating film ( 20) in the capacitor 405_2. That is, the capacitor 405_2 has a light-transmitting property.

[0211] Note that the transistor 403_1, the transistor 403_2, and the capacitor 405_ The cross-sectional structures of the transistor 103 and the capacitor 405_2 are the same as those of the transistor 103 and the capacitor 405_2 shown in FIG. Since it is similar to the quantum element 105, its description is omitted here.

[0212] In the top view, a capacitance line is provided between two adjacent pixels, and the capacitance line included in each pixel is By connecting the capacitance elements and the capacitance lines, it is possible to reduce the number of capacitance lines. As a result, it is possible to further increase the aperture ratio of the pixels compared to a structure in which a capacitance line is provided for each pixel. For example, in a semiconductor device according to one embodiment of the present invention, the size of one pixel is 28 μm. The dimensions are 84 μm (H) × 84 μm (V), the pixel density is 302 ppi, and the pixel layout is shown in Fig. 2. By using the layout shown in FIG. 0, the aperture ratio of the pixel can be made 61.7%.

[0213] <Variation 7> The above-mentioned pixels 101, 141, 161, 171, 172, and 196, In the pixel 401_1 and the pixel 401_2, the shape of the transistor provided in the pixel is The shape of the transistor is not limited to that shown in FIGS. 3 and 4 and may be changed as appropriate. For example, in the pixel 151, the transistor 169 is connected to a source electrode included in the signal line 109. 109a (not shown) is U-shaped (C-shaped, U-shaped, or horseshoe-shaped), and the drain electrode Even if the transistor has a shape surrounding the conductive film 113 functioning as 113a (not shown), (See FIG. 21.) By using this shape, even if the area of ​​the transistor is small, It is now possible to secure a sufficient channel width, thereby increasing the amount of on-current of the transistor. Other configurations of the pixel 151 in FIG. 21 are the same as those in FIG.

[0214] <Variation 8> In addition, the above-mentioned pixels 101, 141, 161, 171, 172, and 1 96, in the pixel 401_1 and the pixel 401_2, the transistor is Between the gate insulating film and the signal line including the source electrode and the conductive film functioning as the drain electrode The transistor is located at the oxidized region as shown in FIG. The semiconductor film 195 is connected to the signal line 191 including the source electrode 191a and the drain electrode 193a. The conductive film 193 functions as a transistor 190 located between the insulating film 129. 22. Note that the configuration in FIG. 22 is the same as that in FIG. 4 except for the position of the oxide semiconductor film 195. is the same as:

[0215] The transistor 190 shown in FIG. 22 is formed by forming a signal line 191 and a conductive film 193, and then Therefore, the surface of the oxide semiconductor film 195 is 1 and the conductive film 193 are not exposed to the etchant or etching gas used in the formation process, and are not oxidized. The impurities between the semiconductor film 195 and the insulating film 129 can be reduced. In order to reduce the leakage current flowing between the source electrode 191a and the drain electrode 193a of the semiconductor device 190, It is possible.

[0216] <Variation 9> In addition, the above-mentioned pixels 101, 141, 161, 171, 172, and 1 96, in the pixel 401_1 and the pixel 401_2, a channel edge The transistor has a channel structure as shown in FIG. A transistor 183 of a protection type can be used. The conductive film 111, the signal line 109 including the source electrode 109a, and the drain electrode 113a The configuration is the same as that of the first embodiment except that a channel protection film 182 is provided between the first and second conductive films 113 that function as a channel protection film. Same as Figure 4.

[0217] The channel-protective transistor 183 illustrated in FIG. After forming the channel protection film 182, the signal line 109 and the conductive film 113 are formed. The protective film 182 can be formed of the material of the insulating film 129 of the transistor 103. In this way, in the channel protection transistor 183, There is no need to provide an insulating film corresponding to the insulating film 129. The surface of 111 is etched with an etchant or an etchant used in the process of forming the signal line 191 and the conductive film 193. The impurities between the oxide semiconductor film 111 and the channel protective film 182 are not exposed to the etching gas. As a result, the source electrode 109a and It is possible to reduce the leakage current flowing between the drain electrodes 113a. By providing the panel protective film 182, the processing performed when forming the signal line 109 and the conductive film 113 can be performed without causing any problem. The step of forming the oxide semiconductor film 111 (particularly, the channel formation region) is prevented from being damaged. It can be controlled.

[0218] <Modification 10> In addition, the above-mentioned pixels 101, 141, 161, 171, 172, and 1 96, in the pixel 401_1 and the pixel 401_2, one gate Although a transistor having electrodes has been shown, instead, as shown in FIG. The conductive film 187 faces the gate electrode included in the scanning line 107 through the conductive film 111. A transistor 185 may be used.

[0219] The transistor 185 is the same as the transistor 103 and the transistor 104 described in this embodiment. 69, a dual gate transistor having a conductive film 187 on an insulating film 132 of a transistor 190 The conductive film 187 can be considered as a back gate electrode. The conductive film 187 also overlaps with the channel formation region of the oxide semiconductor film 111. By providing the transistor 11 at a position overlapping the channel forming region, a reliability test (e.g., BT (Bias Temperature) Stress Test) Transistor 185 The amount of variation in the threshold voltage can be further reduced. The conductive film 187 may be a common potential, a GND potential, or any other potential. In addition, the transistor may be in a grounding state by controlling the potential of the conductive film 187. The threshold voltage of the gate electrode 107a and the conductive film 185 can be controlled. By providing the conductive film 187, the surrounding potentials can be made equal. The effect of a change in the field on the oxide semiconductor film 111 is reduced, and the reliability of the transistor is improved. It is possible to do so.

[0220] The conductive film 187 is made of the same material as the scanning lines 107, the signal lines 109, the pixel electrodes 121, etc. It can be formed by the method.

[0221] As described above, in a semiconductor device having a driver circuit, a transistor included in the driver circuit A dual gate transistor includes a back gate electrode of the dual gate transistor. By electrically connecting the capacitor to the capacitance line that is electrically connected to the capacitance element, power consumption is reduced. It is possible to increase the operating speed of the driver circuit while maintaining the high image quality, thereby obtaining a semiconductor device with excellent display quality. It is possible.

[0222] In addition, a semiconductor film of a transistor (specifically, an oxide semiconductor) is used as one electrode of the capacitor. By using a semiconductor film formed in the same formation process as the semiconductor film, the aperture ratio is increased while the charge capacity is reduced. It is possible to manufacture a semiconductor device having a capacitor element with an increased capacitance. Therefore, a semiconductor device having excellent properties can be obtained.

[0223] In addition, oxygen vacancies are reduced in a semiconductor film (specifically, an oxide semiconductor film) of a transistor. Since impurities such as hydrogen and nitrogen are reduced, the semiconductor device according to one embodiment of the present invention can be This semiconductor device has excellent electrical characteristics.

[0224] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0225] (Embodiment 2) This embodiment describes a semiconductor device according to one embodiment of the present invention, which has a structure different from that of the above embodiment. The semiconductor device will be described with reference to the drawings. In this embodiment, a liquid crystal display device is taken as an example. In addition, the semiconductor device according to one embodiment of the present invention will be described. The device has a different structure of the capacitance element from that of the above embodiment. In the semiconductor device to be described, the same configuration as the semiconductor device described in the above embodiment is Please refer to the embodiments.

[0226] <Configuration of Semiconductor Device> A top view of the pixel 201 described in this embodiment is shown in FIG. 1 is different from the pixel 101 shown in FIG. 3 in that the insulating film 229 ( 25. Therefore, the insulating film 231 (not shown) is not provided. The capacitor 205 of the element 201 has an oxide semiconductor film 119 functioning as one electrode and a The pixel electrode 221 is a pixel electrode, and the insulating film 232 (not shown) is a dielectric film. is.

[0227] Next, cross-sectional views taken along dashed lines A1-A2 and B1-B2 in FIG. Shown in Figure 26.

[0228] The cross-sectional structure of the pixel 201 in this embodiment is as follows. A scanning line 107 including a gate electrode 107a and a capacitor provided on the same surface as the scanning line 107. A gate insulating film 127 is formed on the scanning line 107 and the capacitance line 115. An oxide semiconductor is provided on a region of the gate insulating film 127 that overlaps with the scan line 107. The oxide semiconductor film 119 is provided over the gate insulating film 127. A source electrode 109a is provided over the oxide semiconductor film 111 and the gate insulating film 127. A signal line 109 including a drain electrode 113a and a conductive film 113 functioning as a drain electrode 113a are provided. The gate insulating film 127 has an opening 123 that reaches the capacitance line 115. 23, a conductive film 125 is provided over the gate insulating film 127 and the oxide semiconductor film 119. The gate insulating film 127, the signal line 109, the oxide semiconductor film 111, and the conductive film 113 are A protective insulating film for the transistor 103 is formed on the conductive film 125 and the oxide semiconductor film 119. The insulating film 229, the insulating film 231, and the insulating film 232 are provided. 9, an opening 117 is provided in the insulating film 231 and the insulating film 232, which reaches the conductive film 113. A pixel electrode 221 is provided on the opening 117 and the insulating film 232. Between the gate insulating film 127 and the scanning line 107 and the capacitance line 115, an insulating film is formed on the substrate 102. may be provided.

[0229] The insulating film 229 is the same as the insulating film 129 described in the first embodiment. The insulating film 231 is the same as the insulating film 131 described in the first embodiment. The insulating film is the same as the insulating film 132 described in the first embodiment. This pixel electrode is the same as the pixel electrode 121 described in the first embodiment.

[0230] As in the capacitor 205 in this embodiment, an oxide semiconductor serving as one electrode is The dielectric film provided between the dielectric film 119 and the pixel electrode 221, which is the other electrode, is called the insulating film 23. 2, the thickness of the dielectric film is set to be the same as that of the dielectric film of the capacitance element 105 in the first embodiment. Therefore, the capacitance element 205 in this embodiment can be made thinner than the The charge capacity can be increased as compared to the capacitor 105 in the first embodiment.

[0231] The insulating film 232 is a nitride insulating film, similar to the insulating film 132 of the first embodiment. Since the insulating film 232 is in contact with the oxide semiconductor film 119, it is preferable that the nitride insulating film Nitrogen and / or hydrogen contained in the oxide semiconductor film 119 can be moved to the oxide semiconductor film 119. The conductivity of the conductor film 119 can be increased. Heat treatment is performed while the insulating film 232 is in contact with the oxide semiconductor film 119, whereby the nitride Nitrogen and / or hydrogen contained in the insulating film can be moved to the oxide semiconductor film 119. As a result, the conductivity of the oxide semiconductor film 119 is increased and the oxide semiconductor film 119 becomes n-type. Since the oxide semiconductor film 119 has a higher electrical conductivity than the oxide semiconductor film 111, the oxide semiconductor film 119 has a higher electrical conductivity than the oxide semiconductor film 111. It can be said that the film has such properties.

[0232] As described above, in the semiconductor device of this embodiment, the oxide semiconductor film 119 is an oxide The oxide semiconductor film 119 has a region having a higher electrical conductivity than the semiconductor film 111. The region of the oxide semiconductor film 111 in contact with the insulating film 232 is more conductive than the region of the oxide semiconductor film 111 in contact with the insulating film 229. The electricity rate is high.

[0233] Note that the oxide semiconductor film 119 preferably has a higher hydrogen concentration than the oxide semiconductor film 111. The oxide semiconductor film 119 is The hydrogen concentration obtained by 8-ary Ion Mass Spectrometry (8-ary Ion Mass Spectrometry) was ×10 19 atoms / cm 3 More than 1×10 20 atoms / cm 3 That's all, More preferably, 5×10 20 atoms / cm 3 The oxide semiconductor film 111 The hydrogen concentration obtained by secondary ion mass spectrometry is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 Less than 1 x 10 18 at oms / cm 3 Less than or equal to 5×10 17 atoms / cm 3 The following are more preferred Or 1×10 16 atoms / cm 3 The following is the result.

[0234] The oxide semiconductor film 119 has a lower resistivity than the oxide semiconductor film 111. The resistivity of the oxide semiconductor film 119 is 1×10 -8 1×10 times more - 1 times or less, typically 1×10 -3 Ωcm or more 1×10 4 Ωcm not yet More preferably, the resistivity is less than 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It is good.

[0235] <Method for manufacturing semiconductor device> Next, a manufacturing method of the semiconductor device in this embodiment mode will be described with reference to FIGS. I will explain this in more detail.

[0236] First, the scanning line 107 including the gate electrode 107a and the capacitance line 115 are formed on the substrate 102. The gate insulating film 127 is formed on the substrate 102, the scanning line 107, and the capacitance line 115. An insulating film is formed, and an oxide semiconductor film 111 and an oxide semiconductor film 119 are formed over the insulating film. Then, an opening 123 reaching the capacitance line 115 is formed in the insulating film to form a gate insulating film 127. After that, the signal line 109 including the source electrode 109a, the conductive film 113, and the conductive film 125 are formed. The gate insulating film 127, the signal line 109, the conductive film 113, the conductive film 125, and the oxide semiconductor An insulating film 128 is formed on the conductive film 119, and an insulating film 130 is formed on the insulating film 128 (FIG. 27(A)). The steps up to this point can be performed with reference to the first embodiment. .

[0237] Next, a mask is formed at least over a region of the insulating film 130 overlapping with the oxide semiconductor film 119. The mask is used to process the insulating film 228 and the insulating film 230, and the insulating film 228 and the insulating film 230 are formed. The semiconductor film 119 is exposed, and an insulating film 233 is formed on the exposed region and on the insulating film 130. (See FIG. 27(B)). The mask is a pattern formed by a photolithography process. A resist mask can be used, and the processing can be carried out by dry etching and wet etching. The insulating film 233 may be formed by one or both of the methods described in the first embodiment. This is an insulating film similar to the insulating film 133 described above. In addition, after forming the insulating film 233, etc. Heat treatment may be performed in the state where the film 233 is in contact with the oxide semiconductor film 119. The steps in the step (a) can also be carried out with reference to the first embodiment.

[0238] The insulating film 233 formed of a nitride insulating film is formed by a plasma CVD method or a sputtering method. When the oxide semiconductor film 119 is deposited, the oxide semiconductor film 119 is exposed to plasma, and oxygen vacancies are formed in the oxide semiconductor film 119. In addition, the oxide semiconductor film 119 and the insulating film 233 formed of a nitride insulating film are bonded to each other. As a result, nitrogen and / or hydrogen are transferred from the insulating film 233 to the oxide semiconductor film 119. When hydrogen contained in the insulating film 233 enters the oxygen vacancy, electrons, which act as carriers, are generated. Alternatively, the insulating film 232 is a nitride insulating film and is in contact with the oxide semiconductor film 119. By performing heat treatment in this state, nitrogen and / or hydrogen contained in the nitride insulating film are oxidized. As a result, the conductivity of the oxide semiconductor film 119 increases, In addition, the conductive film is a light-transmitting conductive film made of a metal oxide film having conductive properties. The oxide semiconductor film 119 has higher electrical conductivity than the oxide semiconductor film 111.

[0239] Next, an opening reaching the conductive film 113 is formed in the insulating film 228, the insulating film 230 and the insulating film 233. A hole 117 is formed, and insulating films 229, 231, and 232 are formed (FIG. 28( A pixel electrode 221 is formed in contact with the conductive film 113 through the opening 117 (see FIG. 2A). 8(B)). The steps up to this point can also be performed by referring to the first embodiment. Cut.

[0240] Through the above steps, the semiconductor device of this embodiment mode can be manufactured.

[0241] <Modification> In the semiconductor device according to one embodiment of the present invention, the structure of the capacitor can be changed as appropriate. A specific example of this structure will be described with reference to FIG. 29. Note that, in this example, FIG. 3 and FIG. 4 are used. Only the capacitance element 245 which is different from the capacitance element 205 described in the above will be described.

[0242] The gate insulating film 218 is made of an insulating film 226 which is a nitride insulating film and an insulating film 227 which is an oxide insulating film. 27, and the insulating film 27 is provided at least in a region where the oxide semiconductor film 119 is provided. In this configuration, only the insulating film 226 is provided. The lower surface of the oxide semiconductor film 119 is in contact with the lower surface of the oxide semiconductor film 119, and thus the conductivity of the oxide semiconductor film 119 is increased. FIG. 29 is a cross-sectional view, and a top view corresponding to FIG. 3 can be seen. In this case, the dielectric film of the capacitance element 105 is the insulating film 129, The insulating film 131 and the insulating film 132. The insulating film 226 and the insulating film 227 are gate insulating films. The insulating film 227 may be formed of the same material as the insulating film 132. In order to realize this configuration, the following steps may be taken with reference to the first embodiment: The insulating film 227 may be processed.

[0243] Note that in the structure illustrated in FIG. 29, the top surface of the oxide semiconductor film 119 is in contact with the insulating film 132. That is, in the configuration shown in FIG. The region of the capacitor 105 that is in contact with the oxide semiconductor film 119 may be removed. The dielectric film is an insulating film 132. The upper and lower surfaces of the oxide semiconductor film 119 are covered with a nitride insulating film. By adopting a structure in which the insulating film is in contact with the nitride insulating film on only one side, the oxide film can be formed more efficiently and sufficiently than when the insulating film is in contact with the nitride insulating film on only one side. The conductivity of the semiconductor film 119 can be increased.

[0244] As described above, in a semiconductor device having a driver circuit according to one embodiment of the present invention, The transistor to be used is a dual-gate transistor, and the dual-gate transistor and electrically connecting the back gate electrode of the first insulating film to a capacitance line which is electrically connected to the capacitance element. This allows the operating speed of the driver circuit to be increased while reducing power consumption, resulting in superior display quality. Thus, a semiconductor device having such a structure can be obtained.

[0245] In addition, a semiconductor film of a transistor (specifically, an oxide semiconductor) is used as one electrode of the capacitor. By using a semiconductor film formed in the same formation process as the semiconductor film, the aperture ratio is increased while the charge capacity is reduced. In addition, a semiconductor device having a capacitor element with an increased aperture ratio can be manufactured. By doing so, a semiconductor device with excellent display quality can be obtained.

[0246] In addition, oxygen vacancies are reduced in a semiconductor film (specifically, an oxide semiconductor film) of a transistor. Since impurities such as hydrogen and nitrogen are reduced, the semiconductor device according to one embodiment of the present invention can be This semiconductor device has excellent electrical characteristics.

[0247] The configurations shown in this embodiment may be used in conjunction with the configurations shown in other embodiments and their modified examples. They can be used in any suitable combination.

[0248] (Embodiment 3) This embodiment describes a semiconductor device according to one embodiment of the present invention, which has a structure different from that of the above embodiment. The semiconductor device will be described with reference to the drawings. In this embodiment, a liquid crystal display device is taken as an example. In addition, the semiconductor device according to one embodiment of the present invention will be described. The device is different from the above embodiment in that the semiconductor film is one electrode of the capacitor element. In the semiconductor device described in this embodiment, For a similar configuration, the above embodiment modes can be referred to.

[0249] <Configuration of Semiconductor Device> A specific configuration of a pixel 301 provided in a pixel portion of a liquid crystal display device described in this embodiment mode. An example will be described. A top view of a pixel 301 is shown in FIG. 30. The pixel 301 shown in FIG. The pixel 301 includes a capacitance element 305, which is connected to the capacitance line 115 and the signal line 10. The capacitor 305 is provided in a region surrounded by a conductive film 9. The capacitor element 305 is electrically connected to the capacitor line 115 through the capacitor 125. The oxide semiconductor film 319 has a higher electrical conductivity than the insulating film 111 and has a light-transmitting property. A pixel electrode 121 is formed on the transistor 103 as a dielectric film, and a light-transmitting insulating film is formed on the transistor 103 as a dielectric film. The capacitor element 305 is made up of a transparent insulating film (not shown in FIG. 30). .

[0250] The oxide semiconductor film 319 has a conductivity of 10 S / cm or more and 1000 S / cm or less. must be between 100S / cm and 1000S / cm.

[0251] Since the oxide semiconductor film 319 has high conductivity, it can be used as an electrode for a capacitor. In other words, the capacitance element 305 is formed large (with a large area) in the pixel 301. Therefore, it is possible to obtain a semiconductor device having an increased aperture ratio and an increased charge capacity. As a result, a semiconductor device with excellent display quality can be obtained.

[0252] Next, cross-sectional views taken along dashed lines A1-A2 and B1-B2 in FIG. Shown in Figure 31.

[0253] The cross-sectional structure of the pixel 301 is as follows. A gate insulating film 127 is provided on the scanning line 107. The oxide semiconductor film 111 is provided over a region of the gate insulating film 127 that overlaps with the scan line 107. An oxide semiconductor film 319 is provided over the gate insulating film 127. A signal line 109 including a source electrode 109a is formed on the conductive film 111 and the gate insulating film 127. A conductive film 113 functioning as a gate electrode 113a is provided. The capacitor line 115 is provided over the insulating film 127 and the oxide semiconductor film 319. the oxide semiconductor film 111; the conductive film 113; the oxide semiconductor An insulating film 1 which functions as a protective insulating film for the transistor 103 is formed on the film 319 and the capacitor line 115. 29, an insulating film 131, and an insulating film 132 are provided. The insulating film 132 has an opening 117 that reaches the conductive film 113. The pixel electrode 121 is provided on the insulating film 132. A base insulating film may be provided between the gate insulating film 07 and the gate insulating film 127.

[0254] In the capacitor 305 of this embodiment, one of a pair of electrodes is an oxide semiconductor film 1 The other electrode of the pair of electrodes is an oxide semiconductor film 319 having a higher electrical conductivity than that of the pixel electrode 11. The pair of electrodes is a base electrode 121, and the dielectric film provided between the pair of electrodes is an insulating film 129 and an insulating film 13. 1, and insulating film 132.

[0255] The oxide semiconductor film 319 is formed using an oxide semiconductor applicable to the oxide semiconductor film 111. The oxide semiconductor film 319 can be formed at the same time as the oxide semiconductor film 111. Therefore, the oxide semiconductor film 319 can be formed by the oxide semiconductor film 111. The oxide semiconductor film 319 contains a conductive metal element. Since high electrical conductivity is preferable, an element (dopant) that increases electrical conductivity is included. Specifically, the oxide semiconductor film 319 preferably contains boron as a dopant. , nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony and rare gases The oxide semiconductor film 319 contains one or more dopants selected from the group consisting of The concentration is 1×10 19 atoms / cm 3 More than 1×10 22 atoms / cm 3 Is less than or equal to In this manner, the conductivity of the oxide semiconductor film 319 is preferably 10 S / cm or more and 1000 S / cm or less, preferably 100 S / cm or more and 1000 S / cm or less Therefore, the oxide semiconductor film 319 can function sufficiently as one electrode of the capacitor 305. Note that the oxide semiconductor film 319 has a higher electrical conductivity than the oxide semiconductor film 111. In this embodiment, at least the insulating film 1 of the oxide semiconductor film 319 has a large area. The region of the oxide semiconductor film 111 in contact with the insulating film 129 has a higher electrical conductivity than the region of the oxide semiconductor film 111 in contact with the insulating film 129. In addition, the oxide semiconductor film 319 is an n-type film since it contains the above element (dopant). Because of its high electrical conductivity, it can also be called a conductive film.

[0256] <Method for manufacturing semiconductor device> Next, a manufacturing method of the semiconductor device in this embodiment mode will be described with reference to FIGS. I will explain this in more detail.

[0257] First, the scanning line 107 including the gate electrode 107a and the capacitance line 115 are formed on the substrate 102. Then, an insulating film to be processed into a gate insulating film 127 is formed on the substrate 102, the scanning line 107, and the capacitance line. Then, the oxide semiconductor film 111 and the oxide semiconductor film 119 are formed over the insulating film (FIG. 32(A)). The steps up to this point can be performed with reference to the first embodiment. .

[0258] Next, a dopant was added to the oxide semiconductor film 119 to form an oxide semiconductor film 319. Thereafter, an opening 123 is formed in the insulating film 126 to reach the capacitance line 115, and a gate insulating film 127 is formed. After the formation of the gate insulating film 104, the signal line 109 including the source electrode 109a and the drain electrode 113a are formed. a conductive film 113 that electrically connects the oxide semiconductor film 319 and the capacitance line 115; 5 is formed (see FIG. 32(B)).

[0259] The method of adding a dopant to the oxide semiconductor film 119 is as follows. A mask is placed on the area, and boron, nitrogen, fluorine, aluminum, phosphorus are removed using the mask. , arsenic, indium, tin, antimony and one or more dopants selected from the group consisting of rare gas elements. The ions are added by ion implantation or ion doping. Instead of a doping method, the oxide semiconductor film 119 is exposed to plasma containing the dopant. The dopant may be added by performing a heat treatment after the dopant is added. The heat treatment may be performed on the oxide semiconductor film 111 and the oxide semiconductor film 112 described in Embodiment 1. The heat treatment for dehydrogenating or dehydrating the oxide semiconductor film 119 is performed as appropriate with reference to the details of the heat treatment. It is possible.

[0260] In addition, the process of adding the dopant is performed by forming the signal line 109, the conductive film 113, and the conductive film 125. In that case, the signal line 109 and the conductive film 1 may be formed of the oxide semiconductor film 319. The region in contact with the conductive film 125 and the insulating film 13 is not doped with a dopant.

[0261] Next, the gate insulating film 127, the signal line 109, the oxide semiconductor film 111, the conductive film 113, and the conductive An insulating film 128 is formed over the insulating film 125 and the oxide semiconductor film 319. An insulating film 130 is formed, and an insulating film 133 is formed on the insulating film 130 (see FIG. 33(A)). This step can be performed with reference to the first embodiment.

[0262] Next, an opening reaching the conductive film 113 is formed in the insulating film 128, the insulating film 130 and the insulating film 133. A hole 117 is formed, and insulating films 129, 131, and 132 are formed (FIG. 33( 3B)), a pixel electrode 121 is formed in contact with the conductive film 113 through the opening 117 (see FIG. 3B). 1). This step can also be carried out with reference to the first embodiment.

[0263] Through the above steps, the semiconductor device of this embodiment mode can be manufactured.

[0264] As described above, in a semiconductor device having a driver circuit according to one embodiment of the present invention, The transistor to be used is a dual-gate transistor, and the dual-gate transistor and electrically connecting the back gate electrode of the first insulating film to a capacitance line which is electrically connected to the capacitance element. This allows the operating speed of the driver circuit to be increased while reducing power consumption, resulting in superior display quality. Thus, a semiconductor device having such a structure can be obtained.

[0265] In addition, a semiconductor film of a transistor (specifically, an oxide semiconductor) is used as one electrode of the capacitor. By using a semiconductor film formed in the same formation process as the semiconductor film, the aperture ratio is increased while the charge capacity is reduced. In addition, a semiconductor device having a capacitor element with an increased aperture ratio can be manufactured. By doing so, a semiconductor device with excellent display quality can be obtained.

[0266] In addition, oxygen vacancies are reduced in a semiconductor film (specifically, an oxide semiconductor film) of a transistor. Since impurities such as hydrogen and nitrogen are reduced, the semiconductor device according to one embodiment of the present invention can be This semiconductor device has excellent electrical characteristics.

[0267] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0268] (Embodiment 4) In this embodiment, a transistor included in the semiconductor device described in the above embodiment is One embodiment that can be applied to an oxide semiconductor film that is a semiconductor film in a capacitor will be described. do.

[0269] Oxide semiconductor films are roughly classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. The non-single-crystal oxide semiconductor film is called CAAC-OS (C Axis Aligned Crystal-Oxide Semiconductor Film). (stalline oxide semiconductor) film, polycrystalline oxide semiconductor The oxide semiconductor film includes a film, a microcrystalline oxide semiconductor film, an amorphous oxide semiconductor film, and the like.

[0270] First, we will explain the CAAC-OS film.

[0271] The CAAC-OS film is one of the oxide semiconductor films that has multiple crystal parts aligned along the c-axis. .

[0272] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed using a quartz crystal microscope, clear boundaries between crystal parts were observed, i.e. It is not possible to confirm the grain boundary. It can be said that the AAC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.

[0273] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When the metal atoms are observed, it can be confirmed that they are arranged in layers in the crystal part. Each layer of the CAAC-OS film is formed on a surface on which the film is to be formed (also called a surface on which the film is to be formed) or on a concave surface on the upper surface. The shape reflects a convexity, and is aligned parallel to the surface on which the CAAC-OS film is formed or the upper surface.

[0274] In this specification, "parallel" means that two straight lines form an angle of -10° or more and 10° or less. This means that the angle is set at 0.05°. Therefore, it includes the angle between -5° and 5°. "Perpendicular" means that two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, this also includes cases where the angle is between 85° and 95°.

[0275] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.

[0276] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It can be seen that...

[0277] Most of the crystals in the CAAC-OS film are cubic with a side length of less than 100 nm. The size is small enough to fit inside the body. Therefore, the crystal part in the CAAC-OS film has a side length of 10 This includes sizes that fit within a cube of less than 3 nm, 5 nm, or 5 nm. However, multiple crystals in the CAAC-OS film are connected to form a single large crystal domain. For example, in a planar TEM image, 2 More than 5μm 2 More than or equal to 1000μm 2 In some cases, crystal regions having more than this size may be observed.

[0278] X-ray diffraction (XRD) of CAAC-OS film When the structure was analyzed using the device, for example, CAAC-OS with InGaZnO4 crystals was In the out-of-plane analysis of the film, the diffraction angle (2θ) peaked at around 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. Therefore, the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis faces the surface on which the film is formed or the upper surface. It can be seen that it is oriented in a roughly vertical direction.

[0279] On the other hand, in-p X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the lane method, a peak may appear at 2θ around 56°. is attributed to the (110) plane of the InGaZnO4 crystal. In the case of a nitride semiconductor film, 2θ is fixed at around 56°, and the normal vector of the sample surface is the axis (φ axis). When the sample is rotated and analyzed (φ scan), a crystal plane equivalent to the (110) plane is detected. In contrast, in the case of the CAAC-OS film, six peaks are observed, which are assigned to Even when φ is fixed at around 56° and scanned, no clear peak appears.

[0280] From the above, it is considered that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, the layered structure confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of arranged metal atoms is in a plane parallel to the ab plane of the crystal.

[0281] The crystalline part is formed when the CAAC-OS film is formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned to the surface on which the CAAC-OS film is to be formed. For example, in the CAAC-OS film, When the shape is changed by etching, the c-axis of the crystal is aligned with the CAAC-OS film. It may not be parallel to the face or top surface normal vector.

[0282] In addition, the distribution of the c-axis oriented crystal parts in the CAAC-OS film may not be uniform. For example, the crystals in the CAAC-OS film grow from the top surface of the CAAC-OS film. Therefore, when the crystal is formed, the region near the top surface has more c-axis oriented crystals than the region near the surface on which the crystal is formed. In addition, when impurities are added to the CAAC-OS film, the proportion of impurities may increase. The region where the material was added changed in quality, and regions with different proportions of c-axis oriented crystals were formed. It may also be possible.

[0283] In addition, the out-of-plane crystal structure of the CAAC-OS film with InGaZnO4 crystals In the analysis by the method, in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ of around 36° may be due to the c-axis orientation in some parts of the CAAC-OS film. The CAAC-OS film contains crystals that do not have the 2θ value of about 31°. It is preferable that the spectrum shows a peak at 2θ of about 36° and does not show a peak at 2θ of about 36°.

[0284] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The oxide semiconductor film is preferably made of silicon or a transition metal element other than the main component of the oxide semiconductor film. The elements that bond to oxygen stronger than the metal elements that form the oxide semiconductor film, such as Zn, By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, and the crystallinity is reduced. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide are Since the diameter (or molecular radius) of the ions is large, when the ions are contained inside the oxide semiconductor film, the oxide semiconductor film The impurities contained in the oxide semiconductor film are likely to disturb the atomic arrangement of the oxide semiconductor film, which leads to deterioration of the crystallinity. Pure materials may act as carrier traps or carrier generation sources.

[0285] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in semiconductor films act as carrier traps and trap hydrogen. This can become a carrier generation source.

[0286] The low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "high-purity intrinsic" refers to a substantially high-purity intrinsic oxide semiconductor. Since the film has a small carrier generation source, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics (noise) in which the threshold voltage is negative. It is also called "marine". It is rare for it to become "high purity genuine" or "substantially high purity". The intrinsic oxide semiconductor film has few carrier traps. Transistors using the film have little fluctuation in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time is long and the charge may behave as if it were a fixed charge. In addition, a transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. There may be cases where this occurs.

[0287] In addition, the electrical characteristics of transistors using CAAC-OS films are improved by irradiation with visible light or ultraviolet light. Gender variation is small.

[0288] Next, a microcrystalline oxide semiconductor film will be described.

[0289] In the TEM image of the microcrystalline oxide semiconductor film, crystal parts can be clearly seen. The crystal parts contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or more. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 to 3 nm or less. The oxide semiconductor film having nc-OS (nanocrystalline O The nc-OS film is called a T In EM images, grain boundaries may not be clearly visible.

[0290] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal planes are In addition, the peaks shown in the figure are not detected in the nc-OS film because the probe diameter is larger than that in the crystalline region. Electron beam diffraction (also called selected area electron beam diffraction) using an electron beam of 50 nm or more (for example) When the diffraction pattern is changed to nc-OS film, a halo pattern is observed. The probe diameter is close to or smaller than the size of the crystal part (for example, 1 nm to 30 nm). When electron beam diffraction (also called nanobeam electron beam diffraction) is performed using an electron beam, spots are observed. In addition, when nanobeam electron diffraction was performed on the nc-OS film, a circular pattern ( In some cases, bright regions (ring-shaped) were observed. When electron beam diffraction is performed, multiple spots may be observed within the ring-shaped region.

[0291] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, the crystal orientation is not regular between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.

[0292] The oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, a microcrystalline oxide semiconductor film, or a C The AAC-OS film may be a laminate film having two or more kinds of AAC-OS films.

[0293] For example, there are three methods for forming CAAC-OS.

[0294] In the first method, an oxide semiconductor film is formed at a film formation temperature of 100° C. or more and 450° C. or less. In this way, the c-axis of the crystal part included in the oxide semiconductor film is aligned along a normal vector of the surface on which the film is formed or along a normal vector of the surface. This is a method for forming crystal parts that are aligned in a direction parallel to the normal vector.

[0295] The second method is to form an oxide semiconductor film to a small thickness, and then heat the film at a temperature of 200° C. to 700° C. By performing heat treatment, the c-axis of a crystal part included in the oxide semiconductor film is aligned with the normal vector of the formation surface. This is a method for forming crystals aligned in a direction parallel to the normal vector of the crystal or surface.

[0296] The third method is to form a thin oxide semiconductor film as a first layer, and then heat the film at 200° C. or higher for 700 The oxide semiconductor film is then formed by performing a heat treatment at or below 1000°C. The c-axis of the crystal part contained in the film is parallel to the normal vector of the surface on which it is formed or the normal vector of the surface. This is a method for forming crystal parts that are aligned in a certain direction.

[0297] A transistor that uses CAAC-OS for an oxide semiconductor film can be irradiated with visible light or ultraviolet light. Therefore, the change in electrical characteristics due to the application of CAAC-OS to the oxide semiconductor film is small. The transistor has good reliability.

[0298] In addition, CAAC-OS uses a polycrystalline oxide semiconductor sputtering target. It is preferable to form the film by a sputtering method. When ions collide with the sputtering target, the crystalline regions in the sputtering target are transformed from the ab plane to The sputtered particles are then cleaved from the ab plane to obtain plate-like or pellet-like sputtered particles with a surface parallel to the ab plane. In this case, the plate-like or pellet-like sputtered particles may peel off. By reaching the deposition surface while maintaining the crystalline state, the CAAC-OS can be deposited. Cut.

[0299] In addition, in order to form a CAAC-OS film, the following conditions are preferably applied.

[0300] By reducing the amount of impurities mixed in during film formation, it is possible to prevent the crystal state from being destroyed by impurities. For example, the concentration of impurities (hydrogen, water, carbon dioxide, nitrogen, etc.) present in the deposition chamber can be In addition, the impurity concentration in the deposition gas may be reduced. A deposition gas having a temperature of −80° C. or lower, preferably −100° C. or lower is used.

[0301] In addition, by increasing the heating temperature (for example, the substrate heating temperature) of the surface to be film-formed during film formation, Specifically, the temperature of the surface on which the film is to be formed increases, and then the sputtered particles begin to migrate. The temperature is set to 100° C. or higher and 740° C. or lower, preferably 150° C. or higher and 500° C. or lower. By increasing the temperature of the surface during deposition, plate-like or pellet-like sputtering particles When it reaches the surface on which the film is to be formed, migration occurs on the surface, resulting in sputtering. The flat surface of the particle adheres to the surface on which the film is to be formed.

[0302] In addition, by increasing the oxygen ratio in the deposition gas and optimizing the power, plasma damage during deposition is reduced. The oxygen ratio in the deposition gas is preferably 30% by volume or more, and more preferably 100% by volume or more. Expressed as volume percent.

[0303] As an example of a sputtering target, an In-Ga-Zn-O compound target is used. The details are shown below.

[0304] InO X powder, GaO Y Powder and ZnO Z The powders are mixed in a specified number of moles and then pressurized. By heat treatment at a temperature between 1000 and 1500℃, polycrystalline In-Ga The target is a Zn-based metal oxide. The pressure treatment is performed while cooling (or cooling naturally). The reaction may be performed while heating or while heating. In addition, X, Y and Z are any positive numbers. Here, the predetermined molar ratio is, for example, InO X powder, GaO Y Powder and ZnO Z powder is 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3 or 3:1:2. The type of powder and the molar ratio of the powder to be mixed depend on the sputtering target to be prepared. The setting can be changed as appropriate depending on the get.

[0305] The oxide semiconductor film may have a structure in which a plurality of oxide semiconductor films are stacked. For example, The oxide semiconductor film is a stack of a first oxide semiconductor film and a second oxide semiconductor film. The oxide semiconductor film and the second oxide semiconductor film may each be made of a metal oxide having a different atomic ratio. For example, the first oxide semiconductor film may include an oxide containing two kinds of metals or an oxide containing three kinds of metals. The first oxide semiconductor film is formed by using one of the oxides containing four kinds of metals. Oxides containing two types of metals different from the semiconductor film, oxides containing three types of metals, and oxides containing four types of metals may be used.

[0306] The oxide semiconductor film may have a two-layer structure, and the constituent elements of the first oxide semiconductor film and the second oxide semiconductor film may be the same, and the atomic ratios of the two may be different. For example, the atomic ratio of the first oxide semiconductor film is In:Ga:Zn = 3:1:2, and the atomic ratio of the second oxide semiconductor film may be In :Ga:Zn = 1:1:1. Also, the atomic ratio of the first oxide semiconductor film may be In :Ga:Zn = 2:1:3, and the atomic ratio of the second oxide semiconductor film may be In:Ga:Zn = 1:3:2. Note that the atomic ratio of each oxide semiconductor film includes a variation of plus or minus 20% of the above atomic ratio as an error.

[0307] At this time, of the first oxide semiconductor film and the second oxide semiconductor film, the atomic ratio of In and Ga in the oxide semiconductor film closer to the gate electrode ( channel side) may be In ≥ Ga. Also, the atomic ratio of In and Ga in the oxide semiconductor film farther from the gate electrode (back channel side) may be In < Ga. With these laminated structures, a transistor with high field-effect mobility can be fabricated. On the other hand, by setting the atomic ratio of In and Ga in the oxide semiconductor film closer to the gate electrode (channel side) to In < Ga and the atomic ratio of In and G a in the oxide semiconductor film on the back channel side to In ≥ Ga, the variation amount of the threshold voltage due to the change over time of the transistor and the reliability test can be reduced.

[0308] The first oxide semiconductor film with an atomic ratio of In:Ga:Zn = 1:3:2 has an atomic ratio of The sputtering method was performed using an oxide target with a composition of In:Ga:Zn=1:3:2. The substrate temperature is room temperature, and the sputtering gas is argon or argon and oxygen. It can be formed using a mixture of In, Ga, and Zn gases. The atomic ratio is In:Ga:Zn=3:1:2. The second oxide semiconductor film is an oxide semiconductor film having an atomic ratio of In:Ga:Zn=3:1:2. The second oxide semiconductor film can be formed in a manner similar to that for the first oxide semiconductor film using a target.

[0309] In addition, the oxide semiconductor film has a three-layer structure, and the first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film are The oxide semiconductor film may contain the same elements but have different atomic ratios. The three-layer structure will be described with reference to FIG.

[0310] A transistor 297 illustrated in FIG. 34 includes a first oxide semiconductor film 299a, a second oxide semiconductor film 299b, and a A conductor film 299b and a third oxide semiconductor film 299c are stacked in this order from the gate insulating film 127 side. The first oxide semiconductor film 299a and the third oxide semiconductor film 299c are formed. The material used is InM1 x Zinc y O z (x≧1, y>1, z>0, M1=Ga, Hf, etc.) Here, the first oxide semiconductor film 299a and the third oxide semiconductor film 299b are made of a material that can be expressed by the following formula: When Ga is contained in the material constituting the conductive film 299c, the ratio of Ga contained is high. InM1 is the best X Zinc Y O Z If the material can be expressed as x=10, powder will be generated during film formation. Note that in the transistor 297, the first oxide semiconductor film The structure other than the first oxide semiconductor film 299a, the second oxide semiconductor film 299b, and the third oxide semiconductor film 299c. The structure is the same as that of the transistor described in the above embodiment (for example, the transistor described in the first embodiment). This has the same configuration as the DISTA 103).

[0311] The material constituting the second oxide semiconductor film 299b is InM2 x Zinc y O z (x≧ Use materials that can be expressed with the formula (1, y≧x, z>0, M2=Ga, Sn, etc.).

[0312] The conduction band of the first oxide semiconductor film 299a and the conduction band of the third oxide semiconductor film 299c are In comparison, the second oxide semiconductor film 299b has a well-type conduction band that is the deepest from the vacuum level. Materials for the first, second, and third oxide semiconductor films are appropriately selected so as to form the structure.

[0313] As described in Embodiment 1, in the oxide semiconductor film, Some silicon and carbon generate electrons, which are carriers, and increase the carrier density. Therefore, when silicon or carbon is contained in an oxide semiconductor film, the oxide semiconductor film becomes n-type. Therefore, the silicon concentration and carbon concentration in each oxide semiconductor film are 3×10 18 / c m 3 Less than or equal to 3×10 17 / cm 3 In particular, the second oxide semiconductor film 2 In order to prevent a large amount of Group 14 elements from being mixed into the first oxide semiconductor film 299a and the third oxide semiconductor film 299b, The first oxide semiconductor film 299c sandwiches the second oxide semiconductor film 299b serving as a carrier path. That is, the first oxide semiconductor film 299a and the third oxide semiconductor film 299b are preferably disposed in the first oxide semiconductor film 299a or in the second oxide semiconductor film 299b. The oxide semiconductor film 299c is a second oxide semiconductor film containing a Group 14 element such as silicon or carbon. It can also be called a barrier film that prevents contamination of 299b.

[0314] For example, the atomic ratio of the first oxide semiconductor film 299a is set to In:Ga:Zn=1:3:2. The atomic ratio of the second oxide semiconductor film 299b is In:Ga:Zn=3:1:2. The atomic ratio of the oxide semiconductor film 299c in No. 3 may be In:Ga:Zn=1:1:1. Note that the atomic ratio of the third oxide semiconductor film 299c is In:Ga:Zn=1:1:1. The film can be formed by sputtering using an oxide target.

[0315] Alternatively, the first oxide semiconductor film 299a may be formed of a compound semiconductor having an atomic ratio of In:Ga:Zn=1:3:2. The second oxide semiconductor film 299b is an oxide semiconductor film having an atomic ratio of In:Ga: The third oxide semiconductor film has a structure in which Zn is 1:1:1 or In:Ga:Zn is 1:3:2. The oxide semiconductor film 299c is an oxide semiconductor having an atomic ratio of In:Ga:Zn=1:3:2. A three-layer structure including a membrane may also be used.

[0316] The first to third oxide semiconductor films 299a to 299c are formed using the same elements. Therefore, the second oxide semiconductor film 299b has a thin film at the interface with the first oxide semiconductor film 299a. In particular, the defect level (trap level) is than the defect states at the interface between the gate insulating film 127 and the first oxide semiconductor film 299a. Therefore, by stacking oxide semiconductor films as described above, This can reduce the amount of variation in threshold voltage due to deterioration over time or due to reliability testing.

[0317] In addition, the conduction band of the first oxide semiconductor film 299a and the conduction band of the third oxide semiconductor film 299c are The conduction band of the second oxide semiconductor film 299b is the deepest from the vacuum level compared to the conduction band. The materials of the first, second, and third oxide semiconductor films are appropriately selected so as to form a well-type structure. By doing so, it is possible to increase the field effect mobility of the transistor and This can reduce the amount of variation in threshold voltage due to deterioration over time of the transistor or due to reliability testing.

[0318] In addition, the first to third oxide semiconductor films 299a to 299c each have a crystalline structure. Different oxide semiconductors may be used. A conductor, an amorphous oxide semiconductor, and a CAAC-OS may be appropriately combined. In addition, any one of the first to third oxide semiconductor films 299a to 299c When an amorphous oxide semiconductor is used, the internal stress and external stress of the oxide semiconductor film are reduced. This reduces the variation in transistor characteristics and also reduces the deterioration over time and reliability testing of transistors. Therefore, the amount of variation in the threshold voltage can be reduced.

[0319] At least the second oxide semiconductor film 299b which can be a channel formation region is made of CAA The oxide semiconductor film on the back channel side is preferably C-OS. In this embodiment, the third oxide semiconductor film 299c is amorphous or CAAC-OS. By adopting such a structure, it is preferable that the transistor is prevented from deterioration over time or from being subjected to a reliability test. The amount of variation in the threshold voltage can be reduced.

[0320] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0321] (Embodiment 5) A semiconductor device having a display function using the transistor and the capacitor described as examples in the above embodiment In addition, a semiconductor device including a transistor can be manufactured. A part or the whole of the operating circuit is integrated on the same substrate as the pixel section to form a system on panel. In this embodiment, the transistor shown as an example in the above embodiment can be used. An example of the display device will be described with reference to FIGS. 35 to 37. FIG. 36(B) is a cross-sectional view showing the cross-sectional configuration of the portion indicated by the dashed line MN in FIG. 35(B). In addition, in Fig. 36, only a part of the structure of the pixel portion is shown.

[0322] In FIG. 35(A), a pixel portion 902 provided on a first substrate 901 is surrounded by a A sealant 905 is provided and the semiconductor device is sealed with a second substrate 906. ) is different from the region surrounded by the sealant 905 on the first substrate 901. A signal line driver formed of a single crystal semiconductor or a polycrystalline semiconductor on a separately prepared substrate is provided in the region where the signal line driver is formed. A signal line driver circuit 903 and a scanning line driver circuit 904 are mounted on the display panel. 3. Various signals and potentials given to the scanning line driver circuit 904 or the pixel portion 902 are transmitted through the FPC (Flexible printed circuit)918a, FPC918b is being supplied.

[0323] In FIG. 35B and FIG. 35C, a pixel portion 90 provided on a first substrate 901 A sealant 905 is provided so as to surround the insulating film 902 and the scanning line driver circuit 904. A second substrate 906 is provided on the pixel portion 902 and the scanning line driver circuit 904. The pixel portion 902 and the scanning line driver circuit 904 are formed by a first substrate 901 and a sealing material 905. The display element is sealed with the second substrate 906. In FIG. 9C, the region surrounded by the sealant 905 on the first substrate 901 is Signals formed in different regions using single crystal semiconductors or polycrystalline semiconductors on a separately prepared substrate A signal line driver circuit 903 is mounted. In FIG. 35(B) and FIG. 35(C), Various signals and power supplies to the driver circuit 903, the scanning line driver circuit 904, or the pixel portion 902 The position is provided by FPC918.

[0324] In addition, in FIG. 35(B) and FIG. 35(C), a signal line driver circuit 903 is separately formed. 9, the scanning line 902 is mounted on the first substrate 901, but the present invention is not limited to this configuration. The driver circuit may be formed separately and mounted, or may be mounted as a part of the signal line driver circuit or the scanning line driver circuit. Only a part of it may be formed separately and mounted.

[0325] The method of connecting the separately formed drive circuit is not particularly limited, and may be any method such as COG ( hip on glass method, wire bonding method, or TAB (Tape The Automated Bonding method can be used. This is an example in which a signal line driver circuit 903 and a scanning line driver circuit 904 are mounted by the COG method. FIG. 35(B) shows an example in which a signal line driver circuit 903 is mounted by the COG method. C) is an example in which a signal line driver circuit 903 is mounted by the TAB method.

[0326] The display device includes a panel in which a display element is sealed, and a controller for the panel. This includes modules in which ICs, etc., including lasers, are mounted.

[0327] In this specification, the term "display device" refers to an image display device, a display device, or an optical Also refers to the power source (including lighting equipment) to which a connector, such as FPC or TCP, is attached. A module with a printed wiring board at the end of the TCP, or a display element All modules with ICs (integrated circuits) directly mounted on the chip using the COG method are included in the display device. This shall be done.

[0328] In addition, the pixel portion and the scan line driver circuit provided on the first substrate have a plurality of transistors. To this end, the transistor described in the above embodiment can be applied.

[0329] Examples of display elements provided in the display device include liquid crystal elements (also called liquid crystal display elements), light-emitting elements, and the like. A light-emitting element (also called a light-emitting display element) can be used. A light-emitting element emits light by applying a current or a voltage. This category includes elements whose brightness is controlled by a specific factor, such as inorganic EL (Electroluminescent) devices. Luminescence elements, organic electroluminescence elements, etc. Also, electronic ink, etc. A display medium in which the contrast is changed by electrical action can also be used. 1 shows an example of a liquid crystal display device using a liquid crystal element as a display element.

[0330] The liquid crystal display device shown in FIG. 36(A) is a vertical electric field type liquid crystal display device. has a connection terminal electrode 915 and a terminal electrode 916. The electrode 916 is electrically connected to a terminal of the FPC 918 via an anisotropic conductive material 919. It is being done.

[0331] The connection terminal electrode 915 is formed from the same conductive film as the first electrode 930, and the terminal electrode 916 The source and drain electrodes of the transistors 910 and 911 are formed of the same conductive film. is.

[0332] A pixel portion 902 and a scanning line driver circuit 904 provided on a first substrate 901 are In FIG. 36(A) and FIG. 36(B), the pixel portion 902 includes a plurality of transistors. 9 and a transistor 911 included in the scanning line driver circuit 904. The insulating layer shown in Embodiment 1 is provided on the transistor 910 and the transistor 911. An insulating film 924 corresponding to the film 129, the insulating film 131, and the insulating film 132 is provided. Note that the insulating film 923 functions as a base film.

[0333] In this embodiment, the transistors 910 and 911 are the same as those in the above embodiment. In addition, any one of the transistors shown in FIG. A capacitor 926 is formed using the insulating film 924 and the first electrode 930. The compound semiconductor film 927 is connected to a capacitance line 929 via an electrode film 928. The source and drain electrodes of the transistors 910 and 911 have the same conductivity. The capacitance line 929 is formed of a film. The capacitor 926 is formed from the same conductive film as the electrode. However, the capacitance element shown in the other embodiments may be used as appropriate. can be done.

[0334] In addition, the transistor 911 included in the scan line driver circuit is oxidized over the insulating film 924. 9 shows an example in which a conductive film 917 is provided at a position overlapping a channel forming region of a semiconductor film. That is, the transistor 911 is the dual gate transistor described in the first embodiment. Although not shown, the conductive film 917 is electrically connected to a capacitor line 929. In this embodiment mode, the conductive film 917 is formed using the same conductive film as the first electrode 930. By doing so, it is possible to omit a configuration for controlling the potential of the conductive film 917. By providing the conductive film 917 in a position overlapping with a channel formation region of the oxide semiconductor film, Further reducing the variation in threshold voltage of transistor 911 before and after reliability testing. In addition, the operating speed of the transistor 911 can be increased, and the operating speed of the driver circuit can be improved. In addition, the potential of the conductive film 917 can be changed to the gate potential of the transistor 911. The conductive film 917 may be the same as the second gate electrode (back electrode) or may be different. The conductive film 917 and the transistor 91 The potential difference between the first electrode and the source electrode may be 0 V. This makes it possible to achieve both an increase in capacity and a reduction in power consumption.

[0335] The conductive film 917 also has a function of blocking an external electric field. (The circuit part including the transistor) The shielding function of the conductive film 917 prevents the device from being affected by external electric fields such as static electricity. This can suppress the fluctuation of the electrical characteristics of the transistor. In FIG. 36, the scanning line driving circuit However, the transistors included in the signal line driver circuit are also shown. In the same manner as the transistor 911, the channel formation region of the oxide semiconductor film and the A conductive film may be provided at the overlapping position.

[0336] The transistor 910 provided in the pixel portion 902 is electrically connected to a display element. The display element is not particularly limited as long as it can display an image. It can be used.

[0337] The liquid crystal element 913, which is a display element, is made up of a first electrode 930, a second electrode 931, and a liquid crystal layer 932. In addition, the liquid crystal 908 is sandwiched between insulating films 932 and 933, which function as alignment films. The second electrode 931 is provided on the second substrate 906 side. The first electrode 930 and the second electrode 931 overlap with each other via the liquid crystal 908. For the liquid crystal element 913, reference can be made to the liquid crystal element 108 described in Embodiment 1. The first electrode 930 corresponds to the pixel electrode 121 described in the first embodiment, and the second electrode 931 corresponds to the pixel electrode 121 described in the first embodiment. corresponds to the counter electrode 154 described in the first embodiment, and the liquid crystal 908 corresponds to the counter electrode 154 described in the first embodiment. The insulating film 932 corresponds to the alignment film 158 described in the first embodiment. The insulating film 933 corresponds to the alignment film 156 described in the first embodiment.

[0338] A first electrode and a second electrode (a pixel electrode, a common electrode, and a counter electrode) for applying a voltage to a display element In the case of a holographic laser, the direction of the light to be extracted, the location of the electrodes, and the pattern of the electrodes are all determined by the following factors: The translucency or reflectivity can be selected according to the layer structure.

[0339] The first electrode 930 and the second electrode 931 are the same as the pixel electrode 121 and the corresponding electrode shown in the first embodiment. The same material as that of the counter electrode 154 can be used as appropriate.

[0340] The spacer 935 is a columnar spacer obtained by selectively etching an insulating film. In order to control the distance (cell gap) between the first electrode 930 and the second electrode 931, It should be noted that a spherical spacer may also be used.

[0341] The first substrate 901 and the second substrate 906 are fixed by a sealant 925. The molding material 925 may be an organic resin such as a thermosetting resin or a photosetting resin. The sealant 925 is in contact with the insulating film 924. It is equivalent to material 905.

[0342] In addition, in liquid crystal display devices, black matrices (light-shielding films), polarizing members, and phase difference members Optical members (optical substrates) such as anti-reflection members are provided as appropriate. Circularly polarized light produced by a retardation substrate may be used. Any light source device may be used.

[0343] In addition, since transistors are easily damaged by static electricity, etc., a protection circuit for protecting the drive circuit is It is preferable to provide a protection circuit using a non-linear element.

[0344] Next, a liquid crystal display device of the IPS mode will be described with reference to FIG. B) is an example of the FFS (Fringe Field Switching) method. ng) mode liquid crystal display device. It is different from the vertical electric field type liquid crystal display device shown in FIG. The structure will be described below.

[0345] In the liquid crystal display device shown in FIG. 36(B), the connection terminal electrode 915 is The terminal electrode 916 is formed from the same conductive film as the source electrodes of the transistors 910 and 911. The gate electrode is formed from the same conductive film as the gate and drain electrodes.

[0346] The liquid crystal element 943 includes a first electrode 940 and a second electrode 941 formed on the insulating film 924. The liquid crystal element 943 includes the liquid crystal element 108 shown in Embodiment 1. The first electrode 940 may have the same structure as the first electrode shown in FIG. The material shown in 930 can be used appropriately. The first electrode 940 has a planar shape of The second electrode 941 functions as a common electrode, and in the embodiment The first electrode 940 and the oxide semiconductor film 119 can be formed in a similar manner to the oxide semiconductor film 119 in Embodiment 1. An insulating film 924 is provided between the second electrodes 941. In the device, the capacitive element is a pair of electrodes, a first electrode 940 and a second electrode, and a dielectric and an insulating film 924 which is a protective film.

[0347] The second electrode 941 is connected to a capacitor line 946 through a conductive film 945. 945 is the same as the source and drain electrodes of the transistor 910 and the transistor 911. The capacitor line 946 is formed of the same conductive film as the transistor 910 and the transistor 911. The gate electrode is formed from the same conductive film. Although the capacitive element shown in the first embodiment has been used in the description, the capacitive element shown in the other embodiments may be used as appropriate. There can be.

[0348] In FIG. 37, in the liquid crystal display device shown in FIG. 36(A), A common connection portion (pad portion) for electrically connecting to the second electrode 931 is provided on the first substrate 90. An example of forming it on 1 is shown below.

[0349] The common connection portion overlaps with a sealant for bonding the first substrate 901 and the second substrate 906. and electrically connected to the second electrode 931 via conductive particles contained in the sealing material. Or, connect the common connection part to a place that does not overlap with the sealing material (excluding the pixel part). A paste containing conductive particles is provided separately from the seal material so as to overlap the common connection portion. The second electrode 931 may be electrically connected to the first electrode 931 .

[0350] FIG. 37(A) is a cross-sectional view of the common connection portion, which corresponds to IJ in the top view shown in FIG. 37(B). Correct.

[0351] The common potential line 975 is provided on the gate insulating film 922 and is connected to the transistor 9 shown in FIG. 10. It is made of the same material and in the same process as the source electrode 971 or the drain electrode 973 of FIG.

[0352] The common potential line 975 is covered with an insulating film 924. 5. The openings are for connecting the source and drain electrodes of the transistors 910. A contact hole that connects one of the drain electrode 971 or the drain electrode 973 to the first electrode 930. It is made using the same process as the hologram.

[0353] In addition, the common potential line 975 and the common electrode 977 are connected at the opening. is provided on the insulating film 924 and is the same as the connection terminal electrode 915 and the first electrode 930 of the pixel portion. It is made from the same materials and through the same processes.

[0354] In this manner, the common connection portion is formed in the same manufacturing process as the switching element of the pixel portion 902. It can be manufactured.

[0355] The common electrode 977 is an electrode that comes into contact with the conductive particles contained in the sealing material, and is Electrical connection is made to the second electrode 931 of 906 .

[0356] 37C, a common potential line 985 is connected to the gate of a transistor 910. They may be made of the same material and in the same process as the electrodes.

[0357] In the common connection portion shown in FIG. 37(C), a common potential line 985 is connected to the gate insulating film 922 and The gate insulating film 922 and the insulating film 924 are disposed below the common potential line The openings are located at positions overlapping with the source electrode 985 of the transistor 910. A contact hole that connects one of the drain electrodes 971 and 973 to the first electrode 930 After etching the insulating film 924 in the same process, the gate insulating film 922 is selectively etched. It is formed by etching.

[0358] In addition, the common potential line 985 and the common electrode 987 are connected at the opening. is provided on the insulating film 924, and is the same as the connection terminal electrode 915 and the first electrode 930 of the pixel portion. It is made from the same materials and through the same processes.

[0359] As described above, in a semiconductor device having a driver circuit, a transistor included in the driver circuit A dual gate transistor includes a back gate electrode of the dual gate transistor. By electrically connecting the capacitor to the capacitance line that is electrically connected to the capacitance element, power consumption is reduced. It is possible to increase the operating speed of the driver circuit while maintaining the high image quality, thereby obtaining a semiconductor device with excellent display quality. It is possible.

[0360] In addition, a semiconductor film of a transistor (specifically, an oxide semiconductor) is used as one electrode of the capacitor. By using a semiconductor film formed in the same formation process as the semiconductor film, the aperture ratio is increased while the charge capacity is reduced. In addition, a semiconductor device having a capacitor element with an increased aperture ratio can be manufactured. By doing so, a semiconductor device with excellent display quality can be obtained.

[0361] In addition, oxygen vacancies are reduced in a semiconductor film (specifically, an oxide semiconductor film) of a transistor. Since impurities such as hydrogen and nitrogen are reduced, the semiconductor device according to one embodiment of the present invention can be This semiconductor device has excellent electrical characteristics.

[0362] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used.

[0363] (Embodiment 6) The semiconductor device according to one embodiment of the present invention can be applied to various electronic devices (including game machines). The electronic device can be a television device (television or television receiver) ), computer monitors, digital cameras, digital video cameras, Digital photo frames, mobile phones, portable game consoles, personal digital assistants, audio playback devices, These electronic devices include gaming machines (pachinko machines, slot machines, etc.) and game cabinets. An example is shown in FIG.

[0364] FIG. 38(A) shows a table 9000 having a display section. A display unit 9003 is built into the housing 9001, and an image is displayed on the display unit 9003. It is possible to support the housing 9001 with four legs 9002. The housing 9001 also includes a power cord 9005 for supplying power.

[0365] The semiconductor device described in any of the above embodiments can be used for the display portion 9003. Therefore, the display quality of the display portion 9003 can be improved.

[0366] The display unit 9003 has a touch input function. By touching the display button 9004 displayed on the screen with a finger or the like, the screen can be operated or information can be input. It can also communicate with and control other home appliances, improving picture quality. It may also be a control device that controls other home appliances by surface manipulation. For example, If a semiconductor device having a sensor function is used, the display portion 9003 can have a touch input function. It is possible.

[0367] In addition, the screen of the display unit 9003 can be fixed to the floor by a hinge provided in the housing 9001. It can also be placed vertically and used as a television set. A large-screen television set will take up a lot of free space, but it can be placed on a table. If the display unit is built into the device, the space in the room can be used more effectively.

[0368] FIG. 38(B) shows a television device 9100. A display unit 9103 is incorporated in a housing 9101, and an image is displayed on the display unit 9103. In this example, the housing 9101 is supported by a stand 9105. The figure shows a configuration in which

[0369] The television device 9100 can be operated using an operation switch provided on the housing 9101 or a separate remote control. This can be done by using a remote control operation device 9110. The channel and volume can be controlled by the 9109, and the display 9103 shows The remote control device 9110 can control the video. A display unit 9107 for displaying information output from the device 9110 may be provided.

[0370] A television device 9100 shown in FIG. 38(B) includes a receiver, a modem, and the like. The television device 9100 can receive general television broadcasts using a receiver. Furthermore, by connecting to a wired or wireless communication network via a modem, One-way (from sender to receiver) or two-way (between sender and receiver, or between receivers) It is also possible to carry out information communication.

[0371] The semiconductor device described in any of the above embodiments can be used for the display portions 9103 and 9107. This makes it possible to improve the display quality of the television device.

[0372] FIG. 38C shows a computer, which includes a main body 9201, a housing 9202, a display unit 9203, Keyboard 9204, external connection port 9205, pointing device 9206, etc. include.

[0373] The semiconductor device described in any of the above embodiments can be used for the display portion 9203. Therefore, the display quality of the computer can be improved.

[0374] FIG. 39(A) and FIG. 39(B) show a tablet terminal that can be folded in two. 9631a, the tablet terminal is in an open state. 9631b, a display mode changeover switch 9034, a power switch 9035, a power saving mode It has a mode changeover switch 9036, a fastener 9033, and an operation switch 9038.

[0375] The semiconductor device described in any of the above embodiments includes a display portion 9631a and a display portion 9631b. Therefore, it is possible to improve the display quality of tablet devices. Cut.

[0376] A part of the display unit 9631a can be used as a touch panel area 9632a. By touching the operation keys 9638 displayed on the display unit 96, data can be input. In 31a, as an example, half of the area has a display function only, and the other half The display unit 96 has a touch panel function, but is not limited to this. The entire area of ​​the display unit 931a may have a touch panel function. The entire surface of 631a is made to display keyboard buttons to serve as a touch panel, and the display section 9631b is made to display It can be used as a display screen.

[0377] In addition, in the display unit 9631b, as in the display unit 9631a, The part of the touch panel can be the area 9632b of the touch panel. Touch the area where the mode display switch button 9639 is displayed with your finger or a stylus. A keyboard button can be displayed on the display portion 9631b.

[0378] In addition, the touch panel area 9632a and the touch panel area 9632b are simultaneously You can also use touch input.

[0379] A display mode changeover switch 9034 is used to change the display orientation, such as vertical or horizontal. You can choose between black and white and color display. The 9036 is a tablet-type device that detects external light during use using a built-in light sensor. The tablet device has a light sensor, which can adjust the display brightness to suit the amount of light. In addition to the sensor, other detection devices such as gyro, acceleration sensor, etc. that detect the inclination are also included. It may be built-in.

[0380] FIG. 39A shows an example in which the display area of ​​the display portion 9631b is the same as that of the display portion 9631a. However, there is no particular limitation, and one size may be different from the other size. The quality of the display may also be different. For example, one display panel may provide a higher resolution display than the other. It may also be used as a rule.

[0381] FIG. 39(B) shows the tablet terminal in a closed state. The tablet terminal includes a housing 9630 and a solar cell 9 39B, the charge / discharge control circuit 96 As an example of the 34, a configuration having a battery 9635 and a DC-DC converter 9636 is described below. This is shown.

[0382] In addition, since the tablet device can be folded in half, the case 9630 can be folded when not in use. Therefore, the display portions 9631a and 9631b can be protected. This makes it possible to provide a tablet device that is highly durable and reliable even when used for a long period of time.

[0383] In addition, the tablet terminals shown in Figs. 39(A) and 39(B) can be used in various Functions that display information (still images, videos, text images, etc.), calendars, dates, or times A function to display information on the display unit, and a function to input or edit information displayed on the display unit. It has input functions, functions to control processing by various software (programs), etc. It is possible.

[0384] The solar cell 9633 attached to the surface of the tablet device supplies power to the touch panel. The solar cell 9633 can supply the solar cell 9633 with the following components: The battery 9635 can be efficiently charged by providing the battery 9635 on one or both sides of the housing 9630. This is preferable because it can be configured to perform the above-mentioned operations. The use of lithium-ion batteries has the advantage of enabling miniaturization.

[0385] The configuration and operation of the charge / discharge control circuit 9634 shown in FIG. A block diagram is shown in FIG. 39(C) and will be explained. In FIG. 39(C), a solar cell 9633 and a battery 9 635, DC-DC converter 9636, converter 9637, switches SW1 to SW3 , a display unit 9631, a battery 9635, a DC-DC converter 963 6. The converter 9637 and the switches SW1 to SW3 are configured to perform the charge / discharge control shown in FIG. This corresponds to the circuit 9634 .

[0386] First, an example of operation when power is generated by the solar cell 9633 due to external light will be described. The power generated by the solar cell 9633 becomes the voltage for charging the battery 9635. The voltage is increased or decreased by the DC-DC converter 9636 so that the display unit 9631 When power is used from the Solar Cell 9633, switch SW1 is turned on and the The inverter 9637 increases or decreases the voltage to a level required for the display unit 9631. When the display unit 9631 is not to be displayed, turn SW1 off and SW2 on to The configuration may be such that the battery 9635 is charged.

[0387] The solar cell 9633 is shown as an example of a power generating means, but is not limited thereto. , and other power generation methods such as piezoelectric elements and thermoelectric conversion elements (Peltier elements) For example, the battery 9635 may be charged. A non-contact power transmission module that transmits and receives power and charges, or a combination of other charging methods This may also be configured.

[0388] Note that the structure described in this embodiment mode may be appropriately combined with structures described in other embodiments. It can be used. EXAMPLES

[0389] In this example, the resistance of the oxide semiconductor film and the multilayer film is measured using FIGS. He explains.

[0390] First, the structure of the sample will be described with reference to FIG.

[0391] FIG. 40A is a top view of Samples 1 to 4. The cross-sectional views of Samples 1 to 4 are shown in Figures 40(B), (C), and (D). The cross-sectional views of sample 1 are different because the laminated structures of the cross sections are different. The cross-sectional view of sample 2 is shown in Fig. 40(C), and the cross-sectional views of samples 3 and 4 are shown in Fig. 40(D). , respectively.

[0392] In the sample 1, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film 1903 is formed on the insulating film 1903. An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed over the insulating film 1904. In addition, both ends of the oxide semiconductor film 1905 are covered with conductive films 1907 and 1909 which function as electrodes. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered with insulating films 1910 and 1911. The insulating films 1910 and 1911 are provided with openings 1913 and 1915. The conductive films 1907 and 1909 are exposed in the openings 1913 and 1915, respectively. It is out.

[0393] In the sample 2, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film is formed on the insulating film 1903. An insulating film 1904 is formed, and an oxide semiconductor film 1905 is formed over the insulating film 1904. In addition, both ends of the oxide semiconductor film 1905 are covered with conductive films 1907 and 1909 which function as electrodes. The oxide semiconductor film 1905 and the conductive films 1907 and 1909 are covered with an insulating film 1911. The insulating film 1911 has openings 1917 and 1919. At the opening, the conductive films 1907 and 1909 are exposed.

[0394] In the samples 3 and 4, an insulating film 1903 is formed on a glass substrate 1901, and an insulating film 19 An insulating film 1904 is formed on the insulating film 1903, and a multilayer film 1906 is formed on the insulating film 1904. In addition, both ends of the multilayer film 1906 are covered with conductive films 1907 and 1909 that function as electrodes. The insulating film 1911 covers the conductive film 1906 and the conductive films 1907 and 1909. 11 has openings 1917 and 1919, The conductive films 1907 and 1909 are exposed.

[0395] In this manner, Samples 1 to 4 are each formed on the oxide semiconductor film 1905 or the multilayer film 1906. The structure of the insulating film in contact with the oxide semiconductor film 1905 is different from that of the insulating film in contact with the oxide semiconductor film 1905. In Sample 2, the oxide semiconductor film 1905 and the insulating film 1911 are in contact with each other. In Sample 3, In sample 4, the multilayer film 1906 and the insulating film 1911 are in contact with each other.

[0396] Next, the method for preparing each sample will be described.

[0397] First, a method for preparing Sample 1 will be described.

[0398] On a glass substrate 1901, an insulating film 1903 is formed by a plasma CVD method. A silicon nitride film with a thickness of nm was formed.

[0399] Next, on the insulating film 1903, an insulating film 1904 is formed by a plasma CVD method. A silicon oxynitride film having a thickness of nm was formed.

[0400] Next, a metal oxide target ( In:Ga:Zn=1:1:1) was used, and IGZ with a thickness of 35 nm was formed by sputtering. Then, an O film was formed. Then, it was etched using a mask formed by a photolithography process. A bonding treatment was performed to form an oxide semiconductor film 1905.

[0401] Next, a thick insulating film 1904 and an oxide semiconductor film 1905 are formed by a sputtering method. A 50 nm thick tungsten film, a 400 nm thick aluminum film, and a 100 nm thick tungsten film were After laminating the titanium films in order, they are etched using a mask formed by a photolithography process. A conductive film 1907 and a conductive film 1909 were formed by performing a plating treatment.

[0402] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon oxynitride film having a thickness of 450 nm is formed as an insulating film 1910 by a plasma CVD method. After the film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. .

[0403] Next, on the insulating film 1910, an insulating film 1911 is formed by a plasma CVD method. A silicon nitride film with a thickness of nm was formed.

[0404] Next, after providing a mask on the insulating film 1911 by a photolithography process, Then, an etching process is performed to form openings 1913 and 1914 in the insulating film 1910 and the insulating film 1911. 15 was formed.

[0405] Sample 1 was prepared by the above steps.

[0406] Next, a method for preparing Sample 2 will be described.

[0407] The insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 19 On the insulating film 1910, a 450 nm thick oxide nitride silicon film is formed by plasma CVD. After the silicon film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. After that, the insulating film 1910 was removed.

[0408] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon nitride film having a thickness of 50 nm is formed as an insulating film 1911 by a plasma CVD method. A film was formed.

[0409] Next, after providing a mask on the insulating film 1911 by a photolithography process, Then, an etching process was performed to form openings 1917 and 1919 in the insulating film 1911 .

[0410] Sample 2 was prepared by the above steps.

[0411] Next, a method for preparing Sample 3 will be described.

[0412] In Sample 3, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 in Sample 2. The layer film 1906 is formed by depositing a metal oxide target (In:Ga:Zn = 1:3:2), a 10 nm thick IGZO film was formed by sputtering, followed by A metal oxide target (In:Ga:Zn=1:1:1) was used for the sputtering method. A 10 nm thick IGZO film was then deposited by a metal oxide target (In:Ga: Zn=1:3:2) and a 10 nm thick IGZO film was formed by sputtering. After that, an etching process was performed using a mask formed by a photolithography process. Thus, a multilayer film 1906 was formed.

[0413] Sample 3 was prepared by the above steps.

[0414] Next, a method for preparing Sample 4 will be described.

[0415] In Sample 4, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 in Sample 2. The layer film 1906 is formed by depositing a metal oxide target (In:Ga:Zn = 1:3:2), a 20 nm thick IGZO film was formed by sputtering, followed by A metal oxide target (In:Ga:Zn=1:1:1) was used for the sputtering method. A 15 nm thick IGZO film was then deposited by a metal oxide target (In:Ga: Zn=1:3:2) and a 10 nm thick IGZO film was formed by sputtering. After that, an etching process was performed using a mask formed by a photolithography process. Thus, a multilayer film 1906 was formed.

[0416] Sample 4 was prepared by the above steps.

[0417] Next, the oxide semiconductor film 1905 and the multilayer film 1906 provided in Samples 1 to 4 were The sheet resistance was measured. In sample 1, the openings 1913 and 1915 were filled with a probe. The sheet resistance of the oxide semiconductor film 1905 was measured by contacting the oxide semiconductor film 1905 with a sintered body. In FIG. 4, a probe is brought into contact with the openings 1917 and 1919, and an oxide semiconductor The sheet resistance of the film 1905 and the multilayer film 1906 was measured. In the compound semiconductor film 1905 and the multilayer film 1906, the conductive film 1907 and the conductive film 190 The width of the opposing conductive films 1907 and 1909 is 1 mm, and the distance between the conductive films 1907 and 1909 is 10 μm. In addition, in Samples 1 to 4, the conductive film 1907 was set to a ground potential, and the conductive film 1909 was set to a ground potential. A voltage of 1 V was applied to the

[0418] The sheet resistances of Samples 1 to 4 are shown in FIG.

[0419] The sheet resistance of sample 1 is about 1×10 11 The sheet resistance of sample 2 was The sheet resistance of sample 3 was about 4410 Ω / sq. The sheet resistance of Sample 4 was about 2930 Ω / sq.

[0420] In this way, the difference in the insulating film in contact with the oxide semiconductor film 1905 and the multilayer film 1906 Therefore, the oxide semiconductor film 1905 and the multilayer film 1906 have different sheet resistances.

[0421] When the sheet resistances of the above-mentioned Samples 1 to 4 are converted into resistivities, Sample 1 has a resistivity of 3 .9×10 5 Ωcm, sample 2 is 9.3×10 -3 Ωcm, sample 3 is 1.3×10 -2 Ωcm, sample 4 is 1.3×10 -2 It was Ωcm.

[0422] Sample 1 is a silicon oxynitride film that is in contact with an oxide semiconductor film 1905 and is used as an insulating film 1910. A silicon nitride film is formed on the insulating film 1911. On the other hand, Samples 2 to 4 each have an oxide semiconductor film 1905 and a multilayer film 1906. A silicon nitride film used as an insulating film 1911 is formed in contact with the oxide. The nitride semiconductor film 1905 and the multilayer film 1906 are formed of silicon nitride used as an insulating film 1911. When the oxide semiconductor film 1905 and the multilayer film 1906 are provided in contact with each other, defects, typically In the oxide semiconductor film 1, oxygen vacancies are formed, and hydrogen contained in the silicon nitride film is absorbed into the oxide semiconductor film 1. 905 and the multilayer film 1906. As a result, the oxide semiconductor film 19 05, and the conductivity of the multilayer film 1906 is improved.

[0423] For example, when an oxide semiconductor film is used for a channel formation region of a transistor, It is preferable that a silicon oxynitride film is provided in contact with the oxide semiconductor film so as to form a As a light-transmitting conductive film used for an electrode of a quantum well element, an oxide film as shown in Samples 2 to 4 is used. It is preferable to provide a silicon nitride film in contact with the nitride semiconductor film or multilayer film. By using this structure, an oxide semiconductor film used for a channel formation region of a transistor can be formed. The oxide semiconductor film or multilayer film used for the electrode of the capacitor element is formed in the same process. The resistivity of the oxide semiconductor film and the multilayer film can be changed even when the oxide semiconductor film and the multilayer film are formed.

[0424] Next, the sheet resistance of samples 2 and 3 stored in a high-temperature and high-humidity environment was The conditions for each sample used are explained below. The conditions for the sample 2 and sample 3 are different from those for the sample 2 and sample 3. Samples with the same structure as sample 3 but different preparation conditions are designated as sample 2a and sample 3a, respectively. do.

[0425] First, a method for preparing the sample 2a will be described.

[0426] An insulating film 1903 and an insulating film 1904 were formed on a glass substrate 1901 .

[0427] A metal oxide target (In: A 35 nm thick IGZO film was formed by sputtering using a Ga:Zn=1:1:1 After that, the film was etched using a mask formed by a photolithography process. After the treatment, heat treatment is performed at 350° C. or 450° C. to form an oxide semiconductor film 1905. Successful.

[0428] A 50 nm thick insulating film was formed over the insulating film 1904 and the oxide semiconductor film 1905 by a sputtering method. After stacking a 400 nm thick titanium film and a 400 nm thick copper film in order, a photolithography process is performed. The conductive film 1907 and the conductive film 1909 are then etched using a mask formed from the above. was formed.

[0429] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon oxynitride film having a thickness of 450 nm is formed as an insulating film 1910 by a plasma CVD method. After the film was formed, it was heat-treated for 1 hour in a mixed atmosphere of nitrogen and oxygen at 350°C. .

[0430] Next, the insulating film 1904, the oxide semiconductor film 1905, the conductive film 1907, and the conductive film 190 On the substrate 9, a silicon nitride film having a thickness of 50 nm is formed as an insulating film 1911 by a plasma CVD method. The silicon nitride film was formed at a temperature of 220° C. or 350° C.

[0431] Next, after providing a mask on the insulating film 1911 by a photolithography process, Then, an etching process is performed to form openings 1917 and 1918 in the insulating film 1910 and the insulating film 1911. 19 was formed.

[0432] Through the above steps, sample 2a was fabricated.

[0433] Next, a method for preparing the sample 3a will be described.

[0434] In the sample 3a, a multilayer film 1906 was used instead of the oxide semiconductor film 1905 in the sample 2a. The multilayer film 1906 is formed by depositing a metal oxide target (In:Ga: Zn=1:1:1) and a 10 nm thick IGZO film was formed by sputtering. Then, a metal oxide target (In:Ga:Zn=1:3:2) was used for sputtering. A 10 nm thick IGZO film was then formed by photolithography. After etching using the mask formed by the above method, the wafer was heated at 350℃ or 450℃. This resulted in the formation of a multilayer film 1906.

[0435] Through the above steps, sample 3a was fabricated.

[0436] Next, the oxide semiconductor film 1905 and the multilayer film 190 The sheet resistance of the opening 1917 and the opening 6 was measured in the samples 2a and 3a. A probe is brought into contact with the portion 1919, and the oxide semiconductor film 1905 and the multilayer film 1906 are sealed. The oxide semiconductor film 1905 and the multilayer film 1906 of Sample 2a and Sample 3a were measured for resistance. In 1906, the width where the conductive film 1907 and the conductive film 1909 face each other is set to 1.5 mm. The distance between the film 1907 and the conductive film 1909 was set to 10 μm. In a, the conductive film 1907 is set to the ground potential, and 1 V is applied to the conductive film 1909. Samples 2a and 3a were exposed to the atmosphere at a temperature of 60°C and a humidity of 95% for 60 hours and 13 hours. After storage for 0 hours, the sheet resistance of each sample was measured.

[0437] The sheet resistance values ​​of Sample 2a and Sample 3a are shown in FIG. 45. In FIG. 45, the solid line indicates The deposition temperature of the silicon nitride film formed as the insulating film 1911 in each sample was 220° C. The dashed line indicates 350°C. The black markers indicate the oxidation temperature of each sample. After the semiconductor film 1905 or the multilayer film 1906 was formed, a heat treatment was performed at 350° C. The white markers indicate the oxide semiconductor film 1905 or the multilayer film 1906 formed. The triangular markers indicate that the samples were heated at 450° C. 05, i.e., it is sample 2a, and the circle marker indicates that the sample has a multilayer film 1906. This indicates that the sample is sample 3a.

[0438] As shown in FIG. 45, Samples 2a and 3a have low sheet resistance and are suitable for use as electrodes of a capacitance element. It can be seen that the desired sheet resistance is 0.2 M / sq or less. It can be seen that the time variation of the sheet resistance value is small for Sample 2a and Sample 3a. In the case of the oxide semiconductor film or the multilayer film in contact with the silicon nitride film, the sheet is damaged in a high-temperature and high-humidity environment. Since the variation in the resistance value is small, it can be used as a light-transmitting conductive film for the electrodes of a capacitance element. There can be.

[0439] Next, for Sample 2a and Sample 3a, the substrate temperatures were set to 25°C, 60°C, and 150°C. The results of measuring the sheet resistance of each are shown in FIG. As for the sample 3a, the deposition temperature of the silicon nitride film formed as the insulating film 1911 was 220 The temperature was 350° C., and a sample was used which was subjected to a heat treatment at 350° C. after the multilayer film 1906 was formed.

[0440] From Figure 46, it can be seen that the sheet resistance of the multilayer film 1906 does not change even if the substrate temperature is increased. That is, the oxide semiconductor film or multilayer film in contact with the silicon nitride film is also a degenerate semiconductor. The oxide semiconductor film or multilayer film in contact with the silicon nitride film does not change even if the substrate temperature changes. Since the variation in the sheet resistance is small, it can be used as a light-transmitting conductive film for an electrode of a capacitor element. It can be used.

[0441] The configuration shown in this embodiment may be appropriately combined with the configurations shown in other embodiments or embodiments. It can be used. EXAMPLES

[0442] In this example, impurity analysis of an oxide semiconductor film and an insulating film formed over the oxide semiconductor film was performed. This will be explained with reference to FIG.

[0443] In this embodiment, two types of samples (hereinafter referred to as samples) were used for impurity analysis. 5, and sample 6) were prepared.

[0444] First, a method for preparing Sample 5 will be described below.

[0445] Sample 5 was made by forming an IGZO film on a glass substrate and then forming a silicon nitride film on it. After that, heat treatment was performed at 450°C for 1 hour in a nitrogen atmosphere, and then in a nitrogen and oxygen mixed gas atmosphere. Heat treatment was carried out at 450°C for 1 hour in an atmosphere (nitrogen = 80%, oxygen = 20%).

[0446] The conditions for forming the IGZO film were as follows: sputtering with a metal oxide target (In:Ga:Zn=1:1:1) was used, and Ar / O2=100 / 100sccm (O2 = 50%), pressure = 0.6 Pa, deposition power = 5000 W, substrate temperature = 170 °C. A 100 nm thick IGZO film was deposited.

[0447] The silicon nitride film was formed under the following conditions: SiH4 / N2 / N H3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, A silicon nitride film was formed to a thickness of 100 nm under the condition of a plate temperature of 220°C.

[0448] Next, a method for preparing Sample 6 will be described below.

[0449] An IGZO film is formed on a glass substrate, and then a silicon oxynitride film and a silicon nitride film are formed. After that, a heat treatment was performed at 450°C for 1 hour in a nitrogen atmosphere, and then a nitrogen Heat treatment at 450℃ for 1 hour in a nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) The theory was carried out.

[0450] The deposition conditions for the IGZO film and the silicon nitride film were the same as those for sample 5. The conditions for forming the silicon oxynitride film were as follows: SiH4 / N2O=30 / 4000sccm, pressure=40Pa, deposition power=150W, A silicon oxynitride film with a thickness of 50 nm was formed under the condition of a plate temperature of 220°C, and then PE -CVD method, SiH4 / N2O=160 / 4000sccm, pressure=200Pa, synthesis A silicon oxynitride film with a thickness of 400 nm was deposited under the conditions of a film power of 1500 W and a substrate temperature of 220°C. A film was formed.

[0451] The impurity analysis results of Samples 5 and 6 are shown in FIG.

[0452] The impurity analysis was carried out using secondary ion mass spectrometry (SIMS). Using Ion Mass Spectrometry, the sample was analyzed in the direction of the arrow shown in Figure 42. That is, the measurements were performed from the glass substrate side.

[0453] FIG. 42(A) shows the hydrogen (H) concentration profile obtained by measuring sample 5. FIG. 42(B) shows the hydrogen (H) concentration profile obtained by measuring sample 6. do.

[0454] From Figure 42(A), the hydrogen (H) concentration in the IGZO film is 1.0×10 20 atoms / c m 3 It can be seen that the hydrogen (H) concentration in the silicon nitride film is 1.0×10 2 3 atoms / cm 3 In addition, from Figure 42(B), the hydrogen in the IGZO film (H) Concentration is 5.0×10 19 atoms / cm 3 It can be seen that nitric oxide The hydrogen (H) concentration in the silicon oxide film is 3.0×10 21 atoms / cm 3 To be I understand.

[0455] Due to its measurement principle, SIMS analysis cannot measure the area near the sample surface or the layered boundary between films of different materials. It is known that it is difficult to obtain accurate data near the surface. When analyzing the distribution of hydrogen (H) in the thickness direction by SIMS, the area in which the target film exists is In the range, there is no extreme fluctuation, and the average value in the region where almost constant intensity is obtained is adopted. do.

[0456] In this way, by changing the composition of the insulating film in contact with the IGZO film, the water in the IGZO film Differences were confirmed in the element (H) concentration.

[0457] For example, when the above-mentioned IGZO film is used in the channel formation region of a transistor, Sample 6 As shown in FIG. 1, a silicon oxynitride film is preferably provided in contact with the IGZO film. As the transparent conductive film used for the electrodes of the quantum well, an IGZO film was used as shown in sample 5. It is preferable to provide a silicon nitride film in contact with the silicon nitride film. The IGZO film used for the channel formation region of the transistor and the IGZO film used for the electrodes of the capacitor element The hydrogen concentration in the IGZO film can be changed even when the O film is fabricated in the same process. EXAMPLES

[0458] In this example, the amount of defects in the oxide semiconductor film and the multilayer film was measured using FIGS. He explains.

[0459] First, the structure of the sample will be described.

[0460] Sample 7 is a 35 nm-thick oxide semiconductor film formed on a quartz substrate and an oxide semiconductor film and a 100 nm thick nitride insulating film formed thereon.

[0461] Samples 8 and 9 are a 30 nm thick multilayer film formed on a quartz substrate and a 30 nm thick multilayer film formed on the multilayer film. The multilayer film of Sample 8 has a thickness of 100 nm. A first oxide film having a thickness of 10 nm, an oxide semiconductor film having a thickness of 10 nm, and a second oxide film having a thickness of 10 nm. The sample 9 has a first oxide film with a thickness of 20 nm, a second oxide film with a thickness of 15 nm, and a third oxide film with a thickness of 20 nm. A first oxide semiconductor film having a thickness of 10 nm and a second oxide film having a thickness of 10 nm are stacked in this order. Sample 9 is different from Sample 7 in that a multilayer film is included instead of an oxide semiconductor film. .

[0462] Sample 10 is a 100 nm thick oxide semiconductor film formed on a quartz substrate and an oxide semiconductor A 250 nm thick oxide insulating film was formed on the solid film, and a 10 nm thick oxide insulating film was formed on the solid film. The sample 10 has a nitride insulating film with a thickness of 100 nm. The difference is that the film is not in contact with a nitride insulating film, but is in contact with an oxide insulating film.

[0463] Next, the method for preparing each sample will be described.

[0464] First, a method for preparing sample 7 will be described.

[0465] A 35 nm thick IGZO film was formed on a quartz substrate as an oxide semiconductor film. The film was formed by sputtering using a metal oxide target (In:Ga:Z n=1:1:1, Ar / O2=100sccm / 100sccm (O2=50%) ), pressure = 0.6 Pa, film formation power = 5000 W, and substrate temperature = 170°C.

[0466] Next, as the first heat treatment, a heat treatment was performed in a nitrogen atmosphere at 450° C. for 1 hour, and then Heating for 1 hour in a nitrogen and oxygen mixed gas atmosphere (nitrogen = 80%, oxygen = 20%) at 450℃ Processing was carried out.

[0467] Next, a silicon nitride film having a thickness of 100 nm is formed as a nitride insulating film on the oxide semiconductor film. The conditions for forming the silicon nitride film were SiH4 / N2 / NH 3=50 / 5000 / 100sccm, pressure=100Pa, deposition power=1000W, substrate The following conditions were used: temperature = 350°C.

[0468] Next, as a second heat treatment, heat treatment was performed at 250° C. in a nitrogen atmosphere for 1 hour.

[0469] Sample 7 was prepared by the above steps.

[0470] Next, a method for preparing Sample 8 will be described.

[0471] In Sample 8, a multilayer film was formed instead of the oxide semiconductor film of Sample 7. A metal oxide target (In:Ga:Zn=1: 3:2), Ar / O2=180 / 20sccm (O2=10%), pressure=0.6P a) A first oxide film having a thickness of 10 nm was formed under the conditions of a deposition power of 5000 W and a substrate temperature of 25°C. Next, a metal oxide target (In:Ga:Zn=1 :1:1), Ar / O2=100 / 100sccm (O2=50%), pressure=0. A 10 nm thick oxide semiconductor was deposited under the conditions of 6 Pa, deposition power = 5000 W, and substrate temperature = 170°C. Next, a metal oxide target (In:Ga:Z n=1:3:2), Ar / O2=180 / 20sccm (O2=10%), pressure= The second oxide film was deposited to a thickness of 10 nm under the conditions of 0.6 Pa, deposition power = 5000 W, and substrate temperature = 25°C. A nitride film was formed.

[0472] The other steps were the same as those of Sample 7. Sample 8 was formed by the above steps.

[0473] Next, a method for preparing Sample 9 will be described.

[0474] In Sample 9, a multilayer film was formed instead of the oxide semiconductor film of Sample 7. A first oxide film having a thickness of 20 nm was formed on a quartz substrate under the same conditions as those for the first oxide film shown in Sample 8. Next, an oxide film was formed by a sputtering method in the same manner as the oxide semiconductor film shown in Sample 8. A 15-nm-thick oxide semiconductor film was formed under the conditions described above. A second oxide film was deposited to a thickness of 10 nm using the same conditions as for the oxide film.

[0475] The other steps were the same as those of Sample 7. Sample 9 was formed by the above steps.

[0476] Next, a method for preparing the sample 10 will be described.

[0477] Sample 10 is a 100-nm-thick oxide semiconductor film formed on a quartz substrate under the same conditions as Sample 7. was formed.

[0478] Next, a first heat treatment was carried out under the same conditions as those for Sample 7.

[0479] Next, a first silicon oxynitride film having a thickness of 50 nm was formed as an oxide insulating film over the oxide semiconductor film. A silicon oxynitride film and a second silicon oxynitride film having a thickness of 200 nm were formed. D method, SiH4 / N2O=30 / 4000sccm, pressure=40Pa, deposition power=1 A first silicon oxynitride film was formed to a thickness of 50 nm under the conditions of 50 W and substrate temperature = 220 °C. Then, using the PE-CVD method, SiH4 / N2O=160 / 4000sccm, pressure = 200 Pa, deposition power = 1500 W, substrate temperature = 220 °C. A second silicon oxynitride film was formed. Note that the second silicon oxynitride film was formed in a stoichiometric manner. The film contains more oxygen than fills the composition.

[0480] Next, using the same conditions as for Sample 7, a silicon nitride film with a thickness of 100 nm was formed on the oxide insulating film. Formed.

[0481] Next, a second heat treatment was carried out using the same conditions as for Sample 7.

[0482] Through the above steps, sample 10 was formed.

[0483] Next, ESR measurements were performed on Samples 7 to 10. The ESR measurements were performed at a given temperature. From the magnetic field value (H0) at which microwave absorption occurs, the g value is calculated using the formula g=hν / βH0. The parameters obtained are as follows. ν is the microwave frequency. h is the Planck constant. and β is the Bohr magneton, both of which are constants.

[0484] Here, the ESR measurements were performed under the following conditions: The measurement temperature was room temperature (25°C), and the The 2GHz radio frequency power (microwave power) was set to 20mW, and the magnetic field direction was set to the same as that of the sample. The film surface was parallel to the

[0485] The primary spectra obtained by ESR measurement of the oxide semiconductor films and multilayer films included in Samples 7 to 9 The differential curves are shown in Figure 43. Figure 43(A) shows the measurement results for sample 7, and Figure 43(B) shows the FIG. 43(C) shows the measurement results for sample 9.

[0486] The first derivative curve obtained by ESR measurement of the oxide semiconductor film included in sample 10 is shown in Figure 44. show.

[0487] In FIG. 43(A) to FIG. 43(C), sample 7 has a g value of 1.93, and the oxide A signal with symmetry due to defects in the semiconductor film was detected. Samples 8 and 9 At a g value of 1.95, a signal with symmetry due to defects in the multilayer film was detected. The spin density at g-value 1.93 in sample 7 is 2.5×10 19 spins / c m 3 The sum of the spin densities for the g values ​​of 1.93 and 1.95 in sample 8 is 1.6 ×10 19 spins / cm 3 The g values ​​of sample 9 are 1.93 and 1.95. The total pin density is 2.3 x 10 19 spins / cm 3 That is, the oxide semiconductor It can be seen that the oxide semiconductor film and the multilayer film contain defects. An example of a defect is an oxygen vacancy.

[0488] In FIG. 44, Sample 10 is a combination of the oxide semiconductor film of Sample 7, the multilayer film of Sample 8, and the multilayer film of Sample 9. In comparison, the signal with symmetry due to defects is not observed even though the oxide semiconductor film is thick. No signal was detected, i.e., below the detection limit (here, the detection limit is 3.7 × 10 16 spin s / cm 3 From this, the amount of defects contained in the oxide semiconductor film can be detected. I know I can’t.

[0489] The oxide semiconductor film or multilayer film is covered with a nitride insulating film, here a nitride insulating film formed by PE-CVD. When the silicon film comes into contact with the oxide semiconductor film or multilayer film, defects, typically oxygen vacancies, are formed. On the other hand, when an oxide insulating film, a silicon oxynitride film, is used for an oxide semiconductor film, When the silicon oxynitride film is provided with the oxygen content, the excess oxygen contained in the silicon oxynitride film, i.e., the oxygen content that satisfies the stoichiometric composition, Therefore, more oxygen diffuses into the oxide semiconductor film than in the case where the oxide semiconductor film is heated. Therefore, defects in the oxide semiconductor film are not increased.

[0490] For the above reasons, as shown in Samples 7 to 9, the oxide semiconductor film in contact with the nitride insulating film Alternatively, the multilayer film has many defects, typically oxygen vacancies, and is highly conductive, so the electrodes of the capacitance element On the other hand, as shown in Sample 10, the oxide semiconductor in contact with the oxide insulating film The conductive film has a small amount of oxygen vacancies and low conductivity, so it is suitable for use as a channel formation region of a transistor. It can be used as such.

[0491] Here, the reason why the resistivity of the oxide semiconductor film and the multilayer film in contact with the nitride insulating film decreases is as follows. This will be described below.

[0492] <Energy and Stability among Existence Forms of H> First, the energy difference and stability of the forms of H present in the oxide semiconductor film will be described using the calculation results. Here, InGaZnO4 was used as the oxide semiconductor film.

[0493] The structure used for the calculation was based on an 84-atom bulk model obtained by doubling the hexagonal unit cell of the InGaZnO4 crystal in the a-axis and b-axis directions.

[0494] In the bulk model, a model was prepared in which one O atom bonded to three In atoms and one Zn atom was replaced with an H atom (see Fig. 47(A)). Also, in Fig. 47(A), a view of the ab plane in the InO layer as seen from the c-axis is shown in Fig. 47(B). The region where one O atom bonded to three In atoms and one Zn atom was removed is denoted as the oxygen vacancy Vo and is shown by a dashed line in Fig. 47( A) and Fig. 47(B). Also, an H atom located in the oxygen vacancy Vo is denoted as V oH.

[0495] Also, in the bulk model, one O atom bonded to three In atoms and one Zn atom was removed to form an oxygen vacancy (Vo). In the vicinity of the Vo, a model in which an H atom was bonded to an O atom bonded to one Ga atom and two Zn atoms with respect to the ab plane was prepared (see Fig. 47( C)). Also, in Fig. 47(C), a view of the ab plane in the InO layer as seen from the c-axis is shown in Fig. 47(D). In Fig. 47(C) and Fig. 47(D), the oxygen vacancy Vo is shown by a dashed line In addition, a model having an H atom bonded to an O atom bonded to one Ga atom and two Zn atoms in the vicinity of the Vo and having the Vo is denoted as Vo + H.​

[0496] For the above two models, an optimization calculation was performed with the lattice constant fixed, and the total energy was calculated. Note that the smaller the value of the total energy, the more stable the structure can be said to be.

[0497] For the calculation, the first-principles calculation software VASP (The Vienna Ab initio tio simulation package) was used. The calculation conditions are shown in Table 1.

[0498]

Table 1

[0499] Also, the total energies of the two models calculated by the calculation are shown in Table 2.

[0500]

Table 2

[0501] From Table 2, the total energy of VoH is 0.78 eV smaller than that of Vo + H. Therefore, it can be said that VoH is more stable than Vo + H. Therefore, when an H atom approaches an oxygen vacancy (Vo), the H atom is more likely to be incorporated into the oxygen vacancy (Vo) rather than bonding with an O atom. It is considered to be easy.

[0502] <Thermodynamic state of VoH> Next, the formation energy and charge state of VoH, in which an H atom is incorporated into an oxygen vacancy (Vo), The calculation results are explained below. The formation energy of VoH varies depending on the charge state. , and also depends on the Fermi energy. Therefore, VoH depends on the Fermi energy and is stable. The charge state is different. Here, the state where VoH releases one electron is called (VoH) + Shown The state in which one electron is captured is called (VoH) - The state without electron movement is represented as (VoH ) 0 (VoH) + , (VoH) - , (VoH) 0 Calculate the formation energy of each I calculated it.

[0503] The calculation conditions are shown in Table 3.

[0504] [Table 3]

[0505] Projector Augmented Wave for electronic state pseudopotential calculation The potential generated by the PAW method is the Heyd-Scuseria functional. -Ernzerhof (HSE) DFT hybrid functional (HSE06) was used.

[0506] In addition, the formation energy of oxygen vacancies was calculated assuming a dilute limit of oxygen vacancy concentration. The energies were calculated by correcting for the excess broadening of the electrons and holes into the conduction band and valence band. The upper end of the valence band of a perfect crystal is taken as the energy origin, and the shift in the valence band due to defect structures is Corrections were made using the average electrostatic potential.

[0507] In Figure 48(A), (VoH) + , (VoH) - , (VoH) 0 The respective formation energies The horizontal axis is the Fermi level, and the vertical axis is the formation energy. The solid line indicates the ) + The dashed line shows the formation energy of (VoH) 0 The dashed line indicates the formation energy of (VoH) - The formation energy of VoH is also shown. The charge of VoH is (VoH) + From (Vo H) 0 Through (VoH) - The transition level from

[0508] Figure 48(B) shows the thermodynamic transition level of VoH. From the calculation results, InGaZnO The energy gap of 4 is 2.739 eV. The valence band energy is 0e V, the transition level (ε(+ / -)) is 2.62 eV, which is located just below the conduction band. This shows that the incorporation of H atoms into the oxygen vacancies (Vo) results in the formation of InGaZ It can be seen that nO4 becomes n-type.

[0509] When the oxide semiconductor film is exposed to plasma, the oxide semiconductor film is damaged, and the oxide semiconductor In the conductive film, defects, typically oxygen vacancies, are generated. When the oxide semiconductor film comes into contact with the nitride insulating film, hydrogen contained in the nitride insulating film moves to the oxide semiconductor film. Hydrogen enters the oxygen vacancies in the oxide semiconductor film, forming VoH in the oxide semiconductor film. As a result, the oxide semiconductor film becomes n-type and the resistivity decreases. The oxide semiconductor film in contact with the first electrode can be used as an electrode of a capacitor. [Explanation of symbols]

[0510] 11 Oxide semiconductor film 12 Gate insulating film 13a Drain electrode 15 Dual Gate Transistor 16 Conductive Film 17a Gate electrode 19a Source electrode 29 Insulating Film 31 Insulating film 32 Insulating film 92 Wiring 94 Aperture 100 pixels 101 pixels 102 Substrate 103 Transistor 104 Scanning line driving circuit 105 Capacitive element 106 Signal line driver circuit 107 Scan Lines 107a Gate electrode 108 Liquid crystal element 109 Signal Line 109a Source electrode 111 Oxide semiconductor film 113 Conductive Film 113a Drain electrode 115 Capacitive Line 117 Aperture 119 Oxide Semiconductor Film 121 Pixel electrode 123 Aperture 125 Conductive Film 126 Insulating Film 127 Gate insulating film 128 Insulating film 129 Insulating Film 130 Insulating film 131 Insulating film 132 Insulating film 133 Insulating Film 134 Organic insulating film 141 pixels 143 Aperture 145 Capacitive element 146 Capacitive element 150 Substrates 151 pixels 152 Light-shielding film 154 Counter Electrode 156 Orientation Film 158 Orientation Film 160 LCD 161 pixels 167 Conductive Film 169 Transistor 171 pixels 172 pixels 173 Capacitive element 174 Capacitive element 175 Capacitive Line 176 Capacitive Line 177 Oxide Semiconductor Film 178 Oxide Semiconductor Film 182 Channel protection film 183 Transistor 185 Transistors 187 Conductive Film 190 Transistors 191 Signal Line 191a Source electrode 193 Conductive Film 193a Drain electrode 195 Oxide Semiconductor Film 196 pixels 197 Capacitive element 198 Oxide Semiconductor Film 199 Conductive Film 201 pixels 205 Capacitive element 218 Gate insulating film 221 Pixel electrode 226 Insulating Film 227 Insulating Film 228 Insulating Film 229 Insulating Film 230 Insulating film 231 Insulating Film 232 Insulating film 233 Insulating Film 245 Capacitive element 297 Transistors 299a Oxide semiconductor film 299b Oxide semiconductor film 299c Oxide semiconductor film 301 pixels 305 Capacitive element 319 Oxide Semiconductor Film 401_1 pixels 401_2 pixels 403_1 Transistor 403_2 Transistor 405_1 Capacitive element 405_2 Capacitor element 407_1 Scanline 407_2 Scan line 409 Signal Line 411_1 Semiconductor film 411_2 Semiconductor film 413_1 Conductive film 413_2 Conductive film 415 Capacitive Line 417_1 Aperture 417_2 Aperture 419_1 Semiconductor film 419_2 Semiconductor film 421_1 Pixel electrode 421_2 Pixel electrode 423 Aperture 425 Conductive Film 901 Board 902 Pixel section 903 Signal line driver circuit 904 Scanning line driver circuit 905 Sealing material 906 Substrate 908 Liquid crystal 910 Transistor 911 Transistor 913 Liquid crystal element 915 Connection terminal electrode 916 Terminal electrode 917 Conductive Film 918 FPC 918b FPC 919 Anisotropic conductive agent 922 Gate insulating film 923 Insulating Film 924 Insulating film 925 Sealing material 926 Capacitor 927 Oxide Semiconductor Film 928 Electrode membrane 929 Capacitive Line 930 electrode 931 Electrode 932 Insulating film 933 Insulating film 935 Spacer 940 electrode 941 Electrode 943 Liquid crystal element 945 Conductive Film 946 Capacitor Line 971 Source Electrode 973 Drain electrode 975 Common potential line 977 Common electrode 985 Common potential line 987 Common electrode 1901 Glass substrate 1903 Insulating film 1904 Insulating film 1905 Oxide semiconductor film 1906 Multilayer film 1907 Conductive film 1909 Conductive film 1910 Insulating film 1911 Insulating film 1913 Opening 1915 Opening 1917 Opening 1919 Opening 9000 Table 9001 Case 9002 Legs 9003 Display section 9004 Display button 9005 Power Cord 9033 Fastener 9034 Switch 9035 Power Switch 9036 Switch 9038 Operation switch 9100 Television equipment 9101 Case 9103 Display section 9105 Stand 9107 Display section 9109 Operation key 9110 Remote control device 9201 Main unit 9202 Case 9203 Display section 9204 Keyboard 9205 External connection port 9206 Pointing Device 9630 Case 9631 Display section 9631a Display section 9631b Display section 9632a area 9632b area 9633 Solar Cells 9634 Charge / discharge control circuit 9635 Battery 9636 DC-DC Converter 9637 Converter 9638 Operation key 9639 Button

Claims

1. A pixel portion having a plurality of pixels and a circuit portion, At least one of the pixels includes a first transistor and a liquid crystal element; The circuit unit includes at least a second transistor. a first conductive layer having a function as a gate electrode of the first transistor; a first insulating layer having a region in contact with an upper surface of the first conductive layer; a first oxide semiconductor layer having a region overlapping with the first conductive layer and including a channel formation region of the first transistor; a second conductive layer having a region in contact with the first oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the first transistor; a second insulating layer having a region in contact with an upper surface of the second conductive layer; a third conductive layer electrically connected to the second conductive layer and functioning as a first electrode of a liquid crystal element; a fourth conductive layer overlapping with the third conductive layer and functioning as a second electrode of the liquid crystal element; a fifth conductive layer electrically connected to the fourth conductive layer and having a function as a capacitance line; a second oxide semiconductor layer including a channel formation region of the second transistor; a sixth conductive layer having a region overlapping with the second oxide semiconductor layer and functioning as a gate electrode of the second transistor; a seventh conductive layer having the same material as the second conductive layer and at least a portion of an upper surface of the seventh conductive layer being in contact with the second insulating layer; the fifth conductive layer is electrically connected to the sixth conductive layer via the seventh conductive layer in a region outside the pixel portion; the fifth conductive layer has the same material as the first conductive layer, and at least a portion of an upper surface of the fifth conductive layer is in contact with the first insulating layer; In a plan view of the pixel unit, a channel length direction of the first transistor has a region extending along a first direction, In a plan view of the pixel unit, the first conductive layer has a region extending along the first direction, In a plan view of the pixel unit, the fifth conductive layer has a region extending along the first direction, a channel length direction of the second transistor has a region extending in a second direction intersecting the first direction in a plan view of the circuit portion.

2. A pixel portion having a plurality of pixels and a circuit portion, At least one of the pixels includes a first transistor and a liquid crystal element; The circuit unit includes at least a second transistor. a first conductive layer having a function as a gate electrode of the first transistor; a first insulating layer having a region in contact with an upper surface of the first conductive layer; a first oxide semiconductor layer having a region overlapping with the first conductive layer and including a channel formation region of the first transistor; a second conductive layer having a region in contact with the first oxide semiconductor layer and functioning as one of a source electrode and a drain electrode of the first transistor; a second insulating layer having a region in contact with an upper surface of the second conductive layer; a third conductive layer electrically connected to the second conductive layer and functioning as a first electrode of a liquid crystal element; a fourth conductive layer overlapping with the third conductive layer and functioning as a second electrode of the liquid crystal element; a fifth conductive layer electrically connected to the fourth conductive layer and having a function as a capacitance line; a second oxide semiconductor layer including a channel formation region of the second transistor; a sixth conductive layer having a region overlapping with the second oxide semiconductor layer and functioning as a gate electrode of the second transistor; a seventh conductive layer having the same material as the second conductive layer and at least a portion of an upper surface of the seventh conductive layer being in contact with the second insulating layer; the fifth conductive layer is electrically connected to the sixth conductive layer via the seventh conductive layer in a region outside the pixel portion; the fifth conductive layer has the same material as the first conductive layer, and at least a portion of an upper surface of the fifth conductive layer is in contact with the first insulating layer; In a plan view of the pixel unit, a channel length direction of the first transistor has a region extending along a first direction, In a plan view of the pixel unit, the first conductive layer has a region extending along the first direction, In a plan view of the pixel unit, the fifth conductive layer has a region extending along the first direction, a channel length direction of the second transistor has a region extending in a second direction intersecting the first direction in a plan view outside the pixel unit, In a plan view of an outer shape of the pixel portion, the fifth conductive layer has a region extending in the second direction.

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