Photoelectric conversion device, photoelectric conversion system, and moving body

Abstract

To provide preferred forms of electrical paths in a photoelectric conversion device in which both of pixels generating signals corresponding to brightness of incident light and pixels generating event signals are provided.SOLUTION: A photoelectric conversion device includes a first semiconductor component and a second semiconductor component. A semiconductor layer of the first semiconductor component has a pixel array unit, and has a first element and a second element in a semiconductor layer different from the first semiconductor layer. A first insulating film and a second insulating film are bonded at a bonding surface, and a first metal portion and a second metal portion are bonded at a bonding surface. A first pixel generating a signal corresponding to brightness and the first element are connected through the first metal portion, and a second pixel generating an event signal and the second element are connected through the second metal portion. There are provided a first conductor included in a first electrical path and positioned in a predetermined layer between a first surface and a fourth surface, and a second conductor included in a second electrical path and positioned in the predetermined layer, the first conductor and the second conductor being different in size.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present disclosure relates to a photoelectric conversion device, a photoelectric conversion system including the photoelectric conversion device, and a moving object. [Background technology]

[0002] There is known a photoelectric conversion device in which a plurality of semiconductor components are stacked and a plurality of conductor parts arranged between the plurality of semiconductor components are joined. Patent Document 1 describes a solid-state imaging device including a light-receiving substrate on which a photoelectric conversion element is provided, and a circuit substrate joined to the light-receiving substrate and having an address event detection circuit that detects a voltage change output from the photoelectric conversion element. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2022-106021 A Summary of the Invention [Problem to be solved by the invention]

[0004] The technology described in Patent Document 1 does not consider a suitable form of an electrical path in a photoelectric conversion device that has both pixels that generate a signal corresponding to the brightness of incident light and pixels that generate an event signal.

[0005] The technology disclosed herein provides a suitable form of electrical path in a photoelectric conversion device that has both pixels that generate signals corresponding to the brightness of incident light and pixels that generate event signals. [Means for solving the problem]

[0006] One aspect of the present disclosure is a photoelectric conversion device comprising: a first semiconductor layer having a first surface that is a light incidence surface and a second surface opposite to the first surface; a first semiconductor component including a first wiring structure; a second semiconductor layer having a third surface and a fourth surface opposite to the third surface; and a second semiconductor component including a second wiring structure arranged between the first wiring structure and the third surface, wherein the first semiconductor layer has a pixel array portion in which a plurality of first pixels each generating a signal corresponding to a brightness corresponding to an amount of incident light and a plurality of second pixels each generating an event signal from the incident light are arranged, and the device has a first element and a second element each provided in a semiconductor layer separate from the first semiconductor layer, the first wiring structure has a first insulating film having a recess, and the second wiring structure has a second insulating film having a recess. a first metal portion is provided inside the recess of the first insulating film, a second metal portion is provided inside the recess of the second insulating film, the first insulating film and the second insulating film are bonded at a bonding surface, the first metal portion and the second metal portion are bonded at the bonding surface, the first pixel and the first element are connected by a first electrical path via the first metal portion, and the second pixel and the second element are connected by a second electrical path via the second metal portion, and a first conductor is included in the first electrical path and located in a predetermined layer between the first surface and the fourth surface, and a second conductor is included in the second electrical path and located in the predetermined layer, and dimensions of the first conductor and the second conductor are different in a planar view with respect to the first surface. Effect of the Invention

[0007] The technology disclosed herein makes it possible to realize a suitable form of electrical path in a photoelectric conversion device provided with both pixels that generate signals corresponding to the brightness of incident light and pixels that generate event signals. [Brief description of the drawings]

[0008] [Figure 1] Block diagram showing the whole photoelectric conversion device [Diagram 2] FIG. 1 is a diagram showing a configuration of a stacked photoelectric conversion device. [Diagram 3] 1 is a cross-sectional view showing a cross section of a photoelectric conversion device; [Figure 4] Plan view showing the structure of the joint [Diagram 5] Cross-sectional view showing the structure of the joint [Figure 6] Cross-sectional view showing the structure of the joint [Figure 7] Plan view showing the structure of the joint [Figure 8] Block diagram showing the configuration of a photoelectric conversion device [Figure 9] Block diagram showing the configuration of a photoelectric conversion device [Figure 10] FIG. 1 is a diagram showing a configuration of a stacked photoelectric conversion device. [Figure 11] 1 is a cross-sectional view showing a cross section of a photoelectric conversion device; [Figure 12] Block diagram showing the whole photoelectric conversion device [Figure 13] 1 is a cross-sectional view showing a cross section of a photoelectric conversion device; [Figure 14] A plan view showing a configuration of a transistor. [Figure 15] Block diagram showing the pixel configuration [Figure 16] A diagram showing the operation of a pixel [Figure 17] Block diagram showing the whole photoelectric conversion device [Figure 18] Block diagram showing the whole photoelectric conversion device [Figure 19] Block diagram showing the whole photoelectric conversion device [Figure 20] A diagram showing the configuration of a photoelectric conversion system. [Figure 21] A diagram showing the configuration and operation of a moving object DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Each embodiment will be described below with reference to the drawings.

[0010] In the following embodiments, an image pickup device will be mainly described as an example of a photoelectric conversion device. However, each embodiment is not limited to an image pickup device, and can be applied to other examples of photoelectric conversion devices. For example, a distance measuring device (a device for measuring distance using focus detection or TOF (Time Of Flight)) or a photometric device (a device for measuring the amount of incident light) may be used.

[0011] The conductivity types of the transistors described in the following embodiments are merely examples and are not limited to those described in the examples. The conductivity types described in the embodiments can be changed as appropriate, and the potentials of the gate, source, and drain of the transistors are changed as appropriate.

[0012] For example, in the case of a transistor operated as a switch, the low and high levels of the potential supplied to the gate may be reversed in accordance with the change in the conductivity type, as compared to the description in the embodiment. The conductivity type of the semiconductor region described in the embodiment described below is also merely an example, and is not limited to the conductivity type described in the embodiment. The conductivity type may be changed as appropriate from the conductivity type described in the embodiment, and the potential of the semiconductor region may be changed as appropriate in accordance with this change.

[0013] In addition, in the following embodiments, the connection between elements of a circuit may be described. In this case, even if another element is interposed between the elements of interest, the elements of interest are treated as being electrically connected to each other unless otherwise specified. For example, assume that an element A is connected to one node of a capacitive element C having multiple nodes, and an element B is connected to the other node. Even in such a case, the elements A and B are treated as being electrically connected to each other unless otherwise specified. In addition, when elements are connected to each other without other elements being interposed, they may be described as being directly connected. In the above example, when no other elements are provided between the element A and the capacitive element C, it can be said that the element A and the capacitive element C are directly connected.

[0014] Metallic members such as wiring and pads described in this specification may be composed of a single metal element or may be a mixture (alloy). For example, wiring described as copper wiring may be composed of a single copper element or may be composed mainly of copper and further contain other components. Also, for example, pads connected to external terminals may be composed of a single aluminum element or may be composed mainly of aluminum and further contain other components (e.g., copper). The copper wiring and aluminum pads shown here are examples and can be changed to various metals.

[0015] Moreover, the wiring and pads shown here are one example of metal members used in a photoelectric conversion device, and the present invention can also be applied to other metal members.

[0016] Each embodiment will be described below with reference to the drawings.

[0017] (First embodiment) FIG. 1 is a block diagram of a photoelectric conversion device according to this embodiment.

[0018] The photoelectric conversion device 800 includes a pixel array section 801, a readout section 802, and a control section 803. The pixel array section 801 includes an R pixel 810, a G pixel 811, and a B pixel 812, which are first pixels that generate signals corresponding to the brightness of incident light. The R pixel is a first pixel to which light that has passed through a color filter corresponding to red is incident. The G pixel is a first pixel to which light that has passed through a color filter corresponding to green is incident. The B pixel is a first pixel to which light that has passed through a color filter corresponding to blue is incident. Hereinafter, the pixels that generate signals corresponding to brightness may be referred to as brightness pixels.

[0019] The pixel array unit 801 also has an event detection pixel 813, which is a second pixel that generates an event signal. The first pixel and the second pixel are configured to include three first pixels (R pixel 810, G pixel 811, B pixel 812) and one second pixel in an array of two rows and two columns. The pixel array unit 801 has a configuration in which two rows and two columns of arrays are periodically arranged. Note that the pixel array unit 801 does not have a light-shielded pixel, but may have a light-shielded pixel. The light-shielded pixel may have the same pixel configuration as the R pixel 810, the G pixel 811, and the B pixel 812, and may have a configuration in which the photoelectric conversion unit of each pixel is shielded from light. Also, a light-shielded pixel having the same pixel configuration as the event detection pixel 813 and shading the photoelectric conversion unit of the event detection pixel 813 may be included. Also, a pixel (white pixel) without a color filter may be further provided. The R, G, and B color filters are merely an example, and complementary color filters may be used, i.e., a cyan, magenta, and yellow color filter arrangement may be used.

[0020] The readout unit 802 performs various processes on the signals output from the pixel array unit 801. The various processes include analog-to-digital conversion, correlated double sampling, addition of signals from multiple pixels, signal correction, and the like.

[0021] The control unit 803 controls the reading of pixels in the pixel array unit 801. The control unit 803 controls the first pixels for each pixel row, thereby performing vertical scanning to read signals from the corresponding first pixels. The control unit 803 also includes an arbitration circuit, which sequentially selects the second pixels in which an event is detected from among the multiple second pixels. As a result, event signals are sequentially read out from the multiple second pixels to the readout unit 802. In other words, the arbitration circuit is a circuit that performs control to arbitrate the readout order from the multiple second pixels in which an event is detected.

[0022] FIG. 2 is a diagram showing the configuration of the photoelectric conversion device of this embodiment. The photoelectric conversion device of this embodiment has a structure of a stacked sensor in which a semiconductor component 1 and a semiconductor component 2 are stacked. The semiconductor component 1 is provided with a readout unit 802 and a control unit 803 described in FIG. 1. The semiconductor component 2 is provided with a pixel array unit 801 described in FIG. 1. Note that, although a structure in which two semiconductor components are stacked is shown here, a structure in which another semiconductor component is further stacked may be used. In that case, a part of the readout unit 802 may be arranged in one semiconductor component, and another part may be arranged in another semiconductor component. In this case, as a part of the readout unit 802, a circuit for processing signals (signals corresponding to brightness) of a plurality of first pixels may be arranged in one semiconductor component. And, as another part of the readout unit 802, a circuit for processing signals (event detection signals) of a plurality of second pixels may be arranged in another semiconductor component.

[0023] FIG. 3 is a cross-sectional view of the photoelectric conversion device shown in FIG. 2, corresponding to a part of the portion along the line AB shown in FIG.

[0024] The semiconductor component 1 has a semiconductor layer 100 and a wiring structure 10 (second wiring structure). The semiconductor layer 100 is provided with MOS transistors M1 and M2, which are elements included in the readout unit 802 or the control unit 803, and an element isolation unit 101. The semiconductor layer 100 is typically a semiconductor substrate. This semiconductor substrate is typically made of single crystal silicon and has a thickness of 100 to 800 μm. The MOS transistor M1 is a first element included in the semiconductor layer 100, and the MOS transistor M2 is a second element included in the semiconductor layer 100. The semiconductor layer 100 may be a compound semiconductor substrate, such as a GaAs substrate.

[0025] The wiring structure 10 has interlayer insulating films 103, 106, 109 and an insulating film 112. Wiring layers 105, 107, 111 are provided corresponding to the interlayer insulating films 103, 106, 109. Each of the interlayer insulating films 103, 106, 109 typically has a silicon oxide film (SiO2 film) and a silicon carbide film (SiC film). Note that the material is not limited to these, and silicon nitride film (Si3N4 film) and silicon oxynitride film (Si x O y N z Alternatively, the wiring may be a film containing a metal (x, y, z are arbitrary values). The wiring included in each of the wiring layers 105 and 107 is copper wiring. On the other hand, the wiring included in the wiring layer 111 is aluminum wiring. Inside the interlayer insulating films 103, 106, and 109, contact plugs 104 and via plugs 108100 that connect the wiring layers together are provided. The contact plugs 104 are made of tungsten. The via plugs 108 are made of copper. The wiring of the wiring layer 107 and the via plugs 108 are integrally formed by a dual damascene process. The via plugs 110 are made of tungsten.

[0026] A via 312 and a bonding member 311 are further provided inside the insulating film 112 (second insulating film). The bonding member 311 is provided inside a recess formed inside the insulating film 112. Both the via 312 and the bonding member 311 contain copper. The bonding member 311 and the via 312 are integrally formed by a dual damascene process. Although not shown, a barrier metal may be provided on the outer periphery of each of the copper wiring of the wiring layers 105 and 107, the via plug 108, the via 312, and the bonding member 311. The barrier metal can be formed of titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride, and tungsten (W), or an alloy of a combination of a plurality of these. This makes it possible to suppress the diffusion of copper from the copper wiring of the wiring layers 105 and 107, the via plug 108, the via 312, and the bonding member 411. A bonding member 411 that is not connected to the via is further provided inside the insulating film 112. The joining member 411 may be electrically floating.

[0027] Semiconductor component 2 has a semiconductor layer 200 and a wiring structure 20 (first wiring structure).

[0028] The semiconductor layer 200 is provided with a photodiode 230, a semiconductor region 231, and a gate electrode 232 of an event detection pixel 813, which is one of the second pixels. The semiconductor region 231 is one of the source and drain of a MOS transistor, which is a second element provided in the second pixel. Note that the MOS transistor having the gate electrode 232 and the semiconductor region 231 shown in the figure is a signal output transistor provided in the R pixel 810, and is not limited to a transfer transistor.

[0029] The semiconductor layer 200 is provided with a photodiode 220 having an R pixel 810 which is one of the first pixels, a semiconductor region 221, and a gate electrode 222. The semiconductor region 221 is one of the source and drain of a MOS transistor which is a first element possessed by the first pixel. Note that the MOS transistor having the gate electrode 222 and the semiconductor region 221 shown in the figure is a signal output transistor possessed by the R pixel 810, and is not limited to a transfer transistor.

[0030] Light is incident on each of the photodiodes 220 and 230 through an optical member. The optical member includes a microlens 515 and a color filter layer 514. The color filter layer 514 is provided with color filters corresponding to different colors depending on the pixel as shown in FIG. 1. A metal oxide film 511, an anti-reflection film 512, and an insulating film 513 are provided between the color filter layer 514 and the semiconductor layer 200. The metal oxide film 511 can be a fixed charge film (pinning film) having a negative fixed charge. For example, it can be an aluminum oxide (Al2O3 film). By providing the metal oxide film 511, it is possible to reduce the dark current component in the semiconductor layer 200. The anti-reflection film 512 can be, for example, a tantalum oxide film. The insulating film 513 can be, for example, a silicon oxide film, and may further include a film of another material (silicon nitride film, silicon nitride film, etc.).

[0031] The semiconductor layer 200 has a first face F1 which is an incident face on which light is incident, and a second face F2 which is a face opposite to the first face F1. A gate electrode of a transistor is provided on the second face F2.

[0032] Semiconductor layer 100 has a third face F3 and a fourth face F4 opposing the third face. Between the third face F3 and the second face F2, wiring structure 10 and wiring structure 20 are provided. Between wiring structure 10 and the third face F3, wiring structure 20 is provided.

[0033] The semiconductor layer 200 is provided with an element isolation section 201. The element isolation section 201 is formed with an STI (Shallow Trench Isolation) structure. However, the present invention is not limited to this example, and may be a DTI (Deep Trench Isolation) structure or a LOCOS (LOCal Oxidation of Silicon) structure. The semiconductor layer 200 is typically a semiconductor substrate. The semiconductor substrate is typically made of single crystal silicon and has a thickness of 1 to 10 μm. The semiconductor layer 200 may be a compound semiconductor substrate such as a GaAs substrate. The semiconductor layer 200 may further include a single crystal such as germanium on the incident surface of the layer made of single crystal silicon. This configuration can further improve the sensitivity to infrared light. The germanium may be used as an intrinsic semiconductor, but may also be an impurity semiconductor doped with impurities such as phosphorus (P), arsenic (As), antimony (Sb), boron (B), aluminum (Al), or gallium (Ga). Germanium is just one example, and materials with bandgaps different from that of silicon can be used, such as InGaAs (indium gallium arsenide) and GeSn (germanium tin).

[0034] The wiring structure 20 has interlayer insulating films 203, 206, 209 and an insulating film 212. Wiring layers 205, 207, 211 are provided corresponding to the interlayer insulating films 203, 206, 209, respectively. Each of the interlayer insulating films 203, 206, 209 typically has a silicon oxide film (SiO2 film) and a silicon carbide film (SiC film). Note that the material is not limited to these, and silicon nitride film (Si3N4 film) and silicon oxynitride film (Si x O y N z Alternatively, the wiring may be a film including a metal (x, y, z are arbitrary values). The wiring included in each of the wiring layers 205, 207, 211 is copper wiring. Inside the interlayer insulating films 203, 206, 209, a contact plug 204 and via plugs 208, 210 connecting the wiring layers are provided. The contact plug 204 is made of tungsten. The via plugs 208, 210 are made of copper. The wiring of the wiring layer 207 and the via plug 208 are integrally formed by a dual damascene process. Also, the wiring of the wiring layer 211 and the via plug 210 are also integrally formed by a dual damascene process.

[0035] A via 322 and a bonding member 321 are further provided inside the insulating film 212 (first insulating film). The bonding member 321 is provided inside a recess formed inside the insulating film 212. Both the via 322 and the bonding member 321 contain copper. The bonding member 321 and the via 322 are integrally formed by a dual damascene process. Although not shown, a barrier metal may be provided on the outer periphery of each of the copper wiring of the wiring layers 205, 207, and 211, the via plug 208, the via 322, and the bonding member 321. The barrier metal can be formed of titanium (Ti), titanium nitride (TiN), tantalum (Ta), tantalum nitride, and tungsten (W), or an alloy of a combination of a plurality of elements. This can suppress the diffusion of copper from the copper wiring of the wiring layers 205, 207, and 211, the via plug 208, the via 322, and the bonding member 421. A bonding member 421 that is not connected to a via is further disposed inside the insulating film 212. The bonding member 421 may be electrically floating. Also, a via may be connected to only one of the bonding portions 411 and 421 so that a predetermined potential is applied. In this case, a via is not connected to the other bonding portion.

[0036] The semiconductor component 1 and the semiconductor component 2 are bonded at a bonding surface 400. The bonding at the bonding surface 400 is achieved by bonding insulating films to each other using an insulating film 112 and an insulating film 212. Then, the bonding between metal members is achieved by a connecting member 411 and a connecting member 421, and a bonding member 311 and a bonding member 321. The bonding between insulating films and between metal members on the same surface is also called a hybrid bonding. The bonding between the metal members includes a bonding portion MB1 that transmits a signal output by the first pixel and a bonding portion MB2 that transmits a signal output by the second pixel. An R pixel 810, which is one of the first pixels, and a MOS transistor M1, which is a first element provided in the semiconductor layer 100, are connected by a first electrical path via a bonding portion MB1 that is a first metal portion. This first electrical path includes wiring layers 105, 107, 111, 205, 207, and 211, and via plugs that connect each wiring layer. An event detection pixel 813 which is one of the second pixels and a MOS transistor M2 which is a second element provided in the semiconductor layer 100 are connected by a second electrical path through a junction MB2 which is a second metal part. This second electrical path includes wiring layers 105, 107, 111, 205, 207, 211 and via plugs which connect the wiring layers.

[0037] In the configuration of FIG. 3, the width S1 of the joint MB1 for transmitting a signal from the second pixel is made larger than the width S2 of the joint MB2 for transmitting a signal from the first pixel.

[0038] Fig. 4 is a diagram showing the structure of the bonding member 311 in a plan view seen from above the first surface F1, which is the light incident surface. Among the reference symbols shown in Fig. 4, the reference symbols also shown in Fig. 3 correspond to each other.

[0039] In FIG. 4(a), the joining member 311 included in the joint MB1 and the joining member 311 included in the joint MB2 are plan views showing the structures in plan view. The widths S1 and S2 shown in FIG. 4(a) correspond to the widths S1 and S2 shown in FIG. 3. The widths S1 and S2 are each the length along the X direction in FIG. 4(a), which is the first direction. The joining member 311 of the joint MB1 and the joining member 311 of the joint MB2 are both arranged in a predetermined layer located at a predetermined depth position from the second surface F2 of the semiconductor layer 200.

[0040] Further, the joining member 311 included in the joint MB1 has a length of a width T1, which is the length along the Y direction in FIG. 4(a), which is the second direction. Also, the joining member 311 included in the joint MB2 has a length of a width T2, which is the length along the Y direction in FIG. 4(a), which is the second direction. The width T1 is longer than the width T2. That is, the relationship is S2 < S1 and T2 < T1. Also, the relationship may be S1 = T1 and S2 = T2, or the relationship may be S1 ≠ T1 and S2 ≠ T2. That is, at least one of the length and width may be different between the joining member 311 of the joint MB1 and the joining member 311 of the joint MB2. The dimensions of the joining member 311 include the length and the width. Also, the dimensions may further include the thickness. In this case, the length and width of the joining member 311 of the joint MB1 and the joining member 311 of the joint MB2 may be the same, while the thicknesses may be made different. In the case of showing dimensions limited to the length and width, they may also be referred to as planar dimensions. Also, in terms of the respective areas of the joining member 311 of the joint MB2 and the joining member 311 of the joint MB1, the relationship is S2 × T2 < S1 × T1. By setting this relationship, the resistance of the joint MB2 can be made smaller than the resistance of the joint MB1.

[0041] 4(a), both of the joints MB1 and MB2 have four vias 312 connected to the joint member 311. On the other hand, in FIG. 4(b), the number of vias 312 connected to the joint member 311 in the joint MB1 is reduced to two. This configuration allows the size of the joint MB2 to be further reduced. Note that, although the structures of the joint member 311 and the vias 312 are shown in FIGS. 4(a) and 4(b), the joint member 321 and the vias 322 can also have the same structures as the joint member 311 and the vias 312.

[0042] FIG. 5 is an enlarged cross-sectional view of the vicinity of the junctions MB1 and MB2 shown in FIG. 3. The via 322 has a length W1 shorter than the length W2 of the via 312. On the other hand, the via 312 has the same length W1 in each of the junctions MB1 and MB2. Also, the via 322 has the same length W2 in each of the junctions MB1 and MB2. This structure allows the junctions MB1 and MB2 to be formed simultaneously. On the other hand, from the viewpoint of ease of manufacture, making the lengths of the vias 312 and 322 different in the junctions MB1 and MB2 may lead to an increase in the number of steps in the manufacturing process. Therefore, in order to make the resistances different in the junctions MB1 and MB2, it is preferable to make the dimensions or planar dimensions of the junction members 311 and 321 different rather than making the via lengths different.

[0043] Another form of the joint is shown in Fig. 6. In Fig. 5, vias are connected to each of the joint members 311 and 321. In the form of Fig. 6, a structure is adopted in which auxiliary joints ZB1 and ZB2 are provided for each of the joint members 311 and 321.

[0044] FIG. 7 is a plan view showing the structure of the joints MB1 and MB2 shown in FIG. 6 when viewed from the first face F1, which is the incident face.

[0045] In the structures of Figs. 6 and 7, the joining member 311 is circular. The widths S1 and S2 of the joining members 311 of the joining portions MB1 and MB2 are the diameters of the joining members 311. The dimensions of the joining members 311 in this case are the diameters of the joining portions MB1 and MB2. The dimensions may include the thickness of the joining members 311, as described above. The area of ​​the joining members 311 is given as S1 x S1 x (1 / 4) x π for the joining portion MB1, and S2 x S2 x (1 / 4) x π for the joining portion MB2. Although the joining members 311 are treated as being perfect circles here, they may be elliptical. In this case, the dimensions of the joining members include the major and minor axes. That is, at least one of the major and minor axes may be different between the joining members of the joining portions MB1 and MB2. In addition, when the joining member is elliptical, the area of ​​the joining member 311 can be obtained by multiplying the major axis by the minor axis by π. Whether the joining member 311 is circular or elliptical, the dimensions or planar dimensions of the joining portion MB1 and the joining portion MB2 can be made different. In addition, the area of ​​the joining member 311 can be set such that the joining portion MB1 is smaller than the joining portion MB2.

[0046] In this embodiment, the structure of the electrical path connected to the R pixel 810, which is one of the brightness pixels that outputs a signal corresponding to brightness, has been described, but the structures of the electrical paths connected to the G pixel and the B pixel can be similar. Note that, although the following description in this specification mainly focuses on the R pixel 810, this configuration can also be applied to the G pixel 811 and the B pixel 812.

[0047] On the other hand, the auxiliary joints ZB1 and ZB2 are rectangular in shape. This structure allows the appropriate force to be applied to the joint surfaces of the joints MB1 and MB2, resulting in more accurate joints.

[0048] In the embodiment shown in FIG. 3 and FIG. 5, the wiring of the wiring layer 111 is aluminum wiring, but the present invention is not limited to this example and may be copper wiring.

[0049] FIG. 8 is an example of a circuit block diagram of the photoelectric conversion device of this embodiment. The configuration of one column of pixels in the pixel array unit shown in FIG. 1 is described. A signal line VL1 is connected to a plurality of R pixels 810, each of which is a brightness pixel. A signal line VL2 is connected to a plurality of event detection pixels 813. The signal line VL1 is connected to a readout circuit 8020 of the readout unit 802 via a joint MB1. The signal line VL2 is connected to a readout circuit 8021 of the readout unit 802 via a joint MB2. In this configuration, by making the dimensions of the joint MB2 smaller than those of the joint MB1, the parasitic capacitance component associated with the joint MB2 is reduced, and the signal change of the signal line VL2 can be made faster. Therefore, the signal readout of the event detection pixel 813 can be performed at high speed, and event detection can be performed at high speed. In addition, this configuration makes it possible to suitably make the maximum amplitude of the output signal of the event detection pixel 813 smaller than the maximum amplitude of the output signal of the brightness pixel. By reducing the size of the junction MB2 and reducing the parasitic capacitance component, the attenuation and response delay of the output signal can be reduced, and therefore the maximum amplitude can be reduced, thereby reducing the power consumption of the event detection pixel 813.

[0050] However, this is just one example. For example, if the dimension of the joint MB1 is larger than the dimension of the joint MB2, the resistance value may be smaller and the signal change rate of the signal line VL1 may be faster. With this configuration, the effect of being able to read out the signals of the brightness pixels at high speed is obtained.

[0051] The readout circuit 8020 can perform correlated double sampling, amplification, analog-to-digital conversion, and the like, on the signals output by the luminance pixels.

[0052] The readout circuit 8021 can function as an event detection circuit. This event detection circuit has a function of comparing the pixel value of the event detection pixel 813 at a given time with the pixel value of the event detection pixel 813 before the given time, and detecting the occurrence of an event.

[0053] Another example of the circuit block diagram is shown in Fig. 9. In the configuration of Fig. 9, one junction MB2 is connected to each of the event detection pixels 813. Readout circuits 8021a and 8021b are connected to each of the multiple junctions MB2. Each of the readout circuits 8021a and 8021b can function as an event detection circuit.

[0054] In the embodiment shown in FIG. 9, the number of joints MB2 corresponding to the event detection pixels 813 is greater than the number of joints MB1 corresponding to the brightness pixels in the joints arranged corresponding to one pixel row. By reducing the area of ​​the joints MB2 to which the event detection pixels 813 are connected, the degree of freedom in arranging the joints MB1 can be improved. From another perspective, a greater number of joints MB2 can be provided compared to the case where the area of ​​the joints MB2 is the same as the area of ​​the joints MB1. Therefore, the signals of the event detection pixels 813 can be read out in a greater number of parallel connections. In other words, the signals corresponding to the multiple event detection pixels 813 can be read out at high speed.

[0055] 9, one joint MB2 is provided for one event detection pixel 813, but the arrangement is not limited to this. For example, one joint MB2 may be shared by multiple event detection pixels 813 located in the same column. Also, one joint MB2 may be shared by multiple event detection pixels 813 located in the same row. Also, one joint MB2 may be shared by multiple event detection pixels 813 located in multiple rows and multiple columns.

[0056] In addition, it is easy to arrange the joint MB2 connected to the event detection pixel 813 in the inner region of the pixel array unit 801 shown in FIG. 2 in plan view with respect to the first surface F1, which is the incident surface. An example of the arrangement is shown in FIG. 10. In FIG. 10, the joint MB2 is arranged inside the pixel array unit 801 in plan view with respect to the first surface F1, which is the incident surface. In particular, in the form of the circuit block diagram shown in FIG. 9, the joint MB2 is provided corresponding to each of the event detection pixels 813, so it is preferable to arrange it in the inner region of the pixel array unit 801. However, when it is arranged in the inner region of the pixel array unit 801, the pitch at which the joint MB2 is arranged is restricted by the pitch of the pixels. In the case of this embodiment, since the area of ​​the joint MB2 connected to the event detection pixel is small, even if the pitch of the pixels is narrowed, the joint MB2 can be arranged suitably. On the other hand, the joint MB1 may be arranged outside the region of the pixel array unit 801 as shown in FIG. 10. In addition, a pad for connecting to the outside of the photoelectric conversion device may be provided on the semiconductor component 1 or the semiconductor component 2. This pad may be a pad for outputting a signal of the photoelectric conversion device, a pad for supplying a power supply voltage (VDD, GND, etc.) to the photoelectric conversion device, or a pad for inputting a signal such as a clock signal or a control signal to the photoelectric conversion device. Such a pad is provided on the semiconductor component 1 or on the outer periphery of the semiconductor component. In FIG. 10, an example in which this pad PAD is provided on the semiconductor component 2 is shown, but it may be provided on the semiconductor component 1. When it is provided on the semiconductor component 1, typically, a pad opening is provided on the semiconductor component 2 for electrical connection with the pad on the semiconductor component 1. Regardless of whether the pad is provided on the semiconductor component 1 or the semiconductor component 2, the joint MB1 is in a form arranged between the pad and the outer periphery of the pixel array section 801 in a plan view with respect to the first surface F1. In FIG. 10, the joint MB1 is provided between the pad PAD provided on the semiconductor component 2 and the outer periphery of the pixel array section 801. By arranging in this manner, it is possible to improve the degree of freedom in the layout of the joints MB2 connected to the event detection pixels. Note that the pads PAD described here can be configured to mainly contain aluminum.Typically, the pad may be a pad mainly containing aluminum and a small amount of copper. An example of the periphery of the pixel array section 801 may include a region in which light-shielded pixels are arranged outside the opening region into which light is incident. In this case, the edge of the region in which the light-shielded pixels are arranged may be the periphery. The pad may be provided on the first face F1 shown in FIG. 3, or may be provided in a region closer to the microlens 515 than the first face F1. The pad may be provided inside a groove provided inside the semiconductor layer 100 from the fourth face F4 side shown in FIG. 3.

[0057] 10, the joint MB1 is provided between the outer periphery of the opening region where the incident light is incident and the pad PAD. This opening region can be the entire pixel array section 801 shown in Fig. 10, or a part of the pixel array section 801 can be the opening region and the other part can be the region where the light-shielded pixels are provided.

[0058] Although an example is shown in which one signal line is provided for one column of lightness pixels, more signal lines may be provided.

[0059] In this embodiment, the area of ​​the junctions included in the electrical path connected to the event detection pixel 813 is made smaller than the area of ​​the junctions included in the electrical path connected to the luminance pixels 810 to 812 that generate signals corresponding to luminance, which has the effect of enabling the signal of the event detection pixel 813 to be read out at high speed, as described above.

[0060] In the present embodiment, the example in which the joints MB1 and MB2 transmit the signals output from the first pixel and the second pixel has been described.

[0061] However, the present invention is not limited to this example, and the junctions MB1 and MB2 may transmit signals for controlling the first and second pixels. The signals for controlling the first and second pixels refer to a reset operation of the photoelectric conversion unit or the input node of the output transistor that outputs a signal, a selection operation for outputting a signal for each pixel row, etc. In this case, too, there is an advantage that the second pixel can be controlled at high speed.

[0062] In this embodiment, the dimensions or planar dimensions of the joint members 311 of the joints MB1 and MB2 are compared, but the dimensions or planar dimensions of the joint members 321 may be compared.

[0063] Second embodiment The present embodiment will be described focusing on the differences from the first embodiment. In the present embodiment, the area of ​​the joint MB1 connected to the luminance pixels is made smaller than the area of ​​the joint MB2 connected to the event detection pixels.

[0064] The configuration of the photoelectric conversion device can be the same as that shown in FIGS. 1 and 2 described in the first embodiment.

[0065] Fig. 11 is a cross-sectional view of the photoelectric conversion device of this embodiment. Members having the same functions as those shown in Fig. 3 are denoted in Fig. 4 with the same reference numerals as those in Fig. 3.

[0066] In this embodiment, the width S1 of the joint member 311 of the joint MB1 connected to the R pixel 810, which is a brightness pixel, is made smaller than the width S2 of the joint member 311 of the joint MB2 connected to the event detection pixel 813. The other structures are similar to the structure shown in FIG. 3 of the first embodiment.

[0067] Note that the structures of FIGS. 4, 5, 6, and 7 described in the first embodiment can also be applied to this embodiment. In this application, although the joint part MB1<MB2 was described in the first embodiment, it may be applied in the reverse relationship. The joint part having the structure of FIG. 4(b) was the joint part MB2 in the first embodiment, but may be the joint part MB1 in this embodiment.

[0068] Also, in this embodiment, the configurations of the circuit blocks of FIGS. 8 and 9 described in the first embodiment can be applied.

[0069] In this embodiment, the area of the joint part MB2 connected to the brightness pixel is made smaller than the area of the joint part MB1 connected to the event detection pixel. Thereby, the signal of the brightness pixel can be read out at a higher speed. Thereby, one or both of the high resolution and high frame rate of the image using the signal of the brightness pixel can be realized.

[0070] (Third Embodiment) This embodiment will be described centering on the points different from the first embodiment.

[0071] The circuit block diagram of the photoelectric conversion device of this embodiment is shown in FIG. 12. In this embodiment, the semiconductor component 2 has an AD conversion circuit 1101. The AD conversion circuit 1101 performs analog-digital conversion on the signal output by the brightness pixel.

[0072] FIG. 13 is a cross-sectional view of the photoelectric conversion device of this embodiment. For the members having the same functions as the members shown in FIG. 3, the same reference numerals as those given in FIG. 3 are also given in FIG. 13.

[0073] In the configuration shown in FIG. 13, the transistor group MG1 included in the AD conversion circuit 1101 shown in FIG. 12 is shown. The transistor group MG1 typically has a plurality of transistors.

[0074] The junction MB1 outputs a digital signal output by the transistor group MG1 to the transistor M2 provided in the semiconductor layer 100 via the junction MB1. Both the junction MB1 and the junction MB2 have the same width S3. Although the length in the depth direction is not shown, in this embodiment, the junction members 321 provided on the junction MB1 and the junction members 311 provided on the junction MB2 have the same area.

[0075] In this embodiment, the planar dimensions (gate length, gate width) of the MOS transistors connected to the junctions MB1 and MB2 are made different. That is, at least one of the gate length and the gate width is made different. Alternatively, both the gate length and the gate width may be made different.

[0076] 14 shows a plan view of the structure of the MOS transistor connected to the junction MB1. The configuration shows transistors MT1 and MT2. Here, an example is shown in which transistors MT1 and MT2 forming a NOT gate circuit are provided as transistors that are part of a logic circuit. The transistors MT1 and MT2 are connected to a common gate electrode 601. However, the NOT gate circuit shown here is an example of a logic circuit, and this embodiment can be applied to other logic circuits as well.

[0077] The transistor MT1 is provided in a P-type well region. The transistor MT1 is an N-type transistor, and its source and drain are N-type semiconductor regions. One of the source and drain of the transistor MT1 is connected to a power supply wiring 603 that supplies a ground potential (GND potential) via a contact. The other of the source and drain of the transistor MT1 is connected to an output wiring 604 via a contact.

[0078] The transistor MT2 is provided in the N-well region NWL. The transistor MT2 is a P-type transistor, and its source and drain are each a P-type semiconductor region. One of the source and drain of the transistor MT2 is connected via a contact to a power supply wiring 602 to which a power supply voltage VDD is supplied. The other of the source and drain of the transistor MT2 is connected to an output wiring 604 via a contact.

[0079] The transistors M1 and M2 and the transistors included in the transistor group MG1 shown in FIG. 10, and the transistors of the event detection pixel 813 can be applied as either the transistors MT1 or MT2 shown in FIG. 14. Here, the description will be given by applying it to the transistor MT1. The gate width of the transistor MT1 is width GW. The gate length of the transistor MT1 is length GL. The size of the transistor can be considered as gate width x gate length, and can be treated here as GW x GL.

[0080] In this embodiment, any of the forms shown in Table 1 below can be used. In Table 1, the numbers shown in the boxes corresponding to columns (1) and (2) indicate the gate width of the transistor, and the larger the number, the larger the gate width of the transistor. In Table 1, the letters shown in the boxes corresponding to columns (3) and (4) indicate the gate width of the transistor, and the closer to Z in alphabetical order, the larger the gate width of the transistor. The following combinations No. 1 to 6 can be implemented. The larger the gate width of the transistor, the greater the driving force of the transistor.

[0081] [Table 1]

[0082] In the above description, the gate width of each transistor is different. On the other hand, the gate length of each transistor may be different. That is, in Table 1, the numbers in the boxes corresponding to columns 1) and (2) represent the gate length of the transistor. In this case, the larger the number, the smaller the gate length of the transistor. In Table 1, the letters in the boxes corresponding to columns (3) and (4) represent the gate length of the transistor. In this case, the closer to Z in alphabetical order, the smaller the gate length of the transistor. With such a relationship, the above combinations No. 1 to 6 can be implemented. The smaller the gate length, the greater the driving force of the transistor.

[0083] In this embodiment, there is a first conductor included in the first electrical path and located in a predetermined layer between the first surface and the fourth surface, and a second conductor included in the second electrical path and located in a predetermined layer, and the planar dimensions of the first conductor and the second conductor are made different when viewed in a planar view relative to the first surface.

[0084] In No. 3, No. 4, No. 5, and No. 6 in Table 1 above, one of the transistors M1 and M2 provided in the semiconductor layer 100, which is a specified layer between the first face F1 and the fourth face F4 shown in Figure 13, is a first conductor, and the other is a second conductor.

[0085] No. 1, No. 2, No. 5, and No. 6 in Table 1 above will be explained. One of the transistor in the transistor group MG1 provided in the semiconductor layer 200, which is a predetermined layer between the first face F1 and the fourth face F4 shown in Fig. 13, and the transistor included in the event detection pixel 813 is a first conductor, and the other is a second conductor.

[0086] In the above Table 1, No. 1, No. 3, and No. 5 are configurations in which the gate width of the transistor related to the output signal of the event detection pixel 813 is made larger than the gate width of the transistor related to the output signal of the R pixel 810. With this configuration, the output signal of the event detection pixel 813 can be read out at high speed. On the other hand, in the above Table 1, No. 2, No. 4, and No. 6 are configurations in which the gate width of the transistor related to the output signal of the R pixel 810 is made larger than the gate width of the transistor related to the output signal of the event detection pixel 813. With this configuration, the output signal of the R pixel 810 can be read out at high speed. Note that, in the case where the gate lengths are made different, No. 1, No. 3, and No. 5 are configurations in which the gate length of the transistor related to the output signal of the event detection pixel 813 is made smaller than the gate length of the transistor related to the output signal of the R pixel 810. With this configuration, the output signal of the event detection pixel 813 can be read out at high speed. No. 2, No. 4, and No. 6 are configurations in which the gate length of the transistor related to the output signal of the R pixel 810 is made smaller than the gate length of the transistor related to the output signal of the event detection pixel 813. With this configuration, the output signal of the R pixel 810 can be read out at high speed.

[0087] Furthermore, both the gate length and the gate width may be made different between the transistor related to the output signal of the R pixel 810 and the transistor related to the output signal of the event detection pixel 813. In this case, for example, the driving force of the transistor related to the output signal of the R pixel 810 is set higher than the driving force of the transistor related to the output signal of the event detection pixel 813. This makes it possible to read out the output signal of the R pixel 810 at high speed. Also, the driving force of the transistor related to the output signal of the event detection pixel 813 is set higher than the driving force of the transistor related to the output signal of the R pixel 810. This makes it possible to read out the output signal of the event detection pixel 813 at high speed.

[0088] In this way, the photoelectric conversion device of this embodiment can achieve suitable signal readout by differentiating the planar dimensions of the transistor related to the output signal of the event detection pixel 813 and the transistor related to the output signal of the brightness pixel.

[0089] (Fourth embodiment) The photoelectric conversion device of this embodiment will be described below. In this embodiment, the event detection pixel 813 is a pixel including an avalanche photodiode (APD).

[0090] 15, a photoelectric conversion element 1102 having an APD 1201 (corresponding to the event detection pixel 813 shown in FIG. 1) is provided in a semiconductor component 2, and other members are provided in a semiconductor component 1.

[0091] The APD1201 generates pairs of charges according to the incident light through photoelectric conversion. A voltage VL (first voltage) is supplied to the anode of the APD1201. A voltage VH (second voltage) higher than the voltage VL supplied to the anode is supplied to the cathode of the APD1201. A reverse bias voltage that causes the APD1201 to perform avalanche multiplication is supplied to the anode and cathode. With such a voltage supplied, the charges generated by the incident light undergo avalanche multiplication, generating an avalanche current.

[0092] When a reverse bias voltage is supplied, there are two modes: a Geiger mode in which the potential difference between the anode and cathode is greater than the breakdown voltage, and a linear mode in which the potential difference between the anode and cathode is close to or less than the breakdown voltage.

[0093] An APD operated in Geiger mode is called a SPAD. For example, the voltage VL (first voltage) is -30V, and the voltage VH (second voltage) is 1V. The APD1201 may be operated in either linear mode or Geiger mode. A SPAD is preferable because the potential difference is larger than that of a linear mode APD, making the effect of withstanding voltage more noticeable.

[0094] The quench element 1202 is connected to a power supply that supplies a voltage VH and the APD 1201. The quench element 1202 functions as a load circuit (quench circuit) during signal multiplication by avalanche multiplication, and has a function of suppressing avalanche multiplication by suppressing the voltage supplied to the APD 1201 (quench operation). The quench element 1202 also has a function of returning the voltage supplied to the APD 1201 to the voltage VH by flowing a current equivalent to the voltage drop caused by the quench operation (recharge operation).

[0095] The signal processing unit 1103 has a waveform shaping unit 1210, a counter circuit 1211, and a selection circuit 1212. In this specification, it is sufficient that the signal processing unit 1103 has any one of the waveform shaping unit 1210, the counter circuit 1211, and the selection circuit 1212.

[0096] The waveform shaping unit 1210 shapes the potential change of the cathode of the APD 1201 obtained when a photon is detected, and outputs a pulse signal. For example, an inverter circuit is used as the waveform shaping unit 1210. Although an example in which one inverter is used as the waveform shaping unit 1210 is shown in Fig. 15, a circuit in which a plurality of inverters are connected in series may be used, or another circuit having a waveform shaping effect may be used.

[0097] The counter circuit 1211 counts the pulse signal output from the waveform shaping unit 1210 and holds the count value. Furthermore, when a control pulse pRES is supplied via a drive line 1213, the signal held in the counter circuit 1211 is reset. This change in the count value can be used to detect an event. In other words, by detecting that the count value has changed by a predetermined value from the previously held count value, it is possible to detect that an event has occurred.

[0098] A control pulse pSEL is supplied to the selection circuit 1212 from the control unit 803 shown in Fig. 1 via a drive line 1214 in Fig. 15, and switches between electrical connection and non-connection between the counter circuit 1211 and the signal line 1113. The selection circuit 1212 includes, for example, a buffer circuit for outputting a signal.

[0099] Electrical connection may be switched by disposing a switch such as a transistor between the quench element 1202 and the APD 1201 or between the photoelectric conversion element 1102 and the signal processing unit 1103. Similarly, the supply of the voltage VH or the voltage VL to the photoelectric conversion element 1102 may be electrically switched using a switch such as a transistor.

[0100] In this embodiment, a configuration using a counter circuit 1211 has been shown. However, instead of the counter circuit 1211, a photoelectric conversion device may be configured to acquire pulse detection timing using a time-to-digital converter (hereinafter, TDC) and a memory. In this case, the generation timing of the pulse signal output from the waveform shaping unit 1210 is converted into a digital signal by the TDC. To measure the timing of the pulse signal, a control pulse pREF (reference signal) is supplied to the TDC from the control unit 803 in FIG. 1 via a drive line. The TDC acquires, as a digital signal, a signal obtained by converting the input timing of the signal output from each pixel via the waveform shaping unit 1210 into a relative time based on the control pulse pREF.

[0101] FIG. 16 is a diagram showing a schematic diagram of the relationship between the operation of an APD and an output signal.

[0102] Fig. 16(a) is a diagram excerpting the APD 1201, quench element 1202, and waveform shaping unit 1210 of Fig. 15. Here, the input side of the waveform shaping unit 1210 is node A, and the output side is node B. Fig. 16(b) shows the waveform change of node A in Fig. 16(a), and Fig. 16(c) shows the waveform change of node B in Fig. 16(a).

[0103] Between time t0 and time t1, a potential difference of VH-VL is applied to the APD 1201 in FIG. 16(a). When a photon is incident on the APD 1201 at time t1, avalanche multiplication occurs in the APD 1201, an avalanche multiplication current flows through the quench element 1202, and the voltage at nodeA drops. When the voltage drop amount becomes larger and the potential difference applied to the APD 1201 becomes smaller, the avalanche multiplication of the APD 1201 stops as at time t2, and the voltage level at nodeA does not drop by more than a certain value. After that, between time t2 and time t3, a current that compensates for the voltage drop from the voltage VL flows through nodeA, and at time t3, nodeA is stabilized to the original potential level. At this time, the part of the output waveform at nodeA that exceeds a certain threshold is shaped by the waveform shaping unit 1210 and output as a signal at nodeB.

[0104] In this manner, a pixel having an APD 1201 can be used as the event detection pixel 813.

[0105] In addition, the pixel configuration of the luminance pixels 810 to 812 and the event detection pixel 813 may be the same not only in this embodiment but also in all the embodiments. In this embodiment, the luminance pixels 810 to 812 may also be in the form of the photoelectric conversion element 1102 described in this embodiment. By making the pixel configuration of the luminance pixels 810 to 812 and the event detection pixel 813 the same, it is possible to dynamically change the allocation of the luminance pixels and the event detection pixels to the pixel array section 801. In other words, a pixel that operates as a luminance pixel in one frame operates as an event detection pixel in another frame. This allocation method can be switched depending on whether to prioritize high-speed readout of the event detection pixels as in the first embodiment or to prioritize signal readout of the luminance pixels as in the second embodiment.

[0106] Fifth embodiment In this embodiment, an embodiment of a stacked sensor including a plurality of semiconductor components will be described.

[0107] Fig. 17 is a functional block diagram corresponding to the first to fourth embodiments. In Fig. 17, an output from a light receiving unit 703 provided in the semiconductor component 2, which is included in the event detection pixel, is input to an event detection circuit unit 704 provided in the semiconductor component 1. Also, an output from a light receiving unit 701 provided in the semiconductor component 2, which is included in the brightness pixel, is input to an image processing unit 702 provided in the semiconductor component 1. The above-mentioned joint MB1 is provided on a first electrical path from the light receiving unit 701 to the image processing unit 702. Also, the above-mentioned joint MB2 is provided on a second electrical path from the light receiving unit 701 to the event detection circuit unit 704.

[0108] FIG. 18 is a functional block diagram showing another embodiment from FIG. 17. In the configuration of FIG. 18, an event detection circuit unit 704 is provided in the semiconductor component 2. Also, a neural network unit is provided in the semiconductor component 1. When the event detection circuit unit 704 outputs a digital signal corresponding to a change in the amount of incident light, the neural network unit performs processing of a Convolutional Neural Network (CNN). This digital signal can be a digital signal having a plurality of bits. On the other hand, when the event detection circuit unit 704 outputs a signal having a spike-shaped waveform corresponding to a change in the amount of incident light, the neural network unit performs processing of a Spiking Neural Network (SNN). The signal having a spike-shaped waveform can be regarded as a one-bit digital signal indicating whether or not a spike wave is generated. Note that the processing by the neural network unit is not limited to CNN and SNN. For example, various processing such as processing by a Recurrent Neural Network (RNN) and a Long Short Term Memory (LSTM) can be applied. Also, instead of the neural network unit, a circuit having a pattern recognition processing function may be provided.

[0109] 18, the above-mentioned junction MB1 is provided on a first electrical path from the light receiving unit 701 to the image processing unit 702. The above-mentioned junction MB2 is provided on a second electrical path from the event detection circuit unit 704 to an element (transistor) included in the neural network unit 705.

[0110] FIG. 19 is different from FIG. 17 and FIG. 18 in that it is a three-layer stacked sensor in which three semiconductor components are stacked. The first semiconductor component 1 is provided with an event detection circuit section 704. The second semiconductor component 2 is provided with a light receiving section 703 of an event detection pixel and a light receiving section 701 of a brightness pixel. The third semiconductor component 3 is provided with an image processing section 702. The first semiconductor component 1, the second semiconductor component 2, and the third semiconductor component 3 are each provided with a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer, in that order. Each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is typically a semiconductor substrate. The semiconductor substrate is typically formed of single crystal silicon, but may be a compound semiconductor substrate such as a GaAs substrate.

[0111] In this embodiment, the semiconductor component 1 and the semiconductor component 2 are typically bonded by the hybrid bonding described above. On the other hand, the semiconductor component 2 and the semiconductor component 3 are bonded only by bonding between the insulating films, not by hybrid bonding. A through electrode is used that penetrates the semiconductor layer (typically a silicon substrate) included in the semiconductor component 1. The process of providing this through electrode is also called Through Silicon Via (TSV). The through electrode electrically connects the semiconductor component 1 and the semiconductor component 3. Even in this embodiment, a joint MB1 is provided in the electrical path between the light receiving unit 701 and the image processing unit 702 by hybrid bonding of the semiconductor component 1 and the semiconductor component 2. A through electrode used in the TSV is connected to the wiring of the semiconductor component 2 connected to this joint MB1, and a signal is sent to the image processing unit 702 provided in the semiconductor component 3 via this through electrode. Even in this embodiment, the above-mentioned joint MB1 can be said to be provided in the first electrical path from the light receiving unit 701 to the image processing unit 702. The above-mentioned joint MB2 is provided on a second electrical path from the light receiving section 701 to the event detection circuit section 704.

[0112] Therefore, each of the above-described embodiments can be suitably implemented in any of the configurations shown in FIGS.

[0113] Sixth embodiment The photoelectric conversion system according to this embodiment will be described with reference to Fig. 20. Fig. 20 is a block diagram showing a schematic configuration of the photoelectric conversion system according to this embodiment.

[0114] The photoelectric conversion devices (imaging devices) described in the first to fifth embodiments are applicable to various photoelectric conversion systems. Examples of applicable photoelectric conversion systems include digital still cameras, digital camcorders, security cameras, copiers, fax machines, mobile phones, car-mounted cameras, and observation satellites. Camera modules equipped with an optical system such as a lens and an imaging device are also included in photoelectric conversion systems. FIG. 20 illustrates a block diagram of a digital still camera as an example of these.

[0115] 20 includes an image pickup device 1004, which is an example of a photoelectric conversion device, and a lens 1002 that forms an optical image of a subject on the image pickup device 1004. The photoelectric conversion system further includes an aperture 1003 that varies the amount of light passing through the lens 1002, and a barrier 1001 that protects the lens 1002. The lens 1002 and the aperture 1003 form an optical system that focuses light on the image pickup device 1004. The image pickup device 1004 is a photoelectric conversion device (image pickup device) according to any one of the above embodiments, and converts the optical image formed by the lens 1002 into an electrical signal.

[0116] The photoelectric conversion system also has a signal processing unit 1007 which is an image generating unit that generates an image by processing an output signal output from the imaging device 1004. The signal processing unit 1007 performs various corrections and compression as necessary to output image data. The signal processing unit 1007 may be formed on a semiconductor substrate on which the imaging device 1004 is provided, or may be formed on a semiconductor substrate separate from the imaging device 1004. Moreover, the imaging device 1004 and the signal processing unit 1007 may be formed on the same semiconductor substrate.

[0117] The photoelectric conversion system further includes a memory unit 1010 for temporarily storing image data, and an external interface unit (external I / F unit) 1013 for communicating with an external computer or the like. The photoelectric conversion system further includes a recording medium 1012 such as a semiconductor memory for recording or reading out imaging data, and a recording medium control interface unit (recording medium control I / F unit) 1011 for recording or reading out data on the recording medium 1012. The recording medium 1012 may be built into the photoelectric conversion system, or may be removable.

[0118] The photoelectric conversion system further includes an overall control / calculation unit 1009 that performs various calculations and controls the entire digital still camera, and a timing generation unit 1008 that outputs various timing signals to the image capture device 1004 and the signal processing unit 1007. Here, the timing signals and the like may be input from outside, and the photoelectric conversion system only needs to include at least the image capture device 1004 and the signal processing unit 1007 that processes the output signal output from the image capture device 1004.

[0119] The imaging device 1004 outputs an imaging signal to a signal processing unit 1007. The signal processing unit 1007 performs predetermined signal processing on the imaging signal output from the imaging device 1004, and outputs image data. The signal processing unit 1007 generates an image using the imaging signal.

[0120] In this way, according to this embodiment, it is possible to realize a photoelectric conversion system to which the photoelectric conversion device (imaging device) according to any one of the above embodiments is applied.

[0121] Seventh embodiment The photoelectric conversion system and the moving object of this embodiment will be described with reference to Fig. 21. Fig. 21 is a diagram showing the configuration of the photoelectric conversion system and the moving object of this embodiment.

[0122] FIG. 21(a) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 1300 has an imaging device 1310. The imaging device 1310 is a photoelectric conversion device (imaging device) described in any of the above embodiments. The photoelectric conversion system 1300 has an image processing unit 1312 that performs image processing on a plurality of image data acquired by the imaging device 1310, and a parallax acquisition unit 1314 that calculates parallax (phase difference of parallax images) from the plurality of image data acquired by the photoelectric conversion system 1300. The photoelectric conversion system 1300 also has a distance acquisition unit 1316 that calculates a distance to an object based on the calculated parallax, and a collision determination unit 1318 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 1314 and the distance acquisition unit 1316 are examples of distance information acquisition means that acquire distance information to an object. That is, the distance information is information on the parallax, the defocus amount, the distance to the object, and the like. The collision determination unit 1318 may determine the possibility of a collision using any of these pieces of distance information. The distance information acquisition means may be realized by dedicated hardware, or may be realized by a software module. In addition, it may be realized by a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or the like, or may be realized by a combination of these.

[0123] The photoelectric conversion system 1300 is connected to a vehicle information acquisition device 1320, and can acquire vehicle information such as vehicle speed, yaw rate, and steering angle. The photoelectric conversion system 1300 is also connected to a control ECU 1330, which is a control device that outputs a control signal to generate a braking force for the vehicle based on the judgment result of the collision judgment unit 1318. The photoelectric conversion system 1300 is also connected to an alarm device 1340 that issues an alarm to the driver based on the judgment result of the collision judgment unit 1318. For example, when the judgment result of the collision judgment unit 1318 indicates that there is a high possibility of a collision, the control ECU 1330 performs vehicle control to avoid a collision and reduce damage by applying the brakes, releasing the accelerator, suppressing engine output, etc. The alarm device 1340 warns the user by sounding an alarm, displaying alarm information on the screen of a car navigation system, etc., or vibrating a seat belt or steering wheel.

[0124] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the photoelectric conversion system 1300. Fig. 21(b) shows a photoelectric conversion system for imaging the area in front of the vehicle (imaging range 1350). A vehicle information acquisition device 1320 sends instructions to the photoelectric conversion system 1300 or the imaging device 1310. This configuration can further improve the accuracy of distance measurement.

[0125] Although an example of control to avoid collision with other vehicles has been described above, the photoelectric conversion system can also be applied to control of automatic driving by following other vehicles, control of automatic driving to avoid going out of a lane, and the like. Furthermore, the photoelectric conversion system can be applied not only to vehicles such as the vehicle itself, but also to moving bodies (moving devices) such as ships, aircraft, and industrial robots. The moving body includes one or both of a driving force generating unit that generates a driving force mainly used for the movement of the moving body, and a rotating body mainly used for the movement of the moving body. The driving force generating unit can be an engine, a motor, and the like. The rotating body can be a tire, a wheel, a screw of a ship, a propeller of an aircraft, and the like. In addition, the photoelectric conversion system can be applied not only to moving bodies, but also to a wide range of devices that use object recognition, such as an intelligent transport system (ITS).

[0126] [Modified embodiment] The present invention is not limited to the above-described embodiment, and various modifications are possible.

[0127] For example, an example in which part of the configuration of any one of the embodiments is added to another embodiment, or an example in which part of the configuration of another embodiment is substituted therefor, is also included in the embodiments of the present invention.

[0128] Furthermore, the photoelectric conversion systems shown in the above sixth and seventh embodiments are examples of photoelectric conversion systems to which the photoelectric conversion device can be applied, and the photoelectric conversion systems to which the photoelectric conversion device of the present invention can be applied are not limited to the configurations shown in Figures 13 and 14.

[0129] It should be noted that the above-mentioned embodiments are merely examples of the implementation of the present invention, and the technical scope of the present invention should not be interpreted as being limited by these embodiments. In other words, the present invention can be implemented in various forms without departing from its technical concept or main features.

[0130] The above-described embodiments can be modified as appropriate without departing from the technical concept. The disclosure of this specification includes not only what is described in this specification, but also all matters that can be understood from this specification and the drawings attached hereto. The disclosure of this specification also includes the complement of the concepts described in this specification. In other words, if this specification contains a statement that "A is greater than B," for example, this specification can be said to disclose that "A is not greater than B" even if the statement that "A is not greater than B" is omitted. This is because when it is stated that "A is greater than B," it is assumed that the case in which "A is not greater than B" is taken into consideration.

[0131] The disclosure of this embodiment includes the following configuration.

[0132] (Configuration 1) a first semiconductor layer having a first surface that is a light incidence surface and a second surface that faces the first surface, and a first semiconductor component including a first wiring structure; a second semiconductor component including a second semiconductor layer having a third surface and a fourth surface opposing the third surface, and a second wiring structure disposed between the first wiring structure and the third surface; A photoelectric conversion device comprising: the first semiconductor layer has a pixel array portion in which a plurality of first pixels, each of which generates a signal corresponding to a brightness according to an amount of incident light, and a plurality of second pixels, each of which generates an event signal from the incident light, are arranged; a first element and a second element each provided in a semiconductor layer different from the first semiconductor layer; the first wiring structure has a first insulating film having a recess, and the second wiring structure has a second insulating film having a recess; a first metal portion is provided within the recess of the first insulating film, and a second metal portion is provided within the recess of the second insulating film; the first insulating film and the second insulating film are bonded at a bonding surface, and the first metal portion and the second metal portion are bonded at the bonding surface, the first pixel and the first element are connected by a first electrical path via the first metal portion; the second pixel and the second element are connected by a second electrical path via the second metal portion, a first conductor included in the first electrical path and located on a predetermined layer between the first surface and the fourth surface; and a second conductor included in the second electrical path and located on the predetermined layer; A photoelectric conversion device, characterized in that the first conductor and the second conductor have different sizes.

[0133] (Configuration 2) a plurality of second metal parts each being the second metal part; The photoelectric conversion device described in configuration 1, characterized in that one of the multiple second metal parts is the first conductor, and another of the multiple second metal parts is the second conductor.

[0134] (Configuration 3) a plurality of first metal parts each being the first metal part; The photoelectric conversion device described in configuration 1, characterized in that one of the multiple first metal parts is the first conductor and another of the multiple first metal parts is the second conductor.

[0135] (Configuration 4) a plurality of first metal parts each being the first metal part; The photoelectric conversion device described in configuration 2, characterized in that among the multiple first metal parts, one first metal part that joins the second metal part that is the first conductor and another first metal part that joins the second metal part that is the second conductor have different dimensions.

[0136] (Configuration 5) The incense money conversion device described in configuration 4, characterized in that among the multiple first metal parts, one first metal part that joins the second metal part that is the first conductor and another first metal part that joins the second metal part that is the second conductor have different dimensions.

[0137] (Configuration 6) the first element and the second element are MOS transistors each having a gate electrode; the gate electrode of the MOS transistor that is the first element is the first conductor; 2. The photoelectric conversion device according to configuration 1, wherein the gate electrode of the MOS transistor that is the second element is the second conductor.

[0138] (Configuration 7) 7. The photoelectric conversion device according to any one of configurations 1 to 6, wherein the second conductor has a smaller area than the first conductor when viewed in a plane relative to the first surface.

[0139] (Configuration 8) A photoelectric conversion device as described in configuration 4 or 5, characterized in that the second conductor has a smaller area than the first conductor when viewed in a planar view relative to the first surface, and the other one of the first metal parts has a smaller area than the one of the first metal parts when viewed in a planar view relative to the first surface.

[0140] (Configuration 9) A plurality of first metal parts, each of which is the first metal part; A pad is provided for connection to an outside of the photoelectric conversion device. A photoelectric conversion device described in any one of configurations 2 to 8, characterized in that the multiple first metal parts are arranged in a region between the outer periphery of the pixel array section and the pad in a planar view with respect to the first surface.

[0141] (Configuration 10) A plurality of first metal parts, each of which is the first metal part; A pad is provided for connection to an outside of the photoelectric conversion device. the pixel array section has an opening region into which light is incident, A photoelectric conversion device described in any one of structures 2 to 8, characterized in that the multiple first metal parts are arranged in a region between the outer periphery of the opening region and the pad in a planar view of the first surface.

[0142] (Configuration 11) The photoelectric conversion device according to any one of configurations 2 to 10, wherein the plurality of second metal portions are arranged in a position overlapping the pixel array portion in a plan view relative to the first surface.

[0143] (Configuration 12) 12. A photoelectric conversion device according to any one of configurations 2 to 11, characterized in that the first metal portion transmits a signal output by the first pixel, and the second metal portion transmits a signal output by the second pixel.

[0144] (Configuration 13) A photoelectric conversion device described in any one of configurations 2 to 11, characterized in that the first metal portion transmits a signal to be input to the first pixel, and the second metal portion transmits a signal to be input to the second pixel.

[0145] (Configuration 14) the first semiconductor component has an AD conversion circuit that converts signals of the first pixels into digital signals; The photoelectric conversion device according to configuration 3, wherein the first metal portion is connected to the AD conversion circuit.

[0146] (Configuration 15) 15. The photoelectric conversion device according to any one of configurations 1 to 14, wherein each of the plurality of second pixels generates the event signal based on a change in the amount of incident light.

[0147] (Configuration 16) 16. The photoelectric conversion device according to configuration 15, wherein each of the second pixels generates a digital signal having multiple bits as the event signal.

[0148] (Configuration 17) A neural network unit that performs signal processing using a neural network, 16. The photoelectric conversion device according to configuration 15, wherein the event signal is input to the neural network unit.

[0149] (Configuration 18) 18. The photoelectric conversion device according to configuration 17, wherein the event signal input to the neural network unit is a spike-shaped signal.

[0150] (Configuration 19) 19. The photoelectric conversion device according to any one of structures 1 to 18, wherein the first element and the second element are provided in the second semiconductor layer.

[0151] (Configuration 20) a third semiconductor component further comprising a third semiconductor layer; the second semiconductor component is disposed between the first semiconductor component and the third semiconductor component, 19. The photoelectric conversion device according to any one of structures 1 to 18, wherein the second element is provided in the second semiconductor layer, and the first element is provided in the third semiconductor layer.

[0152] (Configuration 21) 21. The photoelectric conversion device according to any one of structures 1 to 20, wherein the first semiconductor layer and the second semiconductor layer are each a semiconductor substrate.

[0153] (Configuration 22) 21. The photoelectric conversion device according to configuration 20, wherein the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer are each a semiconductor substrate.

[0154] (Configuration 23) A photoelectric conversion device according to any one of structures 1 to 22; and a signal processing unit that processes a signal output from the photoelectric conversion device.

[0155] (Configuration 24) A moving object having the photoelectric conversion device according to any one of configurations 1 to 22, A moving body comprising a control device for controlling the movement of the moving body. [Explanation of symbols]

[0156] 1. Semiconductor parts 2. Semiconductor parts 100 Semiconductor layer 200 Semiconductor layer MB1, MB2 junction 311, 321, 411, 421 Joint material

Claims

1. a first semiconductor layer having a first surface that is a light incidence surface and a second surface that faces the first surface; and a first semiconductor component including a first wiring structure; a second semiconductor component including a second semiconductor layer having a third surface and a fourth surface opposing the third surface, and a second wiring structure disposed between the first wiring structure and the third surface; A photoelectric conversion device comprising: the first semiconductor layer has a pixel array portion in which a plurality of first pixels, each of which generates a signal corresponding to a brightness according to an amount of incident light, and a plurality of second pixels, each of which generates an event signal from the incident light, are arranged; a first element and a second element each provided in a semiconductor layer different from the first semiconductor layer; the first wiring structure has a first insulating film having a recess; the second wiring structure has a second insulating film having a recess; a first metal portion is provided inside the recess of the first insulating film, and a second metal portion is provided inside the recess of the second insulating film; the first insulating film and the second insulating film are bonded at a bonding surface, and the first metal portion and the second metal portion are bonded at the bonding surface, the first pixel and the first element are connected by a first electrical path via the first metal portion, the second pixel and the second element are connected by a second electrical path via the second metal portion, a first conductor included in the first electrical path and located in a predetermined layer between the first surface and the fourth surface; and a second conductor included in the second electrical path and located in the predetermined layer, A photoelectric conversion device, characterized in that the first conductor and the second conductor have different sizes.

2. a plurality of second metal portions each being the second metal portion; 2 . The photoelectric conversion device according to claim 1 , wherein one of the plurality of second metal parts is the first conductor, and another of the plurality of second metal parts is the second conductor.

3. a plurality of first metal parts each being the first metal part; 2 . The photoelectric conversion device according to claim 1 , wherein one of the plurality of first metal parts is the first conductor, and another of the plurality of first metal parts is the second conductor.

4. a plurality of first metal parts each being the first metal part; The photoelectric conversion device of claim 2, characterized in that among the multiple first metal portions, one first metal portion that joins the second metal portion that is the first conductor and another first metal portion that joins the second metal portion that is the second conductor have different dimensions.

5. The photoelectric conversion device of claim 4, characterized in that among the multiple first metal portions, one first metal portion that joins the second metal portion that is the first conductor and another first metal portion that joins the second metal portion that is the second conductor have different planar dimensions.

6. the first element and the second element are MOS transistors each having a gate electrode; the gate electrode of the MOS transistor that is the first element is the first conductor; 2. The photoelectric conversion device according to claim 1, wherein the gate electrode of the MOS transistor which is the second element is the second conductor.

7. The photoelectric conversion device according to claim 1 , wherein the second conductor has a smaller area than the first conductor when viewed from above with respect to the first surface.

8. The photoelectric conversion device according to claim 2 , wherein the second conductor has a smaller area than the first conductor when viewed from above with respect to the first surface.

9. The photoelectric conversion device according to claim 3 , wherein the second conductor has a smaller area than the first conductor when viewed from above with respect to the first surface.

10. The photoelectric conversion device described in claim 4, characterized in that the second conductor has a smaller area than the first conductor when viewed in a planar view relative to the first surface, and the other one of the first metal portions has a smaller area than the one of the first metal portions when viewed in a planar view relative to the first surface.

11. The photoelectric conversion device according to claim 6 , wherein the second conductor has a smaller area than the first conductor when viewed from above with respect to the first surface.

12. A plurality of first metal portions, each of which is the first metal portion; A pad is provided for connection to an outside of the photoelectric conversion device. The photoelectric conversion device according to claim 2 , wherein the plurality of first metal portions are arranged in a region between an outer periphery of the pixel array portion and the pad in a plan view relative to the first surface.

13. A plurality of first metal portions, each of which is the first metal portion; A pad is provided for connection to an outside of the photoelectric conversion device. the pixel array section has an opening region into which light is incident, The photoelectric conversion device according to claim 2 , wherein the plurality of first metal portions are arranged in a region between an outer periphery of the opening region and the pad in a plan view of the first surface.

14. The photoelectric conversion device according to claim 2 , wherein the second metal portions are arranged at positions overlapping the pixel array portion in a plan view relative to the first surface.

15. The photoelectric conversion device according to claim 13 , wherein the second metal portions are arranged at positions overlapping the pixel array portion in a plan view relative to the first surface.

16. The photoelectric conversion device according to claim 2 , wherein the first metal portion transmits a signal output by the first pixel, and the second metal portion transmits a signal output by the second pixel.

17. 3 . The photoelectric conversion device according to claim 2 , wherein the first metal portion transmits a signal to be input to the first pixel, and the second metal portion transmits a signal to be input to the second pixel.

18. the first semiconductor component has an AD conversion circuit that converts signals of the first pixels into digital signals; The photoelectric conversion device according to claim 3 , wherein the first metal portion is connected to the AD conversion circuit.

19. The photoelectric conversion device according to claim 1 , wherein each of the second pixels generates the event signal based on a change in the amount of incident light.

20. The photoelectric conversion device according to claim 18 , wherein each of the second pixels generates a digital signal having a plurality of bits as the event signal.

21. A neural network unit that performs signal processing using a neural network, 20. The photoelectric conversion device according to claim 19, wherein the event signal is input to the neural network unit.

22. 22. The photoelectric conversion device according to claim 21, wherein the event signal input to the neural network unit is a spike-shaped signal.

23. The photoelectric conversion device according to claim 1 , wherein the first element and the second element are provided in the second semiconductor layer.

24. a third semiconductor component further comprising a third semiconductor layer; the second semiconductor component is disposed between the first semiconductor component and the third semiconductor component, The photoelectric conversion device according to claim 1 , wherein the second element is provided in the second semiconductor layer, and the first element is provided in the third semiconductor layer.

25. The photoelectric conversion device according to claim 1 , wherein the first semiconductor layer and the second semiconductor layer are each a semiconductor substrate.

26. 25. The photoelectric conversion device according to claim 24, wherein each of the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is a semiconductor substrate.

27. The photoelectric conversion device according to claim 1 ; and a signal processing unit that processes a signal output from the photoelectric conversion device.

28. A moving object having the photoelectric conversion device according to claim 1, A moving body comprising a control device for controlling the movement of the moving body.

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