Semiconductor module and manufacturing method for the same

Abstract

To provide a semiconductor module adaptive to high temperature operation and a method for manufacturing the same.SOLUTION: A method for manufacturing a semiconductor module includes steps of: preparing an insulating wiring board 10 having a substrate and a first conductor provided on the upper surface of the substrate, a semiconductor chip 20 having a first surface and a second surface, and a printed wiring board 50 having an insulating substrate and a lead frame 52 mounted on the insulating substrate, a first portion 52a of the lead frame being provided in a first via that penetrates the insulating substrate; arranging the first surface of the semiconductor chip on the first conductor via a first sintering material; arranging an insulating sheet on the insulating wiring board so as to surround the semiconductor chip in plan view; arranging the printed wiring board so that the insulating substrate faces the insulating sheet and the first portion comes into contact with the second surface via a second sintering material; and heating from the insulating wiring board to the printed wiring board while applying pressure.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor module including a semiconductor chip and a manufacturing method thereof. [Background technology]

[0002] A power semiconductor device is a semiconductor device that can pass a large current at a high voltage, handle DC voltage and AC voltage, and convert them into DC voltage and AC voltage, respectively. It is possible to change the voltage and frequency of AC voltage, and is often used to control the rotation of motors. A typical power semiconductor device includes a semiconductor chip having semiconductor elements such as an insulated gate bipolar transistor (IGBT) or a metal oxide semiconductor field effect transistor (MOSFET), a printed circuit board (PCB), an insulating circuit board, and a heat dissipation base. Solder materials, sintered materials, wire bonding, etc. are used to bond the semiconductor chip, the insulating circuit board, and the heat dissipation base.

[0003] Patent Document 1 discloses a "semiconductor device comprising: a heat dissipation substrate; an insulating substrate disposed on the heat dissipation substrate and having a wiring layer; a plurality of semiconductor elements disposed on the insulating substrate; a conductive block electrically connected to surface electrodes of the semiconductor elements; and terminal electrodes, the conductive block having a convex portion that is joined to the insulating substrate."

[0004] Patent document 2 discloses that "a semiconductor chip is provided, an insulating circuit board arranged opposite the underside of the semiconductor chip, and a first sintered metal layer is arranged on the upper surface of the insulating circuit board and has a joint in contact with the semiconductor chip and an outer edge surrounding the joint, wherein the porosity, which indicates the volume density of the voids contained in the first sintered metal layer, is uniform at the joint and the outer edge."

[0005] Patent Document 3 discloses a semiconductor device comprising: "a substrate; a semiconductor chip mounted on the substrate and having a surface electrode and a back electrode on the opposite side of the surface electrode; a lead frame arranged opposite the surface electrode of the semiconductor chip; a first joint formed between the substrate and the back electrode of the semiconductor chip; and a second joint formed between the surface electrode of the semiconductor chip and the lead frame, wherein the lead frame has an electrode portion connected to the surface electrode via the second joint, a bridge portion connecting the electrode portions, and a resin layer formed on the upper surface of the electrode portion, the resin layer being formed on the underside of the bridge portion and on a portion of the underside of the electrode portion that is not joined to the surface electrode." [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Republished Patent No. 2016-152258 [Patent Document 2] Patent Publication No. 2021-027288 [Patent Document 3] JP 2018-006492 A Summary of the Invention [Problem to be solved by the invention]

[0007] In recent years, the demand for smaller, lighter, and more sophisticated power semiconductor devices has led to the trend toward higher circuit integration. Furthermore, development is underway for semiconductor devices that use semiconductor elements such as silicon carbide (SiC) that can operate at high temperatures, and high reliability is required for semiconductor devices in high-temperature operating environments. For this reason, sintered metal layers that utilize the sintering effect of metal particles such as silver (Ag) and copper (Cu) are being considered as bonding materials that can withstand high-temperature operation.

[0008] In order to sinter a sintering material, it is necessary to apply uniform pressure and heat to the part to be sintered. If the pressure is not uniform, air bubbles may occur in the resulting sintered body, which may cause the bonding quality of the semiconductor chip to become unstable.

[0009] In view of the above-mentioned problems, an object of the present disclosure is to provide a semiconductor module compatible with high-temperature operation and a manufacturing method thereof. [Means for solving the problem]

[0010] In order to achieve the above-mentioned object, a manufacturing method of a semiconductor module according to one embodiment of the present disclosure includes the steps of: preparing an insulating wiring board having a substrate and a first conductor provided on an upper surface of the substrate, a semiconductor chip having a first side and a second side, and a printed wiring board having an insulating substrate and a lead frame mounted on the insulating substrate, with a first portion of the lead frame provided in a first via that penetrates the insulating substrate; arranging the first side of the semiconductor chip on the first conductor via a first sintering material; arranging an insulating sheet on the insulating wiring board so as to surround the semiconductor chip in a planar view; arranging the printed wiring board so that the insulating substrate faces the insulating sheet and the first portion contacts the second side via the second sintering material; and heating from the insulating wiring board to the printed wiring board while applying pressure.

[0011] In order to achieve the above-mentioned object, a semiconductor module according to another aspect of the present disclosure comprises an insulating wiring board having a substrate and a first conductor provided on an upper surface of the substrate, a semiconductor chip having a first side and a second side, the first side being joined to the first conductor via a first sintered body, an insulating sheet provided on the insulating wiring board so as to surround the semiconductor chip in a planar view, and a printed wiring board having an insulating substrate and a lead frame mounted on the insulating substrate, a first portion of the lead frame provided in a first via that penetrates the insulating substrate is joined to the second side via the second sintered body, and the insulating substrate faces the insulating sheet. Effect of the Invention

[0012] According to the present disclosure, it is possible to provide a semiconductor module compatible with high temperature operation and a method for manufacturing the same. [Brief description of the drawings]

[0013] [Figure 1]1 is a schematic vertical cross-sectional view illustrating an example of a schematic configuration of a semiconductor module according to a first embodiment of the present disclosure. [Diagram 2] 1 is a schematic vertical cross-sectional view illustrating an example of a schematic configuration of a semiconductor module according to a first embodiment of the present disclosure. [Diagram 3] 2A to 2C are process diagrams illustrating a method for manufacturing a semiconductor module according to a first embodiment of the present disclosure. [Figure 4] 4 is a cross-sectional view showing a process subsequent to FIG. [Diagram 5] 5 is a cross-sectional view showing a process subsequent to FIG. 4. [Figure 6] 6 is a cross-sectional view showing a process subsequent to FIG. 5. [Figure 7] 7 is a cross-sectional view showing a process subsequent to FIG. 6. [Figure 8] 8 is a cross-sectional view showing a process subsequent to FIG. 7. [Figure 9] 9 is a cross-sectional view showing a process subsequent to FIG. 8. [Figure 10] 2 is an enlarged schematic vertical cross-sectional view of the lead frame of FIG. 1. [Figure 11] 1 is a table showing the properties of various bonding materials. [Figure 12] 11 is a schematic vertical cross-sectional view showing an example of a schematic configuration of a main part of a semiconductor module according to a second embodiment of the present disclosure. FIG. [Figure 13] 5A to 5C are process diagrams illustrating a method for manufacturing a semiconductor module according to a second embodiment of the present disclosure. [Figure 14] 5A to 5C are process diagrams illustrating a method for manufacturing a semiconductor module according to a second embodiment of the present disclosure. [Figure 15] 15 is a cross-sectional view showing a process subsequent to FIG. 14. [Figure 16] 11 is a schematic vertical cross-sectional view showing an example of a schematic configuration of a main part of a semiconductor module according to a third embodiment of the present disclosure. FIG. [Figure 17] 10A to 10C are process diagrams illustrating a method for manufacturing a semiconductor module according to a third embodiment of the present disclosure. [Figure 18] 18 is a cross-sectional view showing a process subsequent to FIG. 17. [Figure 19]11 is a schematic vertical sectional view showing another configuration example of the lead frame. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, an embodiment of the present disclosure will be described with reference to the drawings. In the description of the drawings, the same or similar parts are denoted by the same or similar reference numerals, and duplicated descriptions are omitted. However, the drawings are schematic, and the relationship between thickness and planar dimensions, the ratio of thickness of each layer, etc. may differ from the actual ones. In addition, parts with different dimensional relationships and ratios may be included between the drawings. In addition, the embodiments shown below are examples of devices and methods for embodying the technical idea of ​​the present disclosure, and the technical idea of ​​the present disclosure does not specify the materials, shapes, structures, arrangements, etc. of the components as described below. In addition, the technical idea of ​​the present disclosure can be modified in various ways within the technical scope defined by the claims described in the claims.

[0015] In this specification, the source region of a metal-oxide semiconductor field-effect transistor (MOSFET) is "one main region (first main region)" that can be selected as the emitter region of an insulated gate bipolar transistor (IGBT). In addition, in a thyristor such as a MOS-controlled static induction thyristor (SI thyristor), the "one main region" can be selected as the cathode region. The drain region of a MOSFET is the "other main region (second main region)" of the semiconductor device that can be selected as the collector region in an IGBT and as the anode region in a thyristor. In this specification, when the term "main region" is used simply, it means either the first main region or the second main region that is appropriate from the technical common sense of a person skilled in the art.

[0016] In addition, the definitions of directions such as up and down in the following description are merely for the convenience of explanation and do not limit the technical idea of ​​the present disclosure. For example, if an object is rotated 90 degrees and observed, up and down are converted to left and right and read as such, and if it is rotated 180 degrees and observed, up and down are of course read as reversed. In addition, "upper surface" may be read as "front surface" and "lower surface" may be read as "reverse surface."

[0017] [First embodiment] The configuration of a semiconductor module according to a first embodiment of the present disclosure will be described with reference to Figures 1 and 2. Note that in order to explain the positional relationship of each component, process diagrams of the manufacturing method shown in Figures 3 to 9 may be referred to as appropriate.

[0018] <Configuration of semiconductor module> As shown in FIG. 1, the semiconductor module 1 includes, for example, a main part 1A, a copper base 1B, and a sealing resin 1C. The main part 1A is a power semiconductor device and is bonded to the upper surface of the copper base 1B via a bonding layer 1D. The bonding layer 1D is made of a bonding material having heat conductivity, such as solder or a heat dissipation compound. Since the main part 1A is bonded to the upper surface of the copper base 1B, heat generated in the main part 1A can escape to the copper base 1B. The main part 1A may be bonded to a cooling fin instead of the copper base 1B. The sealing resin 1C is provided on the upper surface side of the copper base 1B and covers the upper surface of the copper base 1B and the main part 1A. The sealing resin 1C is made of a material such as epoxy resin. The sealing resin 1C seals the main part 1A, thereby improving the reliability of the semiconductor module 1.

[0019] <Main part> The main portion 1A includes an insulating wiring substrate 10, a semiconductor chip 20, a conductor block 30, an insulating sheet 40, and a printed wiring board 50.

[0020] (Insulated wiring board) The insulating wiring board 10 is, for example, a DCB (Direct Copper Bonding) board or an AMB (Active Metal Brazing) board. As shown in Fig. 1, the insulating wiring board 10 has a substrate 11 made of an insulating material and a heat transfer member 12 provided on a lower surface 11b of the substrate 11. The substrate 11 (see Fig. 3) and the heat transfer member 12 are, for example, rectangular flat plate-shaped. As shown in Fig. 1, the lower surface of the heat transfer member 12 (the surface opposite to the substrate 11 side) is bonded to the upper surface of the copper base 1B via a bonding layer 1D.

[0021] As shown in FIG. 1 and FIG. 3, the insulating wiring board 10 has a plurality of conductors 13 provided on the upper surface 11a of the board 11. The plurality of conductors 13 are electrically separated from each other. In order to distinguish the plurality of conductors 13 from each other, they are called conductors 13a, 13b, 13c, and 13d as shown in FIG. 3. When the plurality of conductors 13a, 13b, 13c, and 13d are not distinguished from each other, they are simply called conductors 13. The number of conductors 13 may be more than one, and is not limited to the number shown in FIG. 3. FIG. 1 shows a vertical cross section of conductors 13a and 13b among the plurality of conductors 13. Since the conductors 13 have a thickness, as shown in FIG. 1, a recess 14 is formed by the side surfaces of adjacent conductors 13 and the upper surface 11a of the board 11. The recess 14 is filled with an insulating material 15. By filling the recess 14 with the insulating material 15, the step between the upper surface of the conductor 13 (the surface on the insulating sheet 40 side) and the upper surface 11a of the board 11 can be filled. The insulating material 15 is made of a material having insulating properties, such as epoxy resin or a prepreg described below. The insulating material 15 may be the same resin material as the material constituting the sealing resin 1C. The substrate 11 is made of ceramics, such as alumina (Al2O3), aluminum nitride (AlN), silicon nitride (SiN), etc. The heat transfer member 12 is preferably made of a material with high thermal conductivity, such as copper. The conductor 13 is made of a conductor such as metal, such as copper.

[0022] (Semiconductor chips) 5, the main part 1A includes a plurality of semiconductor chips 20. The main part 1A may include, as the semiconductor chips 20, a semiconductor chip equipped with an on / off circuit, a semiconductor chip equipped with a free wheel circuit using a diode, a semiconductor chip equipped with a thermistor, etc. The semiconductor layer included in each semiconductor chip 20 is, for example, any one of silicon (Si), silicon carbide (SiC), gallium nitride (GaN), diamond semiconductor, etc.

[0023] The semiconductor chip on which the on / off circuit is mounted includes switching elements such as an insulated gate bipolar transistor (IGBT), a power metal-oxide-semiconductor field-effect transistor (MOSFET), a reverse-conducting IGBT (RC-IGBT), and a reverse-blocking IGBT (RB-IGBT). The semiconductor chip 20 on which the on / off circuit is mounted has, for example, a terminal 21 (FIG. 5) electrically connected to the first main region of the switching element on the second surface 20b side, and a terminal (not shown) electrically connected to the second main region on the first surface 20a side. The semiconductor chip 20 on which the on / off circuit is mounted has a terminal 22 (FIG. 5) electrically connected to the gate electrode of the switching element on the second surface 20b side. In this embodiment, the configuration will be described using the semiconductor chip 20 on which the on / off circuit is mounted as an example.

[0024] As shown in FIG. 5, the main part 1A has two semiconductor chips 20. As shown in FIG. 1, the semiconductor chip 20 has a first surface 20a and a second surface 20b, and the first surface 20a is joined to the conductor 13a via the sintered body 60. As a result, a terminal electrically connected to the second main region of the switching element is joined to the conductor 13a. The sintered body 60 that joins the semiconductor chip 20 and the conductor 13a is called the sintered body 60a to distinguish it from other sintered bodies. The sintered body 60a corresponds to the first sintered body. When the sintered body 60a is not distinguished from the other sintered bodies, it is simply called the sintered body 60. In addition, the conductor 13a, which is the conductor to which the semiconductor chip 20 is joined, corresponds to the first conductor.

[0025] (Conductor block) As shown in FIG. 1, the conductor block 30 has a third surface 30a and a fourth surface 30b. The third surface 30a of the conductor block 30 is joined to the conductor 13b via the sintered body 60. The conductor 13 to which the conductor block 30 is joined is a conductor electrically isolated from the conductor 13 to which the semiconductor chip 20 is connected. The sintered body 60 that joins the conductor block 30 and the conductor 13b is called the sintered body 60b to distinguish it from other sintered bodies. The sintered body 60b corresponds to the third sintered body. When the sintered body 60b is not distinguished from the other sintered bodies, it is simply called the sintered body 60. The conductor 13b, which is a conductor to which the conductor block 30 is joined, corresponds to the second conductor. The conductor block 30 is made of a material having electrical conductivity such as a metal. The conductor block 30 is made of, for example, copper (Cu).

[0026] As shown in Fig. 5, the main part 1A includes a plurality of conductor blocks 30. As shown in Fig. 1, the conductor block 30 has the same thickness as the semiconductor chip 20. More specifically, the conductor block 30 has the same thickness as the mating semiconductor chip 20. As shown in Fig. 1, the mating semiconductor chip 20 is a semiconductor chip electrically connected to the conductor block 30 via a lead frame 52 described below.

[0027] (insulation sheet) The insulating sheet 40 is made of a material having heat resistance, and desirably has a heat resistance of FR-5 or higher. More specifically, the insulating sheet 40 has a heat resistance of 150°C or higher, and more preferably has a heat resistance of about 175°C or higher, 180°C or higher, or 200°C or higher. The insulating sheet 40 is a prepreg. The insulating sheet 40 includes, for example, glass fiber and a thermosetting resin material impregnated in the glass fiber. The thermosetting resin material is any one of polyimide, polyamideimide, and epoxy-based resin. The insulating sheet 40 may also include, for example, a resin plate and adhesive layers provided on both sides of the resin plate. The resin plate is any one of polyimide, polyamideimide, liquid crystal polymer, polyphenylene sulfide, and polyether ketone, and the adhesive layer is an epoxy resin.

[0028] As shown in FIG. 1, the insulating sheet 40 has a lower surface (one surface) in contact with the insulating wiring board 10. The insulating sheet 40 is disposed on the insulating wiring board 10 so as to surround the semiconductor chip 20 and the conductor block 30. More specifically, as shown in FIG. 6, the insulating sheet 40 is provided over the insulating material 15, the conductor 13a, and the conductors 13b, 13c, and 13d. The insulating sheet 40 has a first opening 41 for each semiconductor chip 20, and a second opening 42 for each conductor block 30. As shown in FIG. 1 and FIG. 6, the semiconductor chip 20 is accommodated in the first opening 41, and the conductor block 30 is accommodated in the second opening 42. In order to suppress discharge, it is desirable that there is no gap between the first opening 41 and the semiconductor chip 20, and between the second opening 42 and the conductor block 30, or that even if there is a gap, it is small.

[0029] (Printed Wiring Board) As shown in FIG. 1, the printed wiring board 50 is an inlay board having a flat insulating substrate 51 and a lead frame 52 mounted on the insulating substrate 51. The lead frame 52 is made of a conductor such as metal, and can be made of, for example, copper. The insulating substrate 51 has an upper surface 51a (the surface opposite to the insulating sheet 40) and a lower surface 51b (the surface on the insulating sheet 40 side). The printed wiring board 50, more specifically, the insulating substrate 51 faces the insulating sheet 40, and the lower surface 51b is in contact with the upper surface (the other surface) of the insulating sheet 40. As shown in FIG. 10, the insulating substrate 51 is provided with a first via V1 and a second via V2 penetrating the insulating substrate 51 in the thickness direction. The second via V2 penetrates the insulating substrate 51 at a position different from the first via V1 in a plan view. The lead frame 52 has a first portion 52a and a second portion 52b extending along the thickness direction of the insulating substrate 51, and a connection portion 52c extending along a direction perpendicular to the thickness direction of the insulating substrate 51 and connecting the first portion 52a to the second portion 52b. The first portion 52a and the second portion 52b have the same length along the extending direction. The dimensions of the first portion 52a and the second portion 52b in a plan view are not limited to this, but are, for example, about 1.2 mm or more and 8.0 mm or less. The first portion 52a and the second portion 52b may have a configuration used in a normal printed wiring board as shown in FIG. 19. More specifically, each of the first portion 52a and the second portion 52b may have a plurality of portions extending in the thickness direction of the insulating substrate 51.

[0030] As shown in FIG. 1 and FIG. 10, the connection portion 52c is provided on the upper surface 51a side. The first portion 52a is provided in the first via V1, and the end face on the lower surface 51b side is joined to the second surface 20b of the semiconductor chip 20 via the sintered body 60. More specifically, the end face on the lower surface 51b side of the first portion 52a is joined to the terminal 21 (FIG. 6) of the semiconductor chip 20. The sintered body 60 that joins the first portion 52a and the semiconductor chip 20 is called the sintered body 60c to distinguish it from other sintered bodies. The sintered body 60c corresponds to the second sintered body. When the sintered body 60c is not distinguished from the other sintered bodies, it is simply called the sintered body 60. The second portion 52b is provided in the second via V2, and the end face on the lower surface 51b side is joined to the fourth surface 30b of the conductor block 30 via the sintered body 60. The sintered body 60 that joins the second portion 52b and the conductor block 30 is called a sintered body 60d to distinguish it from the other sintered bodies. The sintered body 60d corresponds to a fourth sintered body. When the sintered body 60d is not to be distinguished from the other sintered bodies, it is simply called a sintered body 60. In this way, one lead frame 52 electrically connects a pair of the semiconductor chip 20 and the conductor block 30.

[0031] As shown in FIG. 7, the printed wiring board 50 has a plurality of lead frames 52 mounted thereon. The number of lead frames 52 mounted thereon is determined by the number of semiconductor chips 20, the number of terminals provided on the semiconductor chips 20, and the like. Of the lead frames 52 mounted on the printed wiring board 50, the lead frame connecting the terminals 21 (FIG. 6) of the semiconductor chip 20 and the conductor block 30 is called lead frame 52A in order to distinguish it from other lead frames. FIG. 1 shows a vertical cross-sectional configuration of the lead frame 52A. When the lead frame 52A is not distinguished from other lead frames, it is simply called lead frame 52. Also, of the lead frames 52, the lead frame connecting the terminals 22 (FIG. 6) of the semiconductor chip 20 and the conductor block 30 is called lead frame 52B in order to distinguish it from other lead frames. When the lead frame 52B is not distinguished from other lead frames, it is simply called lead frame 52. Since the lead frame 52B is not shown in FIG. 1, the lead frame 52B will be described in more detail with reference to FIG. 2. Note that the main part 1A of the semiconductor module 1 shown in Fig. 2 has a different configuration from the main part 1A of the semiconductor module 1 shown in Fig. 1. The lead frame 52B has a similar configuration to the lead frame 52A, and electrically connects the terminal 22 (Fig. 6) of the semiconductor chip 20 to the conductor block 30 joined to the conductor 13c via the sintered body 60b. Note that the semiconductor chip 20 may have a terminal (e.g., a sense electrode) other than the terminals 21 and 22, and even in that case, the terminal and the conductor block 30 are electrically connected via the sintered body 60 using the lead frame 52.

[0032] <Semiconductor module manufacturing method> Hereinafter, a method for manufacturing the semiconductor module 1 will be described with reference to FIG. 3 to FIG. 10. First, the insulating wiring board 10, the semiconductor chip 20, the conductor block 30, the insulating sheet 40, the printed wiring board 50, and the sintered material 61 shown in FIG. 3 to FIG. 10 are prepared. The conductor block 30 is prepared to have the same thickness as the semiconductor chip 20 to be paired with. The sintered material 61 is obtained by mixing fine metal particles, the periphery of which is coated with an organic substance, with an organic solvent. As the metal particles, for example, silver (Ag) or copper (Cu) having a particle size of several micrometers to several tens of micrometers is used. The sintered body 60 can be obtained by heating the sintered material 61 while applying pressure. The sintered material 61 is in a paste or sheet form. When the insulating sheet 40 prepared in the process of this manufacturing method is an insulating sheet containing glass fiber and a thermosetting resin material impregnated in the glass fiber, the resin material may be in a semi-cured state (D stage, B stage). Furthermore, when the insulating sheet 40 prepared in the process of this manufacturing method is an insulating sheet including a resin plate and adhesive layers provided on both sides of the resin plate, the resin plate may be in a cured state, and the adhesive layers may be in a semi-cured state (B stage).

[0033] First, an insulating wiring board 10 shown in Fig. 3 is prepared. The insulating wiring board 10 has a recess 14 defined by the side surface of the conductor 13 (e.g., the first conductor and the second conductor) and the upper surface 11a of the board 11. Then, as shown in Fig. 4, the recess 14 is filled with an insulating material 15. When an epoxy resin or the like is filled as the insulating material 15, it is cured before proceeding to the next step. When an epoxy resin or the like is filled as the insulating material 15, it is not cured before proceeding to the next step.

[0034] Next, as shown in FIG. 5, the semiconductor chip 20 and the conductor block 30 are placed on the conductor 13. More specifically, as shown in FIG. 8, the first surface 20a of the semiconductor chip 20 is placed on the conductor 13a through the sintering material 61, and the third surface 30a of the conductor block 30 is placed on the conductors 13b, 13c, and 13d through the sintering material 61. The sintering material between the semiconductor chip 20 and the conductor 13a is called the sintering material 61a to distinguish it from other sintering materials, and the sintering material between the conductor block 30 and the conductors 13b, 13c, and 13 is called the sintering material 61b to distinguish it from other sintering materials. The sintering material 61a corresponds to the first sintering material, and the sintering material 61b corresponds to the third sintering material. When the sintering material 61a and the sintering material 61b are not distinguished from other sintering materials, they are simply called the sintering material 61. Also, each of the conductors 13b, 13c, and 13d corresponds to the second conductor. In this embodiment, as an example, one conductor block 30 is disposed for each of the conductors 13b, 13c, and 13d. The sintered material 61a is provided on the first surface 20a of the semiconductor chip 20 or the upper surface of the conductor 13a before the semiconductor chip 20 is disposed on the conductor 13. Similarly, the sintered material 61b is provided on the third surface 30a of the conductor block 30 or the conductors 13b, 13c, and 13d before the conductor block 30 is disposed on the conductors 13b, 13c, and 13d.

[0035] Next, as shown in FIG. 6, the insulating sheet 40 is arranged on the insulating wiring board 10 so as to surround the semiconductor chip 20 and the conductor block 30 in a plan view. The insulating sheet 40 is arranged so that when the insulating sheet 40 is arranged on the insulating wiring board 10, the semiconductor chip 20 is exposed from the first opening 41 and the conductor block 30 is exposed from the second opening 42. As shown in FIG. 6 and FIG. 8, the insulating sheet 40 is arranged over the insulating material 15, the conductor 13a, and the conductors 13b, 13c, and 13d. The thicknesses of the sintered material 61a and the sintered material 61b may be the same. The thickness of the insulating sheet 40 before pressure and heating is set to be larger than the combined thickness of the semiconductor chip 20 and the sintered material 61a and the combined thickness of the conductor block 30 and the sintered material 61b, but it is sufficient that the insulating sheet 40 is provided with a thickness that can be compressed to the combined thickness of the semiconductor chip 20 and the sintered body 60a (or the sintered body 60b) after pressure is applied in the process shown in FIG. 8 and FIG. 9 described later.

[0036] Next, as shown in FIG. 7, the printed wiring board 50 is placed on the upper surface of the insulating sheet 40 (the surface opposite to the insulating wiring board 10 side). More specifically, the insulating board 51 is placed so that it faces the insulating sheet 40. Also, as shown in FIG. 8, the insulating board 51 is placed so that the first portion 52a of the lead frame 52 contacts the second surface 20b of the semiconductor chip 20 through the sintered material 61, and the second portion 52b contacts the fourth surface 30b of the conductor block 30 through the sintered material 61. The sintered material between the first portion 52a and the semiconductor chip 20 is called the sintered material 61c to distinguish it from other sintered materials, and the sintered material between the second portion 52b and the conductor block 30 is called the sintered material 61d to distinguish it from other sintered materials. The sintered material 61c corresponds to the second sintered material, and the sintered material 61d corresponds to the fourth sintered material. When the sintered material 61c and the sintered material 61d are not distinguished from other sintered materials, they are simply called the sintered material 61. Before placing the printed wiring board 50 on the insulating sheet 40, the sintered material 61c is provided on the second surface 20b or the first portion 52a of the semiconductor chip 20, and the sintered material 61d is provided on the fourth surface 30b or the second portion 52b of the conductor block 30. The thicknesses of the sintered material 61c and the sintered material 61d may be the same. When the sintered material 61c and the sintered material 61d are not to be distinguished from other sintered materials, they are simply called the sintered material 61.

[0037] 10, the lead frame 52 has a connection portion 52c that connects the first portion 52a and the second portion 52b. The upper surface of the connection portion 52c (the surface opposite to the insulating substrate 51 side) is located within about ±15 μm in the thickness direction from the upper surface 51a of the insulating substrate. In addition, the end surfaces of the first portion 52a and the second portion 52b near the lower surface 51b are recessed in the thickness direction from the lower surface 51b of the insulating substrate 51 by 1 / 5 to 1 / 4 of the thickness of the sintered material 61c or 61d before compression.

[0038] Next, as shown in FIG. 8 and FIG. 9, the insulating wiring board 10 to the printed wiring board 50, which are stacked as described above, are heated while being pressurized. More specifically, in a state in which the insulating wiring board 10 to the printed wiring board 50 are stacked, they are heated between a lower mold 71 and an upper mold 72 while being pressurized. The lower mold 71 and the upper mold 72 are formed of, for example, a metal material for molds or a ceramic material (for example, silicon nitride, etc.). The lower mold 71 and the upper mold 72 are preheated to a recommended temperature for sintering the sintering material 61, for example, a temperature of about 250° C. or higher. The pressure applied is the recommended pressure for sintering the sintering material 61, for example, about 10 MPa. The insulating wiring board 10 to the printed wiring board 50 are placed on the lower mold 71 at once, or the components thereof are placed in order as described above. Then, the insulating wiring board 10 to the printed wiring board 50 are heated between the lower mold 71 and the upper mold 72 while being pressurized. More specifically, the protective sheet 81 and the buffer material 82 are placed in that order on the upper surface of the printed wiring board 50, and the insulating wiring board 10 to the buffer material 82 are heated while being pressed between the lower mold 71 and the upper mold 72. The protective sheet 81 is made of, for example, a fluororesin (for example, polytetrafluoroethylene (PTFE)) and has a thickness of, for example, 0.1 mm or more and 0.5 mm or less. The buffer material 82 is desirably made of a material that has a low elastic modulus even when the sintered material 61 is sintered, and is made of, for example, a carbon sheet. The buffer material 82 can absorb unevenness on the upper surface of the printed wiring board 50. The buffer material 82 can absorb unevenness of up to about ±15 μm in the thickness direction, for example. Therefore, the buffer material 82 can absorb the step between the upper surface 51a of the insulating substrate 51 and the upper surface of the lead frame 52 when pressure is applied.

[0039] The insulating wiring board 10 to the printed wiring board 50 are heated while being pressurized to obtain the main part 1A shown in FIG. 1. More specifically, the sintered body 60 in which the metal fine particles of the sintered material 61 are baked and hardened, and the thermally hardened insulating sheet 40 are obtained by heating while being pressurized. More specifically, the sintered body 60, sintered bodies 60a, 60b, 60c, and 60d, can be obtained by one pressurization and heating process. The sintered body 60 has a thickness of about 1 / 5 to 1 / 4 of the thickness of the sintered material 61. Therefore, after the pressurization and heating process, the sintered bodies 60c and 60d become thin enough to be contained within the first via V1 and the second via V2, and the insulating substrate 51 comes into contact with the insulating sheet 40. The insulating sheet 40 also becomes thin by the pressurization, and its thickness becomes about the same as the combined thickness of the semiconductor chip 20 and the sintered material 61a and the combined thickness of the conductor block 30 and the sintered material 61b. In addition, when pressure is applied to the insulating sheet 40, a thermosetting resin material seeps out from the glass fibers, filling the gaps between the insulating sheet 40 and the semiconductor chip 20 and the conductor block 30, and even if there are gaps, they are small. In this way, the main part 1A is obtained in which the components are bonded together by the sintered body 60. Thereafter, other necessary steps besides those described above are performed, and the main part 1A is bonded to the copper base 1B and sealed with sealing resin 1C, and the semiconductor module 1 is almost completed.

[0040] <Major effects of semiconductor module and its manufacturing method> Below, the main effects of the semiconductor module 1 and its manufacturing method will be described, but before that, an overview will be provided. Conventionally, the bottom surface of a semiconductor chip included in a semiconductor module has been bonded to an insulating wiring board using a solder material such as tin antimony (SnSb)-based or tin silver (SnAg)-based. Conventionally, wire wiring has been bonded to the top surface of the semiconductor chip. However, since the use of SiC semiconductor chips has increased the current flow, a wiring method in which a lead frame that can reduce resistance is soldered has come to be used. Since a semiconductor module is a circuit that handles a large current, it generates heat locally due to high resistance and low heat transfer in the wiring connection (Joule heat Q=I2Rt, current I, resistance R, time t). Therefore, it is important for an electric circuit to suppress heat generation (internal loss) as much as possible. With reference to FIG. 11, the characteristics of various materials such as solder material and sintered body will be described. The melting point of the sintered body is higher than that of the solder material. The thermal conductivity of the sintered body is one order of magnitude higher than that of the solder material, and does not deteriorate significantly even when heated to 300°C. The volume resistivity of the sintered body is one order of magnitude lower than that of the solder material, and does not deteriorate significantly even when heated to 200°C. Therefore, by mounting the semiconductor chip 20 using the sintered body, it is possible to suppress the loss of electricity in the electric circuit and the generation of heat, compared to when a solder material is used. And, by joining the semiconductor chip 20 to the insulating wiring board 10 using the sintered body, it is possible to enhance the heat dissipation effect to the copper base 1B, compared to when a solder material is used. As shown in FIG. 11, the same applies to silver and copper as to the sintered body.

[0041] We will also explain the shear strength when connecting a semiconductor chip and a copper material using solder material and sintered body, respectively. The shear strength when using a sintered body is higher than that of a solder material, and does not deteriorate significantly even when heated to 200°C. It is also believed that the shear strength of the sintered body is higher than that of the joint of the wire wiring. By using a sintered body, the reliability of the semiconductor module can be improved.

[0042] Because the sintered body has the above-mentioned characteristics, it is expected to be applied to semiconductor modules equipped with semiconductor chips that become hot during operation. However, in order to obtain a sintered body, the sintered material needs to be heated while being uniformly pressed. In addition, when pressure is applied to a lead frame, there is a possibility that the part extending along the horizontal direction will bend. When pressure is applied to a part that does not have a supporting member on the lower side, bending or breakage may occur.

[0043] In contrast, in the semiconductor module 1 according to the first embodiment of the present disclosure and the manufacturing method thereof, the insulating sheet 40 is disposed on the insulating wiring board 10 so as to surround the semiconductor chip 20 in a plan view. Then, in a state where a printed wiring board having a lead frame 52 mounted on a flat insulating board 51 is opposed to the insulating sheet 40, the insulating wiring board 10 to the printed wiring board 50 are heated while being pressurized. Since the insulating sheet 40 contacts the printed wiring board 50 and supports the printed wiring board 50, it is possible to suppress the printed wiring board 50 from being significantly bent or damaged, and it is possible to suppress the lead frame 52 from being significantly deflected. In addition, since pressure is applied via the flat printed wiring board 50, it is possible to suppress the occurrence of large unevenness in the pressure applied to the sintered material 61 between the semiconductor chip 20 and the insulating wiring board 10 and the sintered material 61 between the conductor block 30 and the insulating wiring board 10, and it is possible to apply pressure as evenly as possible. Therefore, even when a plurality of layers of sintered material 61 are arranged along the thickness direction, it is possible to suppress the occurrence of uneven pressure application to the sintered material of the lower layer. Since a plurality of layers of sintered bodies can be formed in the thickness direction by one pressurizing and heating process, the number of manufacturing processes can be suppressed, and the manufacturing cost can be suppressed. Furthermore, since the sintered body and the lead frame 52 are used instead of the solder material and the wire wiring to join the semiconductor chip 20 and the wiring, the semiconductor module 1 having high heat resistance can be obtained. More specifically, the semiconductor module 1 having high heat resistance of about 175°C or more and 200°C or less can be obtained. This can improve the reliability and durability of the semiconductor module 1. Furthermore, since the sintered body 60 having high thermal conductivity is used, the heat dissipation effect of the semiconductor module 1 can be improved. Since the sintered body 60 having high thermal conductivity is used, even if the area of ​​the semiconductor chip 20 is reduced, the heat dissipation effect can be suppressed from decreasing. The heat dissipation effect of the semiconductor module 1 can be improved.

[0044] Moreover, in the semiconductor module 1 and its manufacturing method according to the first embodiment of the present disclosure, the second portion 52b of the lead frame 52 is electrically connected to the insulating wiring board 10 via the conductor block 30 and the sintered material 61. By using the conductor block 30 having the same thickness as the semiconductor chip 20, the dimensions in the thickness direction of the first portion 52a and the second portion 52b can be made the same, making it easy to arrange the sintered material 61 on the lead frame 52. Even if the thickness of the semiconductor chip 20 changes, by using another conductor block 30 having the same thickness as the semiconductor chip, it is not necessary to adjust the lengths of the first portion 52a and the second portion 52b, and the same lead frame 52 can be used.

[0045] Moreover, the semiconductor module 1 and its manufacturing method according to the first embodiment of the present disclosure include a step of filling the recess 14 formed by the side surfaces of the conductor 13a and the conductors 13b, 13c, and 13d and the upper surface 11a of the substrate 11 with an insulating material 15. By filling the recess 14 with the insulating material 15, the step between the upper surface of the conductor 13 and the upper surface 11a of the substrate 11 can be filled. This makes it possible to suppress bending of the portion of the printed wiring board 50 that overlaps with the recess 14 in a plan view, more specifically, the connection portion 52c of the lead frame 52, when pressure is applied. This makes it possible to improve the reliability of the semiconductor module 1.

[0046] In the semiconductor module 1 according to the first embodiment of the present disclosure and the manufacturing method thereof, the end faces of the first portion 52a and the second portion 52b are recessed in the thickness direction by 1 / 5 to 1 / 4 of the thickness of the sintered material 61c before pressure is applied with respect to the lower surface 51b of the insulating substrate 51. In the pressurizing and heating process, the sintered material 61 becomes thin enough to fit within the first via V1 and the second via V2, and the sintered materials 61a and 61b are pressed by the printed wiring board 50, so that the pressure applied to the sintered materials 61a and 61b can be prevented from being significantly uneven, and pressure can be applied as evenly as possible. Therefore, even when multiple layers of sintered materials 61 are arranged along the thickness direction, it is possible to prevent uneven pressure from being applied to the sintered material in the lower layer. This improves the reliability of the semiconductor module 1.

[0047] Moreover, the semiconductor module 1 according to the first embodiment of the present disclosure includes an insulating sheet 40 provided on the insulating wiring substrate 10 so as to surround the semiconductor chip 20 in a plan view. The insulating sheet 40 fills the space between the insulating wiring substrate 10 and the printed wiring board 50, thereby preventing the main portion 1A from warping during operation. This improves the reliability of the semiconductor module 1.

[0048] Furthermore, in the semiconductor module 1 according to the first embodiment of the present disclosure, the upper wiring is routed using the printed wiring board 50 instead of wire wiring. This makes it possible to reduce the distance between the upper wiring and the insulating wiring board 10, which is the lower wiring. Furthermore, since the insulating sheet 40, which is a dielectric material, is interposed between the two, the printed wiring board 50 and the insulating wiring board 10 can be capacitively coupled, thereby making it possible to reduce the inductance of the wiring.

[0049] [Second embodiment] The second embodiment of the present disclosure shown in FIG. 12 will be described below. The main difference between the main part 1A of the semiconductor module 1 according to the second embodiment and the main part 1A of the semiconductor module 1 according to the first embodiment is that the recess 14 is not filled with the insulating material 15, and the insulating sheet 40 is not disposed at a position overlapping the recess 14, but is provided separately on the portion on the conductor 13a surrounding the semiconductor chip 20 and on the portion on the conductors 13b, 13c, and 13d surrounding the conductor block 30. The other configurations of the main part 1A are basically the same as those of the main part 1A described above. The same reference numerals are used for the components already described, and the description thereof will be omitted. In addition, in order to explain the positional relationship of each component, the process diagram of the manufacturing method shown in FIG. 13 may be referred to as appropriate.

[0050] In this embodiment, as shown in Fig. 12, the recesses 14 are not filled with the insulating material 15, so there is a step between the conductors 13. In this embodiment, as shown in Fig. 13, the insulating sheet 40 is divided and arranged for each electrically isolated conductor 13 to avoid the step of the recesses 14. For example, a portion on the conductor 13a surrounding the semiconductor chip 20 and a portion on the conductor 13b surrounding the conductor block 30 are provided separately.

[0051] <Semiconductor module manufacturing method> 13 to 15, a method for manufacturing the main part 1A of the semiconductor module 1 will be described. In this embodiment, differences from the manufacturing method described in the above-mentioned first embodiment will be mainly described, and the figures described in the first embodiment will be used as necessary.

[0052] First, among the steps described in the first embodiment above, the step of filling the recesses 14 shown in Fig. 4 with the insulating material 15 is omitted, and steps up to the step shown in Fig. 5 are performed. Then, as shown in Fig. 13, insulating sheet 40a is arranged at a position overlapping conductor 13a, insulating sheet 40b is arranged at a position overlapping conductor 13b, insulating sheet 40c is arranged at a position overlapping conductor 13c, and insulating sheet 40d is arranged at a position overlapping conductor 13d, and then the step shown in Fig. 7 is performed. Note that when the insulating sheets 40a, 40b, 40c, and 40d are not to be distinguished from one another, they are simply referred to as insulating sheet 40.

[0053] 14 and 15, the insulating wiring board 10 to the printed wiring board 50, which have been stacked as described above, are heated while being pressed between a lower mold 71 and an upper mold 72. At this time, at least the cushioning material 82 out of the protective sheet 81 and the cushioning material 82 is disposed at a position that does not overlap the recess 14 in a plan view. This can reduce pressure applied to the step of the recess 14 and the connection portion 52c of the lead frame 52 that overlaps the recess 14 in a plan view. This can prevent the connection portion 52c from bending. The steps thereafter are the same as those described in the first embodiment, and description thereof will be omitted.

[0054] [Third embodiment] The third embodiment of the present disclosure shown in FIG. 16 will be described below. The main difference between the main part 1A of the semiconductor module 1 according to this second embodiment and the main part 1A of the semiconductor module 1 according to the first embodiment is that the main part 1A does not have a conductor block 30, and the other configurations of the main part 1A are basically the same as those of the main part 1A of the first embodiment. Note that components already described are given the same reference numerals and their description will be omitted. Also, in order to explain the positional relationship of each component, the process diagrams of the manufacturing method shown in FIG. 17 and FIG. 18 may be referred to as appropriate.

[0055] The configuration of the first portion 52a of the lead frame 52 according to this embodiment is the same as that of the first embodiment described above, but the configuration of the second portion 52b is different from that of the first embodiment described above. The second portion 52b is joined to the conductor 13 without the conductor block 30. More specifically, the second portion 52b is directly joined to the conductor 13b or the conductor 13c via a sintered body 60 (e.g., a sintered body 60b). The second portion 52b is provided with a dimension along the extension direction that is larger than that of the first portion 52a, and protrudes from the lower surface 51b of the insulating substrate 51. The dimension along the extension direction of the second portion 52b may be large enough to be directly connected to the conductor 13 via the sintered body 60.

[0056] <Semiconductor module manufacturing method> Hereinafter, a method for manufacturing the semiconductor module 1 will be described with reference to FIG. 17 and FIG. 18. In this embodiment, differences from the manufacturing method described in the first embodiment will be mainly described, and the drawings described in the first embodiment will be used as necessary. First, the steps shown in FIG. 3 and FIG. 4 are performed. Then, as shown in FIG. 17, the semiconductor chip 20 is placed on the conductor 13a via a sintered material 61 (not shown). However, the conductor block 30 is not placed on the conductor 13. The region S, which is a part of the conductors 13b, 13c, and 13d shown by the dashed line, is a region to which a lead frame will be bonded later. Next, as shown in FIG. 18, the insulating sheet 40 is placed on the insulating wiring board 10 so as to surround the semiconductor chip 20 in a plan view. More specifically, the insulating sheet 40 is placed on the insulating wiring board 10 so that the semiconductor chip 20 is exposed from the first opening 41 and the region S is exposed from the second opening 42 when the insulating sheet 40 is placed on the insulating wiring board 10. Then, as shown in FIG. 7, the printed wiring board 50 is placed on the upper surface of the insulating sheet 40. Before placing the printed wiring board 50 on the insulating sheet 40, the second portion 52b can be joined to the region S by providing a sintered material 61 (e.g., sintered material 61b) on the region S or the second portion 52b. This makes it possible to reduce the number of required parts. The steps thereafter are the same as those described in the first embodiment, and therefore the description thereof will be omitted.

[0057] [Other embodiments] As described above, the first to third embodiments of the present disclosure have been described, but the descriptions and drawings forming a part of this disclosure should not be understood as limiting the present disclosure. Various alternative embodiments, examples, and operating techniques will be apparent to those skilled in the art from this disclosure.

[0058] Also, for example, the semiconductor module 1 in FIG. 1 has the main part 1A joined to the copper base 1B and sealed with sealing resin 1C, but it is also possible to seal only the main part 1A with sealing resin 1C without joining the main part 1A to the copper base 1B.

[0059] Furthermore, for example, the semiconductor module 1 according to the second and third embodiments can also achieve the same effects as the semiconductor module 1 according to the first embodiment.

[0060] In addition, the configurations disclosed in the first to third embodiments can be appropriately combined within a range that does not cause contradictions. As such, the present disclosure naturally includes various embodiments not described here. Therefore, the technical scope of the present disclosure is determined only by the invention-specifying matters related to the scope of the claims that are appropriate from the above description. [Explanation of symbols]

[0061] 1 Semiconductor module 1A Main part 10 Insulating wiring board 11 Substrate 11a Top side 11b Bottom side 12 Heat transfer material 13, 13a, 13b, 13c, 13d Conductor 14 Recess 15 Insulating materials 20. Semiconductor Chips 20a Page 1 20b 2nd side 30 Conductor block 30a 3rd page 30b Side 4 40, 40a, 40b, 40c, 40d Insulation sheet 41 First opening 42 Second Opening 50 Printed Wiring Board 51 Insulating substrate 51a Top side 51b Bottom side 52, 52A, 52B Lead frame 52a Part 1 52b Part 2 52c Connection part 60, 60a, 60b, 60c, 60d Sintered body 61, 61a, 61b, 61c, 61d Sintered material 71 Lower mold 72 Upper mold 81 Protective Sheet 82 Cushioning material V1 First via V2 Second via

Claims

1. a first step of preparing an insulating wiring board having a substrate and a first conductor provided on an upper surface of the substrate, a semiconductor chip having a first surface and a second surface, and a printed wiring board having an insulating substrate and a lead frame mounted on the insulating substrate, a first portion of the lead frame being provided in a first via penetrating the insulating substrate; a second step of placing the first surface of the semiconductor chip on the first conductor via a first sintered material; a third step of disposing an insulating sheet on the insulating wiring board so as to surround the semiconductor chip in a plan view; a fourth step of disposing the printed wiring board such that the insulating substrate faces the insulating sheet and the first portion contacts the second surface via a second sintered material; a fifth step of heating the insulating wiring board and the printed wiring board stacked in the first to fourth steps while applying pressure between an upper mold and a lower mold; A method for manufacturing a semiconductor module comprising the steps of:

2. the insulating wiring substrate has a second conductor provided on an upper surface of the substrate and electrically isolated from the first conductor; the lead frame has a second portion disposed in a second via that penetrates the insulating substrate at a position different from the first via; a sixth step of preparing a conductor block having a third surface and a fourth surface; a seventh step of arranging the third surface of the conductor block on the second conductor via a third sintered material; Further comprising: the third step includes disposing the insulating sheet so as to surround the conductor block in a plan view; The fourth step includes disposing the printed wiring board so that the second portion contacts the fourth surface via a fourth sintered material. The method for manufacturing the semiconductor module according to claim 1 .

3. The method for manufacturing a semiconductor module according to claim 2 , wherein the conductive block has the same thickness as the semiconductor chip.

4. an eighth step of filling a recess defined by side surfaces of the first conductor and the second conductor and an upper surface of the substrate with an insulating material; The method for manufacturing a semiconductor module according to claim 2 , wherein the insulating sheet is disposed across the insulating material, the first conductor, and the second conductor so as to surround the semiconductor chip and the conductor block in a plan view.

5. 3. The method for manufacturing a semiconductor module according to claim 2, wherein the insulating sheet is not positioned in a position that overlaps with a recess formed by side surfaces of the first conductor and the second conductor and an upper surface of the substrate when viewed in a plan view, and is provided separately in a portion on the first conductor surrounding the semiconductor chip and a portion on the second conductor surrounding the conductor block.

6. The method for manufacturing a semiconductor module according to claim 1 , wherein the insulating sheet contains glass fiber and a thermosetting resin material.

7. 7. The method for manufacturing a semiconductor module according to claim 6, wherein the thermosetting resin material is any one of polyimide, polyamide-imide, and epoxy-based resin.

8. 3. The method for manufacturing a semiconductor module according to claim 1, wherein the insulating sheet includes a resin plate and adhesive layers provided on both sides of the resin plate.

9. the resin plate is any one of polyimide, polyamideimide, liquid crystal polymer, polyphenylene sulfide, and polyether ketone; The adhesive layer is an epoxy resin. The method for manufacturing a semiconductor module according to claim 8 .

10. The method for manufacturing a semiconductor module according to claim 1 , wherein the insulating sheet is a prepreg.

11. The method for manufacturing a semiconductor module according to claim 1 , wherein the insulating sheet has a heat resistance of 150° C. or more.

12. The method for manufacturing a semiconductor module according to claim 1 , wherein the insulating sheet surrounding the semiconductor chip in a plan view has a first opening, and the semiconductor chip is exposed from the first opening when the semiconductor chip is placed on the insulating wiring board.

13. The method for manufacturing a semiconductor module according to claim 2 , wherein the insulating sheet surrounding the conductive block in a plan view has a second opening, and the conductive block is exposed from the second opening when the semiconductor module is placed on the insulating wiring board.

14. 3 . The method for manufacturing a semiconductor module according to claim 2 , wherein an upper surface of a connection portion of the lead frame that connects the first portion and the second portion is located within ±15 μm in a thickness direction relative to an upper surface of the insulating substrate.

15. The method for manufacturing a semiconductor module according to claim 2 or 14, wherein the fifth step is performed in a state where a protective sheet and a cushioning material are disposed between the upper mold and the printed wiring board.

16. 3. The method for manufacturing a semiconductor module according to claim 2, wherein the end faces of the first portion and the second portion are recessed in the thickness direction relative to the lower surface of the insulating substrate by more than 1 / 5 and less than 1 / 4 of the thickness of the second sintered material before compression.

17. the insulating wiring substrate has a second conductor provided on an upper surface of the substrate and electrically isolated from the first conductor; the lead frame has a second portion disposed in a second via that penetrates the insulating substrate at a position different from the first via; the third step includes placing the insulating sheet on the second conductor such that a partial region of the second conductor is exposed; 2. The method for manufacturing a semiconductor module according to claim 1, wherein the fourth step includes disposing the printed wiring board so that the second portion contacts the second conductor via a third sintered material.

18. an insulating wiring board having a substrate and a first conductor provided on an upper surface of the substrate; a semiconductor chip having a first surface and a second surface, the first surface being joined to the first conductor via a first sintered body; an insulating sheet provided on the insulating wiring substrate so as to surround the semiconductor chip in a plan view; a printed wiring board having an insulating substrate and a lead frame mounted on the insulating substrate, a first portion of the lead frame provided in a first via penetrating the insulating substrate being joined to the second surface via a second sintered body, and the insulating substrate facing the insulating sheet; A semiconductor module comprising:

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