Electric power source device and control method for electric power source device

Abstract

To suppress stress of a switching element.SOLUTION: An electric power source device includes: a bridge circuit which includes a first switching element having one end connected to a first terminal, a second switching element connected to between the other end of the first switching element and a second terminal, a third switching element having one end connected to the first terminal, and a fourth switching element connected to between the other end of the third switching element and the second terminal; a transformer which includes a first wiring connected to between the other end of the first switching element and the other of the third switching element, and a second wiring magnetically bounded to the first winding; a first inductor seriously connected to the first wiring; a second inductor connected to between an intermediate tap of the second wiring and a third terminal; a fifth switching element connected to between the one end of the second wiring and a fourth terminal; a sixth switching element connected to the other end of the second wiring and a fourth terminal; and a series circuit with a capacitor and a switch and which is connected to between the intermediate tap and the fourth terminal.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present disclosure relates to a power supply device and a method for controlling a power supply device. [Background technology]

[0002] For example, in electric vehicles, DC-DC converters are used that step down the voltage from the primary side (high voltage side, e.g., a driving battery) to the secondary side (low voltage side, e.g., an auxiliary battery) and output it, and then step up the voltage from the secondary side to the primary side and output it. A phase-shift full-bridge circuit is the mainstream for this DC-DC converter.

[0003] Patent Document 1 describes a DC-DC converter in which malfunction of a switching element does not lead to failure of the converter. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2014-36511 A Summary of the Invention [Problem to be solved by the invention]

[0005] When power is transmitted from the secondary side to the primary side using a phase-shift full-bridge circuit, it is called the choke input method. Furthermore, if the turns ratio of the transformer is primary turns:secondary turns = N:1, when outputting a voltage higher than ((secondary battery voltage) x N) to the primary side, in addition to boosting the voltage with the transformer, it is also necessary to boost the voltage with the output inductor. This causes a surge voltage to occur in the output inductor, and this surge voltage is applied to the switching element on the secondary side. This means that the switching element on the secondary side may be subjected to stress.

[0006] When the voltage of the precharged capacitor on the primary side is close to 0V, the stored energy in the output inductor cannot be reset and may reach saturation.

[0007] On the other hand, if a simultaneous off period of the secondary side switching elements (transistor Q5 and transistor Q6 described later) is provided in order to reset the stored energy in the output inductor, a surge voltage will be generated.

[0008] An object of the present disclosure is to suppress stress on switching elements on the secondary side and enable power transmission to the primary side. [Means for solving the problem]

[0009] A power supply device according to an embodiment of the present disclosure includes: A power supply device that steps down a first voltage input between a first terminal and a second terminal, and outputs the first voltage between a third terminal and a fourth terminal, and steps up a second voltage input between the third terminal and the fourth terminal, and outputs the second voltage between the first terminal and the second terminal, a bridge circuit including: a first switching element having one end electrically connected to the first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to the second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including: a first winding, one end of which is electrically connected to the other end of the first switching element and one end of the second switching element and the other end of which is electrically connected to the other end of the third switching element and one end of the fourth switching element; and a second winding, which is magnetically coupled to the first winding; a first inductor electrically connected in series with the first winding; a second inductor having one end electrically connected to the center tap of the second winding and the other end electrically connected to the third terminal; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to the fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a series circuit of a capacitor and a switch, one end of which is electrically connected to the center tap of the second winding and one end of the second inductor, and the other end of which is electrically connected to the fourth terminal; Including, It is characterized by:

[0010] In the power supply device, The first switching element to the sixth switching element and a control unit that controls the switch, The control unit is When the second voltage is boosted and output from between the first terminal and the second terminal, In a first period, the switch is turned on, In a second period following the first period, the switch is turned on, and the third switching element and the fifth switching element are turned on; In a third period following the second period, the switch is turned on, In a fourth period following the third period, the switch is turned on, In a fifth period following the fourth period, the switch is turned on, and the fourth switching element and the sixth switching element are turned on; In a sixth period following the fifth period, the switch is turned on. It is characterized by:

[0011] In the power supply device, the series circuit further includes a diode connected in anti-parallel to the capacitor; It is characterized by:

[0012] In the power supply device, The switch is a semiconductor device or a mechanical switch. It is characterized by:

[0013] In the power supply device, The switch includes a seventh switching element and an eighth switching element connected in series in a reverse direction. It is characterized by:

[0014] In the power supply device, Further including a control unit that controls the first switching element to the eighth switching element, The control unit is When the second voltage is boosted and output from between the first terminal and the second terminal, In a first period, the seventh switching element and the eighth switching element are turned on, In a second period following the first period, the third switching element, the fifth switching element, the seventh switching element, and the eighth switching element are turned on, In a third period following the second period, the seventh switching element and the eighth switching element are turned on, In a fourth period following the third period, the seventh switching element and the eighth switching element are turned on, In a fifth period following the fourth period, the fourth switching element, the sixth switching element, the seventh switching element, and the eighth switching element are turned on, In a sixth period following the fifth period, the seventh switching element and the eighth switching element are turned on. It is characterized by:

[0015] A method for controlling a power supply device according to an embodiment of the present disclosure includes: a bridge circuit including a first switching element having one end electrically connected to a first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to a second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a first winding having one end electrically connected to the other end of the first switching element and one end of the second switching element and the other end electrically connected to the other end of the third switching element and one end of the fourth switching element; a first inductor electrically connected in series with the first winding; a second inductor having one end electrically connected to a center tap of the second winding and the other end electrically connected to a third terminal; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to a fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; and a series circuit of a capacitor and a switch, one end of which is electrically connected to the center tap of the second winding and one end of the second inductor, and the other end of which is electrically connected to the fourth terminal, When a second voltage input between the third terminal and the fourth terminal is boosted and output from between the first terminal and the second terminal, In a first period, the switch is turned on, In a second period following the first period, the switch is turned on, and the third switching element and the fifth switching element are turned on; In a third period following the second period, the switch is turned on, In a fourth period following the third period, the switch is turned on, In a fifth period following the fourth period, the switch is turned on, and the fourth switching element and the sixth switching element are turned on; In a sixth period following the fifth period, the switch is turned on. It is characterized by:

[0016] A method for controlling a power supply device according to an embodiment of the present disclosure includes: a bridge circuit including a first switching element having one end electrically connected to a first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to a second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a first winding having one end electrically connected to the other end of the first switching element and one end of the second switching element and the other end electrically connected to the other end of the third switching element and one end of the fourth switching element; a first inductor electrically connected in series to the first winding, a second inductor having one end electrically connected to a center tap of the second winding and the other end electrically connected to a third terminal, a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to a fourth terminal, a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal, and a series circuit of a seventh switching element and an eighth switching element connected in series in a reverse direction to a capacitor, the seventh switching element and an eighth switching element having one end electrically connected to the center tap of the second winding and one end of the second inductor and the other end electrically connected to the fourth terminal, When a second voltage input between the third terminal and the fourth terminal is boosted and output from between the first terminal and the second terminal, In a first period, the seventh switching element and the eighth switching element are turned on, In a second period following the first period, the third switching element, the fifth switching element, the seventh switching element, and the eighth switching element are turned on, In a third period following the second period, the seventh switching element and the eighth switching element are turned on, In a fourth period following the third period, the seventh switching element and the eighth switching element are turned on, In a fifth period following the fourth period, the fourth switching element, the sixth switching element, the seventh switching element, and the eighth switching element are turned on, In a sixth period following the fifth period, the seventh switching element and the eighth switching element are turned on. It is characterized by: Effect of the Invention

[0017] According to the present disclosure, it is possible to suppress stress on switching elements on the secondary side and to transmit power to the primary side. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a power system of an electric vehicle. [Diagram 2] FIG. 2 is a diagram showing the configuration of a conventional DC-DC converter. [Diagram 3] FIG. 3 is a first timing diagram of the boost operation of the conventional DC-DC converter. [Figure 4] FIG. 4 is a second timing diagram of the boost operation of the conventional DC-DC converter. [Diagram 5] FIG. 5 is a diagram illustrating a configuration of the DC-DC converter according to the first embodiment. [Figure 6] FIG. 6 is a timing diagram of the boost operation of the DC-DC converter of the first embodiment. [Figure 7] FIG. 7 is a diagram showing paths through which current flows in the DC-DC converter of the first embodiment. [Figure 8] FIG. 8 is a diagram showing paths through which current flows in the DC-DC converter of the first embodiment. [Figure 9] FIG. 9 is a diagram showing paths through which current flows in the DC-DC converter of the first embodiment. [Figure 10] FIG. 10 is a diagram showing paths through which current flows in the DC-DC converter of the first embodiment. [Figure 11]FIG. 11 is a diagram showing a configuration of a DC-DC converter according to the second embodiment. [Figure 12] FIG. 12 is a timing diagram of the boost operation of the DC-DC converter of the second embodiment. [Figure 13] FIG. 13 is a diagram showing paths through which current flows in the DC-DC converter of the second embodiment. [Figure 14] FIG. 14 is a diagram showing paths through which current flows in the DC-DC converter of the second embodiment. [Figure 15] FIG. 15 is a diagram showing paths through which current flows in the DC-DC converter of the second embodiment. [Figure 16] FIG. 16 is a diagram showing paths through which current flows in the DC-DC converter of the second embodiment. [Figure 17] FIG. 17 is a diagram showing a configuration of a DC-DC converter according to a first modified example. [Figure 18] FIG. 18 is a diagram showing a configuration of a DC-DC converter according to a second modified example. [Figure 19] FIG. 19 is a diagram showing a configuration of a DC-DC converter according to a third modified example. [Figure 20] FIG. 20 is a diagram showing a configuration of a DC-DC converter according to a fourth modified example. [Figure 21] FIG. 21 is a diagram showing a configuration of a DC-DC converter according to a fifth modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, an embodiment of the present disclosure will be described in detail with reference to the accompanying drawings. Note that the present disclosure is not limited to this embodiment, and in the following embodiments, the same components are designated by the same reference numerals, and duplicated descriptions will be omitted.

[0020] <First embodiment> (Example of the power system configuration for an electric vehicle) FIG. 1 is a diagram showing an example of the configuration of a power system of an electric vehicle.

[0021] The power system 1 includes a high-voltage battery 2, a resistor 3, contactors 4, 5, and 6, an inverter 7, a motor 9, a DC-DC converter 10, and a low-voltage battery 11. The inverter 7 includes a smoothing capacitor 8 on the input side.

[0022] The DC-DC converter 10 corresponds to an example of a "power supply device" of the present disclosure.

[0023] The high-voltage battery 2 is exemplified by a driving battery, but the present disclosure is not limited thereto. The voltage of the high-voltage battery 2 is arbitrary. The low-voltage battery 11 is exemplified by an auxiliary battery, but the present disclosure is not limited thereto. The voltage of the low-voltage battery 11 is arbitrary.

[0024] Initially (for example, when starting an electric vehicle), the charging voltage of capacitor 8 may be 0V, so it is necessary to precharge capacitor 8. Therefore, contactors 5 and 6 are turned on, and capacitor 8 is precharged (preliminarily charged) from high-voltage battery 2 via resistor 3. After precharging is completed, contactor 5 is turned off, and contactor 4 is turned on.

[0025] When charging the low-voltage battery 11, the DC-DC converter 10 steps down the DC voltage of the capacitor 8 and outputs it to the low-voltage battery 11. The low-voltage battery 11 is charged by the DC voltage output from the DC-DC converter 10.

[0026] (Conventional configuration) 2 is a diagram showing the configuration of a conventional DC-DC converter. The DC-DC converter 100 is a phase-shift full-bridge circuit. Currently, the most common circuit used for power conversion from the high-voltage battery 2 to the low-voltage battery 11 is a phase-shift full-bridge circuit.

[0027] The DC-DC converter 100 has a first terminal 21, a second terminal 22, a third terminal 23, and a fourth terminal 24.

[0028] The first terminal 21 is electrically connected to one end (high potential end) of the capacitor 8. The second terminal 22 is electrically connected to the other end (low potential end) of the capacitor 8. The third terminal 23 is electrically connected to one end (high potential end) of the low voltage battery 11. The fourth terminal 24 is electrically connected to the other end (low potential end) of the low voltage battery 11.

[0029] The DC-DC converter 100 steps down the first voltage V1 input between the first terminal 21 and the second terminal 22, and outputs the second voltage V2 from between the third terminal 23 and the fourth terminal 24. Alternatively, the DC-DC converter 100 steps up the second voltage V2 input between the third terminal 23 and the fourth terminal 24, and outputs the first voltage V1 from between the first terminal 21 and the second terminal 22.

[0030] The DC-DC converter 100 includes a bridge circuit 31, an inductor Lr, a transformer T, a choke Lo, a transistor Q5, a transistor Q6, a capacitor 51, and a control unit 61.

[0031] The bridge circuit 31 includes transistors Q1 to Q4.

[0032] The transistor Q1 corresponds to an example of a "first switching element" in the present disclosure. The transistor Q2 corresponds to an example of a "second switching element" in the present disclosure. The transistor Q3 corresponds to an example of a "third switching element" in the present disclosure. The transistor Q4 corresponds to an example of a "fourth switching element" in the present disclosure.

[0033] In the embodiment, each transistor is a MOSFET, but the present disclosure is not limited to this. Each transistor may be a silicon power device, a GaN power device, a SiC power device (for example, an IGBT (Insulated Gate Bipolar Transistor)), or the like.

[0034] Each transistor has a parasitic diode (body diode) that can actively conduct current or has an anti-parallel diode connected between it and the MOSFET's backgate and source and drain.

[0035] The source of transistor Q1 is electrically connected to the drain of transistor Q2. The drain of transistor Q1 is electrically connected to the drain of transistor Q3. The source of transistor Q3 is electrically connected to the drain of transistor Q4. The source of transistor Q2 is electrically connected to the source of transistor Q4.

[0036] The drain of the transistor Q1 and the drain of the transistor Q3 are electrically connected to a first terminal 21. The source of the transistor Q2 and the source of the transistor Q4 are electrically connected to a second terminal 22.

[0037] The transformer T includes a first winding 41, a second winding 42, and a core 43. The first winding 41 and the second winding 42 are wound around the core 43.

[0038] The source of the transistor Q1 and the drain of the transistor Q2 are electrically connected to one end of an inductor Lr. The other end of the inductor Lr is electrically connected to one end of a first winding 41. The other end of the first winding 41 is electrically connected to the source of the transistor Q3 and the drain of the transistor Q4.

[0039] The inductor Lr may be a wound component or may be the leakage inductance of the first winding 41.

[0040] The second winding 42 is divided into a first portion 42a and a second portion 42b at a center tap 42c.

[0041] The turn ratio between the first winding 41 and the first portion 42a of the second winding 42 is N:1. Similarly, the turn ratio between the first winding 41 and the second portion 42b of the second winding 42 is N:1. N is exemplified to be about 12 to 13, but the present disclosure is not limited thereto.

[0042] The center tap 42c is electrically connected to one end of the choke Lo. The other end of the choke Lo is electrically connected to one end (high potential end) of the capacitor 51 and the third terminal 23.

[0043] One end of the first portion 42a is electrically connected to the center tap 42c, and the other end of the first portion 42a is electrically connected to the drain of the transistor Q5.

[0044] One end of the second portion 42b is electrically connected to the center tap 42c, and the other end of the second portion 42b is electrically connected to the drain of the transistor Q6.

[0045] The source of the transistor Q5 and the source of the transistor Q6 are electrically connected to the other end (low potential end) of the capacitor 51 and the fourth terminal 24.

[0046] The control unit 61 outputs a drive control signal P1 to the bridge circuit 31, outputs a drive control signal P2 to the transistor Q5, and outputs a drive control signal P3 to the transistor Q6.

[0047] When the DC-DC converter 100 outputs a step-down voltage from the first side (capacitor 8 side) to the second side (low-voltage battery 11 side) (when charging the low-voltage battery 11), the DC-DC converter 100 uses a capacitor input method because the capacitor 8 is connected in parallel to the high-voltage battery 2.

[0048] When the DC-DC converter 100 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the DC-DC converter 100 uses a choke input type because the choke Lo is connected in series with the low-voltage battery 11.

[0049] When the DC-DC converter 100 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when the capacitor 8 is pre-charged), if the target first voltage V1 is N times or less than the second voltage V2, boosting by the turns ratio of the transformer T is sufficient. However, if the target first voltage V1 is higher than N times the second voltage V2, boosting by the choke Lo is necessary in addition to the transformer T. In that case, when the choke Lo discharges energy, a surge voltage is generated by the choke Lo, and a large surge voltage is applied to the transistors Q5 and Q6, which may cause stress on the transistors Q5 and Q6.

[0050] (Operation of conventional example) FIG. 3 is a first timing diagram of the boost operation of the conventional DC-DC converter.

[0051] As shown in Fig. 3, one cycle of the boost operation includes a first period Mode1, a second period Mode2, a third period Mode3, and a fourth period Mode4. The first period Mode1 is a charging period for the choke Lo. The second period Mode2 is a discharging period for the choke Lo. The third period Mode3 is a charging period for the choke Lo. The fourth period Mode4 is a discharging period for the choke Lo.

[0052] The control unit 61 controls the transistors Q1 to Q4 to be in the off state during all periods from the first period Mode1 to the fourth period Mode4.

[0053] At timing t0, the first period Mode1 starts. The control unit 61 controls the transistor Q5 and the transistor Q6 to be in the on state.

[0054] The current on the second side flows through the high potential end of the low voltage battery 11, the choke Lo, and the intermediate tap 42c. This current is split into two at the intermediate tap 42c, and flows through the first portion 42a of the second winding 42 and the second portion 42b of the second winding 42. One of the split currents flows through the first portion 42a of the second winding 42 and the transistor Q5. The other split current flows through the second portion 42b of the second winding 42 and the transistor Q6. The currents joined at the source of the transistor Q5 and the source of the transistor Q6 flow to the low potential end of the low voltage battery 11.

[0055] In the first period Mode1, the current ILo of the choke Lo increases linearly, and the voltage VLo of the choke Lo becomes V2.

[0056] At timing t1, the second period Mode2 starts. The control unit 61 controls the transistor Q6 to be in the off state.

[0057] The current on the second side flows through the high potential side terminal of the low voltage battery 11, the choke Lo, the center tap 42c, the first portion 42a of the second winding 42, the transistor Q5, and the low potential side terminal of the low voltage battery 11.

[0058] At this time, the transistor Q6 is in an off state, and the energy (current) flowing through the second portion 42b of the second winding 42 has nowhere to go, causing a surge voltage to be generated. The surge voltage is applied to the transistor Q6.

[0059] A current on the first side due to the induced voltage generated in the first winding 41 flows through the path of one end of the first winding 41 → inductor Lr → the parasitic diode of transistor Q1 → the high potential side end of capacitor 8 → the low potential side end of capacitor 8 → the parasitic diode of transistor Q4 → the other end of the first winding 41.

[0060] This first side current precharges the capacitor 8 .

[0061] In the second period Mode2, the current ILo of the choke Lo becomes substantially constant, and the voltage VLo of the choke Lo becomes (V2-NV1).

[0062] At timing t2, the third period Mode 3 starts. The control unit 61 controls the transistor Q6 to be in the on state.

[0063] The current on the second side flows through the high potential end of the low voltage battery 11, the choke Lo, and the intermediate tap 42c. This current is split into two at the intermediate tap 42c, and flows through the first portion 42a of the second winding 42 and the second portion 42b of the second winding 42. One of the split currents flows through the first portion 42a of the second winding 42 and the transistor Q5. The other split current flows through the second portion 42b of the second winding 42 and the transistor Q6. The currents joined at the source of the transistor Q5 and the source of the transistor Q6 flow to the low potential end of the low voltage battery 11.

[0064] In the third period Mode3, the current ILo of the choke Lo increases linearly, and the voltage VLo of the choke Lo becomes V2.

[0065] At timing t3, the fourth period Mode 4 starts. The control unit 61 controls the transistor Q5 to be in the off state.

[0066] The current on the second side flows through the high potential side terminal of the low voltage battery 11, the choke Lo, the center tap 42c, the second portion 42b of the second winding 42, the transistor Q6, and the low potential side terminal of the low voltage battery 11.

[0067] At this time, the transistor Q5 is in an off state, and the energy (current) flowing through the first portion 42a of the second winding 42 has nowhere to go, causing a surge voltage to be generated. The surge voltage is applied to the transistor Q5.

[0068] A current on the first side due to the induced voltage generated in the first winding 41 flows through the other end of the first winding 41 → the parasitic diode of transistor Q3 → the high potential end of capacitor 8 → the low potential end of capacitor 8 → the parasitic diode of transistor Q2 → inductor Lr → one end of the first winding 41.

[0069] This first side current precharges the capacitor 8 .

[0070] In the fourth period Mode4, the current ILo of the choke Lo becomes substantially constant, and the voltage VLo of the choke Lo becomes (V2-NV1).

[0071] In this way, in the DC-DC converter 100, a surge voltage occurs at the timing when the transistor Q5 or the transistor Q6 is turned off, and is applied to the transistor Q5 or the transistor Q6, which may cause stress to the transistor Q5 or the transistor Q6.

[0072] Furthermore, when the pre-charging of the capacitor 8 starts, the voltage of the capacitor 8 may be very low (for example, 0 V). In that case, the choke Lo is not reset (energy cannot be completely discharged) during the discharge period (the second period Mode 2 and the fourth period Mode 4), so the current ILo of the choke Lo becomes large and the choke Lo may become saturated.

[0073] In order to suppress saturation of the choke Lo, it is possible to provide a pause period between the second period Mode2 and the third period Mode3.

[0074] FIG. 4 is a second timing diagram of the boost operation of the conventional DC-DC converter.

[0075] In FIG. 4, in comparison with FIG. 3, a pause period is provided between the second period Mode2 and the third period Mode3 in order to reset the stored energy in the choke Lo.

[0076] Timing t4 to timing t6 and timing t7 and thereafter in FIG. 4 are similar to timing t0 to timing t2 and timing t2 and thereafter in FIG. 3, and therefore description thereof will be omitted.

[0077] At timing t6, the idle period starts. The control unit 61 controls the transistor Q5 and the transistor Q6 to be in the off state.

[0078] When the transistors Q5 and Q6 are turned off, there is no path for the current of the choke Lo to flow, and the current ILo of the choke Lo becomes 0. However, at this time, a surge voltage VX (<0) is generated in the choke Lo.

[0079] (Configuration of the first embodiment) FIG. 5 is a diagram illustrating a configuration of the DC-DC converter according to the first embodiment.

[0080] The DC-DC converter 10 further includes a series circuit 71 in comparison with the conventional DC-DC converter 100 (see FIG. 2). The series circuit 71 includes a series-connected capacitor C A and transistor Q7.

[0081] The transistor Q7 corresponds to an example of a "seventh switching element" of the present disclosure.

[0082] Capacitor C A One end of the capacitor C is electrically connected to the center tap 42c of the second winding 42 and to one end of the choke Lo. A The other end is electrically connected to the drain of the transistor Q7. The source of the transistor Q7 is electrically connected to the sources of the transistors Q5 and Q6, the low potential side end of the capacitor 51, and the fourth terminal 24.

[0083] The control unit 61 outputs a drive control signal P4 to the gate of the transistor Q7.

[0084] In the first embodiment, the capacitor CA In the above embodiment, the capacitor C is disposed on the high potential side and the transistor Q7 is disposed on the low potential side, but the present disclosure is not limited to this. A Alternatively, the drain of the transistor Q7 may be electrically connected to the center tap 42c of the second winding 42 and one end of the choke Lo, and the source of the transistor Q7 may be connected to the capacitor C. A and electrically connect one end of the capacitor C A The other end of the transistor Q7 may be electrically connected to the source of the transistor Q5, the source of the transistor Q6, the other end of the capacitor 51, and the fourth terminal 24. However, it is preferable to place the transistor Q7 on the low potential side, since this allows the potential level of the drive control signal P4 to be lowered.

[0085] When the DC-DC converter 10 outputs a step-down voltage from the first side (capacitor 8 side) to the second side (low-voltage battery 11 side) (when charging the low-voltage battery 11), the control unit 61 controls the transistor Q7 to the off state. In this case, the DC-DC converter 10 becomes an equivalent circuit of the DC-DC converter 100. At this time, the DC-DC converter 10 becomes a capacitor input type because the capacitor 8 is connected in parallel to the high-voltage battery 2.

[0086] When the DC-DC converter 10 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when the capacitor 8 is precharged), the control unit 61 controls the transistor Q7 to be in the on state. A is charged by the low-voltage battery 11, and no energy is stored in the choke Lo. Therefore, the DC-DC converter 10 is of a capacitor input type. In this case, the capacitor 51, the choke Lo, and the series circuit 71 can be considered as a π-type CLC filter.

[0087] (Boost Operation in the First Embodiment) The conventional DC-DC converter 100 boosts the second voltage V2 to the first voltage V1 by using a choke Lo and a transformer T. On the other hand, the DC-DC converter 10 of the first embodiment boosts the second voltage V2 to the first voltage V1 by using a transformer T and an inductor Lr.

[0088] Fig. 6 is a timing diagram of the boost operation of the DC-DC converter of the first embodiment. Fig. 7 to Fig. 10 are diagrams showing paths through which current flows in the DC-DC converter of the first embodiment.

[0089] With reference to FIG. 6, one cycle of the boost operation includes a first period Mode1, a second period Mode2, a third period Mode3, a fourth period Mode4, a fifth period Mode5, and a sixth period Mode6.

[0090] The control unit 61 controls the transistor Q7 to be in the on state during all periods from the first period Mode1 to the sixth period Mode6.

[0091] In the first period Mode1, the control unit 61 controls the transistors Q1 to Q6 to be in the off state.

[0092] Timing 10 At this time, the second period Mode 2 starts. The control unit 61 controls the transistors Q3 and Q5 to be in the on state.

[0093] In the second period Mode2, energy is stored in the inductor Lr.

[0094] 7, as shown by line 311, a current flows from the high potential end of the low voltage battery 11 to the choke Lo. Also, as shown by line 313, a current flows from one end of the first portion 42a of the second winding 42 to the other end of the first portion 42a of the second winding 42 to the transistor Q5. The currents joined at the source of the transistor Q5 and the source of the transistor Q7 flow to the low potential end of the low voltage battery 11 as shown by line 314.

[0095] A current on the first side due to an induced voltage generated in the primary winding 41 flows through a path indicated by a line 315 from one end of the primary winding 41 to the inductor Lr, the parasitic diode of the transistor Q1, the transistor Q3, and the other end of the primary winding 41.

[0096] This current on the first side stores energy in inductor Lr.

[0097] Timing 11 At this time, the third period Mode 3 starts. The control unit 61 controls the transistors Q3 and Q5 to be in the off state.

[0098] In the third period Mode3, the energy stored in the inductor Lr is released, and the capacitor 8 is precharged.

[0099] Referring to Figure 8, the current on the first side due to the energy stored in inductor Lr flows through a path shown by line 323, from one end of inductor Lr → the parasitic diode of transistor Q1 → the high potential side end of capacitor 8 → the low potential side end of capacitor 8 → the parasitic diode of transistor Q4 → the other end of first winding 41 → one end of first winding 41 → the other end of inductor Lr.

[0100] This first side current precharges the capacitor 8 .

[0101] At this time, on the second side, as shown by the line 321, a current flows from the high potential side end of the low voltage battery 11 to the choke Lo. Also, as shown by the line 322, a current flows from one end of the second portion 42b of the second winding 42 to the capacitor C A A current flows through the path: →transistor Q7 →parasitic diode of transistor Q6 →the other end of the second portion 42b of the second winding 42.

[0102] It should be noted that no current flows through the first portion 42a of the second winding 42 because the parasitic diode of the transistor Q5 is in the reverse direction.

[0103] Timing 12At this time, the fourth period Mode 4 starts. The control unit 61 maintains the states of the transistors Q1 to Q7.

[0104] Timing 13 At this time, the fifth period Mode 5 starts. The control unit 61 controls the transistors Q4 and Q6 to be in the on state.

[0105] In the fifth period Mode5, energy is stored in the inductor Lr.

[0106] 9, as shown by line 341, a current flows from the high potential end of the low voltage battery 11 to the choke Lo. Also, as shown by line 343, a current flows from one end of the second portion 42b of the second winding 42 to the other end of the second portion 42b of the second winding 42 to the transistor Q6. The currents joined at the source of the transistor Q6 and the source of the transistor Q7 flow to the low potential end of the low voltage battery 11 as shown by line 344.

[0107] A current on the first side due to an induced voltage generated in the primary winding 41 flows through the other end of the primary winding 41, the transistor Q4, the parasitic diode of the transistor Q2, the inductor Lr, and then the one end of the primary winding 41, as shown by a line 345.

[0108] This current on the first side stores energy in inductor Lr.

[0109] Timing 14 At this time, the sixth period Mode 6 starts. The control unit 61 controls the transistors Q4 and Q6 to be in the off state.

[0110] In the sixth period Mode6, the energy stored in the inductor Lr is released and the capacitor 8 is precharged.

[0111] 10, the current on the first side due to the energy stored in inductor Lr flows through the path, as shown by line 353, from the other end of inductor Lr → one end of first winding 41 → the other end of first winding 41 → the parasitic diode of transistor Q3 → the high potential side end of capacitor 8 → the low potential side end of capacitor 8 → the parasitic diode of transistor Q2 → one end of inductor Lr.

[0112] This first side current precharges the capacitor 8 .

[0113] At this time, on the second side, as shown by the line 351, a current flows from the high potential side end of the low voltage battery 11 to the choke Lo. Also, as shown by the line 352, a current flows from one end of the first portion 42a of the second winding 42 to the capacitor C A A current flows through the path: →transistor Q7 →parasitic diode of transistor Q5 →the other end of the first portion 42a of the second winding 42.

[0114] (summary) As described above, when the DC-DC converter 10 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the control unit 61 controls the transistor Q7 to the on state. In this case, the DC-DC converter 10 is of the capacitor input type.

[0115] This allows the DC-DC converter 10 to suppress the occurrence of a surge voltage due to the choke Lo, thereby preventing the transistor Q5 or the transistor Q6 from being subjected to stress.

[0116] Furthermore, since the DC-DC converter 10 can precharge the capacitor 8, the resistor 3 and the contactor 5 (see FIG. 1) in the power system 1 become unnecessary.

[0117] Moreover, the DC-DC converter 10 can reset the energy of the choke Lo, thereby preventing saturation of the choke Lo. Moreover, the DC-DC converter 10 can prevent saturation of the inductor Lr, because the direction of the energy stored in the inductor Lr is reversed within one period.

[0118] <Second embodiment> (composition) FIG. 11 is a diagram showing a configuration of a DC-DC converter according to the second embodiment.

[0119] Compared to the DC-DC converter 10 (see FIG. 5), the DC-DC converter 10A includes a series circuit 71A instead of the series circuit 71. The series circuit 71A includes a series-connected capacitor C A , a transistor Q7, and a transistor Q8.

[0120] The transistor Q8 corresponds to an example of an "eighth switching element" of the present disclosure.

[0121] The drain of transistor Q7 is connected to capacitor C A The source of transistor Q7 is electrically connected to the other end of transistor Q8. The source of transistor Q7 is electrically connected to the source of transistor Q8. That is, transistor Q7 and transistor Q8 are connected in series in the opposite direction. The drain of transistor Q8 is electrically connected to the sources of transistors Q5 and Q6, the low potential end of capacitor 51, and the fourth terminal 24.

[0122] The control unit 61 outputs a drive control signal P4 to the gates of the transistor Q7 and the transistor Q8.

[0123] In the second embodiment, the capacitor C A However, the present disclosure is not limited to this. AThat is, the drain of the transistor Q7 is electrically connected to the center tap 42c of the second winding 42 and one end of the choke Lo, the source of the transistor Q7 is electrically connected to the source of the transistor Q8, and the drain of the transistor Q8 is connected to the capacitor C. A is electrically connected to one end of the capacitor C A The other end may be electrically connected to the source of transistor Q5, the source of transistor Q6, the low potential end of capacitor 51, and the fourth terminal 24. However, it is preferable to place transistor Q7 and transistor Q8 on the low potential side, since this allows the potential levels of drive control signals P4 and P5 to be lowered.

[0124] (operation) Fig. 12 is a timing chart of the boost operation of the DC-DC converter of the second embodiment. Fig. 13 to Fig. 16 are diagrams showing paths through which current flows in the DC-DC converter of the second embodiment.

[0125] With reference to FIG. 12, one cycle of the boost operation includes a first period Mode1, a second period Mode2, a third period Mode3, a fourth period Mode4, a fifth period Mode5, and a sixth period Mode6.

[0126] The control unit 61 controls the transistors Q7 and Q8 to be in the on state during all periods from the first period Mode1 to the sixth period Mode6.

[0127] Timing 20 At this time, the first period Mode 1 starts. The control unit 61 controls the transistors Q1 to Q6 to be in the off state.

[0128] Timing 21 At this time, the second period Mode 2 starts. The control unit 61 controls the transistor Q3 and the transistor Q5 to be in the on state.

[0129] In the second period Mode2, energy is stored in the inductor Lr.

[0130] 13, as shown by line 411, a current flows from the high potential end of the low voltage battery 11 to the choke Lo. Also, as shown by line 413, a current flows from one end of the first portion 42a of the second winding 42 to the other end of the first portion 42a of the second winding 42 to the transistor Q5. The currents joined at the source of the transistor Q5 and the source of the transistor Q8 flow to the low potential end of the low voltage battery 11 as shown by line 414.

[0131] As indicated by line 415, the current on the first side flows through one end of the first winding 41, the inductor Lr, the parasitic diode of the transistor Q1, the transistor Q3, and the other end of the first winding 41.

[0132] This current on the first side stores energy in inductor Lr.

[0133] Referring to FIG. 12, timing t 22 At this time, the third period Mode 3 starts. The control unit 61 controls the transistors Q3 and Q5 to be in the off state.

[0134] In the third period Mode3, the energy stored in the inductor Lr is released, and the capacitor 8 is precharged.

[0135] Referring to FIG. 14, the current on the first side due to the energy stored in inductor Lr flows in the path shown by line 423, from one end of inductor Lr → the parasitic diode of transistor Q1 → the high potential side end of capacitor 8 → the low potential side end of capacitor 8 → the parasitic diode of transistor Q4 → the other end of first winding 41 → one end of first winding 41 → the other end of inductor Lr.

[0136] This first side current precharges the capacitor 8 .

[0137] At this time, on the second side, as shown by the line 421, a current flows from the high potential side end of the low voltage battery 11 to the choke Lo. Also, in the second portion 42b of the second winding 42, an induced voltage is generated from the first winding 41. As shown by the line 422, a current flows from one end of the second portion 42b of the second winding 42 to the capacitor C. A A current flows through the path: →transistor Q7 →transistor Q8 →parasitic diode of transistor Q6 →the other end of the second portion 42b of the second winding 42.

[0138] It should be noted that no current flows through the first portion 42a of the second winding 42 because the parasitic diode of the transistor Q5 is in the reverse direction.

[0139] Referring to FIG. 12, timing t 23 At this time, the fourth period Mode 4 starts. The control unit 61 maintains the states of the transistors Q1 to Q7.

[0140] Referring to FIG. 12, timing t 24 At this time, the fifth period Mode 5 starts. The control unit 61 controls the transistors Q4 and Q6 to be in the on state.

[0141] In the fifth period Mode5, energy is stored in the inductor Lr.

[0142] 15, as shown by line 441, a current flows from the high potential end of the low voltage battery 11 to the choke Lo. Also, as shown by line 443, a current flows from one end of the second portion 42b of the second winding 42 to the other end of the second portion 42b of the second winding 42 to the transistor Q6. The currents joined at the source of the transistor Q6 and the source of the transistor Q8 flow to the low potential end of the low voltage battery 11 as shown by line 444.

[0143] As indicated by line 445, the current on the first side flows through the other end of the first winding 41, transistor Q4, the parasitic diode of transistor Q2, inductor Lr, and one end of the first winding 41.

[0144] This current on the first side stores energy in inductor Lr.

[0145] Referring to FIG. 12, timing t 25 At this time, the sixth period Mode 6 starts. The control unit 61 controls the transistors Q4 and Q6 to be in the off state.

[0146] In the sixth period Mode6, the energy stored in the inductor Lr is released and the capacitor 8 is precharged.

[0147] Referring to FIG. 16, current 453 on the first side due to the energy stored in inductor Lr flows through the path from the other end of inductor Lr → one end of first winding 41 → the other end of first winding 41 → the parasitic diode of transistor Q3 → the high potential side end of capacitor 8 → the low potential side end of capacitor 8 → the parasitic diode of transistor Q2 → one end of inductor Lr.

[0148] This first side current precharges the capacitor 8 .

[0149] At this time, on the second side, as shown by the line 451, a current flows from the high potential side end of the low voltage battery 11 to the choke Lo. Also, in the first portion 42a of the second winding 42, an induced voltage is generated from the first winding 41. As shown by the line 452, a current flows from one end of the first portion 42a of the second winding 42 to the capacitor C. A A current flows through the path: →transistor Q7 →transistor Q8 →parasitic diode of transistor Q5 →the other end of the first portion 42a of the second winding 42.

[0150] It should be noted that no current flows through the second portion 42b of the second winding 42 because the parasitic diode of the transistor Q6 is in the reverse direction.

[0151] (summary) As described above, when the DC-DC converter 10A outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the control unit 61 controls the transistors Q7 and Q8 to be in the on state. In this case, the DC-DC converter 10A is of the capacitor input type.

[0152] As a result, the DC-DC converter 10A can suppress the occurrence of a surge voltage due to the choke Lo, and therefore can suppress the transistor Q5 or the transistor Q6 from being subjected to stress.

[0153] Furthermore, since the DC-DC converter 10A can precharge the capacitor 8, the resistor 3 and the contactor 5 (see FIG. 1) of the power system 1 can be eliminated.

[0154] Moreover, DC-DC converter 10A can reset the energy of choke Lo, thereby preventing saturation of choke Lo. Moreover, DC-DC converter 10A can prevent inductor Lr from becoming saturated, because the direction of the energy stored in inductor Lr is reversed within one period.

[0155] <First Modification> FIG. 17 is a diagram showing a configuration of a DC-DC converter according to a first modified example.

[0156] Compared with DC-DC converter 10 (see FIG. 5), DC-DC converter 10B includes a series circuit 71B instead of series circuit 71.

[0157] The series circuit 71B has a capacitor C A The input terminal of the ...

[0158] <Second Modification> FIG. 18 is a diagram showing a configuration of a DC-DC converter according to a second modified example.

[0159] Compared to DC-DC converter 10B (see FIG. 17), DC-DC converter 10C includes a series circuit 71C instead of series circuit 71B.

[0160] The series circuit 71C has a capacitor C A A diode D1 is disposed on the low potential side, and a transistor Q7 is disposed on the high potential side.

[0161] <Third Modification> FIG. 19 is a diagram showing a configuration of a DC-DC converter according to a third modified example.

[0162] Compared to DC-DC converter 10A (see FIG. 11), DC-DC converter 10E includes a series circuit 71E instead of series circuit 71A.

[0163] In the series circuit 71E, compared to the series circuit 71A, the transistors Q7 and Q8 are arranged on the high potential side, and the capacitor C A is placed on the low potential side.

[0164] <Fourth Modification> FIG. 20 is a diagram showing a configuration of a DC-DC converter according to a fourth modified example.

[0165] Compared with DC-DC converter 10 (see FIG. 5), DC-DC converter 10F includes a series circuit 71F instead of series circuit 71.

[0166] Compared to the series circuit 71, the series circuit 71F includes a mechanical switch SW instead of the transistor Q7.

[0167] <Fifth Modification> FIG. 21 is a diagram showing a configuration of a DC-DC converter according to a fifth modified example.

[0168] Compared to DC-DC converter 10F (see FIG. 20), DC-DC converter 10G includes a series circuit 71G instead of series circuit 71F.

[0169] In the series circuit 71G, the mechanical switch SW is disposed on the higher potential side compared to the series circuit 71F, and the capacitor C A is placed on the low potential side.

[0170] Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the contents of these embodiments. The above-mentioned components include those that a person skilled in the art can easily imagine, those that are substantially the same, and those that are within the so-called equivalent range. Furthermore, the above-mentioned components can be appropriately combined. Furthermore, various omissions, substitutions, or modifications of the components can be made without departing from the gist of the above-mentioned embodiments. [Explanation of symbols]

[0171] 1 Power system 2 High voltage battery 3. Resistance 4, 5, 6 Contactors 7 Inverter 8 Capacitors 9 Motor 10, 10A, 10B, 10C, 10E, 10F, 10G, 100 DC-DC Converters 11 Low voltage battery 31 Bridge Circuit 51 Capacitor 61 Control section 71, 71A, 71B, 71C, 71E, 71F, 71G series circuit D1 Diode Lo Choke Lr Inductor SW Mechanical switch Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8 transistors T transformer

Claims

1. A power supply device that steps down a first voltage input between a first terminal and a second terminal, and outputs the first voltage between a third terminal and a fourth terminal, and steps up a second voltage input between the third terminal and the fourth terminal, and outputs the second voltage between the first terminal and the second terminal, a bridge circuit including: a first switching element having one end electrically connected to the first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to the second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including: a first winding, one end of which is electrically connected to the other end of the first switching element and one end of the second switching element and the other end of which is electrically connected to the other end of the third switching element and one end of the fourth switching element; and a second winding, which is magnetically coupled to the first winding; a first inductor electrically connected in series with the first winding; a second inductor having one end electrically connected to the center tap of the second winding and another end electrically connected to the third terminal; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to the fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a series circuit of a capacitor and a switch, one end of which is electrically connected to the center tap of the second winding and one end of the second inductor, and the other end of which is electrically connected to the fourth terminal; Including, A power supply device comprising:

2. The inverter further includes a control unit that controls the first switching element to the sixth switching element and the switch, The control unit is When the second voltage is boosted and output from between the first terminal and the second terminal, In a first period, the switch is turned on, In a second period following the first period, the switch is turned on, and the third switching element and the fifth switching element are turned on; In a third period following the second period, the switch is turned on, In a fourth period following the third period, the switch is turned on, In a fifth period following the fourth period, the switch is turned on, and the fourth switching element and the sixth switching element are turned on; In a sixth period following the fifth period, the switch is turned on.

2. The power supply device according to claim 1 .

3. the series circuit further includes a diode connected in anti-parallel to the capacitor; 2. The power supply device according to claim 1 .

4. The switch is a semiconductor device or a mechanical switch.

2. The power supply device according to claim 1 .

5. The switch includes a seventh switching element and an eighth switching element connected in series in a reverse direction.

2. The power supply device according to claim 1 .

6. A control unit that controls the first switching element to the eighth switching element, The control unit is When the second voltage is boosted and output from between the first terminal and the second terminal, In a first period, the seventh switching element and the eighth switching element are turned on, In a second period following the first period, the third switching element, the fifth switching element, the seventh switching element, and the eighth switching element are turned on, In a third period following the second period, the seventh switching element and the eighth switching element are turned on, In a fourth period following the third period, the seventh switching element and the eighth switching element are turned on, In a fifth period following the fourth period, the fourth switching element, the sixth switching element, the seventh switching element, and the eighth switching element are turned on, In a sixth period following the fifth period, the seventh switching element and the eighth switching element are turned on.

6. The power supply device according to claim 5 .

7. a bridge circuit including a first switching element having one end electrically connected to a first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to a second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a first winding having one end electrically connected to the other end of the first switching element and one end of the second switching element and the other end electrically connected to the other end of the third switching element and one end of the fourth switching element; a first inductor electrically connected in series to the first winding; a second inductor having one end electrically connected to a center tap of the second winding and the other end electrically connected to a third terminal; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to a fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; and a series circuit of a capacitor and a switch, one end of which is electrically connected to the center tap of the second winding and one end of the second inductor, and the other end of which is electrically connected to the fourth terminal, When a second voltage input between the third terminal and the fourth terminal is boosted and output from between the first terminal and the second terminal, In a first period, the switch is turned on, In a second period following the first period, the switch is turned on, and the third switching element and the fifth switching element are turned on; In a third period following the second period, the switch is turned on, In a fourth period following the third period, the switch is turned on, In a fifth period following the fourth period, the switch is turned on, and the fourth switching element and the sixth switching element are turned on; In a sixth period following the fifth period, the switch is turned on.

23. A method for controlling a power supply device comprising:

8. a bridge circuit including a first switching element having one end electrically connected to a first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to a second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a first winding having one end electrically connected to the other end of the first switching element and one end of the second switching element and the other end electrically connected to the other end of the third switching element and one end of the fourth switching element; a first inductor electrically connected in series to the first winding, a second inductor having one end electrically connected to a center tap of the second winding and the other end electrically connected to a third terminal, a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to a fourth terminal, a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal, and a series circuit of a seventh switching element and an eighth switching element connected in series in a reverse direction with a capacitor, the seventh switching element and an eighth switching element having one end electrically connected to the center tap of the second winding and one end of the second inductor and the other end electrically connected to the fourth terminal, When a second voltage input between the third terminal and the fourth terminal is boosted and output from between the first terminal and the second terminal, In a first period, the seventh switching element and the eighth switching element are turned on, In a second period following the first period, the third switching element, the fifth switching element, the seventh switching element, and the eighth switching element are turned on, In a third period following the second period, the seventh switching element and the eighth switching element are turned on, In a fourth period following the third period, the seventh switching element and the eighth switching element are turned on, In a fifth period following the fourth period, the fourth switching element, the sixth switching element, the seventh switching element, and the eighth switching element are turned on, In a sixth period following the fifth period, the seventh switching element and the eighth switching element are turned on.

23. A method for controlling a power supply device comprising:

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