Electric power source device and control method for electric power source device

Abstract

To suppress stress of a switching element.SOLUTION: An electric power source device includes: a transformer including a first switch element having one connected to a first terminal, a second switch element connected to between the other end of the first switch element and a second terminal, a third switch element having one end connected to the first terminal, a fourth switch element connected to the other end of the third switch element and the second terminal, a first winding wire connected to between the other end of the first switch element and the other end of the third switch element, and a second winding wire magnetically coupled with the first winding wire; an inductor connected to an intermediate tap of the second winding wire and the third terminal; a fifth switch element connected to the one end of the second winding wire and a fourth terminal; a sixth switch element electrically connected to the other end of the second winding wire and the fourth terminal; a first switch connected to the one end of the fifth switch element and the third terminal; and a second switch connected to between the one end of the sixth switch element and the third terminal.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present disclosure relates to a power supply device and a method for controlling a power supply device. [Background technology]

[0002] For example, in electric vehicles, DC-DC converters are used that step down the voltage from the primary side (high voltage side, e.g., a driving battery) to the secondary side (low voltage side, e.g., an auxiliary battery) and then step up the voltage from the secondary side to the primary side. A phase-shift full-bridge circuit is the mainstream for these DC-DC converters.

[0003] Patent Document 1 describes a DC-DC converter in which malfunction of a switching element does not lead to failure of the converter. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2014-36511 A Summary of the Invention [Problem to be solved by the invention]

[0005] When power is transmitted from the secondary side to the primary side using a phase-shift full-bridge circuit, it is called the choke input method. Furthermore, if the turns ratio of the transformer is primary turns:secondary turns = N:1, when outputting a voltage higher than ((secondary battery voltage) x N) to the primary side, in addition to boosting the voltage with the transformer, it is also necessary to boost the voltage with the output inductor. This causes a surge voltage to occur in the output inductor, and this surge voltage is applied to the switching element on the secondary side. This means that the switching element on the secondary side may be subjected to stress.

[0006] When the voltage of the precharged capacitor on the primary side is close to 0V, the stored energy in the output inductor cannot be reset and may reach saturation.

[0007] On the other hand, if a simultaneous off period of the secondary side switching elements (transistor Q5 and transistor Q6 described later) is provided in order to reset the stored energy in the output inductor, a surge voltage will be generated.

[0008] An object of the present disclosure is to suppress stress on switching elements on the secondary side and enable power transmission to the primary side. [Means for solving the problem]

[0009] A power supply device according to an embodiment of the present disclosure includes: A power supply device that steps down a first voltage input between a first terminal and a second terminal, and outputs the first voltage between a third terminal and a fourth terminal, and steps up a second voltage input between the third terminal and the fourth terminal, and outputs the second voltage between the first terminal and the second terminal, a bridge circuit including: a first switching element having one end electrically connected to the first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to the second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including: a first winding, one end of which is electrically connected to the other end of the first switching element and one end of the second switching element and the other end of which is electrically connected to the other end of the third switching element and one end of the fourth switching element; and a second winding, which is magnetically coupled to the first winding; an inductor having one end electrically connected to the center tap of the second winding and another end electrically connected to the third terminal; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to the fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a first switch having one end electrically connected to one end of the fifth switching element and one end of the second winding and having the other end electrically connected to the other end of the inductor and the third terminal; a second switch, one end of which is electrically connected to one end of the sixth switching element and the other end of the second winding, and the other end of which is electrically connected to the other end of the inductor and the third terminal; Including, It is characterized by:

[0010] In the power supply device, Further including a control unit that controls the first switching element to the sixth switching element, the first switch, and the second switch, The control unit is When the second voltage is boosted and output from between the first terminal and the second terminal, In the first period, the fifth switching element is turned on. In a second period following the first period, the first switch is turned on, In a third period following the second period, the sixth switching element is turned on, In a fourth period following the third period, the second switch is turned on. It is characterized by:

[0011] In the power supply device, The control unit is In the first period, the second switching element or the third switching element is turned on; In the third period, the fourth switching element or the first switching element is turned on. It is characterized by:

[0012] In the power supply device, Further including a control unit that controls the first switching element to the sixth switching element, the first switch, and the second switch, The control unit is When the second voltage is boosted and output from between the first terminal and the second terminal, In a first period, both the fifth switching element and the sixth switching element are turned on, In a second period following the first period, the first switch is turned on, In a third period following the second period, both the fifth switching element and the sixth switching element are turned on, In a fourth period following the third period, the second switch is turned on. It is characterized by:

[0013] A method for controlling a power supply device according to an embodiment of the present disclosure includes: a bridge circuit including a first switching element having one end electrically connected to a first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to a second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including a first winding having one end electrically connected to the other end of the first switching element and one end of the second switching element and the other end electrically connected to the other end of the third switching element and one end of the fourth switching element, and a second winding magnetically coupled to the first winding; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to a fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a first switch having one end electrically connected to one end of the fifth switching element and one end of the second winding and the other end electrically connected to the other end of the inductor and the third terminal; and a second switch having one end electrically connected to one end of the sixth switching element and the other end of the second winding and the other end electrically connected to the other end of the inductor and the third terminal, When a second voltage input between the third terminal and the fourth terminal is boosted and output from between the first terminal and the second terminal, In the first period, the fifth switching element is turned on. In a second period following the first period, the first switch is turned on, In a third period following the second period, the sixth switching element is turned on, In a fourth period following the third period, the second switch is turned on. It is characterized by:

[0014] A method for controlling a power supply device according to an embodiment of the present disclosure includes: a bridge circuit including a first switching element having one end electrically connected to a first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to a second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including a first winding having one end electrically connected to the other end of the first switching element and one end of the second switching element and the other end electrically connected to the other end of the third switching element and one end of the fourth switching element, and a second winding magnetically coupled to the first winding; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to a fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a first switch having one end electrically connected to one end of the fifth switching element and one end of the second winding and the other end electrically connected to the other end of the inductor and the third terminal; and a second switch having one end electrically connected to one end of the sixth switching element and the other end of the second winding and the other end electrically connected to the other end of the inductor and the third terminal, When a second voltage input between the third terminal and the fourth terminal is boosted and output from between the first terminal and the second terminal, In a first period, both the fifth switching element and the sixth switching element are turned on, In a second period following the first period, the first switch is turned on, In a third period following the second period, both the fifth switching element and the sixth switching element are turned on, In a fourth period following the third period, the second switch is turned on. It is characterized by:

[0015] A power supply device according to an embodiment of the present disclosure includes: A power supply device that steps down a first voltage input between a first terminal and a second terminal, and outputs the first voltage between a third terminal and a fourth terminal, and steps up a second voltage input between the third terminal and the fourth terminal, and outputs the second voltage between the first terminal and the second terminal, a first bridge circuit including: a first switching element having one end electrically connected to the first terminal; a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to the second terminal; a third switching element having one end electrically connected to the first terminal; and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including: a first winding, one end of which is electrically connected to the other end of the first switching element and one end of the second switching element and the other end of which is electrically connected to the other end of the third switching element and one end of the fourth switching element; and a second winding, which is magnetically coupled to the first winding; a second bridge circuit including a fifth switching element having one end electrically connected to one end of the second winding, a sixth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to the fourth terminal, a seventh switching element having one end electrically connected to the other end of the second winding, and an eighth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; an inductor having one end electrically connected to the other end of the fifth switching element and the other end of the seventh switching element and having the other end electrically connected to the third terminal; a first switch having one end electrically connected to one end of the second winding, one end of the fifth switching element, and one end of the sixth switching element, and having the other end electrically connected to the other end of the inductor and the third terminal; a second switch having one end electrically connected to the other end of the second winding, one end of the seventh switching element, and one end of the eighth switching element, and having the other end electrically connected to the other end of the inductor and the third terminal; Including, It is characterized by:

[0016] A power supply device according to an embodiment of the present disclosure includes: A power supply device that steps down a first voltage input between a first terminal and a second terminal, and outputs the first voltage between a third terminal and a fourth terminal, and steps up a second voltage input between the third terminal and the fourth terminal, and outputs the second voltage between the first terminal and the second terminal, a bridge circuit including: a first switching element having one end electrically connected to the first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to the second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including: a first winding, one end of which is electrically connected to the other end of the first switching element and one end of the second switching element and the other end of which is electrically connected to the other end of the third switching element and one end of the fourth switching element; and a second winding, which is magnetically coupled to the first winding; a first inductor having one end electrically connected to one end of the second winding and the other end electrically connected to the third terminal; and a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to the fourth terminal; a second inductor having one end electrically connected to the other end of the second winding and the other end electrically connected to the other end of the first inductor and the third terminal; and a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a first switch having one end electrically connected to one end of the second winding, one end of the first inductor, and one end of the fifth switching element, and having the other end electrically connected to the other end of the first inductor, the other end of the second inductor, and the third terminal; a second switch, one end of which is electrically connected to the other end of the second winding, one end of the second inductor, and one end of the sixth switching element, and the other end of which is electrically connected to the other end of the first inductor, the other end of the second inductor, and the third terminal; Including, It is characterized by: Effect of the Invention

[0017] According to the present disclosure, it is possible to suppress stress on switching elements on the secondary side and to transmit power to the primary side. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a power system of an electric vehicle. [Diagram 2] FIG. 2 is a diagram showing the configuration of a conventional DC-DC converter. [Diagram 3] FIG. 3 is a first timing diagram of the boost operation of the conventional DC-DC converter. [Figure 4] FIG. 4 is a second timing diagram of the boost operation of the conventional DC-DC converter. [Diagram 5] FIG. 5 is a diagram illustrating a configuration of the DC-DC converter according to the first embodiment. [Figure 6] FIG. 6 is a table showing the boost operation of the DC-DC converter of the first embodiment. [Figure 7]FIG. 7 is a timing diagram of the first boost operation of the DC-DC converter of the first embodiment. [Figure 8] FIG. 8 is a diagram showing a path through which a current flows in the first boost operation of the DC-DC converter of the first embodiment. [Figure 9] FIG. 9 is a diagram showing a path through which a current flows in the first boost operation of the DC-DC converter of the first embodiment. [Figure 10] FIG. 10 is a diagram showing a path through which a current flows in the first boost operation of the DC-DC converter of the first embodiment. [Figure 11] FIG. 11 is a diagram showing a path through which a current flows in the first boost operation of the DC-DC converter of the first embodiment. [Figure 12] FIG. 12 is a diagram showing paths through which current flows in a first modification of the first boost operation of the DC-DC converter of the first embodiment. [Figure 13] FIG. 13 is a diagram showing paths through which current flows in the second modification of the first boost operation of the DC-DC converter of the first embodiment. [Figure 14] FIG. 14 is a timing diagram of the second boost operation of the DC-DC converter of the first embodiment. [Figure 15] FIG. 15 is a diagram showing a path through which a current flows in the second boost operation of the DC-DC converter of the first embodiment. [Figure 16] FIG. 16 is a diagram showing a path through which a current flows in the second boost operation of the DC-DC converter of the first embodiment. [Figure 17] FIG. 17 is a diagram showing a path through which a current flows in the second boost operation of the DC-DC converter of the first embodiment. [Figure 18] FIG. 18 is a diagram showing a path through which a current flows in the second boost operation of the DC-DC converter of the first embodiment. [Figure 19] FIG. 19 is a timing diagram of the third boost operation of the DC-DC converter of the first embodiment. [Figure 20] FIG. 20 is a diagram showing a path through which a current flows in the third boost operation of the DC-DC converter of the first embodiment. [Figure 21] FIG. 21 is a diagram showing a path through which a current flows in the third boost operation of the DC-DC converter of the first embodiment. [Figure 22] FIG. 22 is a diagram illustrating a path through which a current flows in the third boost operation of the DC-DC converter of the first embodiment. [Figure 23] FIG. 23 is a diagram illustrating a path through which a current flows in the third boost operation of the DC-DC converter of the first embodiment. [Figure 24] FIG. 24 is a timing diagram of the fourth boost operation of the DC-DC converter of the first embodiment. [Diagram 25] FIG. 25 is a diagram showing a path through which a current flows in the fourth boost operation of the DC-DC converter of the first embodiment. [Figure 26] FIG. 26 is a diagram showing paths through which current flows in the fourth boost operation of the DC-DC converter of the first embodiment. [Figure 27] FIG. 27 is a diagram showing a path through which a current flows in the fourth boost operation of the DC-DC converter of the first embodiment. [Figure 28] FIG. 28 is a diagram showing a path through which a current flows in the fourth boost operation of the DC-DC converter of the first embodiment. [Figure 29] FIG. 29 is a diagram illustrating a configuration of a DC-DC converter according to the second embodiment. [Diagram 30] FIG. 30 is a diagram illustrating a configuration of a DC-DC converter according to the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, an embodiment of the present disclosure will be described in detail with reference to the accompanying drawings. Note that the present disclosure is not limited to this embodiment, and in the following embodiments, the same components are designated by the same reference numerals, and duplicated descriptions will be omitted.

[0020] <First embodiment> (Example of the power system configuration for an electric vehicle) FIG. 1 is a diagram showing an example of the configuration of a power system of an electric vehicle.

[0021] The power system 1 includes a high-voltage battery 2, a resistor 3, contactors 4, 5, and 6, an inverter 7, a motor 9, a DC-DC converter 10, and a low-voltage battery 11. The inverter 7 includes a smoothing capacitor 8 on the input side.

[0022] The DC-DC converter 10 corresponds to an example of a "power supply device" of the present disclosure.

[0023] The high-voltage battery 2 is exemplified by a driving battery, but the present disclosure is not limited thereto. The voltage of the high-voltage battery 2 is arbitrary. The low-voltage battery 11 is exemplified by an auxiliary battery, but the present disclosure is not limited thereto. The voltage of the low-voltage battery 11 is arbitrary.

[0024] Initially (for example, when starting an electric vehicle), there may be cases where power (charge) is not stored in capacitor 8. Therefore, contactors 5 and 6 are turned on, and capacitor 8 is precharged (preliminarily charged) from high-voltage battery 2 via resistor 3. After precharging is completed, contactor 5 is turned off, and contactor 4 is turned on.

[0025] When charging the low-voltage battery 11, the DC-DC converter 10 steps down the DC voltage of the capacitor 8 and outputs it to the low-voltage battery 11. The low-voltage battery 11 is charged by the DC voltage output from the DC-DC converter 10.

[0026] (Conventional configuration) 2 is a diagram showing the configuration of a conventional DC-DC converter. The DC-DC converter 100 is a phase-shift full-bridge circuit. Currently, the most common circuit used for power conversion from the high-voltage battery 2 to the low-voltage battery 11 is a phase-shift full-bridge circuit.

[0027] The DC-DC converter 100 has a first terminal 21, a second terminal 22, a third terminal 23, and a fourth terminal 24.

[0028] The first terminal 21 is electrically connected to one end (high potential end) of the capacitor 8. The second terminal 22 is electrically connected to the other end (low potential end) of the capacitor 8. The third terminal 23 is electrically connected to one end (high potential end) of the low voltage battery 11. The fourth terminal 24 is electrically connected to the other end (low potential end) of the low voltage battery 11.

[0029] The DC-DC converter 100 steps down a first voltage V1 input between a first terminal 21 and a second terminal 22, and outputs a second voltage V2 from between a third terminal 23 and a fourth terminal 24.

[0030] The DC-DC converter 100 includes a bridge circuit 31, an inductor Lr, a transformer T, a choke Lo, a transistor Q5, a transistor Q6, a capacitor 51, and a control unit 61.

[0031] The bridge circuit 31 includes transistors Q1 to Q4.

[0032] The transistor Q1 corresponds to an example of a "first switching element" in the present disclosure. The transistor Q2 corresponds to an example of a "second switching element" in the present disclosure. The transistor Q3 corresponds to an example of a "third switching element" in the present disclosure. The transistor Q4 corresponds to an example of a "fourth switching element" in the present disclosure.

[0033] In the embodiment, each transistor is a MOSFET, but the present disclosure is not limited to this. Each transistor may be a silicon power device, a GaN power device, a SiC power device (for example, an IGBT (Insulated Gate Bipolar Transistor)), or the like.

[0034] Each transistor has a parasitic diode (body diode) that can actively conduct current or has an anti-parallel diode connected between it and the MOSFET's backgate and source and drain.

[0035] The source of transistor Q1 is electrically connected to the drain of transistor Q2. The drain of transistor Q1 is electrically connected to the drain of transistor Q3. The source of transistor Q3 is electrically connected to the drain of transistor Q4. The source of transistor Q2 is electrically connected to the source of transistor Q4.

[0036] The drain of the transistor Q1 and the drain of the transistor Q3 are electrically connected to a first terminal 21. The source of the transistor Q2 and the source of the transistor Q4 are electrically connected to a second terminal 22.

[0037] The transformer T includes a first winding 41, a second winding 42, and a core 43. The first winding 41 and the second winding 42 are wound around the core 43.

[0038] The source of the transistor Q1 and the drain of the transistor Q2 are electrically connected to one end of an inductor Lr. The other end of the inductor Lr is electrically connected to one end of a first winding 41. The other end of the first winding 41 is electrically connected to the source of the transistor Q3 and the drain of the transistor Q4.

[0039] The inductor Lr may be a wound component or may be the leakage inductance of the first winding 41.

[0040] The second winding 42 is divided into a first portion 42a and a second portion 42b at a center tap 42c.

[0041] The turn ratio between the first winding 41 and the first portion 42a of the second winding 42 is set to N:1. Similarly, the turn ratio between the first winding 41 and the second portion 42b of the second winding 42 is set to N:1. N is an arbitrary value.

[0042] The center tap 42c is electrically connected to one end of the choke Lo. The other end of the choke Lo is electrically connected to one end (high potential end) of the capacitor 51 and the third terminal 23.

[0043] One end of the first portion 42a is electrically connected to the center tap 42c, and the other end of the first portion 42a is electrically connected to the drain of the transistor Q5.

[0044] One end of the second portion 42b is electrically connected to the center tap 42c, and the other end of the second portion 42b is electrically connected to the drain of the transistor Q6.

[0045] The source of the transistor Q5 and the source of the transistor Q6 are electrically connected to the other end (low potential end) of the capacitor 51 and the fourth terminal 24.

[0046] The control unit 61 outputs a drive control signal P1 to the bridge circuit 31, outputs a drive control signal P2 to the transistor Q5, and outputs a drive control signal P3 to the transistor Q6.

[0047] When the DC-DC converter 100 outputs a step-down voltage from the first side (capacitor 8 side) to the second side (low-voltage battery 11 side) (when charging the low-voltage battery 11), the DC-DC converter 100 uses a capacitor input method because the capacitor 8 is connected in parallel to the high-voltage battery 2.

[0048] When the DC-DC converter 100 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the DC-DC converter 100 uses a choke input type because the choke Lo is connected in series with the low-voltage battery 11.

[0049] When the DC-DC converter 100 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when the capacitor 8 is pre-charged), if the target first voltage V1 is N times or less than the second voltage V2, boosting by the turns ratio of the transformer T is sufficient. However, if the target first voltage V1 is higher than N times the second voltage V2, boosting by the choke Lo is necessary in addition to the transformer T. In that case, when the choke Lo discharges energy, a surge voltage is generated by the choke Lo, and a large surge voltage is applied to the transistors Q5 and Q6, which may cause stress on the transistors Q5 and Q6.

[0050] (Operation of conventional example) FIG. 3 is a first timing diagram of the boost operation of the conventional DC-DC converter.

[0051] As shown in Fig. 3, one cycle of the boost operation includes a first period Mode1, a second period Mode2, a third period Mode3, and a fourth period Mode4. The first period Mode1 is a charging period for the choke Lo. The second period Mode2 is a discharging period for the choke Lo. The third period Mode3 is a charging period for the choke Lo. The fourth period Mode4 is a discharging period for the choke Lo.

[0052] The control unit 61 controls the transistors Q1 to Q4 to be in the off state during all periods from the first period Mode1 to the fourth period Mode4.

[0053] At timing t0, the first period Mode1 starts. The control unit 61 controls the transistor Q5 and the transistor Q6 to be in the on state.

[0054] The current on the second side flows through the high potential end of the low voltage battery 11, the choke Lo, and the intermediate tap 42c. This current is split into two at the intermediate tap 42c, and flows through the first portion 42a of the second winding 42 and the second portion 42b of the second winding 42. One of the split currents flows through the first portion 42a of the second winding 42 and the transistor Q5. The other split current flows through the second portion 42b of the second winding 42 and the transistor Q6. The currents joined at the source of the transistor Q5 and the source of the transistor Q6 flow to the low potential end of the low voltage battery 11.

[0055] In the first period Mode1, the current ILo of the choke Lo increases linearly, and the voltage VLo of the choke Lo becomes V2.

[0056] At timing t1, the second period Mode2 starts. The control unit 61 controls the transistor Q6 to be in the off state.

[0057] Referring to Figure 5, the current on the second side flows through the path shown by line 211 from the high potential side terminal of the low voltage battery 11 to the choke Lo to the center tap 42c to the first part 42a of the second winding 42 to the transistor Q5 to the low potential side terminal of the low voltage battery 11.

[0058] At this time, the transistor Q6 is in an off state, and the energy (current) flowing through the second portion 42b of the second winding 42 has nowhere to go, causing a surge voltage to be generated. The surge voltage is applied to the transistor Q6.

[0059] A current on the first side due to the induced voltage generated in the first winding 41 flows through the path of one end of the first winding 41 → inductor Lr → the parasitic diode of transistor Q1 → the high potential side end of capacitor 8 → the low potential side end of capacitor 8 → the parasitic diode of transistor Q4 → the other end of the first winding 41.

[0060] This first side current precharges the capacitor 8 .

[0061] In the second period Mode2, the current ILo of the choke Lo becomes substantially constant, and the voltage VLo of the choke Lo becomes (V2-NV1).

[0062] At timing t2, the third period Mode 3 starts. The control unit 61 controls the transistor Q6 to be in the on state.

[0063] The current on the second side flows through the high potential end of the low voltage battery 11, the choke Lo, and the intermediate tap 42c. This current is split into two at the intermediate tap 42c, and flows through the first portion 42a of the second winding 42 and the second portion 42b of the second winding 42. One of the split currents flows through the first portion 42a of the second winding 42 and the transistor Q5. The other split current flows through the second portion 42b of the second winding 42 and the transistor Q6. The currents joined at the source of the transistor Q5 and the source of the transistor Q6 flow to the low potential end of the low voltage battery 11.

[0064] In the third period Mode3, the current ILo of the choke Lo increases linearly, and the voltage VLo of the choke Lo becomes V2.

[0065] At timing t3, the fourth period Mode 4 starts. The control unit 61 controls the transistor Q5 to be in the off state.

[0066] The current on the second side flows through the high potential side terminal of the low voltage battery 11, the choke Lo, the center tap 42c, the second portion 42b of the second winding 42, the transistor Q6, and the low potential side terminal of the low voltage battery 11.

[0067] At this time, the transistor Q5 is in an off state, and the energy (current) flowing through the first portion 42a of the second winding 42 has nowhere to go, causing a surge voltage to be generated. The surge voltage is applied to the transistor Q5.

[0068] A current on the first side due to the induced voltage generated in the first winding 41 flows through the other end of the first winding 41 → the parasitic diode of transistor Q3 → the high potential end of capacitor 8 → the low potential end of capacitor 8 → the parasitic diode of transistor Q2 → inductor Lr → one end of the first winding 41.

[0069] This first side current precharges the capacitor 8 .

[0070] In the fourth period Mode4, the current ILo of the choke Lo becomes substantially constant, and the voltage VLo of the choke Lo becomes (V2-NV1).

[0071] In this way, in the DC-DC converter 100, a surge voltage occurs at the timing when the transistor Q5 or the transistor Q6 is turned off, and is applied to the transistor Q5 or the transistor Q6, which may cause stress to the transistor Q5 or the transistor Q6.

[0072] Furthermore, when the pre-charging of the capacitor 8 starts, the voltage of the capacitor 8 may be very low (for example, 0 V). In that case, the choke Lo is not reset (energy cannot be completely discharged) during the discharge period (the second period Mode 2 and the fourth period Mode 4), so the current ILo of the choke Lo becomes large and the choke Lo may become saturated.

[0073] In order to suppress saturation of the choke Lo, it is possible to provide a pause period between the second period Mode2 and the third period Mode3.

[0074] FIG. 4 is a second timing diagram of the boost operation of the conventional DC-DC converter.

[0075] In FIG. 4, in comparison with FIG. 3, a pause period is provided between the second period Mode2 and the third period Mode3 in order to reset the stored energy in the choke Lo.

[0076] Timing t4 to timing t6 and timing t7 and thereafter in FIG. 4 are similar to timing t0 to timing t2 and timing t2 and thereafter in FIG. 3, and therefore description thereof will be omitted.

[0077] At timing t6, the idle period starts. The control unit 61 controls the transistor Q5 and the transistor Q6 to be in the off state.

[0078] When the transistors Q5 and Q6 are turned off, there is no path for the current of the choke Lo to flow, and the current ILo of the choke Lo becomes 0. However, at this time, a surge voltage VX (<0) is generated in the choke Lo.

[0079] (Configuration of the first embodiment) FIG. 5 is a diagram illustrating a configuration of the DC-DC converter according to the first embodiment.

[0080] Compared to the conventional DC-DC converter 100 (see FIG. 2), the DC-DC converter 10 further includes a first switch 71 and a second switch 72.

[0081] The first switch 71 includes a diode D7 and a transistor Q7. The anode of the diode D7 is electrically connected to the other end of the first portion 42a of the second winding 42 and the drain of the transistor Q5. The cathode of the diode D7 is electrically connected to the drain of the transistor Q7. The source of the transistor Q7 is electrically connected to the other end of the choke Lo, one end of the capacitor 51, and the third terminal 23. The diode D7 is a reverse current prevention diode. The first switch 71 may be a mechanical switch.

[0082] The second switch 72 includes a diode D8 and a transistor Q8. The anode of the diode D8 is electrically connected to the other end of the second portion 42b of the second winding 42 and the drain of the transistor Q6. The cathode of the diode D8 is electrically connected to the drain of the transistor Q8. The source of the transistor Q8 is electrically connected to the other end of the choke Lo, one end of the capacitor 51, and the third terminal 23. The diode D8 is a reverse current prevention diode. The second switch 72 may be a mechanical switch.

[0083] The control unit 61 outputs a drive control signal P4 to the gate of the transistor Q7, and outputs a drive control signal P5 to the gate of the transistor Q8.

[0084] In the embodiment, the diode D7 is disposed on the second winding 42 side, and the transistor Q7 is disposed on the capacitor 51 side, but the present disclosure is not limited to this. The transistor Q7 may be disposed on the second winding 42 side, and the diode D7 may be disposed on the capacitor 51 side. That is, the drain of the transistor Q7 may be electrically connected to the other end of the first portion 42a of the second winding 42 and the drain of the transistor Q5, the source of the transistor Q7 may be electrically connected to the anode of the diode D7, and the cathode of the diode D7 may be electrically connected to the other end of the choke Lo, one end of the capacitor 51, and the third terminal. The same applies to the diode D8 and the transistor Q8.

[0085] When the DC-DC converter 10 outputs a step-down voltage from the first side (capacitor 8 side) to the second side (low-voltage battery 11 side) (when charging the low-voltage battery 11), the control unit 61 controls the transistors Q7 and Q8 to the off state. In this case, the DC-DC converter 10 becomes an equivalent circuit of the DC-DC converter 100. At this time, the DC-DC converter 10 becomes a capacitor input type because the capacitor 8 is connected in parallel to the high-voltage battery 2.

[0086] When the DC-DC converter 10 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when the capacitor 8 is pre-charged), the choke Lo is connected in series to the low-voltage battery 11, so that the choke input method is adopted. In this case, the DC-DC converter 10 may generate a surge voltage due to the choke Lo, similar to the DC-DC converter 100. However, the control unit 61 controls the transistor Q7 or the transistor Q8 to the on state. As a result, the DC-DC converter 10 regenerates the surge voltage in the capacitor 51 by the first switch 71 or the second switch 72.

[0087] Therefore, the DC-DC converter 10 can prevent a surge voltage from being applied to the transistor Q5 or the transistor Q6, and can prevent the transistor Q5 or the transistor Q6 from being subjected to stress.

[0088] (Outline of Boost Operation in First Embodiment) The DC-DC converter 100 of the conventional example steps up the second voltage V2 to the first voltage V1 by using the choke Lo and the transformer T. Similarly, the DC-DC converter 10 of the embodiment steps up the second voltage V2 to the first voltage V1 by using the choke Lo and the transformer T.

[0089] 6 is a table showing the boost operation of the DC-DC converter of Embodiment 1. Table 110 shows four types of boost operation from No. 1 in the first row 111 to No. 4 in the fourth row 114.

[0090] In Table 110, the "step-down type" is a type that outputs a voltage equal to or lower than the second voltage V2×N to the capacitor 8. The "step-up / step-down type" is a type that outputs a voltage equal to or lower than the second voltage V2×N and equal to or higher than the second voltage V2×N to the capacitor 8. The "step-up type" is a type that outputs a voltage equal to or higher than the second voltage V2×N to the capacitor 8. Which of these types the DC-DC converter 10 operates as is set at the time of design according to the specifications. Note that a combination of a plurality of types may be used. For example, the DC-DC converter 10 may operate as the "step-down type" until the first voltage V1 reaches the second voltage V2×N, and operate as the "step-up / step-down type" or the "step-up type" when the first voltage V1 reaches the second voltage V2×N.

[0091] (First Boost Operation of the First Embodiment) The first voltage boost operation (voltage boost operation numbered No. 1) of the DC-DC converter 10 of the first embodiment will be described.

[0092] Fig. 7 is a timing diagram of the first boost operation of the DC-DC converter of the first embodiment. Fig. 8 to Fig. 11 are diagrams showing paths through which current flows in the first boost operation of the DC-DC converter of the first embodiment.

[0093] With reference to FIG. 7, one cycle of the first voltage step-up operation includes a first period Mode1, a second period Mode2, a third period Mode3, and a fourth period Mode4.

[0094] Timing 10 9, the first period Mode1 starts. The control unit 61 controls the transistors Q2, Q5, and Q7 to be in the on state. As a result, as shown in the first column 111-1 of the first row 111 of the table 110 in FIG. 9, the transistor Q5 is conductive on the second side, and the transistor Q2 is conductive on the first side.

[0095] As a modified example, the control unit 61 may control the transistor Q3 to be turned on, instead of the transistor Q2. The modified example will be described later.

[0096] In the first period Mode1, the choke Lo is charged.

[0097] Referring to Figure 8, the current on the second side flows through the path shown by line 301 from the high potential side end of the low voltage battery 11 → choke Lo → center tap 42c of the second winding 42 → first part 42a of the second winding → transistor Q5 → low potential side end of the low voltage battery 11.

[0098] A current on the first side due to an induced voltage generated in the primary winding 41 flows through a path indicated by a line 302 from one end of the primary winding 41 to the inductor Lr to the transistor Q2 to the parasitic diode D4 of the transistor Q4 to the other end of the primary winding 41.

[0099] Referring to FIG. 7, the voltage VLo applied to the choke Lo is constant (second voltage V2), and the current ILo flowing through the choke Lo increases linearly.

[0100] Timing 11 6, the second period Mode2 starts. The control unit 61 controls the transistor Q2 and the transistor Q5 to be in the off state, and maintains the transistor Q7 in the on state. As a result, as shown in the second column 111-2 of the first row 111 of the table 110 in FIG. 6, the transistor Q7 is conductive on the second side, and the parasitic diodes D1 and D4 are conductive on the first side.

[0101] In the second period Mode2, the choke Lo is discharged.

[0102] Referring to FIG. 9, the current on the second side flows through a path indicated by line 311 from one end of the choke Lo to the center tap 42c of the second winding 42 to the first portion 42a of the second winding 42 to the diode D7 to the transistor Q7 to the other end of the choke Lo.

[0103] In this way, the DC-DC converter 10 can form a regenerative path for the choke Lo, and therefore can prevent a surge voltage from being applied to the transistor Q5. Therefore, the DC-DC converter 10 can prevent the transistor Q5 from being subjected to stress. The DC-DC converter 10 also becomes capable of resetting the choke Lo.

[0104] As shown by line 312, the current on the first side flows through a path from one end of the first winding 41 to the inductor Lr to the parasitic diode D1 of the transistor Q1 to the capacitor 8 to the parasitic diode D4 of the transistor Q4 to the other end of the first winding 41.

[0105] This first side current precharges the capacitor 8 .

[0106] Referring to FIG. 7, in the second period Mode2, the voltage VLo applied to the choke Lo is constant (-N·V1), and the current ILo of the choke Lo decreases linearly.

[0107] Timing 12 6, the third period Mode3 starts. The control unit 61 controls the transistor Q7 to be in the off state, and controls the transistors Q4, Q6, and Q8 to be in the on state. As a result, as shown in the third column 111-3 of the first row 111 of the table 110 in FIG. 6, the transistor Q6 is conductive on the second side, and the transistor Q4 is conductive on the first side.

[0108] As a modified example, the control unit 61 may control the transistor Q1 to be turned on, instead of the transistor Q4. The modified example will be described later.

[0109] In the third period Mode3, the choke Lo is charged.

[0110] Referring to Figure 10, the current on the second side flows through the path shown by line 321 from the high potential side end of the low voltage battery 11 → choke Lo → center tap 42c of the second winding 42 → second part 42b of the second winding → transistor Q6 → low potential side end of the low voltage battery 11.

[0111] A current on the first side due to an induced voltage generated in the primary winding 41 flows through the other end of the primary winding 41, transistor Q4, parasitic diode D2 of transistor Q2, inductor Lr, and one end of the primary winding 41, as shown by line 322.

[0112] Referring to FIG. 7, the voltage VLo applied to the choke Lo is constant (second voltage V2), and the current ILo flowing through the choke Lo increases linearly.

[0113] Timing 13 6, the fourth period Mode4 starts. The control unit 61 controls the transistor Q4 and the transistor Q6 to be in the off state, and maintains the transistor Q8 in the on state. As a result, as shown in the fourth column 111-4 of the first row 111 of the table 110 in FIG. 6, the transistor Q8 is conductive on the second side, and the parasitic diodes D2 and D3 are conductive on the first side.

[0114] In the fourth period Mode4, the choke Lo is discharged.

[0115] Referring to FIG. 11, the current on the second side flows through a path indicated by line 331 from one end of the choke Lo to the center tap 42c of the second winding 42 to the second portion 42b of the second winding 42 to diode D8 to transistor Q8 to the other end of the choke Lo.

[0116] In this way, the DC-DC converter 10 can form a regenerative path for the choke Lo, and therefore can prevent a surge voltage from being applied to the transistor Q6. Therefore, the DC-DC converter 10 can prevent the transistor Q6 from being damaged. The DC-DC converter 10 also enables resetting of the choke Lo.

[0117] At this time, a magnetic field is not generated in the first portion 42a of the second winding 42, but is generated only in the second portion 42b of the second winding 42, so that an induced voltage is generated in the first winding 41.

[0118] A current on the first side due to the induced voltage generated in the first winding 41 flows through the other end of the first winding 41 → parasitic diode D3 of transistor Q3 → capacitor 8 → parasitic diode D2 of transistor Q2 → inductor Lr → one end of the first winding 41, as shown by line 332.

[0119] This first side current precharges the capacitor 8 .

[0120] Referring to FIG. 7, in the fourth period Mode4, the voltage VLo applied to the choke Lo is constant (-N·V1), and the current ILo of the choke Lo decreases linearly.

[0121] (summary) As described above, when the DC-DC converter 10 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the control unit 61 controls the transistor Q7 or the transistor Q8 to the on state.

[0122] This allows the DC-DC converter 10 to form a regeneration path for the choke Lo, thereby preventing a surge voltage from being applied to the transistor Q5 or the transistor Q6. Therefore, the DC-DC converter 10 can prevent the transistor Q5 or the transistor Q6 from being subjected to stress.

[0123] Furthermore, the DC-DC converter 10 is capable of resetting the choke Lo.

[0124] Furthermore, since the DC-DC converter 10 can precharge the capacitor 8, the resistor 3 and the contactor 5 (see FIG. 1) in the power system 1 become unnecessary.

[0125] (First Modification of the First Embodiment) As described above, as shown in the first column 111-1 of the first row 111 of Table 110, the DC-DC converter 10 may control the transistor Q3 to be in the on state in place of the transistor Q2 in the first period Mode1.

[0126] FIG. 12 is a diagram showing paths through which current flows in a first modification of the first boost operation of the DC-DC converter of the first embodiment.

[0127] Referring to Figure 12, the current on the second side flows through the path shown by line 301 from the high potential side end of the low voltage battery 11 → choke Lo → center tap 42c of the second winding 42 → first part 42a of the second winding → transistor Q5 → low potential side end of the low voltage battery 11.

[0128] As indicated by line 303, the current on the first side flows through one end of the first winding 41, the inductor Lr, the parasitic diode D1 of the transistor Q1, the transistor Q3, and the other end of the first winding 41.

[0129] (Second Modification of the First Embodiment) As described above, as shown in the third column 111-3 of the first row 111 of Table 110, the DC-DC converter 10 may control the transistor Q1 to be in the on state in place of the transistor Q4 in the third period Mode3.

[0130] FIG. 13 is a diagram showing paths through which current flows in the second modification of the first boost operation of the DC-DC converter of the first embodiment.

[0131] Referring to Figure 13, the current on the second side flows through the path shown by line 321 from the high potential side end of the low voltage battery 11 → choke Lo → center tap 42c of the second winding 42 → second part 42b of the second winding → transistor Q6 → low potential side end of the low voltage battery 11.

[0132] A current on the first side due to an induced voltage generated in the primary winding 41 flows through the other end of the primary winding 41, a parasitic diode D3 of the transistor Q3, a transistor Q1, an inductor Lr, and one end of the primary winding 41, as shown by a line 323.

[0133] (Combination of Modifications) Since there are two possible patterns for the first period Mode1 and two possible patterns for the third period Mode3, there are a total of four possible patterns for the first voltage boost operation (voltage boost operation numbered No. 1).

[0134] (Second Boost Operation of the First Embodiment) The second voltage boosting operation (voltage boosting operation numbered No. 2) of the DC-DC converter 10 of the first embodiment will be described.

[0135] Fig. 14 is a timing diagram of the second boost operation of the DC-DC converter of the first embodiment. Fig. 15 to Fig. 18 are diagrams showing paths through which current flows in the second boost operation of the DC-DC converter of the first embodiment.

[0136] With reference to FIG. 14, one cycle of the second boost operation includes a first period Mode1, a second period Mode2, a third period Mode3, and a fourth period Mode4.

[0137] Timing 20 6, the first period Mode1 starts. The control unit 61 controls the transistor Q5 and the transistor Q7 to be in the on state. As a result, as shown in the first column 112-1 of the second row 112 of the table 110 in FIG. 6, the transistor Q5 is conductive on the second side, and the parasitic diodes D1 and D4 are conductive on the first side.

[0138] In the first period Mode1, the choke Lo is charged.

[0139] Referring to Figure 15, the current on the second side flows through the path shown by line 331 from the high potential side end of the low voltage battery 11 → choke Lo → center tap 42c of the second winding 42 → first part 42a of the second winding → transistor Q5 → low potential side end of the low voltage battery 11.

[0140] As shown by line 332, the current on the first side flows through a path from one end of the first winding 41 to the inductor Lr to the parasitic diode D1 of the transistor Q1 to the capacitor 8 to the parasitic diode D4 of the transistor Q4 to the other end of the first winding 41.

[0141] This first side current precharges the capacitor 8 .

[0142] Referring to FIG. 14, the voltage VLo applied to the choke Lo is constant (V2-N·V1), and the current ILo flowing through the choke Lo increases linearly.

[0143] Timing 21 6, the second period Mode2 starts. The control unit 61 controls the transistor Q5 to be in the off state and maintains the transistor Q7 in the on state. As a result, as shown in the second column 112-2 of the second row 112 of the table 110 in FIG. 6, the transistor Q7 is conductive on the second side, and the parasitic diodes D1 and D4 are conductive on the first side.

[0144] In the second period Mode2, the choke Lo is discharged.

[0145] Referring to FIG. 16, the current on the second side flows through a path indicated by line 341 from one end of choke Lo to the center tap 42c of the second winding 42 to the first portion 42a of the second winding 42 to diode D7 to transistor Q7 to the other end of choke Lo.

[0146] In this way, the DC-DC converter 10 can form a regenerative path for the choke Lo, and therefore can prevent a surge voltage from being applied to the transistor Q5. Therefore, the DC-DC converter 10 can prevent the transistor Q5 from being subjected to stress. The DC-DC converter 10 also becomes capable of resetting the choke Lo.

[0147] A current on the first side due to the induced voltage generated in the first winding 41 flows through a path shown by line 342, from one end of the first winding 41 to inductor Lr to parasitic diode D1 of transistor Q1 to capacitor 8 to parasitic diode D4 of transistor Q4 to the other end of the first winding 41.

[0148] This first side current precharges the capacitor 8 .

[0149] Referring to FIG. 14, in the second period Mode2, the voltage VLo applied to the choke Lo is constant (-N·V1), and the current ILo of the choke Lo decreases linearly.

[0150] Timing 22 6, the third period Mode3 starts. The control unit 61 controls the transistor Q7 to be in the off state, and controls the transistors Q6 and Q8 to be in the on state. As a result, as shown in the third column 112-3 of the second row 112 of the table 110 in FIG. 6, the transistor Q6 is conductive on the second side, and the parasitic diodes D2 and D3 are conductive on the first side.

[0151] In the third period Mode3, the choke Lo is charged.

[0152] Referring to Figure 17, the current on the second side flows through the path shown by line 351 from the high potential side end of the low voltage battery 11 → choke Lo → center tap 42c of the second winding 42 → second part 42b of the second winding → transistor Q6 → low potential side end of the low voltage battery 11.

[0153] As indicated by line 352, the current on the first side flows through the other end of the primary winding 41, parasitic diode D3 of transistor Q3, capacitor 8, parasitic diode D2 of transistor Q2, inductor Lr, and one end of the primary winding 41.

[0154] Referring to FIG. 14, the voltage VLo applied to the choke Lo is constant (V2-N·V1), and the current ILo flowing through the choke Lo increases linearly.

[0155] Timing 23 6, the fourth period Mode4 starts. The control unit 61 controls the transistor Q6 to be in the off state and maintains the transistor Q8 in the on state. As a result, as shown in the fourth column 112-4 of the second row 112 of the table 110 in FIG. 6, the transistor Q8 is conductive on the second side, and the parasitic diodes D2 and D3 are conductive on the first side.

[0156] In the fourth period Mode4, the choke Lo is discharged.

[0157] Referring to FIG. 18, the current on the second side flows through a path indicated by line 361 from one end of the choke Lo to the center tap 42c of the second winding 42 to the second portion 42b of the second winding 42 to diode D8 to transistor Q8 to the other end of the choke Lo.

[0158] In this way, the DC-DC converter 10 can form a regenerative path for the choke Lo, and therefore can prevent a surge voltage from being applied to the transistor Q6. Therefore, the DC-DC converter 10 can prevent the transistor Q6 from being subjected to stress. The DC-DC converter 10 also makes it possible to reset the choke Lo.

[0159] A current on the first side due to the induced voltage generated in the first winding 41 flows through the other end of the first winding 41 → parasitic diode D3 of transistor Q3 → capacitor 8 → parasitic diode D2 of transistor Q2 → inductor Lr → one end of the first winding 41, as shown by line 362.

[0160] This first side current precharges the capacitor 8 .

[0161] (summary) As described above, when the DC-DC converter 10 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the control unit 61 controls the transistor Q7 or the transistor Q8 to the on state.

[0162] This allows the DC-DC converter 10 to form a regeneration path for the choke Lo, thereby preventing a surge voltage from being applied to the transistor Q5 or the transistor Q6. Therefore, the DC-DC converter 10 can prevent the transistor Q5 or the transistor Q6 from being subjected to stress.

[0163] Furthermore, the DC-DC converter 10 is capable of resetting the choke Lo.

[0164] Furthermore, since the DC-DC converter 10 can precharge the capacitor 8, the resistor 3 and the contactor 5 (see FIG. 1) in the power system 1 can be eliminated.

[0165] (Third Boost Operation of the First Embodiment) The third voltage boosting operation (voltage boosting operation numbered No. 3) of the DC-DC converter 10 of the first embodiment will be described.

[0166] Fig. 19 is a timing diagram of the third boost operation of the DC-DC converter of the first embodiment. Fig. 20 to Fig. 23 are diagrams showing paths through which current flows in the third boost operation of the DC-DC converter of the first embodiment.

[0167] With reference to FIG. 19, one cycle of the third boost operation includes a first period Mode1, a second period Mode2, a third period Mode3, and a fourth period Mode4.

[0168] Timing 30At this time, the first period Mode1 starts. The control unit 61 controls the transistors Q5, Q6, and Q7 to be in the on state. As a result, the transistors Q5 and Q6 are conductive on the second side, as shown in the first column 113-1 of the third row 113 of the table 110 in Fig. 6. Note that, as will be described later, no current flows on the first side.

[0169] In the first period Mode1, the choke Lo is charged.

[0170] 20, the current on the second side flows through a path from the high potential end of the low voltage battery 11 to the choke Lo to the center tap 42c of the second winding 42, as shown by the line 371. This current is divided into two and flows through the first portion 42a of the second winding 42 and the second portion 42b of the second winding 42. One of the divided currents flows through a path from the first portion 42a of the second winding 42 to the transistor Q5, as shown by the line 372. The other divided current flows through a path from the second portion 42b of the second winding 42 to the transistor Q6, as shown by the line 373. The currents joined at the source of the transistor Q5 and the source of the transistor Q6 flow to the low potential end of the low voltage battery 11, as shown by the line 374.

[0171] Referring to FIG. 19, timing t 31 6, the second period Mode2 starts. The control unit 61 controls the transistors Q5 and Q6 to be in the off state, and maintains the transistor Q7 in the on state. As a result, as shown in the second column 113-2 of the third row 113 of the table 110 in FIG. 6, the transistor Q7 is conductive on the second side, and the parasitic diodes D1 and D4 are conductive on the first side.

[0172] In the second period Mode2, the choke Lo is discharged.

[0173] 21, the current on the second side flows through a path indicated by line 381 from one end of choke Lo to the center tap 42c of the second winding 42 to the first portion 42a of the second winding 42 to diode D7 to transistor Q7 to the other end of choke Lo.

[0174] In this way, the DC-DC converter 10 can form a regenerative path for the choke Lo, and therefore can prevent a surge voltage from being applied to the transistor Q5. Therefore, the DC-DC converter 10 can prevent the transistor Q5 from being subjected to stress. The DC-DC converter 10 also becomes capable of resetting the choke Lo.

[0175] As shown by line 382, ​​the current on the first side flows through one end of the first winding 41, inductor Lr, parasitic diode D1 of transistor Q1, capacitor 8, parasitic diode D4 of transistor Q4, and the other end of the first winding 41.

[0176] This first side current precharges the capacitor 8 .

[0177] Referring to FIG. 19, timing t 32 At this time, the third period Mode3 starts. The control unit 61 controls the transistor Q7 to be in the off state, and controls the transistors Q5, Q6, and Q8 to be in the on state. As a result, the transistors Q5 and Q6 are conductive on the second side, as shown in the third column 113-3 of the third row 113 of the table 110 in Fig. 6. Note that, as will be described later, no current flows on the first side.

[0178] In the third period Mode3, the choke Lo is charged.

[0179] 22, the current on the second side flows through a path from the high potential end of the low voltage battery 11 to the choke Lo to the center tap 42c of the second winding 42, as shown by the line 391. This current is divided into two and flows through the first portion 42a of the second winding 42 and the second portion 42b of the second winding 42. One of the divided currents flows through a path from the first portion 42a of the second winding 42 to the transistor Q5, as shown by the line 392. The other divided current flows through a path from the second portion 42b of the second winding 42 to the transistor Q6, as shown by the line 393. The currents joined at the source of the transistor Q5 and the source of the transistor Q6 flow to the low potential end of the low voltage battery 11, as shown by the line 394.

[0180] Referring to FIG. 19, timing t 33 6, the fourth period Mode4 starts. The control unit 61 controls the transistor Q5 and the transistor Q6 to be in the off state, and maintains the transistor Q8 in the on state. As a result, as shown in the fourth column 113-4 of the third row 113 of the table 110 in FIG. 6, the transistor Q8 is conductive on the second side, and the parasitic diodes D2 and D3 are conductive on the first side.

[0181] In the fourth period Mode4, the choke Lo is discharged.

[0182] 23, the current on the second side flows, as shown by line 401, from one end of the choke Lo to the center tap 42c of the second winding 42 to the second portion 42b of the second winding 42 to the diode D8 to the transistor Q8 to the other end of the choke Lo.

[0183] In this way, the DC-DC converter 10 can form a regenerative path for the choke Lo, and therefore can prevent a surge voltage from being applied to the transistor Q6. Therefore, the DC-DC converter 10 can prevent the transistor Q6 from being subjected to stress. The DC-DC converter 10 also makes it possible to reset the choke Lo.

[0184] As indicated by line 402, the current on the first side flows through the other end of the primary winding 41, a parasitic diode D3 of the transistor Q3, a capacitor 8, a parasitic diode D2 of the transistor Q2, an inductor Lr, and the other end of the primary winding 41.

[0185] This first side current precharges the capacitor 8 .

[0186] (summary) As described above, when the DC-DC converter 10 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the control unit 61 controls the transistor Q7 or the transistor Q8 to the on state.

[0187] This allows the DC-DC converter 10 to form a regeneration path for the choke Lo, thereby preventing a surge voltage from being applied to the transistor Q5 or the transistor Q6. Therefore, the DC-DC converter 10 can prevent the transistor Q5 or the transistor Q6 from being subjected to stress.

[0188] Furthermore, the DC-DC converter 10 is capable of resetting the choke Lo.

[0189] Furthermore, since the DC-DC converter 10 can precharge the capacitor 8, the resistor 3 and the contactor 5 (see FIG. 1) in the power system 1 can be eliminated.

[0190] (Fourth Boost Operation of the First Embodiment) The fourth voltage boost operation (voltage boost operation numbered No. 4) of the DC-DC converter 10 of the first embodiment will be described.

[0191] Fig. 24 is a timing diagram of the fourth boost operation of the DC-DC converter of the first embodiment. Fig. 25 to Fig. 28 are diagrams showing paths through which current flows in the fourth boost operation of the DC-DC converter of the first embodiment.

[0192] With reference to FIG. 24, one cycle of the fourth boost operation includes a first period Mode1, a second period Mode2, a third period Mode3, and a fourth period Mode4.

[0193] Timing 40 6, the first period Mode1 starts. The control unit 61 controls the transistor Q2 and the transistor Q5 to be in the on state. As a result, as shown in the first column 114-1 of the fourth row 114 of the table 110 in FIG. 6, the transistor Q5 is conductive on the second side, and the transistor Q2 is conductive on the first side.

[0194] As a modified example, the control section 61 may control the transistor Q3 to be in the on state, instead of the transistor Q2, in the same manner as in the first period Mode1 of the first boost operation (see the first column 111-1 in FIG. 6).

[0195] In the first period Mode1, the choke Lo is charged.

[0196] Referring to Figure 25, the current on the second side flows through the path shown by line 411 from the high potential side end of the low voltage battery 11 → choke Lo → intermediate tap 42c of the second winding 42 → first part 42a of the second winding → transistor Q5 → low potential side end of the low voltage battery 11.

[0197] As indicated by line 412, the current on the first side flows through one end of the first winding 41, the inductor Lr, the transistor Q2, the parasitic diode D4 of the transistor Q4, and the other end of the first winding 41.

[0198] Referring to FIG. 24, timing t 41 6, the second period Mode2 starts. The control unit 61 controls the transistor Q2 to be in the off state and maintains the transistor Q5 in the on state. As a result, as shown in the second column 114-2 of the fourth row 114 of the table 110 in FIG. 6, the transistor Q5 is conductive on the second side, and the parasitic diodes D1 and D4 are conductive on the first side.

[0199] In the second period Mode2, the choke Lo is discharged.

[0200] Referring to Figure 26, the current on the second side flows through the path shown by line 421 from the high potential side end of the low voltage battery 11 → choke Lo → intermediate tap 42c of the second winding 42 → first part 42a of the second winding → transistor Q5 → low potential side end of the low voltage battery 11.

[0201] A current on the first side due to the induced voltage generated in the first winding 41 flows through a path shown by line 422, from one end of the first winding 41 to inductor Lr to parasitic diode D1 of transistor Q1 to capacitor 8 to parasitic diode D4 of transistor Q4 to the other end of the first winding 41.

[0202] This first side current precharges the capacitor 8 .

[0203] Referring to FIG. 24, timing t 42 6, the third period Mode3 starts. The control unit 61 controls the transistor Q5 to be in the off state, and controls the transistors Q4 and Q6 to be in the on state. As a result, as shown in the third column 114-3 of the fourth row 114 of the table 110 in FIG. 6, the transistor Q6 is conductive on the second side, and the transistor Q4 is conductive on the first side.

[0204] As a modified example, the control section 61 may control the transistor Q1 to be in the on state, instead of the transistor Q4, as in the third period Mode3 of the first boost operation (see the third column 111-3 in FIG. 6).

[0205] In the third period Mode3, the choke Lo is charged.

[0206] Referring to Figure 27, the current on the second side flows through the path shown by line 431 from the high potential side end of the low voltage battery 11 → choke Lo → center tap 42c of the second winding 42 → second part 42b of the second winding → transistor Q6 → low potential side end of the low voltage battery 11.

[0207] As indicated by line 432, the current on the first side flows through the other end of the first winding 41, transistor Q4, parasitic diode D2 of transistor Q2, inductor Lr, and one end of the first winding 41.

[0208] Referring to FIG. 24, timing t 43 6, the fourth period Mode4 starts. The control unit 61 controls the transistor Q4 to be in the off state and maintains the transistor Q6 in the on state. As a result, as shown in the fourth column 114-4 of the fourth row 114 of the table 110 in FIG. 6, the transistor Q6 is conductive on the second side, and the parasitic diodes D2 and D3 are conductive on the first side.

[0209] In the fourth period Mode4, the choke Lo is discharged.

[0210] Referring to Figure 28, the current on the second side flows through the path shown by line 441 from the high potential side end of the low voltage battery 11 → choke Lo → intermediate tap 42c of the second winding 42 → second part 42b of the second winding → transistor Q6 → low potential side end of the low voltage battery 11.

[0211] As indicated by line 442, the current on the first side flows through the path of the other end of the primary winding 41, parasitic diode D3 of transistor Q3, capacitor 8, parasitic diode D2 of transistor Q2, inductor Lr, and the other end of the primary winding 41.

[0212] This first side current precharges the capacitor 8 .

[0213] (summary) As described above, when the DC-DC converter 10 outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when the capacitor 8 is precharged), there is no period during which a surge voltage occurs, so it is possible to prevent a surge voltage from being applied to the transistor Q5 or the transistor Q6. Therefore, the DC-DC converter 10 can prevent the transistor Q5 or the transistor Q6 from being subjected to stress.

[0214] Furthermore, since the DC-DC converter 10 can precharge the capacitor 8, the resistor 3 and the contactor 5 (see FIG. 1) in the power system 1 can be eliminated.

[0215] <Second embodiment> (composition) 29 is a diagram showing the configuration of a DC-DC converter according to Embodiment 2. A DC-DC converter 10A is a full-wave rectification type converter.

[0216] Compared to the DC-DC converter 10 (see FIG. 5) of the first embodiment, the DC-DC converter 10A includes a bridge circuit 81 instead of the transistor Q5 and the transistor Q6.

[0217] The bridge circuit 81 includes transistors Q11 to Q14.

[0218] The source of the transistor Q11 is electrically connected to the drain of the transistor Q12. The drain of the transistor Q11 is electrically connected to the drain of the transistor Q13. The source of the transistor Q13 is electrically connected to the drain of the transistor Q14. The source of the transistor Q12 is electrically connected to the source of the transistor Q14.

[0219] The source of the transistor Q11 and the drain of the transistor Q12 are electrically connected to one end of the second winding 42 of the transformer T. The source of the transistor Q13 and the drain of the transistor Q14 are electrically connected to the other end of the second winding 42 of the transformer T. The drain of the transistor Q11 and the drain of the transistor Q13 are electrically connected to one end of the choke Lo. The source of the transistor Q12 and the source of the transistor Q14 are electrically connected to the low potential end of the capacitor 51 and the fourth terminal 24.

[0220] The control unit 61 outputs a drive control signal P 6 to the bridge circuit 81 .

[0221] (operation) One cycle of the boost operation of the DC-DC converter 10A includes a first period Mode1, a second period Mode2, a third period Mode3, and a fourth period Mode4.

[0222] In the first period Mode1, the control unit 61 controls the transistors Q11 to Q14 to be in the on state, and controls the transistors Q7 and Q8 to be in the off state.

[0223] In the second period Mode2, the control unit 61 maintains the transistor Q11 in the ON state, and controls the transistors Q12 to Q14 to be in the OFF state. In addition, the control unit 61 maintains the transistor Q7 in the OFF state, and controls the transistor Q8 to be in the ON state.

[0224] In the third period Mode3, the control unit 61 controls the transistors Q11 to Q14 to be in the on state, and the control unit 61 controls the transistors Q7 and Q8 to be in the off state.

[0225] In the fourth period Mode 4, the control unit 61 maintains the transistor Q13 in the on state, and controls the transistors Q11, Q12, and Q14 in the off state. The control unit 61 also controls the transistor Q7 to the on state, and controls the transistor Q8 to the off state.

[0226] (summary) When the DC-DC converter 10A outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the control unit 61 controls the transistor Q7 or the transistor Q8 to the on state.

[0227] This allows DC-DC converter 10A to form a regeneration path for choke Lo, thereby preventing a surge voltage from being applied from transistor Q11 to transistor Q14. Therefore, DC-DC converter 10A can prevent transistors Q11 to Q14 from being subjected to stress.

[0228] Furthermore, in the DC-DC converter 10A, the choke Lo can be reset.

[0229] Furthermore, since the DC-DC converter 10A can precharge the capacitor 8, the resistor 3 and the contactor 5 (see FIG. 1) in the power system 1 can be eliminated.

[0230] <Third embodiment> (composition) 30 is a diagram showing the configuration of a DC-DC converter according to embodiment 3. The DC-DC converter 10B is a current doubler type converter.

[0231] Compared to the DC-DC converter 10A of the second embodiment (see FIG. 32), the DC-DC converter 10B includes an inductor L1 and an inductor L2 instead of the transistor Q11, the transistor Q13, and the choke Lo.

[0232] One end of the inductor L1 is electrically connected to one end of the second winding 42 of the transformer T and the drain of the transistor Q12. The other end of the inductor L1 is electrically connected to the high-voltage side end of the capacitor 51 and the third terminal 23. One end of the inductor L2 is electrically connected to the other end of the second winding 42 of the transformer T and the drain of the transistor Q14. The other end of the inductor L2 is electrically connected to the high-voltage side end of the capacitor 51 and the third terminal 23.

[0233] The control unit 61 outputs a drive control signal P7 to the gate of the transistor Q12, and outputs a drive control signal P8 to the gate of the transistor Q14.

[0234] (operation) One cycle of the boost operation of the DC-DC converter 10B includes a first period Mode1 and a second period Mode2.

[0235] In the first period Mode1, the control unit 61 controls the transistor Q12 to be turned on / off. When the transistor Q12 is on, the control unit 61 controls the transistor Q8 to be turned off, and when the transistor Q12 is off, the control unit 61 controls the transistor Q8 to be turned on.

[0236] In the second period Mode2, the control unit 61 controls the transistor Q14 to be turned on / off. When the transistor Q14 is on, the control unit 61 controls the transistor Q7 to be turned off, and when the transistor Q14 is off, the control unit 61 controls the transistor Q7 to be turned on.

[0237] (summary) When the DC-DC converter 10B outputs a boosted voltage from the second side (the low-voltage battery 11 side) to the first side (the capacitor 8 side) (when precharging the capacitor 8), the control unit 61 controls the transistor Q7 or the transistor Q8 to the on state.

[0238] This allows the DC-DC converter 10B to form a regenerative path for the inductor L1 or the inductor L2, thereby preventing a surge voltage from being applied to the transistor Q12 or the transistor Q14. Therefore, the DC-DC converter 10B can prevent the transistor Q12 or the transistor Q14 from being subjected to stress.

[0239] Furthermore, the DC-DC converter 10B is capable of resetting the inductor L1 or the inductor L2.

[0240] Furthermore, since the DC-DC converter 10B can precharge the capacitor 8, the resistor 3 and the contactor 5 (see FIG. 1) in the power system 1 can be eliminated.

[0241] Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the contents of these embodiments. The above-mentioned components include those that a person skilled in the art can easily imagine, those that are substantially the same, and those that are within the so-called equivalent range. Furthermore, the above-mentioned components can be appropriately combined. Furthermore, various omissions, substitutions, or modifications of the components can be made without departing from the gist of the above-mentioned embodiments. [Explanation of symbols]

[0242] 1 Power system 2 High voltage battery 3. Resistance 4, 5, 6 Contactors 7 Inverter 8 Capacitors 9 Motor 10, 10A, 10B, 100 DC-DC Converters 11 Low voltage battery 31, 81 Bridge circuit 51 Capacitor 61 Control section 71 First Switch 72 Second Switch Lo Choke Lr, L1, L2 inductors Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8, Q11, Q12, Q13, Q14 transistors T transformer

Claims

1. A power supply device that steps down a first voltage input between a first terminal and a second terminal, and outputs the first voltage between a third terminal and a fourth terminal, and steps up a second voltage input between the third terminal and the fourth terminal, and outputs the second voltage between the first terminal and the second terminal, a bridge circuit including: a first switching element having one end electrically connected to the first terminal; a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to the second terminal; a third switching element having one end electrically connected to the first terminal; and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including: a first winding, one end of which is electrically connected to the other end of the first switching element and one end of the second switching element and the other end of which is electrically connected to the other end of the third switching element and one end of the fourth switching element; and a second winding, which is magnetically coupled to the first winding; an inductor having one end electrically connected to the center tap of the second winding and another end electrically connected to the third terminal; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to the fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a first switch having one end electrically connected to one end of the fifth switching element and one end of the second winding and having the other end electrically connected to the other end of the inductor and the third terminal; a second switch having one end electrically connected to one end of the sixth switching element and the other end of the second winding and having the other end electrically connected to the other end of the inductor and the third terminal; Including, A power supply device comprising:

2. a control unit that controls the first switching element to the sixth switching element, the first switch, and the second switch; The control unit is When the second voltage is boosted and output from between the first terminal and the second terminal, In the first period, the fifth switching element is turned on, In a second period following the first period, the first switch is turned on, In a third period following the second period, the sixth switching element is turned on, In a fourth period following the third period, the second switch is turned on.

2. The power supply device according to claim 1 .

3. The control unit is In the first period, the second switching element or the third switching element is turned on; In the third period, the fourth switching element or the first switching element is turned on.

3. The power supply device according to claim 2 .

4. a control unit that controls the first switching element to the sixth switching element, the first switch, and the second switch; The control unit is When the second voltage is boosted and output from between the first terminal and the second terminal, In a first period, both the fifth switching element and the sixth switching element are turned on, In a second period following the first period, the first switch is turned on, In a third period following the second period, both the fifth switching element and the sixth switching element are turned on, In a fourth period following the third period, the second switch is turned on.

2. The power supply device according to claim 1 .

5. a bridge circuit including a first switching element having one end electrically connected to a first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to a second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including a first winding having one end electrically connected to the other end of the first switching element and one end of the second switching element and the other end electrically connected to the other end of the third switching element and one end of the fourth switching element, and a second winding magnetically coupled to the first winding; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to a fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a first switch having one end electrically connected to one end of the fifth switching element and one end of the second winding and the other end electrically connected to the other end of the inductor and the third terminal; and a second switch having one end electrically connected to one end of the sixth switching element and the other end of the second winding and the other end electrically connected to the other end of the inductor and the third terminal, When a second voltage input between the third terminal and the fourth terminal is boosted and output from between the first terminal and the second terminal, In the first period, the fifth switching element is turned on, In a second period following the first period, the first switch is turned on, In a third period following the second period, the sixth switching element is turned on, In a fourth period following the third period, the second switch is turned on.

23. A method for controlling a power supply device comprising:

6. a bridge circuit including a first switching element having one end electrically connected to a first terminal, a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to a second terminal, a third switching element having one end electrically connected to the first terminal, and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including a first winding having one end electrically connected to the other end of the first switching element and one end of the second switching element and the other end electrically connected to the other end of the third switching element and one end of the fourth switching element, and a second winding magnetically coupled to the first winding; a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to a fourth terminal; a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a first switch having one end electrically connected to one end of the fifth switching element and one end of the second winding and the other end electrically connected to the other end of the inductor and the third terminal; and a second switch having one end electrically connected to one end of the sixth switching element and the other end of the second winding and the other end electrically connected to the other end of the inductor and the third terminal, When a second voltage input between the third terminal and the fourth terminal is boosted and output from between the first terminal and the second terminal, In a first period, both the fifth switching element and the sixth switching element are turned on, In a second period following the first period, the first switch is turned on, In a third period following the second period, both the fifth switching element and the sixth switching element are turned on, In a fourth period following the third period, the second switch is turned on.

23. A method for controlling a power supply device comprising:

7. A power supply device that steps down a first voltage input between a first terminal and a second terminal, and outputs the first voltage between a third terminal and a fourth terminal, and steps up a second voltage input between the third terminal and the fourth terminal, and outputs the second voltage between the first terminal and the second terminal, a first bridge circuit including: a first switching element having one end electrically connected to the first terminal; a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to the second terminal; a third switching element having one end electrically connected to the first terminal; and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including: a first winding, one end of which is electrically connected to the other end of the first switching element and one end of the second switching element and the other end of which is electrically connected to the other end of the third switching element and one end of the fourth switching element; and a second winding, which is magnetically coupled to the first winding; a second bridge circuit including: a fifth switching element having one end electrically connected to one end of the second winding, a sixth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to the fourth terminal, a seventh switching element having one end electrically connected to the other end of the second winding, and an eighth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; an inductor having one end electrically connected to the other end of the fifth switching element and the other end of the seventh switching element and having the other end electrically connected to the third terminal; a first switch having one end electrically connected to one end of the second winding, one end of the fifth switching element, and one end of the sixth switching element, and having the other end electrically connected to the other end of the inductor and the third terminal; a second switch having one end electrically connected to the other end of the second winding, one end of the seventh switching element, and one end of the eighth switching element, and having the other end electrically connected to the other end of the inductor and the third terminal; Including, A power supply device comprising:

8. A power supply device that steps down a first voltage input between a first terminal and a second terminal, and outputs the first voltage between a third terminal and a fourth terminal, and steps up a second voltage input between the third terminal and the fourth terminal, and outputs the second voltage between the first terminal and the second terminal, a bridge circuit including: a first switching element having one end electrically connected to the first terminal; a second switching element having one end electrically connected to the other end of the first switching element and the other end electrically connected to the second terminal; a third switching element having one end electrically connected to the first terminal; and a fourth switching element having one end electrically connected to the other end of the third switching element and the other end electrically connected to the second terminal; a transformer including: a first winding, one end of which is electrically connected to the other end of the first switching element and one end of the second switching element and the other end of which is electrically connected to the other end of the third switching element and one end of the fourth switching element; and a second winding, which is magnetically coupled to the first winding; a first inductor having one end electrically connected to one end of the second winding and the other end electrically connected to the third terminal; and a fifth switching element having one end electrically connected to one end of the second winding and the other end electrically connected to the fourth terminal; a second inductor having one end electrically connected to the other end of the second winding and the other end electrically connected to the other end of the first inductor and the third terminal; and a sixth switching element having one end electrically connected to the other end of the second winding and the other end electrically connected to the fourth terminal; a first switch having one end electrically connected to one end of the second winding, one end of the first inductor, and one end of the fifth switching element, and having the other end electrically connected to the other end of the first inductor, the other end of the second inductor, and the third terminal; a second switch, one end of which is electrically connected to the other end of the second winding, one end of the second inductor, and one end of the sixth switching element, and the other end of which is electrically connected to the other end of the first inductor, the other end of the second inductor, and the third terminal; Including, A power supply device comprising:

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