Image pickup unit and endoscope
A symmetrical pad and land arrangement on flat and three-dimensional wiring boards stabilizes solder joints against interfacial tension, addressing unintentional movement and ensuring reliable, compact imaging units.
Patent Information
- Application Number
- JP2023160429
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-06-30
- Filing Date
- 2023-09-25
- Publication Date
- 2025-01-20
- Estimated Expiration
- 2043-09-25
AI Technical Summary
The challenge of unintentional movement of wiring boards due to interfacial tension of molten solder during the soldering process, particularly in ultra-small imaging units, which can lead to reduced joint reliability and increased dimensions.
The implementation of a symmetrical arrangement of pads and lands on both the flat and three-dimensional wiring boards, ensuring equal areas and symmetric interfacial tension distribution to stabilize the solder joints, thereby preventing unintentional movement and ensuring accurate alignment.
This configuration enhances joint reliability by preventing unintentional movement of the wiring boards and maintaining precise positioning, ensuring high-quality images and compact dimensions in imaging units.
Smart Images

Figure 2025009658000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to an imaging unit in which a planar wiring board and a three-dimensional wiring board are soldered together, and to an endoscope having an imaging unit in which a planar wiring board and a three-dimensional wiring board are soldered together. [Background technology]
[0002] In recent years, three-dimensional circuit devices, such as molded interconnect devices (MIDs), have come to be used in order to reduce the size and improve the functionality of electronic devices.
[0003] Japanese Patent Application Publication No. 2017-23234 discloses an imaging unit for an endoscope using an irregular circuit board, which is a three-dimensional circuit device. The imaging unit includes an imager, a flat wiring board on which electronic components such as a capacitor and an IC chip are mounted, and an irregular circuit board (three-dimensional wiring board). It is not easy to accurately join a planar wiring board and a three-dimensional wiring board using solder, and particularly in ultra-compact imaging units, there is a risk of the wiring board moving due to the interfacial tension of the molten solder. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2017-23234 A Summary of the Invention [Problem to be solved by the invention]
[0005] The objective of the present invention is to provide an imaging unit capable of preventing unintended movement of a wiring board due to the interfacial tension of molten solder, and an endoscope having an imaging unit capable of preventing unintended movement of a wiring board due to the interfacial tension of molten solder. [Means for solving the problem]
[0006] An imaging unit according to an embodiment of the present invention comprises a semiconductor package including an imager, a planar wiring board having a front surface and a first surface opposite to the front surface, the front surface being joined to the semiconductor package, the first surface having a plurality of first pads and a plurality of second pads, and a three-dimensional wiring board having a second surface joined to the first surface, the second surface of the three-dimensional wiring board having a first region and a second region that are symmetrical with respect to a cutout, a plurality of first lands being arranged in the first region, the second region of the three-dimensional wiring board having a plurality of second lands arranged in the second region, each of the plurality of first lands being solder-joined to each of the plurality of first pads, each of the plurality of second lands being solder-joined to each of the plurality of second pads, and a first area which is a sum of areas of the plurality of first pads and a second area which is a sum of areas of the plurality of second pads are approximately the same.
[0007] An endoscope according to another embodiment of the present invention has an imaging unit at a tip of an insertion section, the imaging unit comprising: a semiconductor package including an imager; a planar wiring board having a front surface and a first surface opposite to the front surface, the front surface being joined to the semiconductor package; a plurality of first pads and a plurality of second pads arranged on the first surface; and a three-dimensional wiring board having a second surface joined to the first surface, the second surface being defined by a first region and a second region that are symmetrical with respect to a cutout. The three-dimensional wiring board has two regions, a plurality of first lands are arranged in the first region, the three-dimensional wiring board has a plurality of second lands arranged in the second region, each of the plurality of first lands is solder-joined to each of the plurality of first pads, each of the plurality of second lands is solder-joined to each of the plurality of second pads, and a first area which is a sum of areas of the plurality of first pads and a second area which is a sum of areas of the plurality of second pads are substantially equal to each other. Effect of the Invention
[0008] It is possible to provide an imaging unit that can prevent unintended movement of a wiring board due to interfacial tension of molten solder, and an endoscope having an imaging unit that can prevent unintended movement of a wiring board due to interfacial tension of molten solder. [Brief description of the drawings]
[0009] [Figure 1] FIG. 1 is a perspective view of an imaging unit according to the first embodiment. [Diagram 2] FIG. 2 is a side view of the imaging unit of the first embodiment. [Diagram 3] FIG. 3 is an exploded view of the imaging unit according to the first embodiment. [Figure 4] FIG. 4 is a plan view of the planar wiring board of the imaging unit of the first embodiment. [Diagram 5] FIG. 5 is a plan view of the three-dimensional wiring board of the imaging unit of the first embodiment. [Figure 6] FIG. 6 is a partial cross-sectional view of the imaging unit of the first embodiment. [Figure 7A] FIG. 7A is a plan view of a planar wiring board of the imaging unit of the first embodiment. [Figure 7B] FIG. 7B is a plan view of the three-dimensional wiring board of the imaging unit of the first embodiment. [Figure 8] FIG. 8 is a perspective view of the endoscope according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] First Embodiment The imaging unit 1 of the first embodiment of the present invention will be described below with reference to the drawings. The drawings based on the embodiment are schematic. The relationship between the thickness and width of each part in the drawings, the thickness ratio of each part, and the like differ from the actual ones. The drawings also include parts with different dimensional relationships and ratios. Illustration of some components and assignment of symbols are omitted.
[0011] As shown in FIGS. 1 to 5, imaging unit 1 includes a semiconductor package 40, a planar wiring board 10, a three-dimensional wiring board 20, electronic components 30, and a cable 50.
[0012] The explanation may be given using a three-axis Cartesian coordinate system in which the direction of the optical axis O of the imaging unit 1 is the X-axis. The direction in which the X-axis value increases (leftward in Fig. 1) is called the "front" or "tip side". The direction in which the X-axis value decreases (rightward in Fig. 1) is called the "rear" or "base side". The direction in which the Y-axis value increases is called the "upper", and the direction in which the Y-axis value decreases is called the "lower". The direction closer to the optical axis O is called the "inner", and the direction away from the optical axis O is called the "outer".
[0013] The semiconductor package 40 has an imager 41 and a cover glass 42 bonded to the light receiving surface of the imager 41. The imager 41 is a CCD, a CMOS, or the like that converts a subject image into an imaging signal. The semiconductor package 40 is a CSP (Chip Size Package) that is fabricated by bonding a glass wafer to a semiconductor wafer on which a plurality of imagers 41 are formed, and then cutting the semiconductor package 40. The size of the semiconductor package 40 is, for example, 1 mm square to 3 mm square. The semiconductor package 40 may further have a semiconductor chip that processes imaging signals bonded to the back surface of the imager 41.
[0014] Planar wiring board 10 has a front surface 10SA and a first surface 10SB opposite to front surface 10SA. Planar wiring board 10 is, for example, a multilayer wiring board in which wiring is formed on each of a plurality of wiring layers. Each of a plurality of front pads (not shown) on front surface 10SA is joined to each of a plurality of external terminals (not shown) on rear surface 40SB of semiconductor package 40 (imager 41) using solder 61.
[0015] A plurality of first pads 11 (11A-11C) and a plurality of second pads 12 (12A-12D) are arranged on the first surface 10SB. A plurality of third pads 13 (13A-13F) are arranged between the plurality of first pads 11 and the plurality of second pads 12.
[0016] In this specification, "pads" and "lands" are both "electrodes" consisting of conductive patterns for solder bonding. That is, "pads", "lands" and "electrodes" have the same functional configuration, but for convenience of explanation, different names are used. The shape of the electrodes may be a rectangle with chamfered corners, a polygon, a circle, an ellipse, etc.
[0017] Electronic components 30 (30A-30C) are joined to third pad 13 using solder 63. Since electronic components 30 are housed in notches C20 of three-dimensional wiring board 20, the length (dimension in the optical axis direction) of imaging unit 1 is short. Furthermore, in imaging unit 1 in which electronic components 30 are mounted on planar wiring board 10 joined to imager 41, the distance between imager 41 and electronic components 30 is short. Since the wiring impedance between imager 41 and electronic components 30 is small, imaging unit 1 can obtain high-quality images.
[0018] In the imaging unit 1, the electronic components 30 are three chip capacitors. The type of the electronic components 30 may be an inductor, a coil, a driver IC, etc. The number of electronic components 30 is not limited to three.
[0019] Three-dimensional wiring board 20 is a molded interconnect device (MID) produced by injection molding, with wiring and the like arranged on the surface. MID base materials include epoxy, liquid crystal polymer, polyimide, polycarbonate, and the like. Three-dimensional wiring board 20, which is a MID, can be easily manufactured into a complex shape.
[0020] Three-dimensional wiring board 20 has second surface 20SA disposed opposite first surface 10SB of planar wiring board 10. Second surface 20SA has notches C20 extending to both side surfaces. In other words, three-dimensional wiring board 20 has two arms 29 (29A, 29B) protruding forward. As will be described later, in ultra-compact imaging unit 1, thickness T3 of arm 29 is, for example, only 0.3 mm.
[0021] The notch C20 is between the two arms 29A and 29B. As shown in Fig. 3, a wall surface C20SS (C20SSA, C20SSB) of the notch C20 is perpendicular to the first surface 10SB.
[0022] The second surface 20SA is divided into a first region 20SA1 and a second region 20SA2, which are symmetrical with respect to the center line of the cutout C20. As shown in FIG. 5 and FIG. 6, a chamfered region C20C (C20CA) exists between the substantially rectangular first region 20SA1 and the first wall surface C20SSA of the cutout C20. A chamfered region C20CC exists between the first region 20SA1 and the upper side surface of the three-dimensional wiring board 20. A second chamfered region C20CB also exists between the second region 20SA2, which is symmetrical with the first region 20SA1, and the second wall surface C20SSB. A chamfered region C20CD exists between the second region 20SA2 and the lower side surface of the three-dimensional wiring board 20. The chamfered region C20C may be a curved surface or a flat surface.
[0023] A plurality of first lands 21 (21A-21C) are disposed in the first region 20SA1. A plurality of second lands 22 (22A-22D) are disposed in the second region 20SA2. The first lands 21 are smaller than the first pads 11, and the second lands 22 are smaller than the second pads 12.
[0024] The first land 21 is joined to the first pad 11 by a first solder 62A. The second land 22 is joined to the second pad 12 by a second solder 62B. As described later, the first solder 62A and the second solder 62B are, for example, solders 62 of the same thickness formed by hardening solder paste of the same composition.
[0025] First land 21 of three-dimensional wiring board 20 is extended to the base end side to form wiring 21W. Cable 50 is joined to an end of wiring 21W at base end 28 of three-dimensional wiring board 20 using solder 64. Second land 22 is connected to wiring 22W, and cable 50 is joined to an end of wiring 22W using solder 64. Multiple cables 50 are bundled at the base end side to form a composite cable covered with an outer sheath shield and an outer sheath. Note that base end 28 may be inclined with respect to second surface 20SA in a direction in which wirings 21W, 22W approach each other.
[0026] When manufacturing the imaging unit 1, for example, electronic components 30 are joined to the planar wiring board 10, a semiconductor package 40 is joined to the planar wiring board 10, the planar wiring board 10 is joined to the three-dimensional wiring board 20, and a cable 50 is joined to the three-dimensional wiring board 20.
[0027] 1, planar wiring board 10 and three-dimensional wiring board 20 are housed in virtual space 40S obtained by extending imager 41 in the optical axis direction. For this reason, imaging unit 1 has a small dimension perpendicular to optical axis O.
[0028] The periphery of each of the plurality of solder joints is sealed with a sealing resin (not shown).
[0029] It is not easy to accurately join the planar wiring board 10 and the three-dimensional wiring board 20 using the solder 62. In particular, in the case of an ultra-compact imaging unit 1, there is a risk of movement due to the interfacial tension of the molten solder 62. If the relative positions of the planar wiring board 10 and the three-dimensional wiring board 20 are deviated from the predetermined positions, stress is concentrated at the joint when stress is applied from the outside, and the joint reliability is reduced. There is a risk of the molten solder 62 shorting out with the solder 63 that joins the electronic component 30 already mounted. If the second surface 20SA is curved rather than parallel to the first surface 10SB, the external dimensions of the imaging unit 1 will be large.
[0030] <Size and placement> The size and arrangement of each of the multiple electrodes (pads and lands) are important not only to prevent movement due to interfacial tension of molten solder 62, but also to accurately join planar wiring board 10 and three-dimensional wiring board 20 using solder 62 through the self-alignment effect.
[0031] In the imaging unit 1, the size of the first pad 11 is, for example, 0.16 mm×0.25 mm. The size of the second pad 12 is, for example, 0.11 mm×0.25 mm. The number of first pads N1 of the multiple first pads 11 is "3," and the number of second pads N2 of the multiple second pads 12 is "4." In other words, the number of first pads N1 and the number of second pads N2 are different. However, the sum of the areas of the multiple first pads 11 (first area S11=0.12 mm 2 ) and the total area of the plurality of second pads 12 (second area S12=0.11 mm 2 ) is approximately the same as
[0032] The first pads 11 and the second pads 12 of the planar wiring board 10 of the imaging unit 1 are arranged in symmetrical regions with the notch C20 in between. The interfacial tension of the molten solder 62 is approximately proportional to the bonding area. The interfacial tension of the molten first solder 62A and the interfacial tension of the molten second solder 62B are approximately the same.
[0033] In this specification, "the value A and the value B are substantially the same" means that the value A is more than 85% and less than 115% (including 100%) of the value B.
[0034] As long as the first area S11 and the second area S12 are approximately the same, at least one of the multiple first pads 11 and the multiple second pads 12 may have multiple pads with different areas.
[0035] Furthermore, in the imaging unit 1, the size of the first land 21 is, for example, 0.16 mm×0.16 mm. The size of the second land 22 is, for example, 0.11 mm×0.16 mm. That is, the first land 21 and the second land 22 are smaller than the first pad 11 and the second pad 12. The number of first lands of the first land 21 is the same as the number of first pads N1. The number of second lands of the second land 22 is the same as the number of second pads N2.
[0036] The number N1 of the first lands 21 and the number N2 of the second lands 22 are different. However, the total area of the first lands 21 (third area S21=0.0768 mm 2 ) and the total area of the plurality of second lands 22 (fourth area S22=0.0704 mm 2 ) is roughly the same as
[0037] Even if there is an influence of solder 62 spreading to first pad 11 and second pad 12, the interfacial tension of solder 62 melted during bonding acts symmetrically on both sides of notch C20. Therefore, planar wiring board 10 and three-dimensional wiring board 20 are bonded accurately using solder 62.
[0038] The first distance between the first pad 11 and the first land 21 and the second distance between the second pad 12 and the second land 22 are substantially the same. In other words, the thickness T62A of the first solder 62A joining the first pad 11 and the first land 21 and the thickness T62B of the second solder 62B joining the second pad 12 and the second land 22 are the same thickness T2 (see FIG. 6). The thickness T2 of the solder 62 is, for example, 20 μm-30 μm. The thickness T1 (see FIG. 6) of the electrode (pad, land) is, for example, 5 μm-10 μm.
[0039] Therefore, a first volume V62A (third area S21×T62) which is the sum of the volumes of the multiple first solders 62A is substantially the same as a second volume V62B (fourth area S22×T62) which is the sum of the volumes of the multiple second solders 62B. The multiple first solders 62A each join the multiple first pads 11 to the multiple first lands 21. The multiple second solders 62B each join the multiple second pads 12 to the multiple second lands 22.
[0040] Needless to say, the number N1 of the first pads and the number N2 of the second pads may be the same.
[0041] It is preferable that the interfacial tension of the molten solder 62 during bonding also acts symmetrically in a direction perpendicular to the cutout C20 (left-right direction in FIG. 2: Z-axis direction). When viewed virtually from a direction perpendicular to the optical axis O, that is, in the YZ plane (FIGS. 4 and 5), it is preferable that the interfacial tension of the molten solder 62 acts symmetrically with respect to the central axes 10X, 20X in the left-right direction of the first surface 10SB and the second surface 20SA, respectively.
[0042] For this purpose, the central axis 10X of planar wiring board 10 and the central axis 20X of three-dimensional wiring board 20 are located on the same plane. Furthermore, it is preferable that the outer end faces of the plurality of electrodes located on the outer sides of and joined to each of the plurality of first pads 11, the plurality of second pads 12, the plurality of first lands 21, and the plurality of second lands 22 are located on the same plane.
[0043] That is, the outer end surface 11AF of the first pad 11A, the outer end surface 12AF of the second pad 12A, the outer end surface 21AF of the first land 21A, and the outer end surface 22AF of the second land 22A are located on a plane F1. The outer end surface 11CF of the first pad 11C, the outer end surface 12CF of the second pad 12D, the outer end surface 12DF of the second land 21C, and the outer end surface 22DF of the second land 22D are located on a plane F2.
[0044] Moreover, it is preferable that the center points G11, G12, G21, and G22 of the electrode groups of the first pads 11, the second pads 12, the first lands 21, and the second lands 22 are located on the same plane FG. The plane FG includes the central axis 10X and the central axis 20X.
[0045] Imaging unit 1 can prevent unintended movement of three-dimensional wiring board 20 due to the interfacial tension of molten solder 62. Furthermore, even if planar wiring board 10 and three-dimensional wiring board 20 are not positioned correctly before bonding, the self-alignment effect caused by the interfacial tension of molten solder 62 allows three-dimensional wiring board 20 to be moved to the correct position and bonded.
[0046] <Land inner edge position> As already described, thickness T3 of arm 29 of three-dimensional wiring board 20 is 0.3 mm. The lower limit of thickness T3 is, for example, 0.2 mm. If the lower limit of thickness T3 is less than the lower limit, not only is mechanical strength not guaranteed, but injection molding is difficult. The upper limit of thickness T3 is, for example, less than 1 mm for miniaturization. Note that thickness T3 of arm 29 is the difference between first distance L1 from outer surface 20SS of three-dimensional wiring board 20 to optical axis O and second distance L2 from wall surfaces C20SSA and C20SSB of notch C20 adjacent to each of first pads 11 and second pads 12 to the optical axis (FIG. 6). That is, in imaging unit 1, the difference between first distance L1 and second distance L2 is more than 0.2 mm and less than 1 mm.
[0047] For the sake of joint reliability, it is preferable that the land inner end 21T of the first land 21 is extended to the wall surface C20SS (C20SSA) of the notch C20. However, in a micro-compact imaging unit 1, if the land inner end 21T of the first land 21 is extended, there is a risk that the solder 62 will short-circuit with the solder 63.
[0048] If the thickness T3 of the arm portion 29 is thinned, even if the first land 21 is extended to the first chamfered area C20CA or the first wall surface C20SSA of the cutout C20, there is no risk of the solder 62 shorting out with the solder 63. However, if the thickness T3 is thinned, not only is it impossible to ensure mechanical strength, but injection molding is also difficult. In the imaging unit 1 in which the thickness T3 cannot be thinned below a predetermined value, the size of the first land 21 and the size of the second land 22 are limited.
[0049] For example, as shown in FIG. 6, the land inner end 21T of the first land 21 does not extend to the wall surface C20SS (first wall surface C20SSA) of the cutout C20. The first wall surface C20SSA is the wall surface C20SS adjacent to the first pad 11. It is more preferable that the land inner end 21T of the first land 21 does not extend to the chamfered area C20C (first chamfered area C20CA) as in the imaging unit 1. Similarly, although not shown, the second land 22 does not extend to the wall surface C20SS (second wall surface C20SSB) of the cutout C20. The second wall surface C20SSB is the wall surface C20SS adjacent to the second pad 12. It is more preferable that the second land 22 does not extend to the chamfered area C20C (second chamfered area C20CB).
[0050] <Positional relationship of joints> In ultra-compact imaging unit 1, it is necessary to prevent molten solder 62 from shorting out with the joints (third pad 13, solder 63) of mounted electronic component 30 while ensuring mechanical strength. For this reason, the positional relationship of multiple joints between planar wiring board 10, three-dimensional wiring board 20, and electronic component 30 is important.
[0051] Regarding the positional relationship of the multiple joints, the portion including the first region 20SA1 and the portion including the second region 20SA2 are symmetrical with respect to the optical axis O. For this reason, the upper portion including the first region 20SA1 shown in Fig. 6 will be described below as an example. Fig. 6 is a partial cross-sectional view of a cross section perpendicular to the optical axis O of the imaging unit 1 and parallel to the wall surface C20SS of the cutout C20.
[0052] As shown in Fig. 6, the third distance L3 is preferably between the second distance L2 and the fourth distance L4. The third distance L3 is the distance from the optical axis O of the pad inner end 11T of the first pad 11. The second distance L2 is the distance from the optical axis O of the first wall surface C20SSA adjacent to the first pad 11. The fourth distance L4 is the distance from the optical axis O of the land inner end 21T of the first land 21.
[0053] That is, if the third distance L3 is greater than the second distance L2, there is a risk of a short circuit between the solder 62 and the solder 63. If the fourth distance L4 is smaller than the third distance L3, the area of the joint is reduced, resulting in a decrease in joint reliability.
[0054] Similarly, it is preferable that the distance from the optical axis O of the pad inner end of the second pad 12 (same as the third distance L3) is between the distance from the optical axis O of the second wall surface C20SSB, which is the wall surface C20SS adjacent to the second pad 12 (same as the second distance L2), and the distance from the optical axis O of the land inner end (not shown) of the second land 22 (same as the fourth distance L4).
[0055] Furthermore, it is preferable that a fifth distance L5 from the optical axis O to the outer pad end 13T of the third pad 13 is shorter than the second distance L2. According to the above configuration, a short circuit between the solder 62 and the solder 63 can be prevented.
[0056] The above configuration will be further explained with reference to the plan views shown in Figures 7A and 7B. As shown in Figure 7A, among the ridgelines formed by the multiple first pads 11, the inner ridgeline is designated as ridgeline A1, and among the ridgelines formed by the multiple second pads 12, the inner ridgeline is designated as ridgeline A2. Among the ridgelines formed by the multiple third pads 13, the ridgeline closest to the first pad 11 is designated as ridgeline B1, and the ridgeline closest to the second pad 12 is designated as ridgeline B2.
[0057] 7B, of the ridge lines formed by the multiple first lands 21, the inner ridge line is referred to as ridge line C1, and of the ridge lines formed by the multiple second lands 22, the inner ridge line is referred to as ridge line C2. The ridge line of the first wall surface C20SSA, which is the wall surface C20SS adjacent to the first land 21, is referred to as ridge line D1, and the ridge line of the second wall surface C20SSB, which is the wall surface C20SS adjacent to the second land 22, is referred to as ridge line D2.
[0058] It is preferable that the ridge line A1 is located between the ridge line C1 and the ridge line D1, and the ridge line A2 is located between the ridge line C2 and the ridge line D2.
[0059] It is preferable that the ridge line B1 is located more inward (closer to the optical axis) than the ridge line D1, and the ridge line B2 is located more inward (closer to the optical axis) than the ridge line D2.
[0060] In addition, it is preferable that the sixth distance L6 from the optical axis O of the outermost surface 30SA of the plurality of electronic components 30 is shorter than the second distance L2. According to the above configuration, the electronic components 30 can be easily accommodated in the notch C20. In addition, the plurality of first pads 11 (11A-11C) and the plurality of second pads 12 (12A-12D) on the planar wiring board 10 can be prevented from contacting with the plurality of third pads 13 (13A-13F). The solders applied to the pads can be prevented from contacting with each other.
[0061] In addition, when the joints form fillets, the joint reliability is improved. For this reason, it is preferable that the seventh distance L7 from the optical axis O of each of the pad outer ends of the first pads 11 and the second pads 12 is longer than the first distance L1 between the outer surface 20SS of the three-dimensional wiring board 20 and the optical axis O. It is also preferable that the fifth distance L5 from the optical axis O of the pad outer ends 13T of the third pads 13 is longer than the sixth distance L6 from the optical axis O of the outermost surface 30SA of the electronic components 30.
[0062] <Pad and land types> It is preferable that a fifth area S5, which is the sum of the areas of the grounded pads among the multiple first pads 11, the multiple second pads 12, and the multiple third pads 13, is larger than the area of the largest ungrounded pad among the multiple ungrounded pads.
[0063] For example, the first pad 11A and the second pad 12D are ground pads. The first pads 11B and 11C are non-ground pads connected to a power supply. The second pads 12A, 12B, and 12C are non-ground pads through which a signal flows. A fifth area S5 (0.0675 mm2), which is the sum of the areas of the multiple ground pads, is 2 ) is the area of the first pad 11B, which has the largest area among the non-ground pads (0.04 mm 2 ) is greater than
[0064] According to the above configuration, it is possible to prevent the deterioration of the electrical characteristics of the imaging unit 1 due to an increase in impedance.
[0065] Furthermore, among the multiple second pads 12 and multiple third pads 13, it is preferable that the connection pad spacing between the second pads 12 (second connection pads) and third pads 13 (third connection pads) that are directly connected in the inner layer of the planar wiring board 10 is shorter than the spacing between the second pads 12 (second non-connection pads) and third pads 13 (third non-connection pads) that are not directly connected in the inner layer of the wiring board.
[0066] For example, the second pad 12A and the third pad 13B are the second connection pad and the third connection pad that are directly connected. The second pad 12A and the third pad 13A are the second non-connection pad and the third non-connection pad that are not directly connected. The connection pad distance D10 between the second pad 12A and the third pad 13B is shorter than the non-connection pad distance D11 between the second pad 12A and the third pad 13A.
[0067] According to the above-described configuration, the wiring on the planar wiring board 10 is short, so that the imaging unit 1 can obtain good electrical characteristics.
[0068] <Second embodiment> As shown in Fig. 8, the endoscope 9 of this embodiment has a tip portion 9A on which the imaging unit 1 is disposed, a freely bendable bending portion 9B connected to the base end of the tip portion 9A, and an elongated flexible portion 9C connected to the base end of the bending portion 9B. The bending portion 9B is bent by the user operating an operating portion 9D. The tip portion 9A, the bending portion 9B, and the flexible portion 9C form an insertion portion that is inserted into the body. A universal cord 9E extending from the operating portion 9D is connected to a processor or the like (not shown).
[0069] Since the endoscope 9 has the imaging unit 1, it is highly reliable, small-sized, and high-performance.
[0070] Although the endoscope 9 is a medical flexible endoscope, an endoscope in another embodiment may be an industrial endoscope or a rigid endoscope having a rigid straight tube instead of the flexible section 9C. The imaging unit 1 may be used in a direct-view endoscope in which the subject direction is the tip direction.
[0071] Three-dimensional wiring board 20 is not limited to a molded circuit device (MID). For example, three-dimensional wiring board 20 may be produced by processing using a 3D printer or cutting. The material of three-dimensional wiring board 20 is not limited to resin, and ceramic or glass epoxy may be used.
[0072] The present invention is not limited to the above-described embodiment, and various changes and modifications can be made without departing from the gist of the present invention.
Claims
1. a semiconductor package including an imager; a planar wiring board having a front surface and a first surface opposite to the front surface, the front surface being joined to the semiconductor package, and a plurality of first pads and a plurality of second pads being disposed on the first surface; a three-dimensional wiring board having a second surface joined to the first surface, The three-dimensional wiring board has a first region and a second region that are symmetrical with respect to a notch on the second surface, a plurality of first lands are arranged in the first region, and a plurality of second lands are arranged in the second region, Each of the first lands is solder-bonded to each of the first pads, and each of the second lands is solder-bonded to each of the second pads, An imaging unit, wherein a first area which is a sum of areas of the plurality of first pads and a second area which is a sum of areas of the plurality of second pads are substantially equal to each other.
2. 2. The imaging unit according to claim 1, wherein a number of first pads in the plurality of first pads is different from a number of second pads in the plurality of second pads.
3. the planar wiring board has a plurality of third pads disposed between the plurality of first pads and the plurality of second pads; a plurality of electronic components solder-bonded to the third pads; 2. The imaging unit according to claim 1, wherein the electronic components are housed in the notches of the wiring board.
4. 2. The imaging unit according to claim 1, wherein a third area which is a sum of the areas of the plurality of first lands and a fourth area which is a sum of the areas of the plurality of second lands are substantially equal to each other.
5. 2. The imaging unit according to claim 1, wherein a first volume which is the sum of the volumes of a plurality of first solders which respectively join each of the plurality of first pads and each of the plurality of first lands is substantially the same as a second volume which is the sum of the volumes of a plurality of second solders which respectively join each of the plurality of second pads and each of the plurality of second lands.
6. 2. The imaging unit according to claim 1, wherein a first interval between the plurality of first pads and the plurality of first lands and a second interval between the plurality of second pads and the plurality of second lands are substantially the same.
7. 2. The imaging unit according to claim 1, wherein outer end surfaces of a plurality of electrodes located outside each of the plurality of first pads, the plurality of second pads, the plurality of first lands, and the plurality of second lands are located on the same plane.
8. 7. The imaging unit according to claim 6, wherein the centers of gravity of the plurality of first pads, the plurality of second pads, the plurality of first lands, and the plurality of second lands are located on the same plane.
9. The imaging unit described in claim 1, characterized in that a difference between a first distance to the optical axis of the outer surface of the three-dimensional wiring board and a second distance from a wall surface of the cutout adjacent to each of the multiple first pads and the multiple second pads to the optical axis is more than 0.2 mm and less than 1 mm.
10. the first lands do not extend to a first chamfered region between the first region and a first wall surface of the cutout; 10. The imaging unit according to claim 9, wherein the plurality of second lands do not extend to a second chamfered region between the second region and a second wall surface of the cutout.
11. In a cross section perpendicular to the optical axis and parallel to the wall surface of the notch, 4. The imaging unit of claim 3, wherein a third distance from the optical axis of an inner pad end of each of the plurality of first pads and the plurality of second pads is between a second distance from the optical axis to a wall surface of the cutout adjacent to each of the plurality of first pads and the plurality of second pads, and a fourth distance from the optical axis of an inner land end of each of the plurality of first lands and the plurality of second lands.
12. 12. The imaging unit according to claim 11, wherein a fifth distance from the optical axis to an outer edge of each of the third pads is shorter than the second distance.
13. 13. The imaging unit of claim 12, wherein a sixth distance from the optical axis of the outermost surfaces of the plurality of electronic components is less than the second distance.
14. The imaging unit of claim 13, characterized in that a fifth area, which is the sum of areas of a plurality of grounded pads among the plurality of first pads, the plurality of second pads, and the plurality of third pads, is larger than an area of a maximum ungrounded pad among a plurality of ungrounded pads.
15. The imaging unit of claim 1, characterized in that, among the plurality of second pads and the plurality of third pads, a connection pad spacing between a second connection pad and a third connection pad that are directly connected on an inner layer of the planar wiring board is shorter than a non-connection pad spacing between a second non-connection pad and a third non-connection pad that are not directly connected.
16. 2. The imaging unit according to claim 1, wherein the planar wiring board and the three-dimensional wiring board are accommodated in a virtual space formed by extending the imager in the optical axis direction.
17. 2. The imaging unit according to claim 1, wherein the three-dimensional wiring board is a molded circuit device.
18. An endoscope having an imaging unit at a tip of an insertion section, The imaging unit includes: a semiconductor package including an imager; a planar wiring board having a front surface and a first surface opposite to the front surface, the front surface being joined to the semiconductor package, and a plurality of first pads and a plurality of second pads being disposed on the first surface; a three-dimensional wiring board having a second surface joined to the first surface, The three-dimensional wiring board has a first region and a second region that are symmetrical with respect to a notch on the second surface, a plurality of first lands are arranged in the first region, and a plurality of second lands are arranged in the second region, Each of the first lands is solder-bonded to each of the first pads, and each of the second lands is solder-bonded to each of the second pads, An endoscope characterized in that a first area which is the sum of the areas of the multiple first pads and a second area which is the sum of the areas of the multiple second pads are approximately the same.
Citation Information
Patent Citations
Imaging unit and endoscope
JP2017023234A