Semiconductor module

Abstract

To achieve a desired cooling capacity with a simple configuration.SOLUTION: A semiconductor module 1 includes a functional element unit 2A having a power semiconductor element 20 having an element principal surface 20a on which a first principal surface electrode 20S is provided and an element back surface 20b on the opposite side to the element principal surface 20a, a lead frame 4 to which the first principal surface electrode 20S of the power semiconductor element 20 is connected, a substrate unit 3 to which the element back surface 20b of the power semiconductor element 20 is fixed, and a cooler 30 attached to the substrate unit 3 to release heat contained in the substrate unit 3. The lead frame 4 is thermally connected to the substrate unit 3.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present disclosure relates to a semiconductor module. [Background technology]

[0002] In recent years, attention has been focused on so-called power functional elements that handle large currents of electricity. Power functional elements generate a large amount of heat due to the magnitude of the current they handle. Therefore, discharging the generated heat from the power functional elements is an important issue when handling power functional elements.

[0003] Patent Documents 1, 2, and 3 disclose techniques for cooling power functional elements. Patent Document 1 discloses a semiconductor device with high heat dissipation. The semiconductor device of Patent Document 1 has a lead frame connected to a semiconductor element. The lead frame is connected to another cooler that is electrically insulated from each other. Patent Document 2 discloses a semiconductor device with high reliability that can withstand high temperatures. The semiconductor device of Patent Document 2 has a lead frame connected to an electrode of a semiconductor element. The lead frame is in contact with a coating that covers the circuit surface. Patent Document 3 also discloses a semiconductor device. The semiconductor device of Patent Document 3 has a bus bar connected to a semiconductor element. One end of the bus bar is connected to a connection terminal of the semiconductor element, and the other end of the bus bar is connected to a metal layer provided on a substrate. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2013-214549 A [Patent Document 2] JP 2015-115382 A [Patent Document 3] International Publication No. 2017 / 017901 Summary of the Invention [Problem to be solved by the invention]

[0005] A plurality of power functional elements constitute a so-called semiconductor module. While there is a demand for improved output of the semiconductor module, there is also a demand for a simplified configuration.

[0006] The present disclosure describes a semiconductor module that can achieve a desired cooling capacity with a simple configuration. [Means for solving the problem]

[0007] The semiconductor module of the present disclosure comprises a functional element unit having at least one functional element having a main surface on which at least one main surface electrode is provided and a back surface opposite to the main surface, a lead frame to which the main surface electrode of the functional element is connected, a substrate unit to which the back surface of the functional element is fixed, and a heat dissipation unit attached to the substrate unit and dissipating heat generated by the substrate unit, and the lead frame is thermally connected to the substrate unit.

[0008] In this semiconductor module, heat generated by the functional element is released from the heat dissipation unit via the substrate unit connected to the rear surface of the functional element. Furthermore, the lead frame connected to the main surface electrode of the functional element is thermally connected to the substrate unit. Therefore, the heat generated by the functional element is transferred to the substrate unit via the lead frame, and is further released from the heat dissipation unit connected to the substrate unit. Therefore, the heat generated by the functional element is discharged by one heat dissipation unit, so that the desired cooling capacity can be achieved with a simple configuration.

[0009] The semiconductor module may further include a heat transfer plate that thermally connects the lead frame and the substrate unit to each other. With this configuration, the lead frame can be thermally connected to the substrate unit via the heat transfer plate.

[0010] In the semiconductor module, the substrate unit may have an insulating layer, an element pad provided on a main surface of the insulating layer and connected to a rear surface of the functional element, and a heat transfer pad provided on the main surface of the insulating layer and connected to a heat transfer stand, the heat transfer pad being electrically insulated from the element pad. With this configuration, a desired electric circuit can be formed by the functional element.

[0011] In the above semiconductor module, the functional element unit may have a first functional element and a second functional element, and the substrate unit may have an insulating layer, a first element pad provided on a main surface of the insulating layer and connected to a back surface of the first functional element, a second element pad provided on the main surface of the insulating layer and connected to a back surface of the second functional element, and a heat transfer pad provided on the main surface of the insulating layer and connected to a heat transfer stand, the heat transfer pad being electrically insulated from the first element pad and the heat transfer pad being electrically conductive to the second element pad. With this configuration, a desired electric circuit can be formed by the first functional element and the second functional element.

[0012] In the semiconductor module, the substrate unit may have an insulating layer, a heat transfer pad provided on a main surface of the insulating layer and connected to a heat transfer stand, a metal layer disposed on a rear surface of the insulating layer, and a via penetrating the insulating layer and connecting the heat transfer pad to the metal layer. With this configuration, it is possible to promote heat transfer from the heat transfer pad to the metal layer.

[0013] In the semiconductor module, the substrate unit may further include a metal layer provided on a rear surface of the insulating layer, whereby the heat dissipation properties of the substrate unit can be improved.

[0014] In the semiconductor module, the substrate unit may further include a metal layer provided on a rear surface of the insulating layer and a heat spreader provided on the rear surface of the metal layer, and a heat dissipation unit may be connected to the heat spreader. With this configuration, the heat dissipation performance of the substrate unit can be further improved.

[0015] In the semiconductor module, the substrate unit may have an insulating layer and a lead frame pad provided on a main surface of the insulating layer and connected to the lead frame, and the lead frame may include an element connection portion connected to the main surface electrode of the functional element and a substrate connection portion connected to the lead frame pad. With this configuration, the lead frame can be thermally connected to the substrate unit with a simple structure. Effect of the Invention

[0016] The semiconductor module of the present disclosure can achieve a desired cooling capacity with a simple configuration. [Brief description of the drawings]

[0017] [Figure 1] FIG. 1 is a cross-sectional perspective view showing the structure of a semiconductor module according to a first embodiment. [Diagram 2] FIG. 2 is a plan view of the semiconductor module of the first embodiment. [Diagram 3] FIG. 3 is a sectional perspective view showing a first modified example of the semiconductor module of the first embodiment. [Figure 4] FIG. 4 is a sectional perspective view showing a second modified example of the semiconductor module of the first embodiment. [Diagram 5] FIG. 5 is a sectional perspective view showing a third modified example of the semiconductor module of the first embodiment. [Figure 6] FIG. 6 is a sectional perspective view showing a fourth modified example of the semiconductor module of the first embodiment. [Figure 7] FIG. 7 is a sectional perspective view showing a fifth modified example of the semiconductor module of the first embodiment. [Figure 8] FIG. 8 is a sectional perspective view showing a sixth modified example of the semiconductor module of the first embodiment. [Figure 9] FIG. 9 is a perspective view showing the structure of the semiconductor module of the second embodiment. [Figure 10] FIG. 10 is a circuit diagram showing a circuit configured in the semiconductor module of the second embodiment. [Figure 11]FIG. 11 is a perspective view showing the structure of a semiconductor module according to the third embodiment. [Figure 12] FIG. 12 is a circuit diagram showing a circuit configured in the semiconductor module of the third embodiment. [Figure 13] FIG. 13 is a cross-sectional perspective view showing the structure of a semiconductor module according to the fourth embodiment. [Figure 14] FIG. 14 is a circuit diagram showing a circuit configured in the semiconductor module of the fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0018] Hereinafter, a semiconductor module according to the present disclosure will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are given the same reference numerals, and duplicated description will be omitted.

[0019] [First embodiment] The semiconductor module 1 shown in Fig. 1 is, for example, a component of an inverter that provides three-phase AC power to a motor. The semiconductor module 1 has a power semiconductor element 20 such as a MOSFET. Although Fig. 1 illustrates a functional element unit 2A configured with one power semiconductor element 20, the functional element unit 2A may be configured with a plurality of power semiconductor elements 20.

[0020] The semiconductor module 1 has a power semiconductor element 20, a board unit 3, a lead frame 4, and a cooler 30. The power semiconductor elements 20 are arranged on a board main surface 3a of the board unit 3 so as to configure an electric circuit that performs a desired function. The power semiconductor elements 20 are connected to each other by a wiring pattern provided on the board main surface 3a. The power semiconductor elements 20 are also connected to each other by the lead frame 4. Heat generated by the power semiconductor elements 20 is transferred to the board unit 3. The heat transferred to the board unit 3 is released to the outside by the cooler 30.

[0021] [Functional elements] The power semiconductor element 20 receives an external electric signal and performs a desired electric function. Examples of the power semiconductor element 20 include a transistor and a diode. The power semiconductor element 20 shown in FIG. 1 is a so-called MOSFET, which is a combination of a field effect transistor and a metal oxide semiconductor. The MOSFET controls the current flowing between the source and drain by controlling the voltage between the gate and source. In other words, the MOSFET is a switching element. The MOSFET has a gate, a source, and a drain as input / output terminals for an external electric signal.

[0022] The power semiconductor element 20 has an element principal surface 20a and an element rear surface 20b. A first principal surface electrode 20S functioning as, for example, a source is provided on the element principal surface 20a. A rear surface electrode 20D functioning as, for example, a drain is provided on the element rear surface 20b. A lead frame 4 is connected to the first principal surface electrode 20S. The rear surface electrode 20D is connected to the substrate unit 3.

[0023] [Board unit] The board unit 3 has a board main surface 3a. A plurality of wiring patterns, pads, lands, etc. are provided on this board main surface 3a. These are connected by a plurality of power semiconductor elements 20, a plurality of lead frames 4, and a plurality of bonding wires to configure an electric circuit that exhibits a desired function.

[0024] The substrate unit 3 has a metal layer 31 and an insulating layer 32. The metal layer 31 is a base material of the substrate unit 3. By using the metal layer 31 as the base material of the substrate unit 3, the heat dissipation of the substrate unit 3 can be improved. The metal layer 31 may be, for example, a copper plate or an aluminum plate. An insulating layer 32 is provided on a main surface 31a of the metal layer 31. That is, a back surface 32b of the insulating layer 32 is in contact with the main surface 31a of the metal layer 31. The main surface 32a of the insulating layer 32 is the aforementioned substrate main surface 3a. The material constituting the insulating layer 32 may be, for example, silicon nitride, aluminum nitride, resin, or the like.

[0025] Several metal layers are provided on the substrate main surface 3a. Fig. 1 illustrates one element pad 91 and two heat transfer pads 90F, 90S. These are each made of copper or aluminum or the like. In the example of Fig. 1, the two heat transfer pads 90F, 90S are disposed on both sides of the element pad 91.

[0026] The back electrode 20D of the power semiconductor element 20 is connected to the element pad 91. The heat transfer pads 90F and 90S are connected to the heat transfer standing plates 50F and 50S, which will be described later, respectively. A gap is provided between the element pad 91 and the heat transfer pads 90F and 90S. In other words, the element pad 91 is not electrically connected to the heat transfer pads 90F and 90S. In other words, the element pad 91 is electrically insulated from the heat transfer pads 90F and 90S.

[0027] The board unit 3 may further have a heat spreader 36. A main surface 36a of the heat spreader 36 is in contact with the back surface 31b of the metal layer 31. The back surface 36b of the heat spreader 36 is in contact with the cooler 30. The heat spreader 36 helps transfer of heat from the metal layer 31 to the cooler 30. The back surface 36b of the heat spreader 36 is the above-mentioned board back surface 3b.

[0028] [Cooler] The cooler 30 dissipates heat generated by the power semiconductor element 20. FIG. 1 illustrates a heat sink having a plurality of fins as an example of the cooler 30. The cooler 30 may be another device having a heat dissipation function. The cooler 30 may be a water-cooled device. The main surface 5a of the cooler 30 is in contact with the back surface 36b of the heat spreader 36. In the semiconductor module 1 of the present disclosure, the cooler 30 is provided only on the back surface 3b side of the board unit 3.

[0029] [Lead frame] The lead frame 4 is connected to the first principal surface electrode 20S of the power semiconductor element 20. The power semiconductor element 20 receives an electric signal from the outside via the lead frame 4. The outer shape of the lead frame 4 is a thin plate. The cross-sectional shape of the lead frame 4 is rectangular. The cross-sectional shape of the lead frame 4 has a large width relative to its thickness. Therefore, the lead frame 4 has a large cross-sectional area compared to so-called bonding wires, which are thin metal wires. Therefore, it is possible to supply a large current to the first principal surface electrode 20S. The lead frame 4 has an element connection portion 4c that contacts the power semiconductor element 20. The lead frame 4 further has a portion that contacts another functional element, etc., not shown.

[0030] FIG. 2 is an enlarged plan view showing the first principal surface electrode 20S and the element connection portion 4c of the lead frame 4. The connection configuration shown in FIG. 2 may be adopted as necessary. Specifically, the power semiconductor element 20 includes a first principal surface electrode 20S (source) exposed on the element principal surface 20a and a second principal surface electrode 20G (gate). The first principal surface electrode 20S includes a connection region 20S1 that overlaps with the lead frame 4 and is connected to the lead frame 4. Furthermore, the first principal surface electrode 20S includes non-connection regions 20S2 and 20S3 that do not overlap with the lead frame 4 and are not connected to the lead frame 4. A main current does not pass through these non-connection regions 20S2 and 20S3. The second principal surface electrode 20G is disposed between the non-connection regions 20S2 and 20S3. Here, a so-called Kelvin terminal 20K may be connected to at least one of the non-connection regions 20S2 and 20S3. This configuration can suppress the influence of the main current on the gate signal applied to the second principal surface electrode 20G (gate), thereby ensuring heat dissipation and improving noise resistance.

[0031] Referring again to FIG. 1, the lead frame 4 is in contact with the power semiconductor element 20, and therefore receives heat generated by the power semiconductor element 20. For example, the lead frame 4 may be connected to a power semiconductor element 20 other than the power semiconductor element 20 shown in the figure. However, since the other power semiconductor element 20 is also a heat source, heat does not move from the lead frame 4 to the other power semiconductor element 20 through the part in contact with the other power semiconductor element 20. If the heat that has moved to the lead frame 4 does not move from the lead frame 4 to another member, the heat continues to remain in the lead frame 4. As a result, the temperature of the lead frame 4 rises. When the temperature of the lead frame 4 rises and the temperature of the lead frame 4 becomes equal to the temperature of the power semiconductor element 20, the transfer of heat from the power semiconductor element 20 to the lead frame 4 stops. This is because the transfer of heat is caused by a temperature difference. When this state is reached, the heat generated by the power semiconductor element 20 moves only from the back electrode 20D. This may result in the heat generated by the power semiconductor element 20 not being sufficiently discharged.

[0032] Therefore, in order to continue to maintain the heat dissipation through the lead frame 4, a mechanism for actively transferring heat from the lead frame 4 is provided. In the example of FIG. 1, the lead frame 4 is connected to the board unit 3 by heat transfer standing plates 50F, 50S. The heat transfer standing plates 50F, 50S have the function of transferring the heat of the lead frame 4 to the board unit 3. As a result, the heat of the lead frame 4 can be sufficiently dissipated, and the temperature rise of the lead frame 4 can be suppressed. Therefore, a desired temperature difference between the lead frame 4 and the power semiconductor element 20 is also ensured, and the heat dissipation of the power semiconductor element 20 through the first main surface electrode 20S can be maintained.

[0033] The heat transfer vertical plates 50F, 50S are made of a material that easily transfers heat. For example, the materials constituting the heat transfer vertical plates 50F, 50S can be copper, aluminum, graphite, and the like. The heat transfer vertical plates 50F, 50S have a vertical plate upper end surface 50a (first end) that contacts the lead frame 4 and a vertical plate lower end surface 50b (second end) that contacts the board unit 3. More specifically, the vertical plate upper end surface 50a contacts the back surface 4b of the lead frame 4. More specifically, the vertical plate upper end surface 50a contacts the upper end connection portion 4d on the back surface 4b of the lead frame 4. From the viewpoint of ensuring heat transfer, when the vertical plate upper end surface 50a is made of a metal material such as copper or aluminum, the vertical plate upper end surface 50a may be fixed to the lead frame 4 by solder or the like. The vertical plate lower end surface 50b contacts the heat transfer pads 90F, 90S of the board unit 3. More specifically, the lower end surface 50b of the vertical plate is in contact with the main surfaces 90a of the heat transfer pads 90F and 90S. Similarly, the lower end surface 50b of the vertical plate may be fixed to the lead frame 4 by soldering or the like.

[0034] As described above, the heat transfer pads 90F, 90S to which the lower end faces 50b of the heat transfer vertical plates 50F, 50S are fixed are electrically insulated from the element pad 91. Therefore, the electric potential of the heat transfer vertical plates 50F, 50S made of a metal material is the same as the electric potential of the lead frame 4 but is different from the electric potential of the element pad 91.

[0035] In the example of FIG. 1, the heat transfer vertical plates 50F, 50S are shaped like a wall. With the wall-shaped shape, it is also possible to make the side surface 50c of the heat transfer vertical plates 50F, 50S function as a heat dissipation surface. The shape of the heat transfer vertical plates 50F, 50S is not limited to a wall shape. For example, a shape such as a rectangular column or a cylinder may be adopted. Also, in FIG. 1, an example is shown in which two heat transfer vertical plates 50F, 50S are connected to one lead frame 4. Only one heat transfer vertical plate may be connected to one lead frame 4. With this configuration, the mechanical constraint points of the lead frame 4 are reduced. As a result, it is possible to suppress the application of unnecessary stress to the lead frame 4 due to thermal deformation of each element constituting the semiconductor module 1.

[0036] [Effects] The semiconductor module 1 of the first embodiment includes a functional element unit 2A having a power semiconductor element 20 having an element main surface 20a on which a first main surface electrode 20S is provided and an element back surface 20b on the opposite side to the element main surface 20a, a lead frame 4 to which the first main surface electrode 20S of the power semiconductor element 20 is connected, a substrate unit 3 to which the element back surface 20b of the power semiconductor element 20 is fixed, and a cooler 30 attached to the substrate unit 3 to release heat contained in the substrate unit 3. The lead frame 4 is thermally connected to the substrate unit 3.

[0037] In this semiconductor module 1, heat generated by the power semiconductor element 20 is released from the cooler 30 via the board unit 3 fixed to the element back surface 20b of the power semiconductor element 20. Furthermore, the lead frame 4 connected to the first main surface electrode 20S of the power semiconductor element 20 is thermally connected to the board unit 3. Therefore, the heat generated by the power semiconductor element 20 is transferred to the board unit 3 via the lead frame 4, and is further released from the cooler 30 connected to the board unit 3. Therefore, since the heat generated by the power semiconductor element 20 is discharged by one cooler 30, a desired cooling capacity can be achieved with a simple configuration.

[0038] The semiconductor module 1 further includes heat transfer plates 50F, 50S that thermally connect the lead frame 4 to the board unit 3. According to this configuration, the lead frame 4 can be thermally connected to the board unit 3 via the heat transfer plates 50F, 50S.

[0039] The substrate unit 3 has an insulating layer 32, an element pad 91 provided on the main surface 32a of the insulating layer 32 and connected to the back electrode 20D of the power semiconductor element 20, and heat transfer pads 90F, 90S provided on the main surface 32a of the insulating layer 32 and connected to the lower end surfaces 50b of the heat transfer standing plates 50F, 50S. The heat transfer pads 90F, 90S are electrically insulated from the element pad 91. With this configuration, a desired electric circuit can be formed by the power semiconductor element 20.

[0040] The board unit 3 further includes a metal layer 31 provided on the rear surface 32b of the insulating layer 32. With this configuration, the heat dissipation property of the board unit 3 can be improved.

[0041] The board unit 3 further includes a metal layer 31 provided on the back surface 32b of the insulating layer 32, and a heat spreader 36 provided on the back surface 31b of the metal layer 31. The cooler 30 is connected to the heat spreader 36. With this configuration, the heat dissipation performance of the board unit 3 can be further improved.

[0042] Below, some modified examples of the first embodiment will be described.

[0043] [Modification 1 of the first embodiment] The semiconductor module 1B of the first modified example shown in FIG. 3 has a lead frame 4B having a shape different from that of the lead frame 4 of the semiconductor module 1 of the first embodiment. An element connection portion 4c and a pad connection portion 4p are set on a back surface 4b of the lead frame 4B. The element connection portion 4c is in contact with a first main surface electrode 20S of the power semiconductor element 20. The pad connection portion 4p is in contact with heat transfer pads 90F and 90S, respectively. In the example of FIG. 3, both ends of the lead frame 4B are pad connection portions 4p.

[0044] The position of the element main surface 20a of the power semiconductor element 20 that is in contact with the element connection portion 4c is different from the position of the pad main surface 90a of the heat transfer pads 90F, 90S that is in contact with the pad connection portion 4p. More specifically, the position of the element main surface 20a is higher than the position of the pad main surface 90a by the height of the power semiconductor element 20. That is, the position of the element connection portion 4c is higher than the position of the pad connection portion 4p. Therefore, bent portions 4f, 4g, 4h, and 4i are formed between the element connection portion 4c and the pad connection portion 4p. For example, the lead frame 4B of the first modification can be obtained by bending the plate-shaped lead frame 4 exemplified in the first embodiment.

[0045] Furthermore, the area where the pad connection part 4p and the heat transfer pads 90F, 90S are in contact with each other may be covered with a resin material. With this configuration, the pad connection part 4p is less likely to peel off from the heat transfer pads 90F, 90S. Therefore, the desired heat dissipation performance can be maintained.

[0046] According to the lead frame 4B of the first modification, the lead frame 4B is in direct contact with the heat transfer pads 90F, 90S. This configuration can reduce the number of connection interfaces present in the heat path from the lead frame 4B to the board unit 3. As a result, the heat dissipation performance can be further improved.

[0047] In the first modification, the lead frame 4 is directly connected to the heat transfer pads 90F, 90S. For example, short heat transfer vertical plates 50F, 50S may be sandwiched between the pad connection parts 4p and the heat transfer pads 90F, 90S. With this configuration, the height of the heat transfer vertical plates 50F, 50S can be reduced, thereby improving heat dissipation.

[0048] [Effects] In the semiconductor module 1B of the first modification, the substrate unit 3 has an insulating layer 32 and heat transfer pads 90F, 90S provided on the main surface 32a of the insulating layer 32 and connected to a lead frame 4B. The lead frame 4B includes an element connection portion 4c connected to the first main surface electrode 20S of the power semiconductor element 20 and a pad connection portion 4p connected to the heat transfer pads 90F, 90S. This configuration allows the lead frame 4A to be thermally connected to the substrate unit 3A with a simple structure.

[0049] [Modification 2 of the First Embodiment] The configuration in which the lead frame 4B is directly connected to the substrate unit 3 as in the first modification can also be realized by a lead frame 4C included in a semiconductor module 1C of a second modification shown in FIG.

[0050] The lead frame 4C of the second modification is obtained by cutting off a part of a lead frame that is originally a thick plate. The lead frame 4C includes a frame flat portion 41 including an element connection portion 4c, and frame upright portions 42, 43 including a pad connection portion 4p. The frame upright portions 42, 43 protrude from a back surface 41b of the frame flat portion 41 toward the board unit 3. The back surfaces of the frame upright portions 42, 43 are the pad connection portions 4p. As in the first modification, the area where the pad connection portion 4p and the frame upright portions 42, 43 contact each other may be covered with a resin material.

[0051] The lead frame 4C of the second modification also directly contacts the heat transfer pads 90F, 90S. This reduces the number of connection interfaces in the heat path from the lead frame 4C to the board unit 3. As a result, the heat dissipation performance can be further improved.

[0052] [Third Modification of the First Embodiment] 5, the semiconductor module 1D of the third modification has a heat conductive plate 45 attached to the lead frame 4. The semiconductor module 1D of the third modification is different from the semiconductor module 1 of the first embodiment only in that it has the heat conductive plate 45, and other configurations are the same as those of the semiconductor module 1 of the first embodiment.

[0053] The heat conductive plate 45 is attached to the main surface 4a of the lead frame 4. An example of the heat conductive plate 45 is a heat dissipation sheet. The width of the heat conductive plate 45 is approximately the same as the width of the lead frame 4. The heat conductive plate 45 is attached at least to a position corresponding to the element connection portion 4c of the lead frame 4. In addition, the heat conductive plate 45 is also attached to positions corresponding to the upper end connection portions 4d and 4e of the lead frame 4.

[0054] The semiconductor module 1D of the third modification also allows sufficient heat dissipation from the power semiconductor elements 20.

[0055] In the above-mentioned modified examples 1 to 3, several lead frames 4B, 4C, and 4D are exemplified. In the modified examples 4 to 6, several board units 3E, 3F, and 3G are exemplified.

[0056] [Fourth Modification of the First Embodiment] The semiconductor module 1E of the fourth modification shown in FIG. 6 has a board unit 3E. The board unit 3E is obtained by omitting the heat spreader 36 from the board unit 3 of the first embodiment. That is, even if the board unit 3E is directly connected to the cooler 30, the heat spreader 36 may be omitted if the desired heat transfer can be ensured. That is, the board unit 3E has a metal layer 31, an insulating layer 32, an element pad 91, and heat transfer pads 90F and 90S. According to this configuration, the back surface 3b of the board unit 3E that does not have the heat spreader 36 is directly connected to the cooler 30. More specifically, the back surface 31b of the metal layer 31, which is the back surface 3b of the board unit 3E, is directly connected to the main surface of the cooler 30. This configuration also allows the desired heat dissipation performance to be obtained.

[0057] [Fifth Modification of the First Embodiment] A semiconductor module 1F of Modification 5 shown in Fig. 7 has a board unit 3F. The board unit 3F is obtained by omitting the metal layer 31 and the heat spreader 36 from the board unit 3 of the first embodiment. In the board unit 3F shown in Fig. 7 that does not have the metal layer 31, the insulating layer 32 is the base material of the board unit 3. In this case, the back surface 32b of the insulating layer 32 is the above-mentioned board back surface 3b. With this configuration as well, it is possible to obtain the desired heat dissipation performance.

[0058] [Sixth Modification of the First Embodiment] A semiconductor module 1G of the sixth modified example shown in FIG. 8 has a board unit 3G. The board unit 3G of the sixth modified example differs from the board unit 3 of the first embodiment in that it has heat dissipation vias 37, 38. The metal heat dissipation vias 37, 38 connect the heat transfer pads 90F, 90S to the metal layer 31. The insulating layer 32 is provided with through holes 32h1, 32h2 extending from the main surface 32a to the back surface 32b. The heat dissipation vias 37, 38 are formed in these through holes 32h1, 32h2. The heat dissipation vias 37, 38 are mechanically and electrically connected to the heat transfer pads 90F, 90S. Similarly, the heat dissipation vias 37, 38 are also mechanically and electrically connected to the metal layer 31.

[0059] The lead frame 4 needs to be electrically insulated from the cooler 30. Therefore, when the heat dissipation vias 37, 38 are used, for example, the heat transfer standing plates 50F, 50S made of an insulating material are used. Alternatively, the heat dissipation sheet 46 having electrical insulation provided between the metal layer 31 and the cooler 30 is used. Either one of the heat transfer standing plates 50F, 50S made of an insulating material and the heat dissipation sheet 46 having electrical insulation may be used, or both may be used.

[0060] [Effects] In the semiconductor module 1G of the sixth modification, the substrate unit 3G has an insulating layer 32, heat transfer pads 90F, 90S provided on the main surface of the insulating layer 32 and connected to the lower end surfaces 50b of the heat transfer standing plates 50F, 50S, a metal layer 31 disposed on the back surface 32b side of the insulating layer 32, and heat dissipation vias 37, 38 penetrating the insulating layer 32 and connecting the heat transfer pads 90F, 90S to the metal layer 31. This configuration can promote heat transfer from the heat transfer pads 90F, 90S to the metal layer 31.

[0061] [Second embodiment] Fig. 9 shows a semiconductor module 1H of the second embodiment. A functional element unit 6H of the semiconductor module 1H of the second embodiment has a MOSFET 61 which is a power semiconductor element as a first functional element, and further has a diode 62 which is a passive component as a second functional element. According to the semiconductor module 1H of Fig. 9, an electric circuit shown in the circuit diagram of Fig. 10 is realized. According to the circuit shown in Fig. 10, the source of the MOSFET 61 and the anode of the diode 62 are connected, and the drain of the MOSFET 61 and the anode of the diode 62 are connected.

[0062] The semiconductor module 1H includes a board unit 3H. The basic configuration of the board unit 3H of the second embodiment is the same as that of the board unit 3 of the first embodiment. The board unit 3H of the second embodiment differs from the board unit 3 of the first embodiment in the configuration of an element pad 91H.

[0063] A MOSFET 61 (first functional element) and a diode 62 (second functional element) are disposed on the element pad 91H. The second functional element is not limited to the diode 62. The second functional element may be a resistor element, a capacitor, or the like. A back electrode 61D (drain) of the MOSFET 61 is connected to the element pad 91H. Furthermore, a back electrode 62K (cathode) of the diode 62 is connected to the element pad 91H. From an electrical standpoint, the element pad 91H connects the drain of the MOSFET 61 to the cathode of the diode 62. As in the first embodiment, the element pad 91H is electrically insulated from the heat transfer pad 90F.

[0064] The lead frame 4H includes element connection portions 4c, 4j and an upper end connection portion 4d. The lead frame 4 is connected to a main surface electrode 61S (source) of the MOSFET 61 and a main surface electrode 62A (anode) of the diode 62. From an electrical standpoint, the lead frame 4G connects the source of the MOSFET 61 to the anode of the diode 62.

[0065] [Effects] Even with this configuration, the heat generated by the MOSFET 61 and the diode 62 moves from the respective back electrodes 61D, 62K to the board unit 3G, and also moves to the board unit 3G via the lead frame 4G and the heat transfer stand 51. As a result, it is possible to obtain the desired heat dissipation performance.

[0066] [Third embodiment] 11 shows a semiconductor module 1J of the third embodiment. A functional element unit 7J of the semiconductor module 1J of the third embodiment has a first MOSFET 71 which is a power semiconductor element as a first functional element, and a second MOSFET 72 which is a power semiconductor element as a second functional element. Furthermore, a substrate unit 3J of the semiconductor module 1J has a first element pad 91, a second element pad 92, and a heat transfer pad 90F. The semiconductor module 1J also has a first lead frame 4J1, a second lead frame 4J2, a first heat transfer standing plate 50F, and a second heat transfer standing plate 50T.

[0067] Note that the second functional element may be a power semiconductor element other than a MOSFET, for example, an IGBT (insulated gate bipolar transistor).

[0068] Fig. 12 is a circuit diagram showing a part of a power conversion circuit configured by a semiconductor module 1J. The circuit 10J shown in Fig. 12 is a so-called half-bridge circuit. There is no particular limitation on the type of the power conversion circuit configured by the semiconductor module 1J of the present disclosure. Examples of the power conversion circuit include a two-level inverter, a two-level converter, a multilevel inverter, a multilevel converter, and a DC / DC converter.

[0069] A circuit 10J constituted by the semiconductor module 1J corresponds to a so-called one leg of a power conversion circuit. The circuit 10J has a first terminal P10a, a second terminal P10b, and an output terminal P10s. A drain of the first MOSFET 71 is connected to the output terminal P10s and the second MOSFET 72. A source of the first MOSFET 71 is connected to the second terminal P10b. A source of the second MOSFET 72 is connected to the output terminal P10s and the first MOSFET 71. A drain of the second MOSFET 72 is connected to the first terminal P10a. The operation of the circuit 10J is controlled by a voltage signal provided to the gate of the first MOSFET 71 and the gate of the second MOSFET 72.

[0070] As shown in FIG. 11, the main surface electrode 71S (source) of the first MOSFET 71 is connected to the first lead frame 4J1 (second terminal P10b). The back surface electrode 71D (drain) of the first MOSFET 71 is connected to the element pad portion 91a of the first element pad 91 (output terminal P10s). The second heat transfer standing plate 50T is connected to the element pad portion 91b of the first element pad 91. The second heat transfer standing plate 50T is made of a metal material and has electrical conductivity. The standing plate upper end surface 50a of the second heat transfer standing plate 50T is connected to the second lead frame 4J2. The second lead frame 4J2 is further connected to the main surface electrode 72S (source) of the second MOSFET 72. The back surface electrode 72D (drain) of the second MOSFET 72 is connected to the second element pad 92 (first terminal P10a). The second element pad 92 is electrically insulated from the first element pad 91. Similarly, the heat transfer pad 90 is electrically insulated from the first element pad 91 and is also electrically insulated from the second element pad 92 .

[0071] According to the semiconductor module 1J of the third embodiment, heat generated by the first MOSFET 71 moves to the board unit 3J via the first element pad 91, and also moves to the board unit 3J via the first lead frame 4J1, the first heat transfer standing plate 50F, and the heat transfer pad 90. Furthermore, heat generated by the second MOSFET 72 moves to the board unit 3J via the second element pad 92, and also moves to the board unit 3J via the second lead frame 4J2, the second heat transfer standing plate 50T, and the first element pad 91. As a result, desired heat dissipation performance can be obtained.

[0072] In other words, in the third embodiment, the second heat transfer plate 50T not only functions as a thermal path to transfer heat from the second lead frame 4J2 to the first element pad 91, but also functions as part of the current path that constitutes the circuit 10J shown in FIG.

[0073] Furthermore, in the third embodiment, the first element pad 91 not only functions as a thermal path for transferring the heat of the first MOSFET 71 to the substrate unit 3J, but also functions as a thermal path for transferring the heat of the second MOSFET 72 to the substrate unit 3J.

[0074] [Effects] In the semiconductor module 1J of the third embodiment, the functional element unit 7J has a first MOSFET 71 and a second MOSFET 72. The substrate unit 3J has an insulating layer 32, an element pad portion 91a provided on the main surface 32a of the insulating layer 32 and connected to the back electrode 71D of the first MOSFET 71, an element pad 92 provided on the main surface 32a of the insulating layer 32 and connected to the back electrode 72D of the second MOSFET 72, and an element pad portion 91b provided on the main surface 32a of the insulating layer 32 and connected to the lower end surface 50b of the heat transfer standing plate 50F. The heat transfer pad 90F is electrically insulated from the element pad portions 91a and 91b. The element pad portions 91a and 91b are different portions of the common element pad 91, and are therefore electrically conductive. With this configuration, a desired electric circuit can be formed by the first MOSFET 71 and the second MOSFET 72.

[0075] [Fourth embodiment] The semiconductor module 1K shown in Fig. 13 can also be configured as a more complicated circuit 11K as shown in the circuit diagram of Fig. 14. The circuit 11K shown in Fig. 14 is a part of a three-level inverter circuit of a neutral point clamp type (NPC type).

[0076] The circuit 11K has a first terminal P11a, a neutral terminal P11c, a second terminal P11b, and an output terminal P11s. The circuit 11K further has first to sixth MOSFETs 81 to 86. The drain of the first MOSFET 81 is connected to the first terminal P11a. The source of the first MOSFET 81 is connected to the drain of the second MOSFET 82 and the drain of the third MOSFET 83. The source of the second MOSFET 82 is connected to the neutral terminal P11c and the drain of the fifth MOSFET 85. The source of the third MOSFET 83 is connected to the output terminal P11s and the drain of the sixth MOSFET 86. The source of the fourth MOSFET 84 is connected to the second terminal P11b. The drain of the fourth MOSFET 84 is connected to the source of the fifth MOSFET 85 and the source of the sixth MOSFET 86.

[0077] 13 and 14, the semiconductor module 1K includes first to sixth MOSFETs 81 to 86, first to fifth lead frames 4K1 to 4K5, first to fifth heat transfer standing plates 51 to 55, and a substrate unit 3K. The substrate unit 3K includes first to fifth element pads 91 to 95. Note that, regarding the semiconductor module 1K of the fourth embodiment, a description of the configuration common to the semiconductor module 1K of the first embodiment will be omitted.

[0078] A back surface electrode (drain) of the first MOSFET 81 is connected to the first element pad 91. An end of the first element pad 91 constitutes a first terminal P11a. A first main surface electrode (source) of the first MOSFET 81 is connected to the first lead frame 4K1. An upper end of the first heat transfer standing plate 51 is connected to an end of the first lead frame 4K1. A lower end of the first heat transfer standing plate 51 is connected to the second element pad 92. A back surface electrode (drain) of the second MOSFET 82 and a back surface electrode (drain) of the third MOSFET 83 are connected to the second element pad 92.

[0079] A first main surface electrode of the second MOSFET 82 is connected to the second lead frame 4K2. An upper end of the second heat transfer vertical plate 52 is connected to the second lead frame 4K2. A lower end of the second heat transfer vertical plate 52 is connected to the third element pad 93. A back surface electrode of the fifth MOSFET 85 is connected to the third element pad 93. The third element pad 93 constitutes the neutral terminal P11c.

[0080] A first main surface electrode of the third MOSFET 83 is connected to the third lead frame 4K3. An upper end of the third heat transfer standing plate 53 is connected to the third lead frame 4K3. A lower end of the third heat transfer standing plate 53 is connected to a fourth element pad 94. A back surface electrode of the sixth MOSFET 86 is connected to the fourth element pad 94. The fourth element pad 94 constitutes an output terminal P11s.

[0081] A fourth lead frame 4K4 is connected to a first main surface electrode of the fifth MOSFET 85 and a first main surface electrode of the sixth MOSFET 86. An upper end of a fourth heat transfer standing plate 54 is connected to an end of the fourth lead frame 4. A lower end of the fourth heat transfer standing plate 54 is connected to a fifth element pad 95. The fifth element pad 95 is connected to a back surface electrode of the fourth MOSFET 84. A fifth lead frame 4K5 is connected to a first main surface electrode of the fourth MOSFET 84. The fifth lead frame 4K5 constitutes a second terminal P11b.

[0082] According to the semiconductor module 1K of the fourth embodiment, heat generated by the first MOSFET 81 moves to the substrate unit 3K via the first element pad 91, and also moves to the substrate unit 3K via the first lead frame 4K1, the first heat transfer vertical plate 51, and the second element pad 92.

[0083] The heat generated by the second MOSFET 82 is transferred via the second element pad 92 to the board unit 3K, and also via the second lead frame 4K2, the second heat transfer vertical plate 52 and the third element pad 93 to the board unit 3K.

[0084] The heat generated by the third MOSFET 83 moves via the second element pad 92 to the board unit 3K, and also moves via the third lead frame 4K3, the third heat transfer standing plate 53 and the fourth element pad 94 to the board unit 3K.

[0085] The heat generated by the fourth MOSFET 84 is transferred via the fifth element pad 95 to the board unit 3K, and also via the fifth heat transfer standing plate 55 and the heat transfer pad 96 to the board unit 3K.

[0086] The heat generated by the fifth MOSFET 85 moves via the third element pad 93 to the board unit 3K, and also moves via the fourth lead frame 4K4, the fourth heat transfer vertical plate, and the fifth element pad 95 to the board unit 3K.

[0087] The heat generated by the sixth MOSFET 86 moves via the fourth element pad 94 to the board unit 3K, and also moves via the fourth lead frame 4K4, the fourth heat transfer vertical plate, and the fifth element pad 95 to the board unit 3K.

[0088] The above-mentioned heat transfer path makes it possible to obtain a desired heat dissipation performance.

[0089] That is, in the fourth embodiment, the first heat-transfer vertical plate 51 not only functions as a heat path for transferring heat from the first lead frame 4K1 to the second element pad 92, but also functions as part of the current path constituting the circuit 11K shown in Fig. 14. Similarly, the second to fourth heat-transfer vertical plates 52 to 54 not only function as a heat path, but also function as part of the current path constituting the circuit 11K shown in Fig. 14.

[0090] Furthermore, in the third embodiment, the second element pad 92 not only functions as a thermal path for transferring the heat of the first MOSFET 81 to the substrate unit 3K, but also functions as a thermal path for transferring the heat of the second MOSFET 82 to the substrate unit 3K.

[0091] [Variations] The semiconductor module of the present disclosure has been described above by way of example. The semiconductor module of the present disclosure is not limited to the above example and may be embodied in various forms.

[0092] In the embodiment, the power semiconductor element 20 having the first principal surface electrode 20S and the back surface electrode 20D is exemplified as the functional element. The structure having the first principal surface electrode 20S and the back surface electrode 20D is called a vertical structure. For example, the functional element may be an element having a structure called a horizontal structure different from the vertical structure. The functional element having a horizontal structure has two electrodes on the element principal surface 20a. For example, the element principal surface 20a of the functional element having a horizontal structure is provided with a source electrode and a drain electrode. The element rear surface 20b of the functional element having a horizontal structure is not provided with an electrode. Even if the element rear surface 20b without an electrode is connected to the substrate unit 3 in this way, a heat path that transfers the functional element to the substrate unit 3 is formed. Therefore, a heat path including the element principal surface 20a of the functional element and a heat path including the element rear surface 20b of the functional element are formed, so that a desired cooling capacity can be obtained by a simple configuration.

[0093] The present disclosure includes the following configurations.

[0094] The present disclosure provides a functional element unit including: [1] "a functional element unit having at least one functional element having a principal surface on which at least one principal surface electrode is provided and a back surface opposite to the principal surface; a lead frame to which the main surface electrodes of the functional element are connected; a substrate unit to which the rear surface of the functional element is fixed; a heat dissipation unit attached to the board unit and configured to dissipate heat generated by the board unit; The lead frame is thermally connected to the substrate unit, forming a semiconductor module.

[0095] The present disclosure is [2] "the semiconductor module described in [1] above, further comprising a heat transfer stand plate that thermally connects the lead frame and the substrate unit to each other."

[0096] The present disclosure states, [3] "The substrate unit is An insulating layer; an element pad provided on a main surface of the insulating layer and connected to the rear surface of the functional element; a heat transfer pad provided on a main surface of the insulating layer and connected to the heat transfer stand; The semiconductor module according to the above-mentioned [2], wherein the heat transfer pad is electrically insulated from the element pad.

[0097] The present disclosure provides, [4] "the functional element unit has a first functional element and a second functional element, The substrate unit includes: An insulating layer; a first element pad provided on a main surface of the insulating layer and connected to the back surface of the first functional element; a second element pad provided on a main surface of the insulating layer and connected to the back surface of the second functional element; a heat transfer pad provided on a main surface of the insulating layer and connected to the heat transfer stand; the heat transfer pad is electrically insulated from the first element pad; The semiconductor module according to the above-mentioned [1] or [3], wherein the heat transfer pad is electrically conductive to the second element pad."

[0098] The present disclosure states, [5] "The substrate unit is An insulating layer; a heat transfer pad provided on a main surface of the insulating layer and connected to the heat transfer stand; a metal layer disposed on a rear surface side of the insulating layer; and a via that penetrates the insulating layer and connects the heat transfer pad to the metal layer.

[0099] The present disclosure relates to a semiconductor module according to any one of the above [1] to [5], wherein the substrate unit further has a metal layer provided on a rear surface of the insulating layer.

[0100] The present disclosure further provides, [7] "the substrate unit further includes a metal layer provided on a rear surface of the insulating layer, and a heat spreader provided on the rear surface of the metal layer, The semiconductor module according to any one of the above [1] to [6], wherein the heat spreader is connected to the heat dissipation unit."

[0101] The present disclosure states, [8] "The substrate unit is An insulating layer; a lead frame pad provided on a main surface of the insulating layer and connected to the lead frame; The semiconductor module according to any one of the above [1], [5] to [7], wherein the lead frame includes an element connection portion connected to the main surface electrode of the functional element, and a substrate connection portion connected to the lead frame pad. [Explanation of symbols]

[0102] 1,1B,1C,1D,1E,1F,1G,1H,1J,1K Semiconductor Module 2A, 6H, 7J Functional element unit 3,3A,3E,3F,3G,3H,3J,3K,4E,4F board unit 3b,4b,31b,32b,36b,41b Back side 4,4A,4B,4C,4G,4H Lead frame 4a,5a,31a,32a,36a,90a Main surface 4c, 4j Element connection part 20D Back electrode 31 Metal layer 32 Insulating layer 36 Heat spreader 50F, 50S, 51 Heat transfer stand 61D, 71D, 72D Back electrode (drain) 61S, 71S, 72S Main surface electrode (source) 62A Main electrode (anode) 62K Rear electrode (cathode) 90,90F,90S,96 Heat transfer pad 91, 91H, 92 Element pad

Claims

1. a functional element unit including at least one functional element having a principal surface on which at least one principal surface electrode is provided and a back surface opposite to the principal surface; a lead frame to which the main surface electrodes of the functional element are connected; a substrate unit to which the rear surface of the functional element is fixed; a heat dissipation unit attached to the board unit and configured to dissipate heat generated by the board unit; The lead frame is thermally connected to the substrate unit.

2. 2. The semiconductor module according to claim 1, further comprising a heat transfer stand that thermally connects said lead frame and said substrate unit to each other.

3. The substrate unit includes: An insulating layer; an element pad provided on a main surface of the insulating layer and connected to the rear surface of the functional element; a heat transfer pad provided on a main surface of the insulating layer and connected to the heat transfer stand; The semiconductor module according to claim 2 , wherein the heat transfer pad is electrically insulated from the element pad.

4. the functional element unit includes a first functional element and a second functional element, The substrate unit includes: An insulating layer; a first element pad provided on a main surface of the insulating layer and connected to the back surface of the first functional element; a second element pad provided on a main surface of the insulating layer and connected to the back surface of the second functional element; a heat transfer pad provided on a main surface of the insulating layer and connected to the heat transfer stand; the heat transfer pad is electrically insulated from the first element pad; The semiconductor module according to claim 2 , wherein the heat transfer pad is electrically connected to the second element pad.

5. The substrate unit includes: An insulating layer; a heat transfer pad provided on a main surface of the insulating layer and connected to the heat transfer stand; a metal layer disposed on a rear surface side of the insulating layer; 3. The semiconductor module of claim 2, further comprising: a via extending through the insulating layer and connecting the thermal pad to the metal layer.

6. The semiconductor module according to claim 3 , wherein the substrate unit further comprises a metal layer provided on a rear surface of the insulating layer.

7. The substrate unit further includes a metal layer provided on a rear surface of the insulating layer, and a heat spreader provided on the rear surface of the metal layer, The semiconductor module according to claim 3 , wherein the heat spreader is connected to the heat dissipation unit.

8. The substrate unit includes: An insulating layer; a lead frame pad provided on a main surface of the insulating layer and connected to the lead frame; 2. The semiconductor module according to claim 1, wherein the lead frame includes an element connection portion connected to the main surface electrode of the functional element, and a substrate connection portion connected to the lead frame pad.

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