Semiconductor device

Abstract

To provide a semiconductor device whose characteristics can be improved.SOLUTION: In an embodiment, a semiconductor device includes a first electrode, a first conductive member, a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type. The first semiconductor region is provided between the first electrode and the first conductive member. The first semiconductor region includes first to third partial regions. The first semiconductor region and the first conductive member are subjected to Schottky junction. The second semiconductor region includes a plurality of first parts extending in a first direction, a plurality of second parts extending in a second direction, and a third part. The third part is provided around the second parts and continues to the second parts. The first partial region is provided between the first electrode and the first parts and between the first electrode and the second partial region. The second partial region is provided between one of the plurality of first parts and another one of the plurality of first parts.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] FIELD An embodiment of the present invention relates to a semiconductor device. [Background technology]

[0002] For example, in semiconductor devices such as junction barrier Schottky diodes (JBS), it is desirable to improve the characteristics. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 7098906 Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiment provides a semiconductor device capable of improving characteristics. [Means for solving the problem]

[0005] According to an embodiment, a semiconductor device includes a first electrode, a first conductive member, a first semiconductor region of a first conductivity type, and a second semiconductor region of a second conductivity type. The first semiconductor region is provided between the first electrode and the first conductive member. The first semiconductor region includes a first partial region, a second partial region, and a third partial region. The first semiconductor region and the first conductive member form a Schottky junction. The second semiconductor region includes a plurality of first portions extending along a first direction, a plurality of second portions extending along a second direction, and a third portion. The first direction intersects with a third direction from the first electrode to the first conductive member. The second direction intersects with a first plane including the first direction and the third direction. The third portion is provided around the plurality of second portions in a second plane including the first direction and the second direction. The third portion is continuous with the plurality of second portions. The first partial region is provided between the first electrode and the multiple first portions and between the first electrode and the second partial region in the third direction. The second partial region is provided between one of the multiple first portions and another of the multiple first portions in the second direction. The third partial region is provided between the multiple first portions and the first conductive member and between the second partial region and the first conductive member in the third direction. The third partial region is provided between one of the multiple second portions and another of the multiple second portions in the first direction. [Brief description of the drawings]

[0006] [Figure 1] 1(a) to 1(c) are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. [Diagram 2] 2(a) to 2(c) are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. [Diagram 3] 3A and 3B are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. [Figure 4] 4(a) to 4(c) are schematic cross-sectional views illustrating the semiconductor device according to the second embodiment. [Diagram 5]5(a) to 5(c) are schematic cross-sectional views illustrating the semiconductor device according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, embodiments of the present invention will be described with reference to the drawings. The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between parts, etc. are not necessarily the same as those in reality. Even when the same part is shown, the dimensions and ratios of each part may be different depending on the drawing. In this specification and each drawing, elements similar to those described above with reference to the previous drawings are given the same reference numerals and detailed descriptions thereof will be omitted as appropriate.

[0008] (First embodiment) 1(a) to 1(c), 2(a) to 2(c), 3(a), and 3(b) are schematic cross-sectional views illustrating the semiconductor device according to the first embodiment. Figures 1(a) to 1(c) are cross-sectional views taken along lines A1-A2, A3-A4, and A5-A6 in Figures 3(a) and 3(b), and Figures 2(a) to 2(c) are cross-sectional views taken along lines B1-B2, B3-B4, and B5-B6 in Figures 3(a) and 3(b).

[0009] As shown in FIGS. 1(a) to 1(c) and 2(a) to 2(c), a semiconductor device 110 according to the embodiment includes a first electrode 51, a first conductive member 61, a first semiconductor region 10, and a second semiconductor region 20.

[0010] The first semiconductor region 10 is provided between the first electrode 51 and the first conductive member 61. The first semiconductor region 10 is of a first conductivity type. The first semiconductor region 10 includes a first partial region 11, a second partial region 12, and a third partial region 13. The first semiconductor region 10 and the first conductive member 61 form a Schottky junction.

[0011] The second semiconductor region 20 is of a second conductivity type. The first conductivity type is one of n-type and p-type. The second conductivity type is the other of n-type and p-type. In the following, the first conductivity type is n-type and the second conductivity type is p-type.

[0012] 3(a), the second semiconductor region 20 includes a plurality of first portions 21, a plurality of second portions 22, and a third portion 23. The plurality of first portions 21 extend along a first direction D1. The plurality of second portions 22 extend along a second direction D2. The first direction D1 intersects with a third direction D3 from the first electrode 51 to the first conductive member 61. The second direction D2 intersects with a first plane including the first direction D1 and the third direction D3.

[0013] The first direction D1 is, for example, the X-axis direction. A direction perpendicular to the X-axis direction is the Y-axis direction. A direction perpendicular to the X-axis direction and the Y-axis direction is the Z-axis direction. The third direction D3 is, for example, the Z-axis direction. In one example, the second direction D2 may be the Y-axis direction. The second direction D2 may be inclined with respect to the first direction D1. The first plane corresponds to, for example, the XZ plane.

[0014] For example, the multiple first portions 21 are aligned along the second direction D2. The multiple second portions 22 are aligned along the first direction D1. For example, the multiple second portions 22 contact the multiple first portions 21. The boundary between the multiple second portions 22 and the multiple first portions 21 may be clear or unclear.

[0015] Fig. 3(a) is a cross-sectional view in an XY plane including the multiple second portions 22. As shown in Fig. 3(a), the third portion 23 is provided around the multiple second portions 22 in a second plane including a first direction D1 and a second direction D2. The second plane corresponds to, for example, the XY plane. The third portion 23 is continuous with the multiple second portions 22. For example, the third portion 23 surrounds the multiple second portions 22 in the second plane (XY plane). The third portion 23 is, for example, an outer periphery annular pin structure.

[0016] The inside of the region surrounded by the third portion 23 is, for example, a cell region. The outside of the third portion 23 is, for example, a peripheral region.

[0017] The third portion 23 may be provided around the plurality of first portions 21 in the second plane. The third portion 23 may be continuous with the plurality of first portions 21.

[0018] 1(a) and 1(b), the first partial region 11 is provided between the first electrode 51 and the multiple first portions 21 and between the first electrode 51 and the second partial region 12 in the third direction D3. The first partial region 11 is provided between the first electrode 51 and the second partial region 12 in the third direction D3.

[0019] 2(a) and 2(b), the second partial region 12 is provided in the second direction D2 between one of the multiple first portions 21 and another of the multiple first portions 21. The third partial region 13 is provided between the multiple first portions 21 and the first conductive member 61, and between the second partial region 12 and the first conductive member 61, in the third direction D3.

[0020] As shown in FIGS. 1(a) and 1(b), the third partial region 13 is provided between one of the multiple second portions 22 and another of the multiple second portions 22 in the first direction D1.

[0021] 1(c) and 2(c), the semiconductor device 110 may further include a second electrode 52. The second electrode 52 is electrically connected to the first conductive member 61. In this example, the first conductive member 61 is provided between at least a portion of the second semiconductor region 20 and at least a portion of the second electrode 52.

[0022] In the semiconductor device 110, the characteristics of a current flowing between the first electrode 51 and the second electrode 52 change depending on the polarity of the relative potentials of the first electrode 51 and the second electrode 52. The semiconductor device 110 is, for example, a diode. A state in which the potential of the second electrode 52 is higher than the potential of the first electrode 51 is a forward state. A state in which the potential of the second electrode 52 is lower than the potential of the first electrode 51 is a reverse bias state.

[0023] In the semiconductor device 110, the first semiconductor region 10 and the first conductive member 61 form a Schottky junction. Furthermore, in the semiconductor device 110, a second semiconductor region 20 of a second conductivity type is provided. The semiconductor device 110 is, for example, a JBS. The first partial region 11 corresponds to, for example, an n-type drift layer.

[0024] In the first reference example, a plurality of p-type regions extending along one direction are provided in the JBS. In the first reference example, when a reverse bias voltage is applied, a depletion layer is formed in a region including the p-type region and the n-type drift layer. The depletion layer covers the Schottky junction, which can reduce, for example, a leakage current. In the first reference example, if the area or density of the p-region is increased to suppress the leakage current, the area of ​​the Schottky junction is reduced. As a result, the forward voltage increases, and the advantage as a Schottky barrier diode is lost.

[0025] In the semiconductor device 110, a plurality of first portions 21 extending along a first direction D1 and a plurality of second portions 22 extending along a second direction D2 are provided. The plurality of first portions 21 are provided at positions away from the first conductive member 61. A third partial region 13 of a first conductivity type (n-type) is present between the plurality of first portions 21 and the first conductive member 61. In the semiconductor device 110, for example, a depletion layer is effectively formed over a wide area when a reverse bias voltage is applied by the plurality of first portions 21 and the plurality of second portions 22. This suppresses leakage current. In the semiconductor device 110, the third partial region 13 forms a Schottky junction with the first conductive member 61. This maintains a wide area of ​​the Schottky junction. This allows a sufficiently low forward voltage to be obtained.

[0026] In the embodiment, the third portion 23 is provided around the multiple second portions 22 in the second plane (XY plane). The third portion 23 is continuous with the multiple second portions 22. By providing such a third portion 23, it becomes easy to improve the surge resistance. According to the embodiment, in addition to a small leakage current and a low forward current, a large surge resistance can be obtained. According to the embodiment, it is possible to provide a semiconductor device with improved characteristics.

[0027] For example, a second reference example is possible in which the third portion 23 (peripheral annular pin structure) is not provided. In the embodiment, the peripheral annular pin structure can improve the surge resistance compared to the second reference example.

[0028] As shown in FIG. 1(c) and FIG. 2(c), the semiconductor device 110 may further include a third semiconductor region 30. The third semiconductor region 30 is of the second conductivity type. The impurity concentration of the second conductivity type in the third semiconductor region 30 is higher than the impurity concentration of the second conductivity type in the second semiconductor region 20. The third semiconductor region 30 is, for example, p + The second semiconductor region 20 is, for example, a p-type region.

[0029] The third semiconductor region 30 includes a peripheral region 30p. The peripheral region 30p is provided between the third portion 23 and the first conductive member 61 in the third direction D3. In this example, the semiconductor device 110 further includes a compound member 65. The compound member 65 includes a peripheral member 65p. The peripheral member 65p is provided between the peripheral region 30p and the first conductive member 61 in the third direction D3. The first conductive member 61 includes a first metal element. The compound member 65 includes the first metal element and silicon. The first metal element is, for example, Ni. In this case, the compound member 65 includes Ni silicide.

[0030] Such peripheral region 30p and peripheral member 65p provide good ohmic contact. As a result, for example, when a reverse bias is applied to the diode, holes in the second semiconductor region 20 can be efficiently discharged to the first conductive member 61 (Schottky electrode). For example, a depletion layer is generated at high speed around the second semiconductor region 20. As a result, recovery characteristics can be improved. For example, the reverse recovery time can be shortened. For example, the reverse recovery current can be reduced.

[0031] 1(c) and 1(c), the second semiconductor region 20 may further include a fourth portion 24. At least a part of the fourth portion 24 is provided between one of the multiple second portions 22 and another of the multiple second portions 22 in the first direction D1. The third semiconductor region 30 further includes an inner region 30i. The inner region 30i is provided between the fourth portion 24 and the first conductive member 61 in the third direction D3. The compound member 65 further includes an inner member 65i. The inner member 65i is provided between the inner region 30i and the first conductive member 61 in the third direction D3.

[0032] The first semiconductor region 10, the second semiconductor region 20, and the third semiconductor region 30 can improve the breakdown voltage of the chip. For example, in the pin structure (dot portion and outermost periphery), the breakdown voltage is lower than the breakdown voltage of the Schottky interface (interface between the first conductive member and the third partial region). For example, when a reverse bias surge is applied, the pin structure breaks down first, and a current flows through the pin structure first. This can prevent breakdown caused by application of a high electric field to the Schottky interface.

[0033] FIG. 3(b) illustrates a cross section in the XY plane including the third semiconductor region 30. Meanwhile, as already described, FIG. 3(a) illustrates a cross section in the XY plane including a plurality of second portions 22. As shown in FIG. 3(a), for example, the third portion 23 may include a first extension portion 23a, a second extension portion 23b, a third extension portion 23c, and a fourth extension portion 23d. The first extension portion 23a extends along the second direction D2. The second extension portion 23b extends along the second direction D2. The third extension portion 23c extends along the first direction D1. The fourth extension portion 23d extends along the first direction D1. The direction from the second extension portion 23b to the first extension portion 23a is along the first direction D1. The direction from the third extension portion 23c to the fourth extension portion 23d is along the second direction D2. These multiple extension portions may be continuous with each other.

[0034] As shown in Fig. 1(a), the thickness of one of the multiple first portions 21 in the third direction D3 is defined as a first thickness t21. As shown in Fig. 1(b), the thickness of one of the multiple second portions 22 in the third direction D3 is defined as a second thickness t22. In one example, the first thickness t21 may be 0.5 µm or more and 1.5 µm or less. The second thickness t22 may be, for example, 0.5 µm or more and 1.5 µm or less.

[0035] In the embodiment, for example, the first semiconductor region 10 and the second semiconductor region 20 include SiC. The first semiconductor region 10 and the second semiconductor region 20 may include at least one selected from the group consisting of 4H—SiC, 6H—SiC, and 3C—SiC. These semiconductor regions include crystals.

[0036] For example, the first semiconductor region 10 includes at least one element (a first element that is an impurity of a first conductivity type) selected from the group consisting of N, P, and As. For example, the second semiconductor region 20 includes at least one element (a second element that is an impurity of a second conductivity type) selected from the group consisting of B, Al, and Ga.

[0037] As shown in FIGS. 1(a) to 1(c) and 2(a) to 2(c), the semiconductor device 110 may further include a fourth semiconductor region 40. The fourth semiconductor region 40 is of a first conductivity type. The fourth semiconductor region 40 is provided between a first electrode 51 and the first semiconductor region 10. The impurity concentration of the first conductivity type in the fourth semiconductor region 40 is higher than the impurity concentration of the first conductivity type in the first semiconductor region 10. A low electrical resistance is obtained between the first electrode 51 and the first semiconductor region 10.

[0038] In one example, the concentration of the first element (n-type) in the first semiconductor region 10 is, for example, 1.0×10 15 cm -3 Above 1.0×10 17 cm -3 In one example, the concentration of the second element (p-type) in the second semiconductor region 20 is, for example, 1.0×10 12 cm -3 Above 1.0×10 14 cm -3 In one example, the concentration of the second element (p-type) in the third semiconductor region 30 is, for example, 1.0×10 12 cm -3 Above 1.0×10 14 cm -3 In one example, the concentration of the first element (n-type) in the fourth semiconductor region 40 is, for example, 0.5×10 18 cm -3 More than 0.5×10 19 cm -3 The following is the result.

[0039] The first conductive member 61 contains at least one (for example, a first metal element) selected from the group consisting of Pt, V, and Ti. A Schottky junction can be stably obtained.

[0040] The first electrode 51 includes at least one selected from the group consisting of, for example, Ti, Ni, and Au. The second electrode 52 includes, for example, Al.

[0041] In the above-described semiconductor device 110, the third portion 23 overlaps with the multiple first portions 21 in the XY plane. The multiple first portions 21 are continuous with the third portion 23.

[0042] Second embodiment 4(a) to 4(c) and 5(a) to 5(c) are schematic cross-sectional views illustrating the semiconductor device according to the second embodiment. Figures 4(a) to 4(c) are cross-sectional views corresponding to lines A1-A2, A3-A4, and A5-A6 in Figures 3(a) and 3(b), and Figures 5(a) to 5(c) are cross-sectional views corresponding to lines B1-B2, B3-B4, and B5-B6 in Figures 3(a) and 3(b).

[0043] Like the semiconductor device 111, at least a part of the third portion 23 does not have to overlap with the multiple first portions 21 in the XY plane. A small leakage current and a low forward voltage can also be obtained in such a semiconductor device 111. According to the embodiment, a semiconductor device with improved characteristics can be provided.

[0044] In an embodiment, information regarding the length and thickness is obtained by observation using an electron microscope, etc. Information regarding the composition of the material is obtained by secondary ion mass spectrometry (SIMS) or energy dispersive X-ray spectroscopy (EDX), etc.

[0045] The embodiments may include the following technical solutions. (Technical proposal 1) A first electrode; A first conductive member; a first semiconductor region of a first conductivity type provided between the first electrode and the first conductive member, the first semiconductor region including a first partial region, a second partial region, and a third partial region, the first semiconductor region and the first conductive member forming a Schottky junction; a second semiconductor region of a second conductivity type, the second semiconductor region including a plurality of first portions extending along a first direction, a plurality of second portions extending along a second direction, and a third portion, the first direction intersecting with a third direction from the first electrode to the first conductive member, the second direction intersecting with a first plane including the first direction and the third direction, the third portion being provided around the plurality of second portions in a second plane including the first direction and the second direction, the third portion being continuous with the plurality of second portions, and the first portion region being adjacent to a front end of the first portion in the third direction; the second semiconductor region being provided between the first electrode and the first portions and between the first electrode and the second portion region, the second portion region being provided between one of the first portions and another of the first portions in the second direction, the third portion region being provided between the first portions and the first conductive member and between the second portion region and the first conductive member in the third direction, the third portion region being provided between one of the second portions and another of the second portions in the first direction; A semiconductor device comprising:

[0046] (Technical proposal 2) A semiconductor device as described in Technical Proposal 1, wherein the third portion is continuous with the multiple first portions.

[0047] (Technical proposal 3) The semiconductor device described in Technical Proposal 1 or 2, wherein the third portion surrounds the multiple second portions in the second plane.

[0048] (Technical proposal 4) The third portion is a first extension portion extending along the second direction; A second extension portion extending along the second direction; a third extension portion extending along the first direction; a fourth extension portion extending along the first direction; Including, a direction from the second extension portion to the first extension portion is along the first direction, The semiconductor device according to any one of Technical Solutions 1 to 3, wherein a direction from the third extension portion to the fourth extension portion is along the second direction.

[0049] (Technical proposal 5) Further comprising a third semiconductor region of the second conductivity type; the third semiconductor region includes a peripheral region; the peripheral region is provided between the third portion and the first conductive member in the third direction, The semiconductor device according to any one of Technical Solutions 1 to 4, wherein a concentration of the second conductive type impurity in the third semiconductor region is higher than a concentration of the second conductive type impurity in the second semiconductor region.

[0050] (Technical proposal 6) Further comprising a compound member, The compound member includes a peripheral member, the peripheral member is provided between the peripheral region and the first conductive member in the third direction, the first conductive member includes a first metal element; The semiconductor device according to Technical Proposal 5, wherein the compound member contains the first metal element and silicon.

[0051] (Technical proposal 7) the second semiconductor region further includes a fourth portion; At least a portion of the fourth portion is provided between the one of the plurality of second portions and the other one of the plurality of second portions in the first direction; the third semiconductor region further includes an inner region; the inner region is provided between the fourth portion and the first conductive member in the third direction, The compound member further includes an inner member; The semiconductor device described in Technical Proposal 6, wherein the inner member is provided between the inner region and the first conductive member in the third direction.

[0052] (Technical proposal 8) The semiconductor device according to any one of Technical Solutions 1 to 7, wherein the first conductive member includes at least one selected from the group consisting of Pt, V, and Ti.

[0053] (Technical proposal 9) The semiconductor device according to any one of Technical Solutions 1 to 8, wherein the second portions are in contact with the first portions.

[0054] (Technical proposal 10) The semiconductor device according to any one of Technical Solutions 1 to 9, wherein the first thickness in the third direction of the one of the plurality of first portions is not less than 0.5 μm and not more than 1.5 μm.

[0055] (Technical proposal 11) The semiconductor device described in Technical Proposal 10, wherein the second thickness in the third direction of one of the plurality of second portions is not less than 0.5 μm and not more than 1.5 μm.

[0056] (Technical proposal 12) The semiconductor device according to any one of Technical Solutions 1 to 11, wherein the first semiconductor region and the second semiconductor region contain SiC.

[0057] (Technical proposal 13) The semiconductor device according to any one of Technical Proposals 1 to 11, wherein the first semiconductor region and the second semiconductor region include at least one selected from the group consisting of 4H—SiC, 6H—SiC, and 3C—SiC.

[0058] (Technical proposal 14) The first semiconductor region includes at least one selected from the group consisting of N, P, and As, The semiconductor device according to any one of Technical Solutions 1 to 13, wherein the second semiconductor region includes at least one selected from the group consisting of B, Al, and Ga.

[0059] (Technical proposal 15) The semiconductor device according to any one of Technical Solutions 1 to 14, wherein the first partial region is provided between the first electrode and the second partial region in the third direction.

[0060] (Technical proposal 16) The plurality of first portions are aligned along the second direction, The semiconductor device according to any one of Technical Solutions 1 to 15, wherein the plurality of second portions are aligned along the first direction.

[0061] (Technical proposal 17) The semiconductor device according to any one of Technical Solutions 1 to 16, further comprising a second electrode electrically connected to the first conductive member.

[0062] (Technical proposal 18) The semiconductor device described in Technical Proposal 17, wherein the second electrode contains Al.

[0063] (Technical proposal 19) The semiconductor device according to Technical Proposal 17 or 18, wherein the first conductive member is provided between at least a portion of the second semiconductor region and at least a portion of the second electrode.

[0064] (Technical proposal 20) Further comprising a fourth semiconductor region of the first conductivity type; the fourth semiconductor region is provided between the first electrode and the first semiconductor region, 20. The semiconductor device according to any one of Technical Solutions 1 to 19, wherein a concentration of the first conductive type impurity in the fourth semiconductor region is higher than a concentration of the first conductive type impurity in the first semiconductor region.

[0065] According to the embodiment, a semiconductor device with improved characteristics can be provided.

[0066] The above describes the embodiments of the present invention with reference to specific examples. However, the present invention is not limited to these specific examples. For example, the specific configurations of the elements such as the semiconductor region, conductive member, and electrode included in the semiconductor device are included in the scope of the present invention as long as a person skilled in the art can implement the present invention in a similar manner and obtain the same effects by appropriately selecting them from the known range.

[0067] Furthermore, any combination of two or more elements of each of the specific examples, within the scope of technical feasibility, is also included within the scope of the present invention as long as it includes the gist of the present invention.

[0068] In addition, all semiconductor devices that can be implemented by those skilled in the art by appropriately modifying the design based on the semiconductor device described above as an embodiment of the present invention also belong to the scope of the present invention as long as they include the gist of the present invention.

[0069] In addition, within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications and alterations, and it will be understood that these modifications and alterations also fall within the scope of the present invention.

[0070] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0071] 10: first semiconductor region, 11-13: first to third partial regions, 20: second semiconductor region, 21-24: first to fourth portions, 23a-23d: first to fourth extending portions, 30: third semiconductor region, 30i: inner region, 30p: peripheral region, 40: fourth semiconductor region, 51, 52: first and second electrodes, 61: first conductive member, 65: compound member, 65i: inner member, 65p: peripheral member, 110, 111: semiconductor device, D1-D3: first to third directions, t21, t22: first and second thicknesses

Claims

1. A first electrode; A first conductive member; a first semiconductor region of a first conductivity type provided between the first electrode and the first conductive member, the first semiconductor region including a first partial region, a second partial region, and a third partial region, the first semiconductor region and the first conductive member forming a Schottky junction; a second semiconductor region of a second conductivity type, the second semiconductor region including a plurality of first portions extending along a first direction, a plurality of second portions extending along a second direction, and a third portion, the first direction intersecting with a third direction from the first electrode to the first conductive member, the second direction intersecting with a first plane including the first direction and the third direction, the third portion being provided around the plurality of second portions in a second plane including the first direction and the second direction, the third portion being continuous with the plurality of second portions, and the first portion region being adjacent to the front in the third direction; the second semiconductor region being provided between the first electrode and the first portions and between the first electrode and the second portion region, the second portion region being provided between one of the first portions and another of the first portions in the second direction, the third portion region being provided between the first portions and the first conductive member and between the second portion region and the first conductive member in the third direction, the third portion region being provided between one of the second portions and another of the second portions in the first direction; A semiconductor device comprising:

2. The semiconductor device according to claim 1 , wherein the third portion is continuous with the plurality of first portions.

3. A third semiconductor region of the second conductivity type is further provided. the third semiconductor region includes a peripheral region, the peripheral region is provided between the third portion and the first conductive member in the third direction, 3 . The semiconductor device according to claim 1 , wherein a concentration of the impurity of the second conductivity type in the third semiconductor region is higher than a concentration of the impurity of the second conductivity type in the second semiconductor region.

4. Further comprising a compound member, The compound member includes a peripheral member, the peripheral member is provided between the peripheral region and the first conductive member in the third direction, the first conductive member includes a first metal element; The semiconductor device according to claim 3 , wherein the compound member contains the first metallic element and silicon.

5. the second semiconductor region further includes a fourth portion, At least a portion of the fourth portion is provided between the one of the plurality of second portions and the other one of the plurality of second portions in the first direction, The third semiconductor region further includes an inner region, the inner region is provided between the fourth portion and the first conductive member in the third direction, The compound member further includes an inner member; The semiconductor device according to claim 4 , wherein the inner member is provided between the inner region and the first conductive member in the third direction.

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