Semiconductor device

Abstract

To provide an active matrix display device which makes it possible to connect wiring, an electrode, or the like made of two incompatible films (an ITO film and an aluminum film) without increasing cross-sectional area of the wiring and to achieve lower power consumption even when screen size becomes larger.SOLUTION: The present invention provides a two-layer structure including an upper layer and a lower layer that has larger width than the upper layer. A first conductive layer made of Ti or Mo is disposed, and a second conductive layer made of simple aluminum (pure aluminum) having low electric resistance is disposed over the first conductive layer. A part of the lower layer projected from an end section of the upper layer is bonded with ITO.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device having a circuit configured with thin film transistors (hereinafter referred to as TFTs). The present invention relates to a device and a method for manufacturing the same, for example, an electro-optical device such as a liquid crystal display panel, The present invention relates to an electronic device that incorporates a light-emitting display device having a light-emitting element as a component.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This term refers to devices in general, and electro-optical devices, semiconductor circuits, and electronic equipment are all classified as semiconductor devices. [Background technology]

[0003] In recent years, semiconductor thin films (thickness of several to several hundred nm) formed on substrates with insulating surfaces have been used. The technology of constructing thin film transistors (TFTs) has been attracting attention. It is widely used in electronic devices such as ICs and electro-optical devices, especially in switches for image display devices. Development of this technology as a photonics element is being rushed.

[0004] Conventionally, in active matrix type liquid crystal display devices driven by TFT, A large number of scan lines and data lines are provided vertically and horizontally, and a large number of T Each TFT is electrically connected to a gate line and a data line. A source electrode is electrically connected to the pixel electrode, and a drain electrode is electrically connected to the pixel electrode.

[0005] In transmissive LCD devices, the pixel electrodes are made of ITO, which is both light-transmitting and conductive. This is commonly used. The pixel electrodes are insulated from the metal wiring such as the data lines and scanning lines. It is insulated by a layer of material, and contact holes are formed at specific locations in this insulating film. The pixel electrodes and the metal wiring are in contact with each other via the vias.

[0006] In addition, the larger the display area, the more problematic the signal delay caused by wiring resistance becomes. Therefore, the shape of the wiring and electrodes must be significantly changed or they must be made of materials with low electrical resistance. It is necessary to use a material such as aluminum.

[0007] Aluminum is used as the material for wiring and electrodes, and I is used as the material for pixel electrodes. When TO comes into contact with aluminum, a reaction called galvanic corrosion occurs at the joint interface. When O comes into contact with the aluminum surface, it oxidizes and becomes electrically non-conductive. .

[0008] Therefore, when connecting wiring or electrodes made of two incompatible films, aluminum A high melting point metal film (such as titanium film) or a high melting point metal film (such as titanium film) is placed between the aluminum wiring (or electrode) and the ITO. We also propose a technology to prevent galvanic corrosion with ITO by forming a metal compound film (such as titanium nitride film) It has been done.

[0009] The applicant also tuned the connection between the drain of the thin film transistor and the ITO pixel electrode. The laminated film of the titanium film, the aluminum film, and the titanium film is described in Patent Documents 1 and 2. and US Pat. No. 5,399,633.

[0010] In addition, the applicants have connected the drain of the thin film transistor to the ITO pixel electrode. Patent Document 4 describes a laminated film of a titanium film and an aluminum film, and a titanium nitride film Patent Document 5 describes that the insulating film is made of a laminated film of an aluminum film.

[0011] The applicant also developed a method for forming a GOLD structure as a gate electrode of a thin film transistor. To this end, Patent Document 6 describes forming a gate electrode consisting of two layers with different widths. [Prior art documents] [Patent documents]

[0012] [Patent Document 1] Japanese Patent Application Publication No. 9-45927 [Patent Document 2] Japanese Patent Application Publication No. 10-32202 [Patent Document 3] Japanese Patent Application Publication No. 6-232129 [Patent Document 4] Patent Publication No. 2004-6974 [Patent Document 5] Japanese Patent Application Publication No. 8-330600 [Patent Document 6] Patent Publication No. 2001-281704 Summary of the Invention [Problem to be solved by the invention]

[0013] However, it is difficult to insert a titanium film or titanium nitride film between the aluminum wiring (or electrode) and the ITO. When multiple films are stacked, the wiring resistance increases, and power consumption increases, especially when the screen size becomes large. The wiring resistance increases as the cross-sectional area of ​​the metal film used for wiring increases. However, when the film thickness is increased to increase the cross-sectional area, the A step occurs between the film wiring surface, which causes poor alignment of the liquid crystal.

[0014] In addition, in an active matrix type light emitting device driven by a TFT, the positive electrode of the light emitting element A transparent conductive film may be used as the electrode (or cathode). The anode is formed on an interlayer insulating film that insulates the various wiring. Therefore, ITO is used as the anode. When connecting the TFT electrode (aluminum) using do.

[0015] The present invention provides an active matrix display device that increases the cross-sectional area of ​​wiring. It is not possible to connect wiring or electrodes made of two incompatible films (ITO film and aluminum film). Another object of the present invention is to realize low power consumption even when the screen is enlarged.

[0016] In addition, when TFTs are fabricated using aluminum as the wiring material, the heat treatment can cause heat generation. Formation of protrusions such as rocks and whiskers, and diffusion of aluminum atoms into the channel formation region This causes TFT malfunction and deterioration of TFT characteristics. An aluminum alloy film containing other elements (such as Si) is used to form hillocks. However, even when the aluminum alloy film is used, the aluminum alloy film does not have any effect on the bonding interface. The problem of change in junction resistance due to oxidation of the aluminum and reduction of the ITO film remains. .

[0017] In addition, the present invention relates to an active matrix display device using aluminum as a wiring material. Even if aluminum is used, the diffusion of aluminum atoms into the channel forming region is prevented, and The objective of the present invention is to enable a reliable ohmic junction. [Means for solving the problem]

[0018] In the present invention, the lower layer is made of a high melting point metal (Ti, Mo, etc.) or a nitrided high melting point metal (TiN, etc.). The first conductive layer is made of aluminum or an alloy containing aluminum. The second conductive layer is a two-layered electrode (or wiring). or wiring), the width (W1) of the first conductive layer is greater than the width (W2) of the second conductive layer. The cross-sectional shape is made wider. In other words, the end of the lower layer (first conductive layer) is wider than the end of the upper layer (second conductive layer). After fabricating the structure with the outermost layer, a transparent conductor is applied to cover the two-layered electrode (or wiring). A conductive film is formed.

[0019] In the present invention, the electrode (or wiring) made of two layers is exposed without overlapping with the second conductive layer. The first conductive layer and the transparent conductive film (typically ITO) are connected to each other, It is characterized by solving problems.

[0020] The configuration of the invention disclosed in this specification is as shown in FIG. 1(A) or FIG. 2(A). A plurality of thin film transistors having a semiconductor thin film and a transparent conductive film are provided on a substrate having an insulating surface. a semiconductor device having a film, The semiconductor device includes a first conductive layer in contact with the semiconductor thin film, and a second conductive layer in contact with the first conductive layer. The first conductive layer is laminated with a second conductive layer, and the first conductive layer is laminated with the second conductive layer. The first conductive layer has a large width (W1 or W3) from the end of the second conductive layer. The semiconductor device is characterized by having a transparent conductive film in contact with the extending portion.

[0021] In another aspect of the present invention, a plurality of thin films each having a semiconductor thin film are formed on a substrate having an insulating surface. A semiconductor device having a transistor and a transparent conductive film, An electrode including a first conductive layer in contact with the thin film and a second conductive layer in contact with the first conductive layer. or wiring, and the first conductive layer has a portion protruding from an end of the second conductive layer. a transparent conductive layer in contact with a portion of the first conductive layer protruding from an end of the second conductive layer; The semiconductor device is characterized by having a film.

[0022] In another aspect of the present invention, a plurality of thin films each having a semiconductor thin film are formed on a substrate having an insulating surface. A semiconductor device having a transistor and a transparent conductive film, An electrode including a first conductive layer in contact with the thin film and a second conductive layer in contact with the first conductive layer. The side surface of the first conductive layer is connected to the second conductive layer as shown in FIG. a taper angle smaller than a taper angle at a side surface of the first conductive layer; The semiconductor device is characterized in that it has a transparent conductive film in contact with the substrate.

[0023] Another embodiment of the present invention is a substrate having an insulating surface, as shown in FIG. A semiconductor device having a plurality of thin film transistors each having a semiconductor thin film and a transparent conductive film. The semiconductor device includes a first conductive layer in contact with the semiconductor thin film, and a second conductive layer on the first conductive layer. an electrode or wiring formed by laminating a second conductive layer thereon, and a planarizing insulating film formed on a portion of the electrode or wiring; and a transparent conductive film on the planarization insulating film. The electrode or wiring is in contact with the transparent conductive film through a contact hole, and In the semiconductor device, an end of the electrode or wiring is located in a hole. be.

[0024] In each of the above configurations, the surface of the second conductive layer is covered with an oxide film. It is considered one of the following.

[0025] The method for producing each of the above structures is also one aspect of the present invention. The end of the lower layer (first conductive layer) is connected to the upper layer (second conductive layer) by the following method using a wire. To realize a structure located outside the end.

[0026] In the first method, a mask is formed on a two-layer metal laminate film, and then a first dry A metal laminated film pattern having a width W1 and tapered ends is formed by etching. Then, a second dry etching process is performed to remove the upper layer of aluminum. The material alone is anisotropically etched to narrow the width of the upper layer to a width (W2) narrower than the width (W1) of the lower layer. As a result, an electrode (or wiring) is formed in which the lower layer is partially exposed and does not overlap with the upper layer. It is done.

[0027] In the second method, a mask is formed on a two-layer metal laminate film, and then etching is performed. The upper layer of aluminum-containing material is removed according to the mask pattern using a chant solution. At that time, the edge of the upper layer is recessed further back than the edge of the mask due to the wraparound of the etching. Then, the lower layer of the part not covered by the mask is removed by dry etching. As a result, electrodes (or wiring) are formed with the lower layer partially exposed and not overlapping with the upper layer. is formed.

[0028] In the third method, a mask is formed on a two-layer metal laminate film, and then a driver is A metal laminated film pattern is formed by etching. Only the upper layer of aluminum-containing material is processed according to the mask pattern to obtain the width of the upper layer. At that time, the edge of the upper layer is deeper than the edge of the mask due to the wraparound of the etching. As a result, the lower layer that does not overlap with the upper layer is partially exposed. is formed.

[0029] As a fourth method, after forming a first mask on a two-layer metal laminate film, , forming a metal laminate pattern by dry etching or wet etching process. After that, the first mask is removed, and then a second mask is formed, and a metal laminated film pattern is formed. The silicon substrate is processed according to a second mask pattern. At this time, the second mask pattern is As a result, the lower layer that does not overlap with the upper layer is partially exposed. The exposed electrodes (or wiring) are formed.

[0030] All of the above methods use a photomask and dry etching using a plasma device. Or, wet etching with an etchant solution is used to form wiring or electrode patterns. cormorant.

[0031] Then, a transparent conductive film is formed so as to contact and cover the electrode (or wiring) obtained by the above-mentioned method. As a result, the lower layer of the electrode (or wiring) and the transparent conductive film come into contact with each other, and this The part is electrically conductive.

[0032] A structure in which the end surface of the lower layer contacts the transparent conductive film has also been disclosed in the past. The present invention is mainly electrically connected to the transparent conductive film on the upper surface of the uppermost layer. In order to establish electrical continuity with the conductive film, the taper angle is intentionally smaller than that of the upper layer, or the upper By providing a protruding portion from the edge of the layer, the contact area between the lower layer and the transparent conductive film is secured, ensuring contact. It is meant to allow the user to

[0033] In the present invention, a transparent conductive film is provided between the upper layer made of an aluminum-containing material and the transparent conductive film. Since a thin oxide film is formed on the upper layer, the upper layer and the transparent conductive film are not directly connected, but are connected through the lower layer. Electrical conduction is achieved, which is also a major difference from conventional structures.

[0034] The light-emitting element emits luminescence (EL) when an electric field is applied. The device has a layer containing an organic compound from which an electroluminescent device (EL device) can be obtained (hereinafter referred to as an EL layer), an anode, and a cathode. Luminescence in organic compounds occurs when the compound returns from a singlet excited state to the ground state ( The light emitted when the compound returns from the triplet excited state to the ground state (phosphorescence) is called the "luminescence of the compound". The light-emitting device manufactured by the film forming apparatus and the film forming method can be applied to either type of light emission. It is possible.

[0035] In this specification, the first electrode refers to an electrode that serves as an anode or cathode of a light-emitting element. The light-emitting element includes a first electrode, a layer including an organic compound over the first electrode, and a light-emitting layer including the organic compound over the first electrode. The second electrode is formed on the layer containing an organic compound. The electrode formed on the substrate is called the first electrode.

[0036] The first electrodes may be arranged in a stripe pattern, a delta pattern, a mosaic pattern, etc. It can be done.

[0037] In this specification, the term "light-emitting device" refers to an image display device, a light-emitting device, or This refers to a light source (including lighting equipment). Also, a connector, such as an FPC (Flexible Print Circuit) is attached to the light emitting device. ted circuit) or TAB (Tape Automated Bonding) tape or TCP (Tape Carrier A module with a printed wiring board attached to the end of a TAB tape or TCP. The module or light emitting element has an IC (integrated circuit) attached to it using the COG (Chip On Glass) method. All directly mounted modules are also included in the light emitting device.

[0038] In addition, in the light emitting device of the present invention, the method of driving the screen display is not particularly limited. A sequential driving method, a line sequential driving method, a frame sequential driving method, or the like may be used. The next driving method may be a time division gray scale driving method or an area gray scale driving method. The video signal input to the source line of the optical device may be an analog signal or a digital signal. It is sufficient to design the driving circuit etc. appropriately in accordance with the video signal.

[0039] Furthermore, in a light emitting device in which the video signal is digital, the video signal input to the pixel is fixed. There are two types: constant voltage (CV) and constant current (CC). V) is divided into two types: one where the voltage applied to the light-emitting element is constant (CVCV) and the other where the voltage applied to the light-emitting element is constant (VCV). There are two types: CVCC, where the current is constant. There are also CC, where the video signal is a constant current. The voltage applied to the light-emitting element is constant (CCCV) and the current applied to the light-emitting element is constant (CCCV). There are those where the standard is fixed (CCCC).

[0040] In the light emitting device of the present invention, a protection circuit (such as a protection diode) for preventing electrostatic breakdown is provided. etc.) may be provided.

[0041] In addition, in the case of an active matrix type, a plurality of TFTs are provided to be connected to the first electrode. However, the present invention can be applied regardless of the TFT structure. For example, the present invention can be applied to a top gate type TFT, bottom gate type (inverted staggered type) TFT, or forward staggered type TFT can be used. In addition, the present invention is not limited to TFTs with a single gate structure, but can be applied to TFTs with multiple channel formation regions. Alternatively, the TFT may be a multi-gate type TFT having a gate electrode, for example, a double-gate type TFT.

[0042] In addition, even if the TFT electrically connected to the light-emitting element is a p-channel TFT, When connecting to a p-channel TFT, it is connected to the anode. A hole injection layer, a hole transport layer, a light emitting layer, and an electron transport layer are laminated in this order on the anode, and then a cathode is formed. Also, when connecting to an n-channel TFT, it is necessary to connect it to the cathode and apply a voltage to the cathode. After laminating the electron transport layer, the light emitting layer, the hole transport layer, and the hole injection layer in this order, the anode may be formed.

[0043] In addition, the channel formation region of the TFT may be formed using an amorphous semiconductor film or a semiconductor film having a crystalline structure. In addition, a compound semiconductor film containing an amorphous structure can be appropriately used. The core formation region has an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystal). A semiconductor having a third state that is stable in terms of free energy, and having short-range order and a lattice Semi-amorphous semiconductor films (microcrystalline semiconductor films, microcrystalline semiconductor films) that contain crystalline regions with distortion Also usable are microcrystalline semiconductor films.

[0044] In this specification, a pixel electrode is an electrode connected to a TFT and The term "pixel electrode" refers to an electrode that forms a pair with an opposing electrode provided on a facing substrate. The term "active matrix" refers to a liquid crystal layer sandwiched between two electrodes. In this type of liquid crystal display device, pixel electrodes arranged in a matrix are driven to In detail, the selected pixel electrode and the corresponding pixel electrode are When a voltage is applied between the pixel electrode and the corresponding counter electrode, The liquid crystal layer placed on the substrate is optically modulated, and this optical modulation is recognized by the observer as a display pattern. can be. Effect of the Invention

[0045] According to the present invention, the contact resistance between the electrode (or wiring) and the pixel electrode is not increased, and This makes it possible to omit the step of providing a layer containing a high melting point metal as an upper layer of wiring, which has been required up until now. This has the effect of reducing manufacturing costs and time. [Brief description of the drawings]

[0046] [Figure 1] FIG. 2 is a cross-sectional view of a pixel showing the first embodiment. [Diagram 2] FIG. 11 is a cross-sectional view of a pixel showing a second embodiment. [Diagram 3] FIG. 11 is a cross-sectional view of a pixel showing a third embodiment. [Figure 4] 4 is a SEM photograph of a perspective view and a cross-sectional view of an electrode end portion after etching. [Diagram 5] FIG. 1 shows a first TEG pattern. [Figure 6] A figure showing a second TEG pattern. [Figure 7] Graph showing the results of electrical measurements using the first TEG pattern (experimental results for a titanium and aluminum laminate). [Figure 8] 13 is a graph showing the results of electrical measurements using a second TEG pattern. [Figure 9] 1 is a cross-sectional view of an EL display panel (Example 1). [Figure 10] 1 is a cross-sectional view of an EL display panel (Example 2). [Figure 11] 13 is a top view showing an EL display panel (Example 3). [Figure 12] Fig. 11 is a cross-sectional view showing a liquid crystal panel according to the fourth embodiment. [Figure 13] 1A and 1B are diagrams illustrating examples of electronic devices. [Figure 14] 1A and 1B are diagrams illustrating examples of electronic devices. [Figure 15] Graph showing the results of electrical measurements using the first TEG pattern (experimental results for stacking molybdenum and aluminum). DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0047] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below.

[0048] (Embodiment 1) Here, the present invention will be described taking an active matrix type light emitting device as an example.

[0049] FIG. 1(A) is an enlarged cross-sectional view of a portion of a pixel portion of a light-emitting device. 1 shows a manufacturing process of a semiconductor device having the light-emitting element shown in A).

[0050] First, a base insulating film 11 is formed on a substrate 10. The substrate 10 side is used as a display surface to emit light. In this case, the substrate 10 may be a glass substrate or a quartz substrate having optical transparency. Alternatively, a light-transmitting plastic substrate having heat resistance capable of withstanding the processing temperature may be used. In addition, when the surface opposite to the substrate 10 is used as a display surface to extract light, a silicon substrate is used in addition to the substrate described above. A conductive substrate, a metal substrate, or a stainless steel substrate having an insulating film formed on its surface may also be used. In this embodiment, a glass substrate is used as the substrate 10. The refractive index of the glass substrate is approximately 1.55. Later.

[0051] The base insulating film 11 may be a silicon oxide film, a silicon nitride film, or a silicon oxynitride film. Here, we show an example of a two-layer structure for the base film. However, a single layer of the insulating film or a laminated structure of two or more layers may be used. The base insulating film does not need to be formed.

[0052] Next, a semiconductor layer is formed on the base insulating film. The semiconductor layer is a semiconductor having an amorphous structure. The film is formed by a known method (sputtering, LPCVD, plasma CVD, etc.). Then, the crystallization is performed by a known crystallization process (laser crystallization, thermal crystallization, or the addition of a catalyst such as nickel). A crystalline semiconductor film obtained by performing a thermal crystallization method using a first photomask is The semiconductor layer is patterned into a desired shape. The material of the crystalline semiconductor film is not limited, but it is preferably It is preferable that the insulating layer 14 is made of silicon or a silicon germanium (SiGe) alloy.

[0053] A continuous wave laser may also be used for crystallization of a semiconductor film having an amorphous structure. In addition, in order to obtain large crystal grains when crystallizing an amorphous semiconductor film, a solid-state laser capable of continuous oscillation is required. It is preferable to use a solid-state laser and apply the second to fourth harmonics of the fundamental wave. , Nd:YVO 4 The second harmonic (532 nm) and third harmonic ( When using a continuous wave laser, a continuous wave laser with an output of 10 W should be used. Continuous oscillation of YVO 4 The laser light emitted from the laser is converted into higher harmonics by a nonlinear optical element. In addition, YVO 4 A method of emitting harmonic waves by inserting a crystal and a nonlinear optical element Preferably, the laser beam is shaped into a rectangular or elliptical shape on the irradiation surface by an optical system. The energy density at this time is 0.01 to 100 MW / c. m 2 (preferably 0.1 to 10 MW / cm 2 ) is required. And 10 to 2000 The semiconductor film may be moved relatively to the laser light at a speed of about cm / s for irradiation.

[0054] Next, after removing the resist mask, a gate insulating film 12 is formed to cover the semiconductor layer. The gate insulating film 12 is formed by plasma CVD or sputtering to a thickness of 1 to 200 nm. do.

[0055] Next, a conductive film having a thickness of 100 to 600 nm is formed on the gate insulating film 12. A conductive film consisting of a laminate of a TaN film and a W film is formed by sputtering. In the above, the conductive film is a laminate of a TaN film and a W film, but the conductive film is not particularly limited, and may be Ta, W, Ti, Mo, An element selected from Al and Cu, or an alloy or compound material containing the above element as the main component The insulating layer may be formed of a single layer of a material or a laminate of these layers. Alternatively, a semiconductor film such as a polycrystalline silicon film may be used.

[0056] Next, a resist mask is formed using a second photomask, and a dry etching method or The etching is performed using a wet etching method. The conductive film is etched to obtain the conductive layers 14a and 14b. This becomes the gate electrode of FT.

[0057] Next, after removing the resist mask, a third photomask is used to In order to newly form an n-channel TFT (not shown here), the semiconductor is doped with n-type. A first step for doping the impurity element (typically phosphorus or As) at a low concentration A doping process is performed. The resist mask is placed on the area that will become the p-channel TFT and the conductive layer. This first doping step is performed by doping through the insulating film. A low-concentration impurity region is formed. A single light-emitting element is driven using multiple TFTs. When only the p-channel TFT is used for driving the device, the above-mentioned doping step is not particularly necessary.

[0058] Next, after removing the resist mask, a fourth photomask is used to A new semiconductor is formed, doped with a high concentration of impurity element (typically boron) that gives the semiconductor a p-type conductivity. A second doping step is performed to provide a gate insulator. Through doping is performed via the insulating film 12 to form p-type high concentration impurity regions 17 and 18 .

[0059] Next, a resist mask is newly formed using a fifth photomask. In order to form an n-channel TFT, an impurity element that gives the semiconductor n-type conductivity (typically A third doping step is performed to dope the semiconductor substrate with a high concentration of phosphorus or As. The condition of the ion doping method in the doping process is a dose of 1×10 13 ~5×10 15 / cm 2 and The acceleration voltage is set to 60 to 100 keV. The resist mask is a p-channel TFT. The third doping step covers the area where the gate insulating film is to be formed and the vicinity of the conductive layer. Through doping is performed via 12 to form an n-type high concentration impurity region.

[0060] Thereafter, the resist mask is removed, and a first interlayer insulating film 13 containing hydrogen is formed. The impurity elements added to the conductor layer are activated and hydrogenated. The first interlayer insulating layer containing hydrogen is The film 13 is a silicon oxynitride film (SiNO film) obtained by a PCVD method. In the case where a semiconductor film is crystallized using a metal element that promotes crystallization, typically nickel, In this case, gettering is performed to reduce nickel in the channel formation region 19 at the same time as activation. can also be performed.

[0061] Next, a planarization insulating film 16, which is the second layer of the interlayer insulating film, is formed. The skeleton structure is formed by the bonds between silicon (Si) and oxygen (O) obtained by the coating method. The insulating film formed is used.

[0062] Next, etching is performed using a sixth mask to form contact holes in the planarization insulating film 16. At the same time as forming the pores, the planarizing insulating film on the periphery is removed. Etching (wet etching or dry etching) is performed under conditions that provide a selectivity ratio of 3. There is no limitation on the etching gas used, but CF 4 , O 2 , He, and Ar It is appropriate to have CF 4 The flow rate was 380 sccm, O 2 The flow rate was 290sccm, H The flow rate of e was 500sccm, the flow rate of Ar was 500sccm, the RF power was 3000W, and the pressure Dry etching is performed at a pressure of 25 Pa. Note that no residue is left on the first interlayer insulating film 13. In order to etch without this, the etching time should be increased by about 10 to 20%. The tapered shape can be formed by one etching step or by multiple etching steps. Here, the CF 4 , O 2 , He, CF 4 The flow Amount: 550sccm, O 2 The flow rate of He was 350sccm, and the flow rate of RF was 450sccm. A second dry etching was performed with a power of 3000 W and a pressure of 25 Pa to create a taper. The taper angle θ at the end of the flattening insulating film is more than 30° and less than 75°. It is desirable to do so.

[0063] Next, etching is performed using the sixth mask as a mask, and the exposed gate The insulating film 12 and the first interlayer insulating film 13 are selectively removed. F 3 The gate insulating film 12 and the first interlayer insulating film 13 are etched using H and Ar. In order to etch without leaving any residue on the semiconductor layer, it is necessary to use a 10 to 20% It is advisable to increase the etching time at a rate of 100%.

[0064] Next, the sixth mask is removed, and the two-layer structure in contact with the semiconductor layer at the contact hole is formed. The first conductive layer 22a, which is the lower layer, is made of a high melting point metal (Ti, Mo, etc.). Alternatively, a high melting point metal compound (such as TiN) is used, and the film thickness is set in the range of 20 nm to 200 nm. The lower first conductive layer 22a has the effect of preventing interdiffusion of silicon and aluminum. is doing.

[0065] The upper second conductive layer 22b is made of a low resistance metal in order to reduce the electrical resistance of the wiring. (Typically, Al) is used, and the thickness is in the range of 0.1 μm to 2 μm. To prevent oxidation, it is preferable to form these two layers successively using the same sputtering apparatus. .

[0066] Next, a first etching is performed using the seventh mask. The first etching is performed by dry etching or A wet etching method is used.

[0067] Next, a second etching is performed while leaving the resist mask, and then an ICP (Inductively Coupled Plasma) The resist mask is removed using an inductively coupled plasma (ICP) etching method. The second conductive layer is etched to a width W2 while being etched. The ICP etching method can be used to remove the etching The power supply conditions (power applied to the coil-type electrode, power applied to the board-side electrode, By appropriately adjusting the electrode temperature, etc., the film can be etched into the desired tapered shape. The etching gas is Cl 2 , BCl 3 , SiCl 4 , CCl 4 N Chlorine gases such as CF 4 ,SCIENCE FICTION 6 , N.F. 3 Fluorine-based gases, such as Or O 2 can be used appropriately.

[0068] In addition, when forming a tapered shape using ICP etching, both sides of the electrode are evenly Depending on the second etching conditions, the first conductive layer may be etched. The planarization insulating film 16 in the area exposed by etching may also be slightly etched.

[0069] Next, a transparent conductive film is formed in contact with the wiring or electrode having the above-mentioned two-layer structure. The conductive film and the first conductive layer 22a are directly in contact with each other, so that a good ohmic contact can be obtained. Then, etching is performed using an eighth mask to form the first electrodes 23R and 23G, i.e. The anode (or cathode) of the organic light-emitting device is formed.

[0070] The material of the first electrode is ITO (indium tin oxide) or ITSO (ITO plus Oxide obtained by sputtering using a target containing 2-10% by weight of silicon oxide. In addition to ITSO, indium tin oxide containing silicon is also used. Transparent conductive oxide films such as IZO (Indium Zinc Oxide) films, which are made by mixing 2 to 20% of zinc oxide (ZnO) with cellulose, are used. A transparent conductive film may also be used. In addition, ATO (antimony tin oxide) containing silicon oxide may also be used. ) a transparent conductive film may be used.

[0071] When ITO is used for the first electrodes 23R and 23G, In contrast, ITSO and IZO do not change to ITO even after baking. It does not crystallize as in the case of , but remains in an amorphous state.

[0072] The contact resistance between the two-layer electrode and ITSO obtained by the above method and the contact resistance in the comparative example are shown in FIG. In order to compare the results with those of the control, the following experiment was carried out.

[0073] A silicon oxide film is formed as an insulating layer on a glass substrate, and a titanium layer (thickness 100 nm) is then formed on the A pure aluminum layer (thickness 700 nm, resistivity 4 μΩcm) is continuously formed by sputtering. After forming a two-layer metal layer, the resist pattern of the electrode is formed by photolithography. Two samples were prepared by forming a mask and etching the two-layer metal layer in the following three ways: Form.

[0074] Sample 1 (comparison example) was a two-layered metal layer that was processed using an ICP device once. Both metal layers were etched using plasma etching alone. As a result, the electrodes The end face had a nearly vertical taper angle of about 80°. Then, the ITSO film that would become the transparent electrode was The film was formed by sputtering, and a pattern was formed by photolithography.

[0075] Sample 2 (the present invention) is a two-step ICP system for a two-layer metal layer. Plasma etching was performed to obtain a protruding shape of the lower titanium layer. Etching is performed so that the electrode end surface after etching has a taper angle of about 60°. Then, the upper aluminum layer is selectively etched by a second etching process different from the first etching process. The etching was performed under conditions such that the end faces became nearly vertical.

[0076] The first condition for the first etching is that the etching gas contains BCl 3 and Cl 2 Using The gas flow rates were 60 and 20 sccm, respectively, and the pressure was 1.9 Pa. Plasma was generated by applying 450 W of RF (13.56 MHz) power to the coil-shaped electrode. Etching was performed for 100 seconds. A 100W RF (1 3.56MHz) power is applied, and a substantially negative self-bias voltage is applied. The electrode surface area of ​​the side is 12.5 cm × 12.5 cm, and the electrode surface area of ​​the coil type is (Here, the quartz disk on which the coil is mounted) is a disk with a diameter of 25 cm. Next, the second condition The gas and flow rate ratio were kept the same as in the first condition, the pressure was set to 1.2 Pa, and the coil type RF power of 600 W was applied to the electrode and 250 W to the substrate. A ferroelectric film was generated and etching was carried out for 160 seconds.

[0077] The second etching condition is as follows: BCl 3 and Cl 2 Using The gas flow rate ratio was 40 (sccm), 40 (sccm), and the pressure was 3.5 Pa. The coil-shaped electrode was fed with 200 W of RF power, and the substrate was fed with 50 W of RF power. Then, plasma was generated and etching was carried out for 60 seconds.

[0078] In addition, the SEM (scanning electron microscope) photographs after etching are shown in Fig. 4(A) and Fig. The cross-sectional view is shown in FIG. 4(B) and the schematic cross-sectional view is shown in FIG. 4(C). The length of the protruding part is 0.2 That is, the distance between the edge of the upper layer and the edge of the lower layer was 0.22 μm. The width W1 is 0.44 μm wider than the width W2 of the upper layer. The SO film was formed by sputtering and patterned using photolithography. .

[0079] For each of the two samples, a TEG (Test El) was used to measure the electrical resistance. Two patterns were created for each of the measurement groups.

[0080] One is a contact chain in which metal layers and ITSO layers are alternately arranged in series. The first TEG, called the TEG (top layout diagram is shown in Fig. 5(A) and an enlarged measurement of the contact area is shown in Fig. 5(B). The relationship between the length and the resistance of the wiring, ITO, and the contact interface between them is shown in Fig. 6(B). The elements are connected in series.

[0081] The other is a cross-shaped stack of metal and ITSO layers for Kelvin measurements. The layout diagram of the second TEG (top view) is shown in Fig. 6(A), and the enlarged measured length of the contact area is shown in Fig. 6(B). (See FIG. 6(B)).

[0082] Next, the electrical resistance of the first TEG was measured using the above two samples. Compared with sample 1 (comparison example), sample 2 (the present invention) has a resistance value (contact The cost of living per unit has decreased by 77%.

[0083] FIG. 7 shows the results of measuring the electrical resistance of the first TEG. The resistivity of O is calculated as 4000 μΩcm.

[0084] In addition, the electrical resistance of the second TEG was measured using the above two samples. The contact resistance value of Sample 2 (the present invention) was smaller than that of Sample 1 (the comparative example). The results of electrical resistance measurements performed on the second TEG are shown.

[0085] From the above experiments, it was found that the ITS It was shown that the contact resistance with O can be reduced.

[0086] In addition, a molybdenum layer (thickness 100 nm) was used instead of the lower layer (titanium layer), and the same procedure was performed. The results of measuring the electrical resistance of the first TEG are shown in FIG. The resistivity is calculated as 4000μΩcm. In Fig. 15, the edge of the lower molybdenum layer The solid line shows a comparative sample that was etched under conditions that made the surface nearly vertical. In FIG. 15, the lower molybdenum layer protrudes and the end face has a taper angle of about 60°. The samples with the molybdenum layer protruding from the lower layer are shown with an X mark. It was shown that the contact resistance with ITSO can be reduced by using a two-layer electrode.

[0087] In addition, the thickness of the lower layer was changed to 100 nm, 200 nm, and 300 nm, and the electrical properties were similarly evaluated. When the resistance was measured, it was found that the thicker the lower layer, the lower the contact resistance.

[0088] FIG. 1B shows a structure in which a first electrode made of a transparent conductive film is in contact with a lower layer made of Ti. As shown in FIG. 1(B), the surface of the second conductive layer 22b, which is the upper layer, The first electrode is made of a transparent conductive film. In FIG. 1B, the taper angle α at the end of the lower layer 22a is , which is an example in which the taper angle is smaller than the taper angle β at the end of the second conductive layer 22b which is the upper layer. In addition, the smaller the taper angle α at the end of the lower first conductive layer 22a, the better. Thus, the contact area between the first electrode and the first conductive layer increases.

[0089] Next, an eighth mask is used to form an insulator 29 (a bump) covering the ends of the first electrodes 23R and 23G. The insulating material 29 is formed by coating. The resulting organic resin film or SOG film (e.g., an SiOx film containing an alkyl group) is then deposited to a thickness of 0. Used in the range of .8μm to 1μm.

[0090] Next, layers 24R and 24G containing organic compounds are formed by deposition or coating. In order to improve reliability, the organic compound-containing layers 24R and 24G are formed on the substrate 11. It is preferable to perform degassing by performing empty heating. For example, before performing deposition of an organic compound material, In order to remove gases contained in the substrate, the substrate is heated at 200℃ to 300℃ in a reduced pressure or inert atmosphere. It is preferable to perform a heat treatment. The layers 24R and 24G containing an organic compound are formed by a deposition method. The vacuum level is 5 x 10 -3 Torr (0.665 Pa) or less, preferably 10 -4 ~10 -6 T Deposition is carried out in a deposition chamber that is evacuated to orr. Before deposition, the organic compound is heated by resistance heating. The compound is vaporized and is scattered toward the substrate when the shutter is opened during deposition. The oxidized organic compounds are scattered upward and reach the substrate through the openings in the metal mask. It is evaporated.

[0091] In order to achieve full color, the mask alignment is performed for each emission color (R, G, B). conduct.

[0092] The layers 24R and 24G containing an organic compound are laminated layers, and a hole injection layer and a hole transport layer are formed on the first electrode. For example, the organic compound-containing layer 24R is formed in the order of a light-transmitting layer, a light-emitting layer, and an electron transport layer. Alq doped with DCM as the emissive layer 3 The organic compound is deposited to a thickness of 40 nm. Among the layers 24G containing Alq3 doped with DMQD as the light-emitting layer, 3 Deposit 40[nm] of Although not shown here, CBP (4,4'-bis(CuCl)) is used as a blue light-emitting layer. (N-carbazolyl)-biphenyl)-doped PPD (4,4'-bis(N-(9- (phenanthryl)-N-phenylamino)biphenyl) 30 nm as a blocking layer; SAlq (bis(2-methyl-8-quinolinolato)(triphenylsilanolate)aluminum A 10 nm thick film of ZnO is then formed.

[0093] Next, the second electrode 25, i.e., the cathode (or anode) of the organic light-emitting element, is formed. The material of the electrode 25 is an alloy such as MgAg, MgIn, or AlLi, or CaF 2 , Ca N or an element belonging to group 1 or 2 of the periodic table and aluminum are formed by co-evaporation method. The film thus formed may be used.

[0094] In addition, before forming the second electrode 25, a cathode buffer layer made of CaF 2 , MgF 2 , or B aF 2 Alternatively, a light-transmitting layer (thickness: 1 nm to 5 nm) made of the above material may be formed.

[0095] In addition, a protective layer for protecting the second electrode 25 may be formed.

[0096] Next, a sealing substrate 33 is attached with a sealant (not shown) to seal the light emitting element. The area 27 surrounded by the pair of substrates and the sealing material is filled with a dry inert gas or a permeable gas. Fill the container with a clear packing material. The inert gas can be a rare gas or nitrogen. A desiccant for preventing the adhesion of the resin is disposed on the sealing substrate 33. There are no particular limitations as long as the material is suitable for use, and a representative example is an ultraviolet-curable or heat-curable epoxy resin. It should be noted that filling a gap between a pair of substrates with a filler can improve the overall transmittance. This can be done.

[0097] If the first electrode is made of a transparent material and the second electrode is made of a metal material, light can be collected by passing through the substrate 10. The first electrode is made of a metal material, and the second electrode is made of a If the electrode is made of a transparent material, the light can be extracted through the sealing substrate 33, i.e., a top emitter structure. In addition, if the first electrode and the second electrode are made of a transparent material, the substrate 10 and the The present invention can be configured so that the light is extracted by passing through both the insulating substrate 31 and the insulating substrate 33. Either one of the structures may be used.

[0098] In addition, when light is extracted through the substrate 10, the layer through which the light emitted from the light-emitting layer passes is That is, the first electrode, the first interlayer insulating film 13, the second interlayer insulating film 16, and the gate insulating film. 12 and the base insulating film 11 all contain silicon oxide (approximately 1.46), The difference in the refractive index between these materials is reduced, improving the light extraction efficiency. Stray light between layers can be suppressed.

[0099] (Embodiment 2) Here, an example in which the shape of the electrode having a two-layer structure is different from that of the first embodiment is shown in FIG. 2(A) and FIG. B) will be explained below.

[0100] In addition, the steps other than the step of forming the electrodes composed of the first conductive layer 222a and the second conductive layer 222b are The process is the same as that of the first embodiment, so a detailed description will be omitted here. In Fig. 2(A) and Fig. 2(B), the same reference numerals are used for the same parts as in Fig. 1(A).

[0101] According to the first embodiment, a conductive film having a two-layer structure in contact with a semiconductor layer through a contact hole The lower first conductive layer 222a is made of a high melting point metal (Ti, Mo, etc.) or The layer is made of a melting point metal compound (such as TiN) and has a thickness in the range of 20 nm to 200 nm. The first conductive layer 222a has an effect of preventing interdiffusion of silicon and aluminum. There are.

[0102] The upper second conductive layer 222b is made of low resistance metal to reduce the electrical resistance of the wiring. The thickness of each layer is in the range of 0.1 μm to 2 μm. It is preferable to form these two layers successively using the same sputtering apparatus so as not to oxidize the first layer. stomach.

[0103] Next, a first etching is performed using the seventh mask. The first etching is performed by dry etching or A wet etching method is used.

[0104] Then, a second etching is performed using the eighth mask. The second etching is performed by dry etching or A wet etching method is used.

[0105] By the above two etching steps, the width W4 of the upper layer is determined by the seventh mask, and the width W5 of the lower layer is determined by the seventh mask. The width W3 is determined by the eighth mask.

[0106] Next, in the same manner as in the first embodiment, a transparent electrode is formed in contact with the wiring or electrode having the above-mentioned two-layer structure. The transparent conductive film is formed in direct contact with the first conductive layer 222a, and a good o- Then, etching is performed using the ninth mask to obtain the . The first electrodes 23R and 23G, that is, the anode (or cathode) of the organic light-emitting element, are formed.

[0107] The subsequent steps are the same as those in the first embodiment, and therefore a detailed description thereof will be omitted here.

[0108] Here, two patterning steps are performed to form the protruding portion as shown in FIG. 2(A). In the case where two patterning steps are performed, the electrode structure shown in the first embodiment is obtained. Instead of forming the protrusions evenly on both sides of the upper layer as in the above, the protrusions are formed so as to overlap the first electrode to be formed later. It is also possible to form protrusions only in the areas where the protrusions are to be formed. That is, two patterning masks are appropriately set. By measuring the area of ​​contact between the first electrode and the lower layer, it is possible to control the area of ​​contact between the first electrode and the lower layer.

[0109] FIG. 2(B) shows a structure in which a first electrode made of a transparent conductive film is in contact with a lower layer made of Ti. As shown in FIG. 2(B), the surface of the second conductive layer 222b is covered with oxidized aluminum. The aluminum film 34 is thinly formed, and the first electrode made of a transparent conductive film is electrically connected only to the lower layer. In FIG. 2B, the tape at the end of the first conductive layer 222a, which is the lower layer, is 13 shows an example in which the taper angle α is larger than the taper angle β at the end of the second conductive layer 222b. As shown in FIG. 2B, the upper surface and end surface of the lower layer are electrically connected to the first electrode. However, the area of ​​the first electrode that is in contact with the end face of the lower layer is larger than the area of ​​the first electrode that is in contact with the end face of the lower layer. The structure has a larger area in contact with the upper surface.

[0110] In addition, this embodiment mode can be freely combined with the first embodiment mode.

[0111] (Embodiment 3) Here, we will show an example in which another insulating layer is provided between the transparent conductive film and the two-layered electrode (Figure 3). This will be used to explain the following.

[0112] In addition, an electrode is formed by the first conductive layer 22a, the second conductive layer 22b, and the third conductive layer 22c. The steps up to this point are the same as those in the first embodiment, so a detailed description will be omitted here. In addition, in FIG. 3, the same reference numerals are used for the same parts as in FIG.

[0113] First, the two-layer electrodes 22a and 22b are formed according to the process shown in the first embodiment. Next, a planarization insulating film 320, which is the third layer of the interlayer insulating film, is formed. As for 0, a skeletal structure formed by bonding silicon (Si) and oxygen (O) obtained by the coating method is used. In this example, the third layer of planarization insulating film 320 is used for planarization. The planarization insulating film 16 does not have to be particularly flat. For example, an inorganic insulating film formed by the PCVD method may be used. It may be used.

[0114] Next, the planarization insulating film 320 is selectively etched to remove the second conductive layer 22b A contact hole is formed that reaches the planarization insulating film 16. Next, a transparent conductive film is formed. Then, patterning is performed to form first electrodes 323R and 323G.

[0115] Next, in the same manner as in the first embodiment, the ends of the first electrodes 323R and 323G are Since the subsequent steps are the same as those in the first embodiment, the details are not given here. A detailed explanation will be omitted.

[0116] By using the structure shown in FIG. 3, it is possible to increase the area of ​​the first electrode, and the light-emitting region can be made wider.

[0117] In addition, this embodiment mode can be freely combined with the embodiment mode 1 or 2. Cut.

[0118] The present invention having the above configuration will be described in more detail with reference to the following examples. It is decided. EXAMPLES

[0119] In this embodiment, a full-color light-emitting device will be described with reference to FIG. 9. FIG. 9 shows an active FIG. 1 is a diagram showing a partial cross section of a matrix type light emitting device.

[0120] On a first substrate 1001 on which an insulating base film 1002 is provided, three TFTs 1003R , 1003G, and 1003B are provided. and a source region or drain region 1021, 1022. The gate electrode is a p-channel TFT with a gate electrode. The lower layer 1023a of the gate electrode is tapered, and the upper layer 102 It is composed of 3b.

[0121] The interlayer insulating film 1006 is an inorganic insulating film. The planarized insulating film 1007 is a flat interlayer insulating film formed by a coating method.

[0122] In the light-emitting element, it is important to make the first electrode flat. If the surface of the planarizing insulating film 1007 is not flat, the first electrode may not be flat due to the surface irregularities of the planarizing insulating film 1007. Therefore, the flatness of the flattening insulating film 1007 is important.

[0123] In addition, the drain wiring or source wiring 1024a, 1024b of the TFT has a two-layer structure. In the part to be connected to the transparent conductive film later, the drain wiring or the source wiring The lower layer 1024a of the drain wiring or the upper layer 1024b of the source wiring has a width larger than that of the This electrode shape is formed by punching twice to form the protruding portion according to the second embodiment. Here, the lower layer 1024a of the drain wiring or source wiring is A film is used for the upper layer 1024b of the drain wiring or source wiring, and aluminum alone is used for the upper layer 1024b of the drain wiring or source wiring. The upper layer 1024b of the drain wiring or source wiring of the TFT is Taking into consideration the coverage of the interlayer insulating film, it is preferable to form the insulating film in a tapered shape.

[0124] Also, according to the first embodiment, the side surface of the lower layer has a smaller taper angle than the side surface of the upper layer. A small taper angle may also be used.

[0125] The partition 1009 is made of resin and serves as a partition between layers containing organic compounds that emit different light. Therefore, the partition 1009 surrounds one pixel, i.e., a light-emitting area. In addition, even if layers containing organic compounds that emit different light are overlapped on the partition wall, However, it is preferable that the first electrodes of adjacent pixels do not overlap each other.

[0126] The light-emitting element includes a first electrode 1008 made of a transparent conductive material and a layer 1015 containing an organic compound. R, 1015G, 1015B, and the second electrode 1010. In addition, the first electrode 1008 is in contact with and conductive with the lower layer 1024a.

[0127] In addition, materials for the first electrode 1008 and the second electrode 1010 are selected in consideration of the work function. However, the first electrode and the second electrode may be either an anode or a cathode depending on the pixel configuration. When the polarity of the driving TFT is a p-channel type, the first electrode is an anode and the second In addition, when the polarity of the driving TFT is an N-channel type, the first Preferably, the electrode is a cathode and the second electrode is an anode.

[0128] The layers 1015R, 1015G, and 1015B containing an organic compound are the first electrodes (anodes ) side, HIL (hole injection layer), HTL (hole transport layer), EML (light emitting layer), The ETL (electron transport layer) and EIL (electron injection layer) are laminated in this order. The layer containing the compound may have a single layer structure or a mixed structure in addition to a laminate structure. In order to achieve this, the layers 1015R, 1015G, and 1015B each containing an organic compound are selectively These are then formed into three types of pixels: R, G, and B.

[0129] In addition, in order to protect the light emitting element from damage caused by moisture and degassing, the second electrode 1010 It is preferable to provide protective films 1011 and 1012 to cover the Examples of such insulating films include dense inorganic insulating films (SiN, SiNO films, etc.) made by the PCVD method, and Dense inorganic insulating films (SiN, SiNO films, etc.), thin films mainly composed of carbon (DLC films , CN film, amorphous carbon film), metal oxide film (WO 2 , CaF 2 , Al 2 O 3 etc.) It is preferable to use the following.

[0130] The gap 1014 between the first substrate 1001 and the second substrate 1016 may be filled with a filler material or Fill with active gas. If filling with inert gas such as nitrogen, use a desiccant to dry it. is preferably provided at intervals 1014.

[0131] Moreover, the light emitted from the light emitting element is extracted through the first substrate 1001. The structure shown in FIG. is a downward emitting light emitting device.

[0132] In addition, although the top-gate TFT was used as an example here, this invention can be applied to any TFT structure. The present invention can be applied to, for example, bottom-gate type (inverted staggered type) TFTs and forward-staggered type TFTs. It is possible to apply this to a GaAs TFT.

[0133] This embodiment may be freely combined with the first, second, or third embodiment. It is possible to do so. EXAMPLES

[0134] In this embodiment, the pixel section, the driver circuit, and the terminal section are formed on the same substrate, and light is emitted from both substrates. An example of a light-emitting device that can be extracted is shown in FIG.

[0135] After forming a base insulating film on the substrate 610, each semiconductor layer is formed. After forming a gate insulating film covering the n-channel MOSFET, the gate electrodes and terminal electrodes are formed. To form a n-type TFT636, an impurity element (typically phosphorus) is used to give the semiconductor an n-type. , or As) to form a p-channel TFT 637. The source and drain regions are doped with an impurity element (typically boron). If necessary, the LDD region is appropriately formed. Next, a hydrogen-containing SiO2 film is formed by the PCVD method. After forming a silicon oxynitride film (SiNO film), the impurity elements added to the semiconductor layer are activated. and hydrogenation.

[0136] Next, a planarization insulating film 616 that will be an interlayer insulating film is formed. The skeleton structure of is composed of bonds between silicon (Si) and oxygen (O) obtained by the coating method. An insulating film that can be used is used.

[0137] Next, a mask is used to form contact holes in the planarizing insulating film, and at the same time, the peripheral area is planarized. The planarized insulating film is removed.

[0138] Next, etching is performed using the planarization insulating film 616 as a mask to remove hydrogen-containing The SiNO film or the gate insulating film is selectively removed.

[0139] Next, a conductive film is formed, and then etching is performed using a mask to form drain wiring and source wiring. The drain wiring has a two-layer structure and will be connected to a transparent conductive film later. In the present embodiment, the lower layer has a width greater than that of the upper layer. In accordance with this, the lower layer forms a protruding portion from the upper layer. The taper angle is smaller than the taper angle at the face portion.

[0140] Next, a first electrode 623 made of a transparent conductive film, that is, an anode (or cathode) of an organic light-emitting element, is formed. The first electrode 623 is electrically connected to the protruding lower layer portion.

[0141] Next, a SOG film (e.g., an SiOx film containing an alkyl group) obtained by a coating method is patterned. The insulating material 629 (bank, partition, barrier, embankment) covering the end of the first electrode 623 is formed by etching. (also called a nucleus or nucleus).

[0142] Next, a layer 624 containing an organic compound is formed by using a deposition method or a coating method. The second electrode 625 is made of a transparent conductive film, that is, the cathode (or anode) of the organic light emitting element. Next, a transparent protective layer 626 is formed by vapor deposition or sputtering. The layer 626 protects the second electrode 625 .

[0143] Next, a transparent sealing substrate 633 is attached with a sealant 628 to seal the light emitting element. That is, the light-emitting display device is sealed by surrounding the periphery of the display area with a sealant and by a pair of substrates. The interlayer insulating film of the FT is provided on the entire surface of the substrate, so the pattern of the seal material is When the pattern is drawn inside the outer periphery of the sealant, the interlayer insulating film located outside the sealant pattern Therefore, it is necessary to use the film as an interlayer insulating film for TFTs. The outer periphery of the planarization insulating film is preferably on the inside of the sealant pattern, and more preferably on the outside of the sealant pattern. The sealing material is made to overlap with the end of the planarization insulating film so as to cover the end of the planarization insulating film. The area enclosed by 8 is filled with a transparent filling material 627 .

[0144] Finally, the FPC 632 is attached to the terminal electrodes using the anisotropic conductive film 631 by a known method. The terminal electrodes are preferably made of a transparent conductive film. Formed in the finest condition. (Figure 10)

[0145] Moreover, the light from the light-emitting element passes through the substrate 610 and the sealing substrate 633 and is extracted to both sides. The structure shown in FIG. 10 is a light-emitting device in which light is extracted by passing through both the substrate and the sealing substrate. It is.

[0146] By the above steps, the pixel portion, the driver circuit, and the terminal portion can be formed on the same substrate. .

[0147] This embodiment may be freely combined with the first, second, or third embodiment. It is possible to do so. EXAMPLES

[0148] In this embodiment, an FPC and a driving I / F are attached to the EL display panel manufactured by the above embodiment. An example of implementing C is explained below.

[0149] The diagram shown in FIG. 11(A) shows a light-emitting diode with FPC 1209 attached to four terminals 1208. An example of a top view of the device is shown. A pixel portion including a light-emitting element and a TFT is provided on a substrate 1210. 1202, a gate side driving circuit including a TFT 1203, and a source side driving circuit including a TFT The channel forming region of the TFT is a semiconductor film having a crystalline structure. In this case, these circuits can be formed on the same substrate. It is possible to manufacture an EL display panel that realizes stem-on-panel configuration.

[0150] The substrate 1210 is covered with a protective film except for the contact portion. An underlayer is provided that includes a material having catalytic functionality.

[0151] In addition, the connection regions 1207 provided at two locations so as to sandwich the pixel portion are the second The electrode is provided to contact the underlying wiring. It is electrically connected to the TFT provided in the pixel area.

[0152] The sealing substrate 1204 includes a sealant 1205 that surrounds the pixel portion and the driver circuit, and The substrate 1210 is fixed by a filler material surrounded by a transparent desiccant. In addition, a filling material containing a desiccant may be filled in the region not overlapping with the pixel portion. It may be placed.

[0153] In addition, the structure shown in FIG. 11(A) is suitable for a relatively large size (e.g., diagonal 4.3 inches) is shown as a suitable example, but FIG. 11(B) shows a small light emitting device with a narrow frame. This is an example of using the COG method, which is suitable for the size (e.g., 1.5 inches diagonal).

[0154] In FIG. 11B, a driving IC 1301 is mounted on a substrate 1310. An FPC 1309 is mounted on the arranged terminal portion 1308. 1 is a rectangular shape with one side of 300 mm to 1000 mm or more from the viewpoint of improving productivity. It is recommended to build multiple units on the same board. In other words, the driver circuit and input / output terminals are integrated on the board. Then, the driver IC is divided and removed. The length of the long side of the display is set to 15 to 80 mm, taking into consideration the length of one side of the pixel area and the pixel pitch. It may be formed in a rectangular shape with a short side of 1 to 6 mm, or may be formed in a shape that is parallel to one side of the pixel region or one side of the pixel portion. The length of the driving circuit may be increased by one side of the driving circuit.

[0155] The advantage of the driver IC over the IC chip is the length of its long side. If a driver IC formed at 0 mm is used, the number of ICs required to be mounted corresponding to the pixel area is This requires fewer components than when using chips, and can improve manufacturing yields. In addition, when the driver IC is formed on a glass substrate, the shape of the substrate used as the base is not limited. This is because the IC chips are cut from the circular silicon wafer. This is a big advantage compared to putting it out.

[0156] Alternatively, the TAB method may be adopted, in which case multiple tapes are attached to the tape. As with the COG method, a single drive IC is mounted on a single tape. An IC may be mounted. In this case, for strength reasons, a metal piece or the like is used to fix the driver IC. It would be good to paste them together.

[0157] The substrate 1310 is also covered with a protective film except for the contact portion. An underlayer is provided that includes a material having catalytic functionality.

[0158] In addition, a connection region 1307 provided between the pixel section 1302 and the driving IC 1301 is The second electrode of the element is provided to contact the underlying wiring. The first electrode is electrically connected to a TFT provided in the pixel portion.

[0159] The sealing substrate 1304 includes a sealant 1305 surrounding the pixel portion 1302 and a sealant The substrate 1310 is secured to the substrate 1310 by a filler material surrounded by the filler material.

[0160] In addition, when an amorphous semiconductor film is used as the channel formation region of a TFT, the driver circuit Since it is difficult to form the same on the same substrate, the structure of FIG. 11(B) is used even for large sizes. It becomes.

[0161] In addition, this embodiment is the same as embodiment 1, embodiment 2, embodiment 3, example 1, or embodiment Can be freely combined with example 2. EXAMPLES

[0162] In this embodiment, a liquid crystal display device in which a pixel section, a driving circuit, and a terminal section are formed on the same substrate is used. This is shown in Figure 12. Figure 12 shows a cross-sectional view of a liquid crystal panel that does not use color filters.

[0163] The light shutter is performed by a liquid crystal panel without a color filter, and the RGB three-color background is It uses a field sequential driving method that blinks the light source at high speed. The field sequential method uses the limitations of the human eye's temporal resolution to produce continuous-time images. It achieves color display through additive color mixing.

[0164] Three TFTs 703 are provided on a first substrate 701 on which a base insulating film 702 is provided. These TFTs are formed by a channel forming region 720 and low concentration impurity regions 725 and 726. and source or drain regions 721 and 722. The gate electrode is a two-layered n-channel TFT. The gate electrode is made up of a lower layer 723a and an upper layer 723b of the gate electrode. It has been made.

[0165] The interlayer insulating film 706 is an inorganic insulating film. The insulating film 707 is a flat interlayer insulating film formed by a coating method.

[0166] In addition, the drain wiring or source wiring of the TFT has a two-layer structure, and later a transparent conductor is In the portion to be connected to the conductive film, the lower layer 724a of the drain wiring or source wiring is The width of the upper layer 724b of the drain wiring or source wiring is wider than that of the upper layer 724b of the drain wiring or source wiring. A Mo film is used as the lower layer of the drain or source wiring. A single aluminum film is used as the upper layer of the line. Drain wiring or source wiring of TFT It is preferable that the insulating film has a tapered shape in consideration of the coverage of the interlayer insulating film.

[0167] The pixel electrode 708 is made of ITO (indium tin oxide) or ITSO (ITO with silicon oxide). Silicon oxide obtained by sputtering using a target containing 2 to 10% by weight of silicon Indium tin oxide containing silicon oxide, indium oxide containing 2 to 20 atomic % Transparent conductive oxide film (IZO) mixed with zinc oxide (ZnO), ATO ( A transparent conductive film such as antimony tin oxide can be used.

[0168] The columnar spacers 714 are made of resin and serve to keep the substrate interval constant. Therefore, the columnar spacers 714 are arranged at equal intervals. The plate interval is preferably 2 μm or less, and the height of the columnar spacers 714 is adjusted appropriately. In addition, for small screen sizes of 2 inches or less, no columnar spacers are required. The gap between the substrates may be adjusted simply by using a gap material such as a filler contained in the sealing material.

[0169] Also provided is an alignment film 710 that covers the columnar spacers 714 and the pixel electrodes 708. An alignment film 712 is also provided on a second substrate 716, which is to be the first substrate, and the alignment film 712 is sealed with a sealant (not shown). 701 and a second substrate 716 are bonded together.

[0170] The gap between the first substrate 701 and the second substrate 716 is filled with a liquid crystal material 711. The liquid crystal material 711 is liquid crystaled under reduced pressure with the sealing material in a closed pattern to prevent air bubbles from being trapped. A method of dropping a crystal onto the substrate and bonding the two substrates may be used. After forming a pattern on the TFT substrate, the liquid crystal is injected using capillary action. A dip type (pumping type) may also be used.

[0171] The liquid crystal panel of this embodiment has a so-called π cell structure, and is an OCB (Optical Conductive Bulk Cell). The display mode is called the ly compensated bend mode. The pretilt angle of the liquid crystal molecules is set at the intermediate position between the active matrix substrate and the opposing substrate. The orientation of the π cell structure is symmetrical with respect to the center plane. When no voltage is applied, the liquid crystals exhibit a splay alignment, and when a voltage is applied, the liquid crystals transition to a bend alignment. When a voltage is further applied, the bend-aligned liquid crystal molecules are aligned perpendicular to both substrates, allowing light to pass through. In addition, when the OCB mode is selected, the image quality is increased by approximately 10 times compared to the conventional TN mode. Fast response can be achieved.

[0172] The liquid crystal panel is disposed between a pair of optical films (polarizing plates, retardation plates, etc.) 731 and 732. In addition, in the OCB mode, the viewing angle dependence of retardation is 3 For dimensional compensation, it is preferable to use a biaxial retarder.

[0173] The backlight of the liquid crystal panel shown in Figure 12 is a 3-color LED 735 of RGB. The light from the LED 735 is guided by a light guide plate 734. In the LED lighting period TR period, TG period, and TB period, R, G During the red LED lighting period (TR), the video LED corresponding to red is turned on. A signal (R1) is supplied to the LCD panel, and one screenful of a red image is written onto the LCD panel. During the green LED lighting period (TG), the video data corresponding to green (G1) is displayed on the LCD panel. The green LED lights up, and a green image is written onto the LCD panel. During the period (TB), video data (B1) corresponding to blue is supplied to the liquid crystal display device, A single screen of blue is written to the display device. These three screens are A frame is formed. EXAMPLES

[0174] By incorporating an EL panel or a liquid crystal panel obtained by carrying out the present invention, various electronic devices can be manufactured. The electronic devices can be made into video cameras, digital cameras, and Display, navigation system, audio playback device (car audio, audio Audio components, personal computers, game devices, mobile information terminals (mobile computers, mobile phones, portable game consoles, electronic books, etc.), image playback devices equipped with recording media (Specifically, Digital Versatile Disc (DVD)) and other recording media (Devices equipped with a display that can reproduce and display the image) Specific examples of electronic devices are shown in Figs. 13 and 14.

[0175] FIG. 13A shows a television, which includes a housing 2001, a support base 2002, a display unit 2003, and a speaker. The present invention includes a semiconductor device built into a television. By applying this to semiconductor integrated circuits and display units 2003, a television with reduced power consumption can be realized. In addition, all uses, including personal computers, TV broadcast reception, and advertising displays, This includes televisions for displaying all information.

[0176] FIG. 13B shows a digital camera, which includes a main body 2101, a display unit 2102, and an image receiving unit 210. 3, operation keys 2104, an external connection port 2105, a shutter 2106, etc. The semiconductor integrated circuits (memory, CPU, etc.) and display When the above-mentioned configuration is applied to the display unit 2102, a digital camera with reduced power consumption can be obtained.

[0177] FIG. 13C shows a personal computer, which includes a main body 2201, a housing 2202, a display unit 2203, keyboard 2204, external connection port 2205, pointing mouse 220 The present invention relates to a semiconductor integrated circuit (memory The display unit 2203 is applied to the TFT and the CP It is possible to reduce the wiring and contact resistance used with the CMOS circuits that make up U, It is possible to realize a personal computer with reduced power consumption.

[0178] FIG. 13D shows an electronic book, which includes a main body 2301, a display unit 2302, a switch 2303, The electronic book includes an operation key 2304, an infrared port 2305, etc. The present invention is applied to a semiconductor integrated circuit (memory, CPU, etc.) and a display unit 2302, and power consumption is It is possible to realize a reduced electronic book size.

[0179] FIG. 13(E) shows a portable image playback device (specifically, a DVD playback device) equipped with a recording medium. A main body 2401, a housing 2402, a display unit A 2403, a display unit B 2404, a recording medium It includes a (DVD, etc.) reading section 2405, an operation key 2406, a speaker section 2407, etc. The display unit A 2403 mainly displays image information, and the display unit B 2404 mainly displays text information. The present invention relates to semiconductor integrated circuits (memory, CPU, etc.) built into the image reproducing device, and display units A, B 2403, 2404 to provide an image reproducing device with reduced power consumption. It can be achieved.

[0180] FIG. 13(F) shows a portable game device, which includes a main body 2501, a display unit 2505, and an operation switch. The semiconductor integrated circuits (memory, CPU, etc.) built into game devices are etc.) and the display unit 2505 to realize a portable game device with reduced power consumption. It is possible.

[0181] FIG. 13G shows a video camera, which includes a main body 2601, a display unit 2602, a housing 2603, External connection port 2604, remote control receiver 2605, image receiver 2606, battery 260 7, a voice input unit 2608, and operation keys 2609. The semiconductor integrated circuit (memory, CPU, etc.) and the display unit 2602 are used. A reduced power video camera can be realized.

[0182] FIG. 13(H) shows a mobile phone, which includes a main body 2701, a housing 2702, a display unit 2703, and an audio An input unit 2704, an audio output unit 2705, an operation key 2706, an external connection port 2707, The present invention includes a semiconductor integrated circuit (memory The present invention is applied to a display unit 2703 and a mobile phone having reduced power consumption. It is possible to realize mobile phones.

[0183] FIG. 14 shows a portable music player equipped with a recording medium, which includes a main body 2901, a display unit 2903, a recording medium (card type memory, small HDD, etc.) reading unit, operation keys 2902 , 2906, a speaker part 2905 of a headphone connected to a connection cord 2904, etc. The present invention can be applied to the display unit 2903 to realize a music playback device with reduced power consumption. do.

[0184] In addition, this embodiment is the same as the first embodiment, the second embodiment, the third embodiment, the first embodiment, the second embodiment, It can be freely combined with Example 3, Example 4, or Example 5. [Explanation of symbols]

[0185] 10 Substrate 11 Undercoat insulating film 12 Gate insulating film 13 First interlayer insulating film 14a Conductive layer 14b Conductive layer 16 Planarizing insulating film 17 p-type high concentration impurity region 18 p-type high concentration impurity region 19 Channel formation region 22a First conductive layer 22b Second conductive layer 23R First electrode 23G First electrode 24R Layer containing organic compounds 24G Layer containing organic compounds 25 Second electrode 27 areas 29 Insulation 33 Sealing substrate 34 Aluminum oxide film 222a First conductive layer 222b Second conductive layer 320 Planarizing insulating film 323R First electrode 323G First electrode 329 Insulation 610 Substrate 616 Planarization insulating film 623 First electrode 624 Layer containing organic compounds 625 Second electrode 626 Transparent protective layer 627 Filler 628 Sealing material 629 Insulation 632 FPC 633 Sealing substrate 636 n-channel TFT 637 p-channel TFT 701 First Substrate 702 Undercoat insulating film 703 TFT 705 Gate insulating film 706 Interlayer insulating film 707 Planarizing Insulating Film 708 Pixel electrode 710 Orientation Film 711 Liquid crystal materials 712 Orientation film 714 Pillar Spacer 716 Second Board 720 Channel formation region 721 Source or drain region 722 Source or drain region 723a Lower layer of gate electrode 723b Upper layer of gate electrode 724a Under the drain wiring or source wiring 724b Under the drain wiring or source wiring 725 Low concentration impurity region 726 Low concentration impurity region 731 Optical Film 732 Optical Film 734 Light guide plate 735 LED 1001 First substrate 1002 Undercoat insulating film 1003R TFT 1003G TFT 1003B TFT 1005 Gate insulating film 1006 Interlayer insulating film 1007 Planarizing insulating film 1008 First electrode 1009 Bulkhead 1010 Second electrode 1011 Protective film 1012 Protective film 1014 interval 1015R Layer containing organic compounds 1015G Layer containing organic compounds 1015B Layer containing organic compound 1016 Second substrate 1020 Channel formation region 1021 Source or drain region 1022 Source or drain region 1023a Lower layer of gate electrode 1023b Upper layer of gate electrode 1024a Under the drain wiring or source wiring 1024b Drain wiring or upper layer of source wiring 1201 Source side driver circuit 1202 Pixel section 1203 Gate side drive circuit 1204 Sealing substrate 1205 Sealing material 1207 Connection Area 1208 Terminal section 1209 FPC 1210 Board 1301 Driver IC 1302 Pixel section 1304 Sealing substrate 1305 Sealing material 1307 Connection Area 1308 Terminal section 1309 FPC 1310 Substrate

Claims

1. A semiconductor device including a plurality of thin film transistors having a semiconductor thin film and a transparent conductive film on a substrate having an insulating surface, the semiconductor device has an electrode or wiring formed by stacking a first conductive layer in contact with the semiconductor thin film and a second conductive layer in contact with the first conductive layer, the first conductive layer has a width greater than that of the second conductive layer; A semiconductor device comprising: a transparent conductive film in contact with a portion of the first conductive layer extending from an end of the second conductive layer.

2. In claim 1, the first conductive layer is an alloy containing titanium or molybdenum, or titanium or molybdenum alone, The semiconductor device according to claim 1, wherein the second conductive layer is made of an alloy containing aluminum or aluminum alone.

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