Substrate processing method and substrate processing apparatus

Abstract

To suppress electric crosstalk between adjacent pixels without losing a sealing performance of a sealing film.SOLUTION: A substrate processing method is for processing a substrate. In the substrate, a plurality of first electrode layers, and an insulation layer projected upward from each first electrode layer while surrounding each first electrode layer are arranged onto a front surface; a light emitting layer is formed onto each first electrode layer; a second electrode layer is formed so as to cover the light emitting layer and the insulation layer; a temporal sealing film covering the second electrode layer is formed; and a mask is formed onto the temporal sealing film. The substrate processing method contains: a step (A) of removing a part positioned onto the insulation layer in each of at least the temporal sealing film and the second electrode layer with the mask; and a step (B) of forming the sealing film covering upper surfaces of the temporal sealing film and the second electrode layer and a side end surface formed in the step (A).SELECTED DRAWING: Figure 4

Description

[Technical field]

[0001] The present disclosure relates to a substrate processing method and a substrate processing apparatus. [Background technology]

[0002] Patent Document 1 discloses a display device having a plurality of pixels arranged in a matrix. The display device includes a substrate, a plurality of first electrodes corresponding to the plurality of pixels provided on an insulating surface of the substrate, and an insulator partition wall surrounding the first electrodes and protruding above the surface of the first electrodes. The display device further includes an organic conductor film provided on the insulator partition wall and the first electrodes, an organic thin film provided on the organic conductor and containing an organic compound capable of electroluminescence, and a second electrode provided on the organic thin film. The relationship between the thickness T1 of the organic conductor film on the first electrode, the thickness T2 of the organic conductor film on the boundary between the first electrode and the insulator partition wall, and the thickness T3 of the organic conductor film on the insulator partition wall is T2>T1>T3. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2020-178136 A Summary of the Invention [Problem to be solved by the invention]

[0004] The technology according to the present disclosure suppresses electrical crosstalk between adjacent pixels without impairing the sealing performance of the sealing film. [Means for solving the problem]

[0005] One aspect of the present disclosure is a substrate processing method for processing a substrate, the substrate having a surface on which a plurality of first electrode layers and an insulating layer surrounding the first electrode layers and protruding above the first electrode layers are disposed, a light-emitting layer is formed on each of the first electrode layers, a second electrode layer is formed to cover the light-emitting layer and the insulating layer, a temporary sealing film is formed to cover the second electrode layer, and a mask is formed on the temporary sealing film, the substrate processing method including the steps of: (A) removing at least portions of the temporary sealing film and the second electrode layer located above the insulating layer using the mask; and (B) forming a sealing film covering upper surfaces of the temporary sealing film and the second electrode layer and side end surfaces formed by step (A). Effect of the Invention

[0006] According to the present disclosure, electrical crosstalk between adjacent pixels can be suppressed without impairing the sealing performance of the sealing film. [Brief description of the drawings]

[0007] [Figure 1] 1 is a plan view showing an outline of a configuration of a substrate processing apparatus according to an embodiment of the present invention; [Diagram 2] FIG. 2 is a vertical cross-sectional view showing an outline of the configuration of a processing module. [Diagram 3] 10 is a flowchart illustrating an example of a substrate processing sequence. [Figure 4] 5A to 5C are schematic partial cross-sectional views showing the state of the substrate after each process in the substrate processing sequence. [Diagram 5] 5 is a schematic cross-sectional view for explaining a state of an organic film layer on a substrate prepared in a preparation step. FIG. [Figure 6] 4 is a schematic partial enlarged view showing the state of the surface of the substrate after the removal process. FIG. [Figure 7] FIG. 2 is a diagram for explaining a frame region of a substrate. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] In recent years, organic EL (Electro-Luminescence) display devices have been attracting attention as display devices. An organic EL display device has a plurality of organic EL elements, and each organic EL element has a structure in which an organic EL layer including a light-emitting layer is sandwiched between a pair of electrode layers. In addition, some of the materials constituting the organic EL elements, such as the organic compounds that are the materials for the organic EL layer, are easily altered by moisture, oxygen, and the like. For this reason, an organic EL display device is provided with a sealing film that seals the above-mentioned easily altered parts.

[0009] In such organic EL display devices, when the organic EL elements are small, electrical crosstalk between the organic EL elements, i.e., between the pixels, can be a problem. For this reason, various structures for suppressing crosstalk in organic EL devices (hereinafter referred to as crosstalk suppression structures) have been proposed. In addition, when the crosstalk suppression structure is a structure that can expose the above-mentioned easily deteriorated parts, the structure also needs to be covered with the above-mentioned sealing film. However, depending on the shape of the crosstalk suppression structure, the sealing performance of the sealing film may be impaired.

[0010] Therefore, the technology according to the present disclosure suppresses electrical crosstalk between adjacent pixels without impairing the sealing performance of the sealing film.

[0011] Hereinafter, a substrate processing method and a substrate processing apparatus according to the present embodiment will be described with reference to the drawings. In this specification and the drawings, elements having substantially the same functional configurations are denoted by the same reference numerals, and duplicated description will be omitted.

[0012] <Substrate processing device 1> FIG. 1 is a plan view showing an outline of the configuration of a substrate processing apparatus 1 according to this embodiment. A substrate processing apparatus 1 in FIG. 1 processes a substrate, specifically, for manufacturing an OLED (Organic Light Emitting Diode) device such as an organic EL display device including a plurality of organic EL elements.

[0013] The substrate processing apparatus 1 has a configuration in which a carrier station 10, into which a carrier C capable of accommodating a plurality of substrates G is loaded and unloaded, and a processing station 11 having a plurality of processing modules 40 that perform predetermined processing on the substrates G under reduced pressure are integrally connected. The carrier station 10 and the processing station 11 are connected via a load lock module 12.

[0014] The load lock module 12 has a load lock chamber 13 configured so that the interior of the chamber can be switched between atmospheric pressure and vacuum.

[0015] The carrier station 10 has a transport mechanism 20 . The transfer mechanism 20 transfers the substrate G between the carrier C placed on the carrier placement table 21 and the load lock module 12 (specifically, the load lock chamber 13) under atmospheric pressure. The transfer mechanism 20 has a transfer arm 20a that supports the substrate G during transfer.

[0016] The processing station 11 has a vacuum transfer module 30 and a processing module 40. The processing station 11 is provided with a plurality of processing modules 40 (three in the illustrated example).

[0017] The vacuum transfer module 30 has a vacuum transfer chamber 31 whose interior is kept in a reduced pressure state (vacuum state). The vacuum transfer chamber 31 is connected to the load lock chamber 13 of the load lock module 12 via a gate valve G1. A gate valve G2 is also provided on the transfer mechanism 20 side of the load lock chamber 13.

[0018] The vacuum transfer chamber 31 is also connected to each of the vacuum processing chambers 41 described below via gate valves G3. A transfer mechanism 32 for transferring the substrate G is provided inside the vacuum transfer chamber 31. The transfer mechanism 32 transfers the substrate G into and out of the processing module 40 (specifically, the vacuum processing chamber 41) and the load lock module 12 (specifically, the load lock chamber 13). The transfer mechanism 32 has a transfer arm 32a that supports the substrate G during transfer.

[0019] In this embodiment, each of the processing modules 40 performs etching of a first insulating inorganic film described below, etching of a cathode layer described below, etching of an organic film layer described below, formation of a second inorganic insulating film described below, etc. That is, in this embodiment, each of the processing modules 40 functions as a removal unit and a film formation unit according to the present disclosure. Each of the processing modules 40 has a vacuum processing chamber 41 in which the above-mentioned etching, film formation, etc. are performed on the substrate G under reduced pressure.

[0020] The substrate processing apparatus 1 further includes a control unit 50 . The control unit 50 includes a computer equipped with a processor such as a CPU, a memory, and the like, and has a storage unit (not shown) for storing various information. The storage unit stores a program including instructions for a processing sequence executed by the substrate processing apparatus 1. The program may be recorded in a computer-readable storage medium and installed from the storage medium to the control unit 50. The storage medium may be temporary or non-temporary.

[0021] <Processing Module 40> FIG. 2 is a vertical cross-sectional view showing the outline of the configuration of the processing module 40. As shown in FIG. The processing module 40 is configured as, for example, a plasma processing apparatus that performs processing using plasma, that is, plasma processing, on a substrate G, and includes a container body 100 having a bottomed rectangular cylindrical shape as shown in the drawing.

[0022] The container body 100 is made of a conductive material, for example, aluminum, and is electrically grounded. Since corrosive gas is often used in the plasma processing, the inner wall surface of the container body 100 may be subjected to a corrosion-resistant coating treatment such as anodization treatment in order to improve corrosion resistance. In addition, an opening is formed on the upper surface of the container body 100. This opening is airtightly closed by a rectangular metal window 120 provided insulated from the container body 100, specifically, airtightly closed by the metal window 120 and a metal frame 110 described later. The space surrounded by the container body 100 and the metal window 120 becomes a processing space K1 in which a substrate G to be processed is located during plasma processing, and the space above the metal window 120 becomes an antenna chamber K2 in which a high-frequency antenna (plasma antenna) 190 described later is arranged. The side wall of the container body 100 on the side of the vacuum transfer chamber 31 (see Figure 1) is provided with a load / unload port (not shown) for loading / unloading the substrate G into / from the processing space K1, and a gate valve G3 (see Figure 1) for opening and closing the load / unload port.

[0023] A mounting table 130 is provided at the lower side of the processing space K1 so as to face the metal window 120. The mounting table 130 has a table body 131, the upper surface of which serves as a substrate mounting surface on which a substrate G is mounted, and the table body 131 is installed on the bottom surface of the container body 100 via legs 132.

[0024] The table main body 131 is provided with a base 131a made of a conductive material, for example, aluminum, and an electrostatic chuck 131b that holds the substrate G by electrostatic attraction. A high frequency power supply 141 is connected to the base 131a via a matching box 140. The high frequency power supply 141 supplies high frequency power for bias, for example, high frequency power having a frequency of 3.2 MHz, to the base 131a. This allows ions in the plasma generated in the processing space K1 to be attracted to the substrate G.

[0025] An exhaust port 101 is formed in the bottom wall of the container body 100, and an exhaust unit 150 having a vacuum pump or the like is connected to this exhaust port 101. The processing space K1 is depressurized by this exhaust unit 150.

[0026] A metal frame 110, which is a rectangular frame made of a metal material such as aluminum, is provided on the upper surface side of the side wall of the container body 100. A seal member 111 for keeping the processing space K1 airtight is provided between the container body 100 and the metal frame 110. The container body 100, the metal frame 110, and the metal window 120 together constitute a processing container that is configured to be decompressible and that houses the mounting table 130, and also constitute the vacuum processing chamber 41 described above.

[0027] The metal window 120 is formed, for example, in a rectangular shape when viewed from above. The metal window 120 also functions as a shower head that supplies a processing gas to the processing space K1. For example, the metal window 120 is formed with a number of gas discharge holes 121 that discharge the processing gas downward and a diffusion chamber 122 that diffuses the processing gas, and the gas discharge holes 121 and the diffusion chamber 122 are in communication with each other. The metal window 120 is electrically insulated from the metal frame 110 by an insulating member 123 .

[0028] To the diffusion chamber 122, for example, etching gas supply units 200 to 202 and a film forming gas supply unit 203 are connected via a supply pipe 210.

[0029] The etching gas supply unit 200 supplies an etching gas for the inorganic insulating film. The etching gas supply unit 201 supplies an etching gas for the cathode layer. The etching gas supply unit 202 supplies an etching gas for the organic film layer. The deposition gas supply unit 204 supplies deposition gas for forming an inorganic insulating film. The etching gas supply units 200 to 202 and the film forming gas supply unit 203 each have an on-off valve (not shown) for switching between starting and stopping the gas supply, a flow rate controller (not shown) for adjusting the flow rate of the gas supplied, etc. When supplying a mixed gas containing a plurality of types of gases, the etching gas supply units 200 to 202 and the film forming gas supply unit 203 are configured to be able to adjust the mixture ratio.

[0030] The diffusion chamber 122 is also connected to a purge gas supply unit (not shown) that supplies a purge gas such as an inert gas.

[0031] The space surrounded by the metal window 120, the side wall portion 181, and the top plate portion 180 constitutes an antenna chamber K2, and a high-frequency antenna 190 is disposed inside the antenna chamber K2 so as to face the metal window 120.

[0032] The high frequency antenna 190 is disposed at a distance from the metal window 120 via a spacer (not shown) made of, for example, an insulating material.

[0033] A high frequency power supply 143 is connected to the high frequency antenna 190 via a matching box 142. High frequency power of, for example, 13.56 MHz is supplied to the high frequency antenna 190 from the high frequency power supply 143 via the matching box 142. As a result, during plasma processing, an induced electric field is formed inside the processing space K1 via the metal window 120, and the processing gas discharged from the gas discharge hole 121 is turned into plasma by the induced electric field.

[0034] <Substrate processing sequence> Next, an example of a substrate processing sequence including a processing sequence executed by the substrate processing apparatus 1 will be described. Fig. 3 is a flow chart for explaining an example of the substrate processing sequence. Fig. 4 is a schematic partial cross-sectional view showing the state of the substrate G after each process of the substrate processing sequence. Fig. 5 is a schematic cross-sectional view for explaining the state of an organic film layer, described below, on the substrate G prepared in step S1. Fig. 6 is a schematic partial enlarged view showing the state of the surface of the substrate G after step S2.

[0035] (Step S1) First, as shown in FIG. 3, a substrate G is prepared as follows.

[0036] As shown in FIG. 4(A), the substrate G prepared in step S1 has a plurality of anode layers Ca formed on the substrate surface as a first electrode layer. The substrate G prepared in step S1 also has an insulating layer Di formed on the substrate surface, which surrounds the anode layer Ca and protrudes upward from the anode layer Ca. The substrate G prepared in step S1 also has a light-emitting layer formed on each anode layer Ca, specifically, an EL layer EL including a light-emitting layer formed on each anode layer Ca. The substrate G prepared in step S1 also has a cathode layer Cc formed as a second electrode layer so as to cover the EL layer EL and the insulating layer Di. Specifically, an organic film layer OL is formed so as to cover the EL layer EL and the insulating layer Di, and a cathode layer Cc is formed on the organic film layer OL, that is, an organic film layer OL covering the EL layer EL and the insulating layer Di is formed under the cathode layer Cc. The substrate G prepared in step S1 also has a first inorganic insulating film Zi1 formed as a temporary sealing film covering the cathode layer Cc. Furthermore, the substrate G prepared in step S1 has a photoresist mask (hereinafter, referred to as a resist mask) PRM formed on the first inorganic insulating film Zi1 as a mask.

[0037] The substrate G is made of, for example, a glass substrate, and may be made of a ceramic substrate, a plastic substrate, a metal substrate, or the like.

[0038] The anode layer Ca is formed and arranged on the surface of the substrate. The material of the anode layer Ca is, for example, indium tin oxide (ITO). The anode layer Ca can be formed by a known method.

[0039] The insulating layer Di defines the pixel region. The anode layer Ca is formed within the pixel region on the substrate surface. The insulating layer Di electrically insulates adjacent anode layers Ca. A known method can be used to form the insulating layer Di. Specifically, the insulating layer Di is formed by a lithography process using a resist (e.g., a photolithography process using a photoresist).

[0040] The EL layer EL is formed on the anode layer Ca, specifically, in contact with the upper surface of the anode layer Ca. The color of the light-emitting layer included in the EL layer EL is, for example, one of R (red), G (green), and B (blue) that is predetermined for each anode layer Ca. The EL layer EL may have other layers such as a hole transport layer in addition to the light-emitting layer. The light-emitting layer of the EL layer EL is made of an organic light-emitting material into which electrons and holes can be injected, and which emits light when the injected charges move and the holes and electrons are recombined. Each layer constituting the EL layer is formed, for example, using a mask (not shown) that exposes only the anode layer Ca. Known methods and materials can be used for forming the EL layer EL. A plurality of EL layers EL (specifically, two) may be provided for each anode layer Ca with a space therebetween in the vertical direction. In this case, the bottommost EL layer EL is formed in contact with the upper surface of the anode layer Ca. In this embodiment, as the EL layers EL, a lower EL layer ELb is provided on the lower side, and an upper EL layer ELt is provided on the upper side.

[0041] The organic film layer OL is a layer made of an organic material that covers the EL layer EL and the insulating layer Di together, and includes, for example, an electron injection layer (EIL) Li and an electron transport layer (ETL) Lt as shown in FIG. When a plurality of EL layers EL are provided at intervals in the vertical direction for each anode layer Ca, the organic film layer OL includes an intermediate electrode layer, i.e., a charge generation layer (CGL) Lc, as a third electrode layer. The charge generation layer Lc is formed between the EL layers EL arranged vertically. The electron injection layer Li, the electron transport layer Lt and the charge generation layer Lc are common between the pixel regions, that is, between the pixels.

[0042] In this embodiment, the organic film layer OL has a tandem structure in which OLED structures are stacked in the vertical direction, and includes, for example, a lower organic film layer OLb and an upper organic film layer OLt. The lower organic film layer OLb is formed in contact with the upper surfaces of the lower EL layer ELb and the insulating layer Di, as shown in FIG. 4A. The upper EL layer ELt is formed in contact with the upper surface of the portion of the lower organic film layer OLb located above the anode layer Ca. The lower organic film layer OLb also includes a charge generation layer Lc, as shown in FIG. 5. Specifically, the lower organic film layer OLb includes, from the bottom, an electron transport layer Lt, an electron injection layer Li, and a charge generation layer Lc. Therefore, the upper EL layer ELt is formed in contact with the charge generation layer Lc of the lower organic film layer OLb. As shown in Fig. 4A, the upper organic film layer OLt is formed in contact with the upper surface of the upper EL layer ELt and the upper surface of the portion of the lower organic film layer OLb located above the insulating layer Di. As shown in Fig. 5, the upper organic film layer OLt includes, from the bottom, an electron transport layer Lt and an electron injection layer Li. Above the anode layer Ca, an EL layer EL (specifically, an upper EL layer ELt) is formed between the lower organic film layer OLb and the upper organic film layer OLt, but above the insulating layer Di, no EL layer EL is formed between the lower organic film layer OLb and the upper organic film layer OLt.

[0043] Each layer constituting the organic film layer OL is formed, for example, entirely without using a mask, that is, as a continuous film. Known methods and materials can be used for forming each layer constituting the organic film layer OL. In addition, when the substrate G has a plurality of device formation regions described below, each layer constituting the organic film layer OL may be formed as a continuous film for each device formation region. The organic film layer OL has a thickness of, for example, 0.1 μm to 1.0 μm on the insulating layer Di.

[0044] 4A, the cathode layer Cc collectively covers the EL layer EL and the insulating layer Di. Specifically, the cathode layer Cc is formed in contact with the upper surface of the organic film layer OL that collectively covers the EL layer EL and the insulating layer Di, and more specifically, is formed in contact with the upper surface of the upper organic film layer OLt. This cathode layer Cc is common to all pixels, similar to the electron injection layer Li. The cathode layer Cc is formed as a continuous film by being entirely deposited without using a mask, like the layers constituting the organic film layer OL. The cathode layer Cc can be formed by known methods and materials. The thickness of the cathode layer Cc is, for example, 0.01 μm to 0.1 μm.

[0045] The first inorganic insulating film Zi1 seals the cathode layer Cc, specifically, seals the cathode layer Cc and the organic film layer OL. This first inorganic insulating film Zi1 is formed in contact with the upper surface of the cathode layer Cc. The first inorganic insulating film Zi1 can prevent the cathode layer Cc and the organic film layer OL from being altered by moisture, oxygen, etc. when the resist mask PRM is formed. The first inorganic insulating film Zi1 is formed as a continuous film by being entirely deposited without using a mask, similar to the cathode layer Cc. The first inorganic insulating film Zi1 may be made of, for example, silicon nitride (SiN), silicon oxide (SiO), or silicon oxynitride (SiON), or a combination of these. The first inorganic insulating film Zi1 may be formed by a known method. The thickness of the first inorganic insulating film Zi1 is, for example, 0.1 μm to 1.5 μm.

[0046] The resist mask PRM is formed, for example, by forming a photoresist film so as to cover the first inorganic insulating film Zi1, and then exposing and developing the photoresist film. The resist mask PRM is formed so as to expose the portions of the first inorganic insulating film Zi1 between adjacent pixels and to cover the other portions. Specifically, the resist mask PRM is formed so as to expose the portions of the first inorganic insulating film Zi1 between the pixels where the distance between the pixels is the shortest, and to cover the other portions. The resist mask PRM has a thickness of, for example, 0.5 μm to 2.5 μm.

[0047] In this step S1, specifically, first, the above-mentioned substrate G is taken out of the carrier C by the transfer arm 20a of the transfer mechanism 20, and the gate valve G2 is opened. After that, the substrate G is carried into the load lock module 12 (specifically, into the load lock chamber 13) by the transfer arm 20a. Then, the gate valve G2 is closed to seal the load lock chamber 13 and reduce the pressure. When the pressure in the load lock chamber 13 becomes equal to or lower than a predetermined pressure, the gate valve G1 is opened, and the substrate G is taken out of the load lock chamber 13 by the transfer arm 32a of the transfer mechanism 32 and carried into the vacuum transfer chamber 31. Next, after the gate valve G1 is closed, the gate valve G3 for the desired processing module 40 is opened. Then, the substrate G is carried into the processing module 40 (specifically, into the vacuum processing chamber 41) by the transfer arm 32a, and placed on the upper surface of the table body 131 of the placement table 130. Thereafter, the gate valve G3 is closed, and the processing space K1 is evacuated by the exhaust unit 150 until the inside of the processing space K1 reaches a predetermined pressure.

[0048] Furthermore, this step S1 may include at least one of the steps of forming an anode layer Ca, forming an insulating layer Di, forming an EL layer EL, forming a cathode layer Cc, or forming a first inorganic insulating film Zi1. Furthermore, this step S1 may include a step of forming an organic film layer OL. When this step S1 includes both the step of forming an anode layer Ca and the step of forming an insulating layer Di, for example, the former step is performed first.

[0049] (Step S2) Next, the portions of the first inorganic insulating film Zi1 and the cathode layer Cc located on the insulating layer Di are removed using the resist mask PRM. Specifically, the portions of the first inorganic insulating film Zi1, the cathode layer Cc, and the organic film layer OL located on the insulating layer Di are removed using the resist mask PRM. This step S2 includes steps S2a and S2b.

[0050] (Step S2a) In step S2a, as shown in FIG. 4(B), a portion of the first inorganic insulating film Zi1 located above the insulating layer Di is removed using a resist mask PRM to form a mask ZiM of the first inorganic insulating film Zi1.

[0051] Specifically, for example, while the exhaust of the processing space K1 by the exhaust unit 150 continues, an etching gas for the inorganic insulating film is supplied as a processing gas from the etching gas supply unit 200 through the diffusion chamber 122 and the gas discharge hole 121 into the processing space K1. After that, when the processing space K1 reaches a desired pressure, a high-frequency power is supplied from the high-frequency power source 143 to the high-frequency antenna 190, which generates an induced electric field in the processing space K1 through the metal window 120. The induced electric field also converts the etching gas in the processing space K1 into plasma, generating a high-density inductively coupled plasma. Then, ions in the plasma are attracted to the substrate G by the high-frequency bias power supplied from the high-frequency power source 141 to the table body 131 of the mounting table 130. As a result, the first inorganic insulating film Zi1 is removed through the resist mask PRM, and the pattern of the resist mask PRM is transferred to the first inorganic insulating film Zi1. As a result, a mask (hereinafter referred to as an inorganic mask) ZiM of the first inorganic insulating film Zi1 is formed.

[0052] The removal, i.e., etching, of the first inorganic insulating film Zi1 is performed, for example, until the portion of the first inorganic insulating film Zi1 exposed from the resist mask PRM disappears. When the removal of the first inorganic insulating film Zi1 is completed, the resist mask PRM may remain on the first inorganic insulating film Zi1. In other words, the inorganic mask ZiM may be a laminate of the first inorganic insulating film Zi1 after removal and the resist mask PRM. After the removal of the first inorganic insulating film Zi1 is completed, the power supply from the high frequency power sources 141 and 143 and the supply of the etching gas from the etching gas supply unit 200 are stopped, and the processing space K1 is purged.

[0053] (Step S2b) In step S2b following step S2a, as shown in FIG. 4C, portions of the cathode layer Cc and the organic film layer OL located above the insulating layer Di are removed using an inorganic mask ZiM. Specifically, the portion of the cathode layer Cc located above the insulating layer Di is removed using the inorganic mask ZiM, and then the portion of the organic film layer OL located above the insulating layer Di is removed using the inorganic mask ZiM.

[0054] More specifically, for example, while the exhaust of the processing space K1 by the exhaust unit 150 is continued, an etching gas for the cathode layer is supplied as a processing gas from the etching gas supply unit 201 through the diffusion chamber 122 and the gas discharge hole 121 into the processing space K1. After that, when the processing space K1 reaches a desired pressure, a high-frequency power is supplied from the high-frequency power source 143 to the high-frequency antenna 190, and an induced electric field is generated in the processing space K1 through the metal window 120. In addition, the induced electric field causes the etching gas in the processing space K1 to become plasma, and a high-density inductively coupled plasma is generated. Then, ions in the plasma are attracted to the substrate G by the high-frequency bias power supplied from the high-frequency power source 141 to the table body 131 of the mounting table 130. As a result, the cathode layer Cc is removed through the inorganic mask ZiM.

[0055] The removal, or etching, of the cathode layer Cc is carried out, for example, until the portion of the cathode layer Cc exposed from the inorganic mask ZiM disappears. After the removal of the cathode layer Cc is completed, the power supply from the high frequency power sources 141 and 143 and the supply of the etching gas from the etching gas supply unit 201 are stopped, and the processing space K1 is purged.

[0056] Then, for example, while the exhaust of the processing space K1 by the exhaust unit 150 continues, an etching gas for the organic film layer OL is supplied as a processing gas from the etching gas supply unit 202 through the diffusion chamber 122 and the gas discharge hole 121 into the processing space K1. Then, when the processing space K1 reaches a desired pressure, a high-frequency power is supplied from the high-frequency power source 143 to the high-frequency antenna 190, which generates an induced electric field in the processing space K1 through the metal window 120. The induced electric field also converts the etching gas in the processing space K1 into plasma, generating a high-density inductively coupled plasma. Then, ions in the plasma are attracted to the substrate G by the high-frequency bias power supplied from the high-frequency power source 141 to the table body 131 of the mounting table 130. As a result, the layers constituting the organic film layer OL are removed in order from the top through the inorganic mask ZiM. The etching gas may be different for each type of layer constituting the organic film layer OL.

[0057] This removal, i.e., etching, of the organic film layer OL is performed at least until the portion of the charge generating layer Lc of the organic film layer OL exposed from the inorganic mask ZiM disappears. Alternatively, the removal of the organic film layer OL may be performed until the entire portion of the organic film layer OL exposed from the inorganic mask ZiM disappears. After the removal of the organic film layer OL is completed, the power supply from the high frequency power sources 141 and 143 and the supply of the etching gas from the etching gas supply unit 202 are stopped, and the processing space K1 is purged.

[0058] By this step S2, as shown in FIG. 4(C) and FIG. 6, a groove T penetrating the cathode layer Cc is formed between adjacent anode layers Ca on the surface of the substrate G, i.e., between adjacent pixels. As a result, the cathode layer Cc for one pixel and the cathode layer Cc for another pixel adjacent to the one pixel are physically discontinuous in the pixel adjoining direction. That is, the cathode layer Cc is separated by the groove T between adjacent pixels. Also, when a plurality of EL layers EL are provided for each anode layer Ca, i.e., for each pixel, with a space therebetween in the vertical direction, the groove T penetrates at least from the top layer of the organic film layer OL to the charge generation layer Lc. As a result, the charge generation layer Lc for one pixel and the charge generation layer Lc for the other pixel are physically discontinuous in the pixel adjoining direction. That is, the charge generation layer Lc is separated by the groove T between adjacent pixels.

[0059] The cathode layer Cc for one pixel and the cathode layer Cc for the other pixel may be physically continuous through a portion other than the groove T. Similarly, the charge generation layer Lc for one pixel and the charge generation layer Lc for the other pixel may be physically continuous through a portion other than the groove T.

[0060] Furthermore, at the stage where step S2 is completed, the side end surface of the cathode layer Cc formed by step S2 is not covered by other layers and is exposed. At the stage where step S2 is completed, the side end surface of the cathode layer Cc constituting the groove T formed by step S2 is not covered by other layers and is exposed. More specifically, at the stage where step S2b is completed, the side end surfaces of the cathode layer Cc and the organic film layer OL constituting the groove T formed by steps S2a and S2b are not covered by other layers and are exposed.

[0061] Furthermore, in step S2, a portion of the cathode layer Cc located on the insulating layer Di may be removed so that the side end faces of the first inorganic insulating film Zi1 and the cathode layer Cc are inclined surfaces that are non-parallel to the thickness direction of the substrate G. More specifically, in step S2, a portion of the cathode layer Cc located on the insulating layer Di may be removed so that the side end faces of the first inorganic insulating film Zi1, the cathode layer Cc, and the organic film layer OL are inclined surfaces that are non-parallel to the thickness direction of the substrate G. This can be achieved by adjusting the selectivity of the layer to be etched relative to the etching mask. Specifically, this can be achieved by adjusting the etching selectivity of the first inorganic insulating film Zi1 relative to the resist mask PRM, the etching selectivity of the cathode layer Cc relative to the inorganic mask ZiM, and the etching selectivity of the organic film layer OL relative to the inorganic mask ZiM. The etching selectivity can be changed, for example, by adjusting any one of the following (a) to (c). (a) Pressure in the processing space K1 during etching (b) Output ratio of the high frequency power for plasma generation to the high frequency power for bias (c) Mixture ratio when the etching gas is a mixture of gases

[0062] In addition, the thickness of the resist mask PRM formed on the substrate G is adjusted in advance so that the resist mask PRM disappears at the stage where step S2 is completed, or a step of reducing the thickness of the resist mask PRM is performed before the step of removing the cathode layer Cc. The reduction in the thickness of the resist mask PRM is performed, for example, by ashing.

[0063] (Step S3) 4(D), a second inorganic insulating film Zi2 is formed as a sealing film that covers the upper surfaces of the first inorganic insulating film Zi1 and the cathode layer Cc and the side end surfaces formed in step S2. The second inorganic insulating film Zi2 is formed so as to contact the upper surface of the first inorganic insulating film Zi1 and the side end surfaces of the first inorganic insulating film Zi1 and the cathode layer Cc that form the trench T.

[0064] Specifically, in this step S3, a second inorganic insulating film Zi2 is formed to cover the upper surfaces of the first inorganic insulating film Zi1, the cathode layer Cc, and the organic film layer OL and the side end surfaces formed in step S2. The second inorganic insulating film Zi2 is formed so as to contact the upper surface of the first inorganic insulating film Zi1 and to contact the above-mentioned side end surfaces of the first inorganic insulating film Zi1, the cathode layer Cc, and the organic film layer OL that constitute the trench T.

[0065] More specifically, in this step S3, the substrate G is not exposed to the atmosphere after step S2, and the substrate processing apparatus 1 that performed step S2 forms the second inorganic insulating film Zi2 by CVD so as to seal the first inorganic insulating film Zi1, the cathode layer Cc, and the organic film layer OL. As a result, the side end faces of the cathode layer Cc and the organic film layer OL that were exposed after step S2 are collectively covered by the second inorganic insulating film Zi2. If a portion other than the side end face of the organic film layer OL is exposed after step S2, that portion is also covered by the second inorganic insulating film Zi2.

[0066] The second inorganic insulating film Zi2 is formed as a continuous film. Similarly to the first inorganic insulating film Zi1, the second inorganic insulating film Zi2 is formed of, for example, any one of SiN, SiO, and SiON, or a combination of these.

[0067] More specifically, in this step S3, for example, while the exhaust of the processing space K1 by the exhaust unit 150 is continued, a film forming gas for an inorganic insulating film is supplied as a processing gas from the film forming gas supply unit 203 through the diffusion chamber 122 and the gas discharge hole 121 into the processing space K1. After that, when the processing space K1 reaches a desired pressure, a high frequency power is supplied from the high frequency power source 143 to the high frequency antenna 190, and an induced electric field is generated in the processing space K1 through the metal window 120. In addition, the film forming gas in the processing space K1 is turned into plasma by the induced electric field, and a high density inductively coupled plasma is generated. Then, ions in the plasma are attracted to the substrate G by the bias high frequency power supplied from the high frequency power source 141 to the table body 131 of the mounting table 130. As a result, the second inorganic insulating film Zi2 is formed on the entire surface of the substrate G.

[0068] The formation of the second inorganic insulating film Zi2 is continued until the second inorganic insulating film Zi2 has a desired thickness. After the formation of the second inorganic insulating film Zi2 is completed, the power supply from the high frequency power sources 141 and 143 and the supply of the film forming gas from the film forming gas supply unit 203 are stopped, and the processing space K1 is purged. Thereafter, the substrate G is unloaded. Specifically, the substrate G is unloaded from the processing module 40 to the carrier C on the carrier mounting table 21 in a reverse procedure to that of loading the substrate G into the processing module 40.

[0069] This completes the substrate processing sequence. The above steps S2 and S3 are performed under the control of the control unit 50.

[0070] <Main Effects of This Embodiment> As described above, the substrate processing sequence according to this embodiment includes a removal step in which the portions of the first inorganic insulating film Zi and the cathode layer Cc located above the insulating layer Di are removed using a resist mask PRM. The cathode layer Cc that is removed by this removal step is formed so as to cover the organic EL layer and the insulating layer Di, that is, is formed across the adjacent pixel regions partitioned by the insulating layer Di. In addition, this removal step forms a groove T on the surface of the substrate G, and the cathode layer Cc is separated by the groove T between the pixel regions, i.e., between the pixels. Therefore, according to the substrate processing sequence according to this embodiment, electrical crosstalk between adjacent pixels can be suppressed. Specifically, electrical crosstalk on the cathode layer Cc between adjacent pixels can be suppressed.

[0071] Furthermore, the substrate processing sequence according to this embodiment includes a sealing step in which a second inorganic insulating film Zi2 is formed to cover the upper surfaces of the first inorganic insulating film Zi and the cathode layer Cc and the side end faces formed by the removal step, after the removal step, thereby sealing the entire cathode layer Cc, including the side end faces that constitute the groove T.

[0072] The following method (hereinafter, a comparative method) for cutting off the cathode layer between adjacent pixels, which is different from the present embodiment, is considered. That is, before forming the cathode layer, a groove having a high aspect ratio (i.e., depth relative to width) is formed in advance between adjacent pixels on the surface of the substrate, and then the cathode layer is formed. However, in this comparative method, unless the aspect ratio of the groove is increased, the coverage of the surface constituting the groove is not reduced, and the groove is covered with the cathode layer, so that the cathode layer cannot be cut off between adjacent pixels. In addition, if the aspect ratio of the groove is increased, in cases where the surface constituting the groove is easily altered by moisture, oxygen, or the like, it may be difficult to properly seal the surface constituting the groove with a sealing film due to its low coverage.

[0073] In contrast, in the substrate processing sequence according to the present embodiment, the cathode layer Cc, which was formed in advance so as to straddle adjacent pixels, is cut off between adjacent pixels by forming a groove T on the surface of the substrate G. With this method, the cathode layer can be cut off between adjacent pixels without increasing the aspect ratio of the groove T, that is, without reducing the coverage of the surface constituting the groove T. Therefore, after the above-mentioned removal step in which the groove T is formed, after the groove T is formed, the side end surface of the cathode layer Cc constituting the groove T can be covered with high coverage by the second inorganic insulating film Zi2, which is a sealing film. In other words, it is possible to prevent the sealing performance of the sealing film from being impaired by the groove T. As described above, according to this embodiment, it is possible to suppress electrical crosstalk between adjacent pixels without impairing the sealing performance of the sealing film.

[0074] Moreover, according to this embodiment, the side end faces constituting the grooves T of the organic film layer OL formed in advance so as to straddle adjacent pixels can also be covered with the second inorganic insulating film Zi2 with high coverage. In particular, in the charge generation layer Lc, similarly to the cathode layer Cc, adjacent pixels can be separated by the groove T, and the side end faces constituting the groove T can be covered with high coverage by the second inorganic insulating film Zi2. Therefore, according to this embodiment, electrical crosstalk on the charge generation layer Lc between adjacent pixels can be suppressed without impairing the sealing performance of the sealing film.

[0075] Furthermore, in the above-mentioned comparative method, the groove needs to be formed with high accuracy, and the film formation conditions of the cathode layer to be cut off need to be strict. In contrast, in the substrate processing according to the present embodiment, high accuracy is not required for the shape of the groove, and the film formation conditions of the cathode layer to be cut off are relatively lenient. Therefore, it is easy to determine the conditions for forming the groove and forming the cathode layer. The same is true for the charge generation layer Lc.

[0076] In addition, in this embodiment, the cathode layer Cc is physically isolated between adjacent pixels by the groove T. Therefore, compared with the case where the thickness of the cathode layer is adjusted to electrically isolate the cathode layer between adjacent pixels as in the technology disclosed in JP 2020-178136 A, this embodiment can more reliably suppress electrical crosstalk on the cathode layer Cc between adjacent pixels. The same applies to electrical crosstalk on the charge generation layer Lc between adjacent pixels.

[0077] In the substrate processing sequence according to the present embodiment, unlike the technique disclosed in JP 2020-178136 A, it is not necessary to locally vary the thickness of the cathode layer Cc when forming the cathode layer Cc. Therefore, the cathode layer Cc can be easily formed. The same is true for the charge generation layer Lc.

[0078] Furthermore, according to the substrate processing sequence of this embodiment, by adjusting the selectivity of the etching target layer relative to the mask, the side end faces of the first inorganic insulating film Zi1, the cathode layer Cc, and the organic film layer OL constituting the trench T can be inclined surfaces that are not parallel to the thickness direction of the substrate G. This improves the coverage of the side end faces with the second inorganic insulating film Zi2, i.e., the second inorganic insulating film Zi2 can be more reliably formed on the side end faces. As a result, the side end faces can be more appropriately sealed.

[0079] In this embodiment, the cathode layer Cc and the organic film layer OL are formed on the entire surface without using a mask, which results in a higher throughput than when the cathode layer Cc and the organic film layer OL are formed for each color, such as red, blue, and green.

[0080] (Modification) 4C, the groove T is formed in the insulating layer Di at the center between adjacent pixels, but the position is not limited to this as long as the groove T exists above the insulating layer Di. That is, according to this embodiment, the formation position of the groove T can be adjusted within the range above the insulating layer Di.

[0081] 7, the substrate G includes a device formation region DR in which the anode layer Ca and the insulating layer Di are formed, and a frame region FR surrounding the device formation region DR in a plan view. The first inorganic insulating film Zi1 and the cathode layer Cc may be formed not only in the device formation region DR but also in the frame region FR of the substrate G prepared in step S1, and the portions of the first inorganic insulating film Zi1 and the cathode layer Cc located above the frame region FR may be removed in step S2. Specifically, the first inorganic insulating film Zi1, the cathode layer Cc, and the organic film layer OL may be formed also in the frame region FR of the substrate G prepared in step S1, and the portions of the first inorganic insulating film Zi1, the cathode layer Cc, and the organic film layer OL located above the frame region FR may be removed in step S2. This makes it possible to prevent the first inorganic insulating film Zi1 and the like from being present in the frame region FR at the stage of forming the second inorganic insulating film Zi2, which is a sealing film, without using a mask. This allows the number of masks to be reduced, thereby reducing costs. In addition, it is possible to prevent substances adhering to the mask during film formation from adversely affecting the substrate G and the device.

[0082] In the above example, steps S2 and S3 are performed in one processing module 40, but parts of steps S2 and S3 may be performed in one or more other processing modules 40. However, by performing all the processes of step S2 and step S3 in one processing module 40, i.e., in one vacuum processing chamber 41, it is not necessary to transport the substrate G between the processes. Therefore, it is possible to suppress a decrease in productivity due to the introduction of a new process and adhesion of foreign matter to the substrate G during transportation.

[0083] The embodiments disclosed herein should be considered to be illustrative and not restrictive in all respects. The above-described embodiments may be omitted, substituted, or modified in various forms without departing from the scope and spirit of the appended claims. For example, the components of the above-described embodiments may be arbitrarily combined. From such an arbitrary combination, the actions and effects of each of the components in the combination can be obtained as a matter of course, and other actions and effects that are obvious to a person skilled in the art from the description of this specification can be obtained.

[0084] In addition, the effects described in this specification are merely explanatory or exemplary and are not limiting. In other words, the technology according to the present disclosure may achieve other effects that are apparent to a person skilled in the art from the description of this specification in addition to or in place of the above effects.

[0085] Note that the following configuration examples also fall within the technical scope of the present disclosure. (1) A substrate processing method for processing a substrate, comprising the steps of: The substrate is A plurality of first electrode layers and an insulating layer surrounding the first electrode layers and projecting upward from the first electrode layers are disposed on the surface; a light-emitting layer is formed on each of the first electrode layers; a second electrode layer is formed so as to cover the light emitting layer and the insulating layer; A temporary sealing film is formed to cover the second electrode layer; A mask is formed on the temporary sealing film, The substrate processing method includes: (A) removing at least a portion of the temporary sealing film and a portion of the second electrode layer located on the insulating layer by using the mask; (B) forming a sealing film that covers upper surfaces of the temporary sealing film and the second electrode layer and the side end surfaces formed in the (A) step. (2) the substrate has an organic film layer formed under the second electrode layer to cover the light-emitting layer and the insulating layer; The step (A) includes removing portions of the temporary sealing film, the second electrode layer, and the organic film layer located on the insulating layer by using the mask; The substrate processing method described in (1), wherein the (B) step forms the sealing film to cover the upper surfaces of the temporary sealing film, the second electrode layer, and the organic film layer, and the side end surfaces formed by the (A) step. (3) The substrate processing method according to (2), wherein the (A) step includes removing a portion of the temporary sealing film located above the insulating layer using the mask to form a mask of the temporary sealing film, and removing portions of the second electrode layer and the organic film layer located above the insulating layer using the mask of the temporary sealing film. (4) the organic film layer includes a third electrode layer; The substrate processing method according to (3), wherein the step (A) comprises removing a portion of the organic film layer located above the insulating layer, up to at least the third electrode layer, using a mask of the temporary sealing film. (5) The substrate processing method according to any one of (1) to (4), wherein the mask is a photoresist mask. (6) The substrate processing method according to any one of (1) to (5), wherein the temporary sealing film is an inorganic insulating film. (7) The substrate processing method according to any one of (1) to (6), wherein the step (A) removes a portion located on the insulating layer so that the side end surface becomes an inclined surface that is non-parallel to a thickness direction of the substrate. (8) The substrate has a device formation region in which the plurality of first electrode layers and the insulating layer are formed, and a frame region surrounding the device formation region, The substrate processing method according to any one of (1) to (7), wherein the step (A) also removes portions of the temporary sealing film and the second electrode layer located above the frame region. (9) A substrate processing apparatus for processing a substrate, The substrate is A plurality of first electrode layers and an insulating layer surrounding the first electrode layers and projecting upward from the first electrode layers are disposed on the surface; a light-emitting layer is formed on each of the first electrode layers; a second electrode layer is formed so as to cover the light emitting layer and the insulating layer; A temporary sealing film is formed to cover the second electrode layer; A mask is formed on the temporary sealing film, a removal unit that removes at least a portion of the temporary sealing film and the second electrode layer located on the insulating layer by using the mask; a film forming unit that forms a sealing film that covers upper surfaces of the temporary sealing film and the second electrode layer and a side end surface formed by the removal unit. [Explanation of symbols]

[0086] 1. Substrate Processing Equipment 40 Processing Module Ca anode layer Cc cathode layer Di insulating layer EL organic EL layer G board PRM resist mask Zi1 First inorganic insulating film Zi2 Second inorganic insulating film

Claims

1. A substrate processing method for processing a substrate, comprising the steps of: The substrate is a plurality of first electrode layers and an insulating layer surrounding the first electrode layers and projecting upward from the first electrode layers are disposed on the surface; a light-emitting layer is formed on each of the first electrode layers; a second electrode layer is formed so as to cover the light emitting layer and the insulating layer; A temporary sealing film is formed to cover the second electrode layer; A mask is formed on the temporary sealing film, The substrate processing method includes: (A) removing at least a portion of the temporary sealing film and a portion of the second electrode layer located on the insulating layer by using the mask; (B) forming a sealing film that covers upper surfaces of the temporary sealing film and the second electrode layer and the side end surfaces formed in the (A) step.

2. the substrate has an organic film layer formed under the second electrode layer, the organic film layer covering the light-emitting layer and the insulating layer; The step (A) includes removing portions of the temporary sealing film, the second electrode layer, and the organic film layer located on the insulating layer by using the mask; 2 . The substrate processing method according to claim 1 , wherein the step (B) forms the sealing film to cover upper surfaces of the temporary sealing film, the second electrode layer, and the organic film layer, and side end surfaces formed in the step (A).

3. 3. The substrate processing method of claim 2, wherein the (A) step includes removing a portion of the temporary sealing film located above the insulating layer using the mask to form a mask of the temporary sealing film, and removing portions of the second electrode layer and the organic film layer located above the insulating layer using the mask of the temporary sealing film.

4. The organic film layer includes a third electrode layer, 4. The substrate processing method according to claim 3, wherein in the step (A), a portion of the organic film layer located on the insulating layer up to at least the third electrode layer is removed using a mask of the temporary sealing film.

5. 5. The substrate processing method according to claim 1, wherein the mask is a photoresist mask.

6. 5. The substrate processing method according to claim 1, wherein the temporary sealing film is an inorganic insulating film.

7. 5. The substrate processing method according to claim 1, wherein the step (A) removes a portion located on the insulating layer such that the side end surface becomes an inclined surface that is non-parallel to a thickness direction of the substrate.

8. the substrate has a device formation region in which the plurality of first electrode layers and the insulating layer are formed, and a frame region surrounding the device formation region; 5. The substrate processing method according to claim 1, wherein the step (A) also removes portions of the temporary sealing film and the second electrode layer located above the frame region.

9. A substrate processing apparatus for processing a substrate, The substrate is a plurality of first electrode layers and an insulating layer surrounding the first electrode layers and projecting upward from the first electrode layers are disposed on the surface; a light-emitting layer is formed on each of the first electrode layers; a second electrode layer is formed so as to cover the light emitting layer and the insulating layer; A temporary sealing film is formed to cover the second electrode layer; A mask is formed on the temporary sealing film, a removal unit that removes at least a portion of the temporary sealing film and a portion of the second electrode layer that are located on the insulating layer by using the mask; a film forming unit that forms a sealing film that covers upper surfaces of the temporary sealing film and the second electrode layer and a side end surface formed by the removal unit.

Images