Load drive circuit and method for controlling load drive circuit

Abstract

To detect an abnormal current in a drive circuit caused by an abnormality in load driven by a drive circuit and stop the drive circuit even when the abnormal current cannot be detected as a temperature rise.SOLUTION: A load drive circuit includes: a drive circuit that receives a power supply voltage from a power supply circuit that reduces the power supply voltage when the power supply current exceeds a limit value, drives a load while receiving an enable signal at an active level, and stops driving the load while receiving the enable signal at an inactive level; a voltage drop detection circuit that outputs a first detection signal at an active level when the power supply voltage is lower than a first voltage, and outputs a first detection signal at an inactive level when the power supply voltage is equal to or higher than the first voltage; and an enable control circuit that outputs the enable signal at an inactive level on the basis of the first detection signal at an active level, and outputs the enable signal at an active level on the basis of the first detection signal at an inactive level.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a load driving circuit and a control method for a load driving circuit. [Background technology]

[0002] 2. Description of the Related Art Known load driving circuits that drive a speaker, which is a load, to output sound from the speaker include class D amplifier circuits and class B amplifier circuits (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2014-72613 A Summary of the Invention [Problem to be solved by the invention]

[0004] For example, in a speaker system in which the amplifier circuit that drives the speaker and the speaker are mounted on a board, if the + and - terminals of the speaker are shorted due to dust or the like adhering to the board, an abnormal current may flow through the amplifier circuit. An abnormal current in the amplifier circuit caused by a short circuit can be detected by detecting the temperature rise of the amplifier circuit using a thermal shutdown circuit or the like.

[0005] However, when a regulator is used as the power supply for an amplifier circuit, the regulator has a protection function that reduces the power supply voltage when the power supply current exceeds the limited current. This reduces the abnormal current, so there is a risk that the thermal shutdown circuit will not be able to detect a temperature rise and therefore the abnormal current will not be detected.

[0006] Furthermore, when multiple functional circuits, including an amplifier circuit, are integrated onto a single chip, the chip size and package size increase, which may result in an increase in the number of terminals on the package. If the number of terminals increases, the amount of heat dissipated from the package increases, and the allowable loss increases, so that the thermal shutdown circuit may not be able to detect a temperature rise caused by an abnormal current, and therefore the abnormal current may not be detected.

[0007] The disclosed technology aims to detect abnormal current and stop the drive circuit even when an abnormal current in a drive circuit caused by an abnormality in a load driven by the drive circuit cannot be detected as a temperature rise. [Means for solving the problem]

[0008] In order to solve the above technical problems, a load driving circuit of one embodiment of the present invention has a driving circuit that receives a power supply voltage from a power supply circuit that reduces the power supply voltage when a power supply current exceeds a limit value, drives a load while receiving an enable signal of an active level, and stops driving the load while receiving the enable signal of an inactive level, a voltage drop detection circuit that outputs a first detection signal of an active level when the power supply voltage is lower than a first voltage, and outputs a first detection signal of an inactive level when the power supply voltage is equal to or higher than the first voltage, and an enable control circuit that outputs the enable signal of an inactive level based on the first detection signal of an active level, and outputs the enable signal of an active level based on the first detection signal of an inactive level. Effect of the Invention

[0009] Even when an abnormal current in the drive circuit caused by an abnormality in the load driven by the drive circuit cannot be detected as a temperature rise, the abnormal current can be detected and the drive circuit can be stopped. [Brief description of the drawings]

[0010] [Figure 1] 1 is a block diagram showing an example of a system including a load driving circuit according to a first embodiment. [Diagram 2]2 is a diagram showing an example of characteristics of an output voltage and an output current of the regulator of FIG. 1. [Diagram 3] 2 is a timing diagram showing an example of the operation of the load driving circuit of FIG. 1. [Figure 4] FIG. 11 is a block diagram showing an example of a system including a load driving circuit according to a second embodiment. [Diagram 5] FIG. 13 is a block diagram showing an example of a system including a load driving circuit according to a third embodiment. [Figure 6] FIG. 13 is a block diagram showing an example of a system including a load driving circuit according to a fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, the embodiments will be described with reference to the drawings. In the following, the same reference numerals as the signal names may be used for the signal lines, terminals, and nodes through which signals are transmitted. The same reference numerals as the voltage names may be used for the voltage lines, terminals, nodes, and voltage values ​​through which voltages are transmitted. In each drawing, the same reference numerals may be used for the same components, and duplicated descriptions may be omitted.

[0012] (First embodiment) FIG. 1 is a block diagram showing an example of a system including a load driving circuit in the first embodiment. For example, the system SYS1 shown in FIG. 1 has a load driving circuit 100, a regulator 200, and a load circuit 301 such as a speaker SP, and functions as an audio output system. For example, the load driving circuit 100 has a semiconductor chip form, and is mounted on a substrate together with the regulator 200 and the load circuit 301 (speaker SP). For this reason, the system SYS1 may have a substrate form. The regulator 200 may be provided within the chip of the load driving circuit 100. The regulator 200 is an example of a power supply circuit that reduces the power supply voltage when the power supply current exceeds a limit value.

[0013] The output of regulator 200 is connected to power supply terminal VDD of load driving circuit 100. Each circuit of load driving circuit 100 operates by receiving power supply voltage VDD generated by regulator 200. Output terminals OUT+, OUT- of load driving circuit 100 are connected to the - terminal and + terminal of speaker SP, respectively.

[0014] The load driving circuit 100 includes an audio amplifier 10, a thermal shutdown circuit 20, a voltage drop detection circuit 30, a control circuit 40, a reference voltage generating unit 50, a capacitor C1, resistors R1 and R2, and a two-input NOR circuit. The audio amplifier 10 includes differential amplifiers AMP1 and AMP2, and resistors R11 and R12. The voltage drop detection circuit 30 includes a comparator CMP, an inverter IV1, and resistors R31, R32, R33, and R34. The audio amplifier 10 is an example of a driving circuit that drives a speaker SP, which is a load.

[0015] The capacitor C1 and resistor R1 are connected in series between the input terminal VIN of the load driving circuit 100 and the input terminal IN- of the audio amplifier 10, and function as a filter. The resistor R2 is disposed between the output and the - input of the amplifier AMP1, and functions as a feedback resistor. The output terminal ST_SS of the voltage drop detection circuit 30 is connected to the input of the control circuit 40. The two inputs of the NOR circuit are connected to the high temperature detection terminal HT of the thermal shutdown circuit 20 and the output terminal ST_SS2 of the control circuit 40, respectively. The output of the NOR circuit is connected to the enable terminal EN of the audio amplifier 10. The control circuit 40 and the NOR circuit are an example of an enable control circuit. The reference voltage generation unit 50 outputs a reference voltage to the input terminal IN+ of the audio amplifier 10.

[0016] The audio amplifier 10 operates when it receives a high-level enable signal EN at its enable terminal EN, and stops operating when it receives a low-level enable signal EN at its enable terminal EN. The resistors R11 and R12 are connected in series between the outputs of the amplifiers AMP1 and AMP2, and the connection node CN of the resistors R11 and R12 is connected to the negative input of the amplifier AMP2.

[0017] The amplifier AMP1 receives an AC input signal VIN supplied via a capacitor C1 and a resistor R1 at the input terminal - via the input terminal IN-, and receives a reference voltage at the input terminal + via the input terminal IN+. The amplifier AMP1 inverts and amplifies the input signal VIN received at the input terminal - in accordance with the resistance ratio of the resistors R1 and R2, and outputs the signal to the output terminal OUT+ as an output signal OUT+. The input terminals IN- and IN+ of the amplifier AMP1 are an example of a pair of first input terminals. The output terminal OUT+ is an example of a first output terminal, and the output signal OUT+ is an example of a first output signal. The amplifier AMP2 receives an output signal OUT+ of the amplifier AMP1 at the input terminal - via the resistor R11 and a connection node CN, and receives a reference voltage at the input terminal +. The amplifier AMP2 inverts and amplifies the signal received at the input terminal -, and outputs the signal to the output terminal OUT- as an output signal OUT-. The input terminals IN- and IN+ of the amplifier AMP2 are an example of a pair of second input terminals. The output terminal OUT- is an example of a second output terminal, and the output signal OUT- is an example of a second output signal.

[0018] As described above, the audio amplifier 10 inverts and amplifies the input signal VIN and outputs it as differential output signals OUT+ and OUT- to the negative and positive terminals of the speaker SP. Then, sound such as voice corresponding to the input signal VIN is output from the speaker SP.

[0019] The thermal shutdown circuit 20 includes a transistor and detects temperature by utilizing the temperature dependency of the base-emitter voltage VBE of the transistor. If the detected temperature is equal to or higher than a predetermined temperature, the thermal shutdown circuit 20 outputs a high-level high-temperature detection signal HT to the NOR circuit, and if the detected temperature is lower than the predetermined temperature, the thermal shutdown circuit 20 outputs a low-level high-temperature detection signal HT to the NOR circuit.

[0020] The thermal shutdown circuit 20 is an example of a temperature detection circuit. The predetermined temperature is the maximum temperature within a range in which the power consumption of the load driving circuit 100 does not exceed the allowable loss, and is an example of a first temperature. The high temperature detection signal HT is an example of a second detection signal. The high level of the high temperature detection signal HT is an example of an effective level, and the low level of the high temperature detection signal HT is an example of an ineffective level.

[0021] In the voltage drop detection circuit 30, resistors R31 and R32 are connected in series between a power supply line VDD and a ground line GND, and a voltage DIV1 obtained by dividing the power supply voltage VDD according to the resistance ratio is supplied to an input terminal + of the comparator CMP. Resistors R33 and R34 are connected in series between a reference voltage line VREF and a ground line GND, and a voltage DIV2 obtained by dividing the reference voltage VREF according to the resistance ratio is supplied to an input terminal - of the comparator CMP. The reference voltage VREF is an example of a first voltage.

[0022] When the voltage DIV1 is equal to or higher than the voltage DIV2, the comparator CMP detects that the power supply voltage VDD is equal to or higher than the reference voltage VREF and outputs a high level to the inverter IV1. The inverter IV1 receiving the high level outputs a voltage drop detection signal ST_SS at a low level, which indicates that the power supply voltage VDD is normal, to the control circuit 40.

[0023] When the voltage DIV1 is lower than the voltage DIV2, the comparator CMP detects that the power supply voltage VDD is lower than the reference voltage VREF and outputs a low level to the inverter IV1. The inverter IV1 receiving the low level outputs a voltage drop detection signal ST_SS of a high level indicating that the power supply voltage VDD is lower than the normal value to the control circuit 40.

[0024] The control circuit 40 receives a status signal ST indicating the status of various circuits mounted in the load driving circuit 100, and outputs various control signals CNTL in response to the status signal ST. In addition, the control circuit 40 outputs a high-level voltage drop detection signal ST_SS2 to the NOR circuit when the voltage drop detection signal ST_SS is at a high level, and outputs a low-level voltage drop detection signal ST_SS2 to the NOR circuit when the voltage drop detection signal ST_SS is at a low level.

[0025] The voltage drop detection signals ST_SS and ST_SS2 are an example of a first detection signal. The high level of the voltage drop detection signals ST_SS and ST_SS2 is an example of an effective level, and the low level of the voltage drop detection signals ST_SS and ST_SS2 is an example of an ineffective level.

[0026] When the NOR circuit receives one or both of the high-level high temperature detection signal HT and the high-level voltage drop detection signal ST_SS2, it outputs a low-level enable signal EN to the enable terminal EN of the audio amplifier 10. When the NOR circuit receives the low-level high temperature detection signal HT and the low-level voltage drop detection signal ST_SS2, it outputs a high-level enable signal EN to the enable terminal EN of the audio amplifier 10.

[0027] As described above, the audio amplifier 10 stops operating when the thermal shutdown circuit 20 detects a high temperature or when the voltage drop detection circuit 30 detects that the power supply voltage VDD is lower than the normal value. The audio amplifier 10 operates when the thermal shutdown circuit 20 does not detect a high temperature and the voltage drop detection circuit 30 detects that the power supply voltage VDD is at the normal value.

[0028] For example, even if the load driving circuit 100 generates heat due to an abnormality in the circuitry within the load driving circuit 100 and the power supply current from the regulator 200 does not exceed the limited current, the operation of the audio amplifier 10 can be stopped by the thermal shutdown circuit 20. As a result, for example, the generation of an abnormal current in the audio amplifier 10 can be prevented in advance.

[0029] On the other hand, when a current larger than the limit current of regulator 200 flows through audio amplifier 10, the supply of power supply current from regulator 200 to audio amplifier 10 is limited. As a result, when the amount of heat generated by audio amplifier 10 decreases, it becomes difficult for thermal shutdown circuit 20 to detect the abnormal current.

[0030] However, in this embodiment, when the regulator 200 limits the supply of power supply current, the power supply voltage VDD output from the regulator 200 drops. When the voltage drop detection circuit 30 detects a drop in the power supply voltage VDD, it outputs a high-level voltage drop detection signal ST_SS to stop the operation of the audio amplifier 10. Therefore, even when the regulator 200 limits the power supply current, the load driving circuit 100 can detect an abnormal current in the audio amplifier 10 that occurs due to a short circuit in the speaker SP.

[0031] Fig. 2 is a diagram showing an example of the characteristics of the output voltage and output current of regulator 200 in Fig. 1. When load driving circuit 100 operates in response to power supply voltage VDD output from regulator 200 and a predetermined power supply current is consumed by load driving circuit 100, regulator 200 outputs a constant power supply voltage VDD (Fig. 2(a)).

[0032] On the other hand, if the current consumption of the load driving circuit 100 increases due to a short circuit in the speaker SP or the like and exceeds the limited current of the regulator 200, the regulator 200 activates its current limiting function and reduces the power supply voltage VDD that it outputs (FIG. 2(b)). As a result, the power supply current (regulator output current) supplied from the regulator 200 to the load driving circuit 100 decreases as the power supply voltage VDD decreases (FIG. 2(c)).

[0033] Fig. 3 is a timing diagram showing an example of the operation of the load driving circuit 100 of Fig. 1. That is, Fig. 3 shows an example of a control method for the load driving circuit 100. First, when the system SYS1 is powered on, the regulator 200 starts generating the power supply voltage VDD, and the load driving circuit 100 starts operating (Fig. 3(a)).

[0034] The thermal shutdown circuit 20 does not detect a high temperature and outputs a low-level high temperature detection signal HT (FIG. 3(b)). The voltage drop detection circuit 30 outputs a low-level voltage drop detection signal ST_SS and the control circuit 40 outputs a low-level voltage drop detection signal ST_SS2 (FIG. 3(c)) because the power supply voltage VDD is normal.

[0035] The NOR circuit outputs a high-level enable signal EN to the audio amplifier 10 based on the low-level high temperature detection signal HT and the low-level voltage drop detection signal ST_SS2 (FIG. 3(d)). Then, the audio amplifier 10 differentially amplifies the voltage of the input signal VIN and outputs it to the speaker SP, causing the speaker SP to output sound. At this time, no short circuit has occurred in the speaker SP.

[0036] After that, any of the components mounted on the system SYS1 including the load driving circuit 100 becomes hot for some reason, and the thermal shutdown circuit 20 detects the temperature abnormality. Note that the power supply current of the regulator 200 does not exceed the limit current depending on the high temperature state of the components in the system SYS1 during the abnormal temperature detection period, so the power supply voltage VDD is maintained at a normal value (FIG. 3(e)).

[0037] During the abnormal temperature detection period, the thermal shutdown circuit 20 outputs a high-level high temperature detection signal HT to the NOR circuit, and the NOR circuit outputs a low-level enable signal EN to the audio amplifier 10 (FIGS. 3(f) and (g)). The audio amplifier 10 stops operating based on the low-level enable signal EN, and the speaker SP stops outputting sound.

[0038] After that, the high temperature state of the system SYS1 is resolved, and the thermal shutdown circuit 20 changes the high temperature detection signal HT to low level (FIG. 3(h)). The NOR circuit outputs a high level enable signal EN to the audio amplifier 10 based on the low level high temperature detection signal HT and the low level voltage drop detection signal ST_SS2 (FIG. 3(i)). This resumes sound output from the speaker SP.

[0039] After this, a temporary short circuit occurs between the - terminal and + terminal of the speaker SP. A temporary short circuit may occur, for example, due to moisture absorption from dust or the like that has accumulated on the terminal portion of the speaker SP. The short circuit causes a through current to flow between the output terminals OUT+ and OUT- of the load driving circuit 100. When a power supply current larger than the limited current is output from the regulator 200, the regulator 200 limits the supply of the power supply current and reduces the power supply voltage VDD (FIG. 3(j)).

[0040] When the power supply voltage VDD becomes lower than the reference voltage VREF, the voltage drop detection circuit 30 outputs a high-level voltage drop detection signal ST_SS, and the control circuit 40 outputs a high-level voltage drop detection signal ST_SS2 (FIG. 3(k)). The NOR circuit outputs a low-level enable signal EN to the audio amplifier 10 based on the high-level voltage drop detection signal ST_SS2 (FIG. 3(l)). The audio amplifier 10 stops operating during the VDD drop detection period based on the low-level enable signal EN, and the speaker SP stops outputting sound.

[0041] After this, the temporary short circuit between the - and + terminals of the speaker SP is eliminated, and a normal power supply voltage VDD equal to or higher than the reference voltage VREF is output from the regulator 200 (Fig. 3(m)). Because the power supply voltage VDD has become equal to or higher than the reference voltage VREF, the voltage drop detection circuit 30 changes the voltage drop detection signal ST_SS to low level, and the control circuit 40 outputs a low-level voltage drop detection signal ST_SS2 (Fig. 3(n)). The NOR circuit outputs a high-level enable signal EN to the audio amplifier 10 based on the low-level voltage drop detection signal ST_SS2 and the low-level high temperature detection signal HT (Fig. 3(o)). This resumes sound output from the speaker SP.

[0042] The load driving circuit 100 may not have the thermal shutdown circuit 20. In this case, one input of the NOR circuit is set to a low level. The operation of the load driving circuit 100 without the thermal shutdown circuit 20 is similar to the operation waveforms of FIG. 3, except that there is no waveform of the high temperature detection signal HT in FIG. 3 and there is no change in the enable signal EN based on the high temperature detection signal HT. The load driving circuit 100 may not have the control circuit 40. In this case, the voltage drop detection signal ST_SS may be directly connected to the input of the NOR circuit.

[0043] As described above, in the first embodiment, when the voltage drop detection circuit 30 detects a drop in the power supply voltage VDD, it outputs a high-level voltage drop detection signal ST_SS to stop the operation of the audio amplifier 10. Therefore, even when the regulator 200 limits the power supply current, the load driving circuit 100 can detect an abnormal current in the audio amplifier 10 that occurs due to a short circuit in the speaker SP. As a result, even when an abnormal current in the audio amplifier 10 that occurs due to an abnormality in the load circuit 301 driven by the audio amplifier 10 cannot be detected as a temperature rise, the abnormal current can be detected and the audio amplifier 10 can be stopped.

[0044] In addition, even if the load driving circuit 100 generates heat due to an abnormality in the circuit within the load driving circuit 100, and the power supply current from the regulator 200 does not exceed the limited current, the thermal shutdown circuit 20 can stop the operation of the audio amplifier 10.

[0045] Second embodiment Fig. 4 is a block diagram showing an example of a system including a load driving circuit according to the second embodiment. The same elements as those in Fig. 1 are given the same reference numerals, and detailed description thereof will be omitted. The system SYS2 shown in Fig. 4 includes a load driving circuit 102, a regulator 200, and a load circuit 302. The load driving circuit 102 has the same configuration and function as the load driving circuit 100 in Fig. 1, except that it includes a driving circuit 12 instead of the audio amplifier 10 in Fig. 1.

[0046] The driving circuit 12 includes a two-input NAND circuit, an inverter IV2, and an open-drain type n-channel MOS (Metal Oxide Semiconductor) transistor NM1. Hereinafter, the n-channel MOS transistor NM1 will also be referred to simply as the transistor NM1.

[0047] One input of the NAND circuit is connected to the input terminal IN of the load driving circuit 102, and the other input of the NAND circuit is connected to the enable terminal EN. The output of the NAND circuit is connected to the input of the inverter IV2, and the output of the inverter IV2 is connected to the gate of the transistor NM1. The drain of the transistor NM1 is connected to the load circuit 302 via the output terminal OUT, and the source of the transistor NM1 is connected to the ground line GND.

[0048] For example, the load circuit 302 has a load L1 equivalently represented as a resistor, which is connected between a power supply line VDD and an output terminal OUT of the drive circuit 12. For example, the load circuit 302 may be an LED (Light Emitting Diode). The drive circuit 12 operates when it receives a high-level enable signal EN, and operates the load circuit 302 by turning on the transistor NM1 in response to a high-level input signal IN. When it receives a low-level enable signal EN, the drive circuit 12 turns off the transistor NM1 to stop the operation of the load circuit 302.

[0049] The load driving circuit 102 operates in the same manner as in Fig. 3. However, "sound output stops" during the low level period of the enable signal EN in Fig. 3 is replaced with "driving of the load circuit 302 by the transistor NM1 stops."

[0050] As described above, the second embodiment can also provide the same effects as the first embodiment. For example, even if an abnormal current in the drive circuit 12 caused by an abnormality in the load driven by the drive circuit 12 cannot be detected as a temperature rise, the drive circuit 12 can be stopped by detecting the abnormal current.

[0051] (Third embodiment) Fig. 5 is a block diagram showing an example of a system including a load driving circuit according to the third embodiment. The same elements as those in Fig. 1 and Fig. 4 are given the same reference numerals, and detailed description thereof will be omitted. The system SYS3 shown in Fig. 5 has a load driving circuit 103, a regulator 200, and a load circuit 303. The load driving circuit 103 has the same configuration and function as the load driving circuit 100 in Fig. 1, except that it has a driving circuit 13 instead of the audio amplifier 10 in Fig. 1.

[0052] The driving circuit 13 includes a two-input NAND circuit and an open-drain type p-channel MOS transistor PM1. Hereinafter, the p-channel MOS transistor PM1 will also be simply referred to as the transistor PM1.

[0053] One input of the NAND circuit is connected to the input terminal IN of the load driving circuit 103, and the other input of the NAND circuit is connected to the enable terminal EN. The output of the NAND circuit is connected to the gate of the transistor PM1. The drain of the transistor PM1 is connected to the load circuit 303 via the output terminal OUT, and the source of the transistor PM1 is connected to the power supply line VDD.

[0054] For example, the load circuit 303 has a load L2, which is equivalently represented as a resistor, connected between the output terminal OUT of the drive circuit 13 and a ground line GND. The drive circuit 13 operates when it receives a high-level enable signal EN, and turns on the transistor PM1 in response to a high-level input signal IN to operate the load circuit 303. When it receives a low-level enable signal EN, the drive circuit 13 turns off the transistor PM1 to stop the operation of the load circuit 303.

[0055] The load driving circuit 103 operates in the same manner as in Fig. 3. However, "sound output stops" during the low level period of the enable signal EN in Fig. 3 is replaced with "driving of the load circuit 303 by the transistor PM1 stops."

[0056] As described above, the third embodiment can also provide the same effects as the first embodiment. For example, even if an abnormal current in the drive circuit 13 caused by an abnormality in the load driven by the drive circuit 13 cannot be detected as a temperature rise, the drive circuit 13 can be stopped by detecting the abnormal current.

[0057] (Fourth embodiment) Fig. 6 is a block diagram showing an example of a system including a load driving circuit according to the fourth embodiment. The same elements as those in Figs. 1, 4 and 5 are given the same reference numerals, and detailed description thereof will be omitted. The system SYS4 shown in Fig. 6 includes a load driving circuit 104, a regulator 200, and a load circuit 304. The load driving circuit 104 has the same configuration and function as the load driving circuit 100 in Fig. 1, except that it includes a driving circuit 14 instead of the audio amplifier 10 in Fig. 1.

[0058] The drive circuit 14 includes a two-input NAND circuit, an inverter IV2, and a CMOS inverter IV3. The CMOS inverter IV3 includes transistors PM1 and NM1. The source of the transistor PM1 is connected to a power supply line VDD, and the source of the transistor NM1 is connected to a ground line GND.

[0059] One input of the NAND circuit is connected to the input terminal IN of the load driving circuit 104, and the other input of the NAND circuit is connected to the enable terminal EN. The output of the NAND circuit is connected to the input of the CMOS inverter IV3 via the inverter IV2. The output of the CMOS inverter IV3 is connected to the load circuit 304 via the output terminal OUT.

[0060] For example, the load circuit 304 has loads L3, L4 and a switch SW. The load L3 is connected between the output terminal OUT of the drive circuit 14 and a power supply line VDD. The load L4 is connected between the output terminal OUT of the drive circuit 14 and a ground line GND. The switch SW connects the output terminal OUT to either the load L1 or L2. The switching of the switch SW may be performed by a control circuit of the load drive circuit 104, or may be performed by another control circuit in the system SYS4.

[0061] In a first operation mode in which the output terminal OUT is connected to the load L3 by the switch SW, the load driving circuit 104 operates in the same manner as the load driving circuit 102 in Fig. 4. In a second operation mode in which the output terminal OUT is connected to the load L4 by the switch SW, the load driving circuit 104 operates in the same manner as the load driving circuit 103 in Fig. 5.

[0062] As described above, the fourth embodiment can also provide the same effects as the first to third embodiments. For example, even if an abnormal current in the drive circuit 14 caused by an abnormality in the load driven by the drive circuit 14 cannot be detected as a temperature rise, the drive circuit 14 can be stopped by detecting the abnormal current.

[0063] Although the present invention has been described above based on the embodiments, the present invention is not limited to the requirements shown in the above embodiments. These points can be changed without departing from the spirit of the present invention, and can be appropriately determined according to the application form. [Explanation of symbols]

[0064] 10 Audio Amplifier 12, 13, 14 Drive circuit 20 Thermal Shutdown Circuit 30 Voltage drop detection circuit 40 Control circuit 50 Reference voltage generator 100, 102, 103, 104 Load drive circuit 200 Regulator 301, 302, 303, 304 load circuit AMP1, AMP2 Differential Amplifiers C1 Capacitor CMP Comparator CN Connection Node CNTL Control Signal DIV1, DIV2 voltage EN Enable signal HT High temperature detection signal IN, IN+, IN- input terminals IV1, IV2, IV3 inverters L1, L2, L3, L4 load NM1 Transistor OUT, OUT+, OUT- Output terminals PM1 Transistor R1, R2, R11, R12 resistors R31, R32, R33, R34 resistors SP Speaker ST Status Signal ST_SS, ST_SS2 Voltage drop detection signal SW Switch SYS1, SYS2, SYS3, SYS4 systems VDD Power supply pin VIN input terminal VREF Reference voltage

Claims

1. a drive circuit that receives a power supply voltage from a power supply circuit that reduces the power supply voltage when a power supply current exceeds a limit value, drives a load while receiving an enable signal at an active level, and stops driving the load while receiving the enable signal at an inactive level; a voltage drop detection circuit that outputs a first detection signal of an active level when the power supply voltage is lower than a first voltage, and outputs a first detection signal of an inactive level when the power supply voltage is equal to or higher than the first voltage; an enable control circuit that outputs the enable signal at an invalid level based on the first detection signal at an valid level, and outputs the enable signal at an valid level based on the first detection signal at an invalid level; A load driving circuit having

2. a temperature detection circuit that outputs a second detection signal at an effective level when the temperature is equal to or higher than a first temperature, and outputs the second detection signal at an ineffective level when the temperature is lower than the first temperature; The enable control circuit outputs the enable signal at an invalid level based on the first detection signal at an invalid level or the second detection signal at an invalid level, and outputs the enable signal at an invalid level based on the first detection signal at an invalid level and the second detection signal at an invalid level.

2. The load driving circuit according to claim 1.

3. The drive circuit includes: a first amplifier that receives an input signal and a reference voltage input via a filter at a pair of first input terminals and outputs a first output signal from a first output terminal; a second amplifier receiving the reference voltage and the third voltage at a pair of second input terminals, respectively, and outputting a second output signal from a second output terminal; the third voltage is a voltage outputted across resistors connected in series between the first output terminal and the second output terminal, The load is a speaker having a first input terminal to which the first output signal is input and a second input terminal to which the second output signal is input.

3. The load driving circuit according to claim 1 or 2.

4. 1. A method for controlling a load drive circuit that drives a load by receiving a power supply voltage from a power supply circuit that reduces the power supply voltage when a power supply current exceeds a limit value, comprising: driving a load while receiving an enable signal at a valid level, and stopping the driving of the load while receiving the enable signal at an invalid level; When the power supply voltage is lower than a first voltage, a first detection signal having an active level is output, and when the power supply voltage is equal to or higher than the first voltage, a first detection signal having an inactive level is output; The enable signal is output at an invalid level based on the first detection signal being at an invalid level, and the enable signal is output at an valid level based on the first detection signal being at an invalid level. A method for controlling a load drive circuit.

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