Semiconductor device and method for manufacturing semiconductor device
Patent Information
- Application Number
- JP2023126355
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-02
- Publication Date
- 2025-02-14
Smart Images
Figure 2025022095000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]
[0002] Patent Document 1 describes a semiconductor module "having a housing 122 and a module main body MD housed in the housing 122." Patent Document 2 describes a semiconductor module that includes "a first insulating substrate 102 and a second insulating substrate 110 arranged side by side," in which "a semiconductor element 22 is fixed to the metal pattern 16 by solder 20," and "a semiconductor element 122 is fixed to the metal pattern 114 by solder 120." Patent Document 3 describes a configuration in which "a leaf spring 60 is disposed on the upper part of each of the semiconductor modules 30, 31, and 32." [Prior art document] [Patent documents] [Patent Document 1] JP 2015-170786 A [Patent Document 2] JP 2015-216349 A [Patent Document 3] JP 2014-225571 A Summary of the Invention [Problem to be solved by the invention]
[0003] It is desirable to uniformize the pressure applied to a plurality of semiconductor module cells constituting a semiconductor module and improve the cooling efficiency of the semiconductor module. [Means for solving the problem]
[0004] In a first aspect of the present invention, there is provided a semiconductor device comprising: a heat sink; a first semiconductor module cell provided above the heat sink; a second semiconductor module cell provided above the heat sink and in contact with the first semiconductor module cell; and a case portion connected to the heat sink and accommodating the first semiconductor module cell and the second semiconductor module cell, wherein the first semiconductor module cell has a first laminated substrate, a first semiconductor chip mounted on the first laminated substrate, and a first sealing portion covering the first semiconductor chip, and the second semiconductor module cell has a second laminated substrate, a second semiconductor chip mounted on the second laminated substrate, and a second sealing portion covering the second semiconductor chip, and comprises a pressing portion for pressing upper surfaces of the first sealing portion and the second sealing portion, and side surfaces of the first sealing portion and the second sealing portion are in contact with each other.
[0005] In the above semiconductor device, the first sealing portion and the second sealing portion may have one or a plurality of contact surfaces where inclined side surfaces come into contact with each other.
[0006] In any of the semiconductor devices described above, an angle of any of the one or more contact surfaces with respect to a stacking direction of the first laminated substrate and the second laminated substrate may be not less than 10° and not more than 90°.
[0007] In any of the above semiconductor devices, the one or more contact surfaces may include a first inclined portion having an angle of 10° or more and 90° or less with respect to the stacking direction of the first laminated substrate and the second laminated substrate, and a second inclined portion having an angle of -90° or more and -10° or less with respect to the stacking direction of the first laminated substrate and the second laminated substrate.
[0008] In any of the semiconductor devices described above, the first inclined portion and the second inclined portion may have the same absolute value of an angle.
[0009] In any of the semiconductor devices described above, the first sealing portion and the second sealing portion may be provided so that their side surfaces are in contact with each other and are separable from each other.
[0010] In any of the above semiconductor devices, the case portion may have a plurality of connecting portions for connecting to the heat sink.
[0011] In any of the above semiconductor devices, the case portion may be separated from the first laminated substrate and the second laminated substrate.
[0012] Any of the above semiconductor devices may further include an organic insulating intervening portion provided on an upper surface of the heat sink.
[0013] In any of the semiconductor devices described above, the first semiconductor module cell and the second semiconductor module cell may be provided above a common intermediate portion.
[0014] Any of the above semiconductor devices may further include a third semiconductor module cell having a third laminated substrate, a third semiconductor chip placed on the third laminated substrate, and a third sealing portion covering the third semiconductor chip.
[0015] In any of the semiconductor devices described above, a sidewall of the third sealing portion may be in contact with at least one of a sidewall of the first sealing portion and a sidewall of the second sealing portion.
[0016] In any of the above semiconductor devices, the pressing portion may be an inner wall of the case portion, and the inner wall of the case portion may be in contact with an upper surface of the first sealing portion and an upper surface of the second sealing portion.
[0017] In any of the above semiconductor devices, the pressing portion may be a spring portion provided between the case portion and the first sealing portion and between the case portion and the second sealing portion.
[0018] In a second aspect of the present invention, there is provided a method for manufacturing a semiconductor device, the method including the steps of: obtaining a first semiconductor module cell having a first laminated substrate, a first semiconductor chip provided above the first laminated substrate, and a first sealing portion formed to cover the first semiconductor chip; obtaining a second semiconductor module cell having a second laminated substrate, a second semiconductor chip provided above the second laminated substrate, and a second sealing portion formed to cover the second semiconductor chip; placing the first semiconductor module cell and the second semiconductor module cell on an upper surface of a heat sink so as to be in contact with each other; connecting a case portion to the heat sink so as to cover the first semiconductor module cell and the second semiconductor module cell, and pressing the first semiconductor module cell and the second semiconductor module cell against the heat sink with a pressing portion of the case portion.
[0019] The above-described method for manufacturing a semiconductor device may further include a step of providing an organic insulating intervening portion on an upper surface of the heat sink.
[0020] In any of the above methods for manufacturing a semiconductor device, the step of obtaining the first semiconductor module cell may include the steps of providing the first semiconductor chip above the first laminated substrate, electrically connecting the first laminated substrate and the first semiconductor chip, filling the first sealing portion so as to cover the first semiconductor chip, and cutting at least a part of an end portion in a short direction of the first sealing portion. In any of the above methods for manufacturing a semiconductor device, the step of obtaining the second semiconductor module cell may include the steps of providing the second semiconductor chip above the second laminated substrate, electrically connecting the second laminated substrate and the second semiconductor chip, filling the second sealing portion so as to cover the second semiconductor chip, and cutting at least a part of an end portion in a short direction of the second sealing portion. In any of the above methods for manufacturing a semiconductor device, the first sealing portion and the second sealing portion may have one or more contact surfaces where inclined side surfaces come into contact with each other.
[0021] The above summary of the invention does not list all of the features of the present invention. Also, subcombinations of these features may also be inventions. [Brief description of the drawings]
[0022] [Figure 1A] 2 shows an outline of the configuration of a semiconductor module 300. [Figure 1B] 1 shows a modified example of the configuration of the semiconductor module 300. [Figure 1C] 1 shows a modified example of the configuration of the semiconductor module 300. [Diagram 2] 2 shows an example of the configuration of a semiconductor module cell 200. [Figure 3A] 2 shows an example of the configuration of a semiconductor module 300. [Figure 3B] 1 shows a modified example of the configuration of the semiconductor module 300. [Figure 4A] An example of a top view of a sealing portion 220 having a contact portion 225 is shown. [Figure 4B] 4B shows an example of a cross section taken along line bb' in FIG. 4A. [Figure 4C] 4B shows an example of a cross section taken along the line c-c' in FIG. 4A. [Figure 5A] 13 shows a schematic diagram for calculating the vertical stress distribution s2 acting on the upper surface of the heat sink 260. [Figure 5B] 4 shows the relationship between the number of contact surfaces 226 and the vertical stress distribution s2. [Figure 5C] 4 shows the relationship between the angle of the contact surface 226 and the vertical stress distribution s2. [Figure 6A] 1 shows a modified example of the configuration of the semiconductor module 300. [Figure 6B] 1 shows a modified example of the configuration of the semiconductor module 300. [Figure 7A] 2 shows a flowchart of a method for manufacturing the semiconductor module 300. [Figure 7B] 2 shows a flowchart of a method for manufacturing the semiconductor module cell 200. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0023] The present invention will be described below through embodiments of the invention, but the following embodiments do not limit the scope of the invention according to the claims. Furthermore, not all of the combinations of features described in the embodiments are necessarily essential to the solution of the invention.
[0024] In this specification, one side in the thickness direction of the semiconductor chip 100 is referred to as "upper" and the other side as "lower". Of the two main surfaces of an element, substrate, layer, film or other member, one surface is referred to as the upper surface and the other surface is referred to as the lower surface. The directions of "upper" and "lower" are not limited to the direction of gravity. In this example, the up-down direction is referred to as the Z-axis direction, and two directions perpendicular to the plane perpendicular to the Z-axis direction are referred to as the X-axis direction and the Y-axis direction. The XYZ axes form a right-handed system. A top view refers to a case where the semiconductor chip 100 is viewed from the positive direction of the Z axis.
[0025] In each embodiment, the first conductivity type is N type and the second conductivity type is P type, but the first conductivity type may be P type and the second conductivity type may be N type. In this case, the conductivity types of the substrate, layer, region, etc. in each embodiment are reversed. In layers and regions marked with N or P, electrons or holes are the majority carriers, respectively. In addition, + and - attached to N and P respectively mean that the doping concentration is higher and lower than that of layers or regions not marked with them.
[0026] 1A shows an outline of the configuration of a semiconductor module 300. The semiconductor module 300 includes a plurality of semiconductor module cells 200. The semiconductor module cells 200 of this example include, but are not limited to, three semiconductor module cells 200a to 200c. The semiconductor module 300 of this example includes, as external terminals, an output terminal 110, a gate external terminal 112, an auxiliary source external terminal 114, a gate external terminal 122, an auxiliary source external terminal 124, a positive terminal 142, and a negative terminal 144.
[0027] The semiconductor module 300 may be applied to a power conversion device such as a power module that configures an inverter circuit. For example, when the semiconductor module 300 configures a three-phase inverter circuit, the semiconductor module cells 200a to 200c may correspond to the U-phase, V-phase, and W-phase of the three-phase inverter circuit, respectively.
[0028] The semiconductor module cell 200 may include a semiconductor chip 100, which will be described later. The semiconductor module cell 200 will be described in detail later. The semiconductor module cell 200 is housed in a case portion 210 of a semiconductor module 300. Side walls of adjacent semiconductor module cells 200 may be in contact with each other.
[0029] The output terminal 110 is an external terminal for electrically connecting to a load provided outside the semiconductor module 300. The output terminal 110 in this example has three external terminals, an output terminal 110U, an output terminal 110V, and an output terminal 110W, corresponding to the U-phase to the W-phase, respectively. The output terminal 110 is provided on a predetermined side of the semiconductor module 300. The output terminal 110 in this example is provided on a side that extends in the Y-axis direction on the positive side in the X-axis direction, among the four sides of the semiconductor module 300. The output terminal 110 in this example is provided in a first arrangement region 181 that extends in the Y-axis direction. The multiple output terminals 110 are arranged in the first arrangement region 181 in the Y-axis direction.
[0030] The three output terminals 110U to 110W are arranged in the Y-axis direction so as to face the semiconductor module cells 200a to 200c, respectively. Note that the number and arrangement of the output terminals 110 are not limited to this.
[0031] The gate external terminal 112, the auxiliary source external terminal 114, the gate external terminal 122, and the auxiliary source external terminal 124 are examples of control terminals for controlling the operation of the semiconductor module 300. The control terminals in this example are provided on a side opposite to the side on which the output terminal 110 is provided. The control terminals in this example are provided on a side extending in the Y-axis direction on the negative side of the semiconductor module 300 in the X-axis direction.
[0032] The gate external terminal 112 has three gate external terminals 112a to 112c corresponding to the semiconductor module cells 200a to 200c. The auxiliary source external terminal 114 has three auxiliary source external terminals 114a to 114c corresponding to the semiconductor module cells 200a to 200c. The multiple gate external terminals 112 in this example are provided in a second arrangement region 182 extending in the Y-axis direction. The multiple auxiliary source external terminals 114 in this example are provided in a second arrangement region 182 extending in the Y-axis direction.
[0033] Similarly, the gate external terminal 122 has three gate external terminals 122a to 122c corresponding to the semiconductor module cells 200a to 200c. The auxiliary source external terminal 124 has three auxiliary source external terminals 124a to 124c corresponding to the semiconductor module cells 200a to 200c. The multiple gate external terminals 122 in this example are provided in a second arrangement region 182 extending in the Y-axis direction. The multiple auxiliary source external terminals 124 in this example are provided in a second arrangement region 182 extending in the Y-axis direction.
[0034] The positive terminal 142 and the negative terminal 144 are provided on a predetermined side of the semiconductor module 300. In this example, the positive terminal 142 and the negative terminal 144 are provided on a side perpendicular to the side on which the output terminal 110 is provided. The positive terminal 142 and the negative terminal 144 may be provided on a side perpendicular to the side on which control terminals such as the gate external terminal 112 are provided. In this example, the positive terminal 142 and the negative terminal 144 are provided on a side extending in the X-axis direction on the positive side of the semiconductor module 300 in the Y-axis direction.
[0035] The positive electrode terminal 142 and the negative electrode terminal 144 may be provided on a side extending in the X-axis direction on the negative side in the Y-axis direction. The positive electrode terminal 142 and the negative electrode terminal 144 in this example are provided in a third arrangement region 183 extending in the X-axis direction. The third arrangement region 183 may be arranged side by side with the multiple legs in the Y-axis direction. That is, the third arrangement region 183 may be arranged opposite to the multiple legs in the Y-axis direction. The positive electrode terminal 142 and the negative electrode terminal 144 are arranged in the third arrangement region 183 in the X-axis direction.
[0036] Fig. 1B shows a modified example of the configuration of the semiconductor module 300. In Fig. 1B, the arrangement of the control terminals such as the gate external terminal 112, the positive terminal 142, and the negative terminal 144 is different from that of the example shown in Fig. 1A.
[0037] The positive terminal 142 and the negative terminal 144 are provided on a predetermined side of the semiconductor module 300. In this example, the positive terminal 142 and the negative terminal 144 are provided on a side opposite to the side on which the output terminal 110 is provided. The positive terminal 142 and the negative terminal 144 may be provided on a side perpendicular to the side on which control terminals such as the gate external terminal 112 are provided. The positive terminal 142 and the negative terminal 144 are provided on a side extending in the Y-axis direction on the negative side of the semiconductor module 300 in the X-axis direction.
[0038] The positive electrode terminal 142 has three positive electrode terminals 142a to 142c corresponding to the semiconductor module cells 200a to 200c. The negative electrode terminal 144 has three negative electrode terminals 144a to 144c corresponding to the semiconductor module cells 200a to 200c. The positive electrode terminals 142 and the negative electrode terminals 144 in this example are provided in a second arrangement region 182 extending in the Y-axis direction. Note that the number and arrangement method of the positive electrode terminals 142 and the negative electrode terminals 144 are not limited to this.
[0039] The gate external terminal 112, the auxiliary source external terminal 114, the gate external terminal 122, and the auxiliary source external terminal 124 are examples of control terminals for controlling the operation of the semiconductor module 300. The control terminals in this example are provided on a side perpendicular to the side on which the output terminal 110 is provided. The control terminals in this example are provided on a side extending in the X-axis direction on the positive side of the semiconductor module 300 in the Y-axis direction.
[0040] A plurality of gate external terminals 112 may be provided corresponding to the plurality of semiconductor module cells 200. The gate external terminals 112 have three gate external terminals 112a to 112c corresponding to the semiconductor module cells 200a to 200c. A plurality of auxiliary source external terminals 114 may be provided corresponding to the plurality of semiconductor module cells 200. The auxiliary source external terminals 114 have three auxiliary source external terminals 114a to 114c corresponding to the semiconductor module cells 200a to 200c. The plurality of gate external terminals 112 in this example are provided in a third arrangement region 183 extending in the X-axis direction. The plurality of auxiliary source external terminals 114 in this example are provided in a third arrangement region 183 extending in the X-axis direction.
[0041] Similarly, the gate external terminal 122 has three gate external terminals 122a to 122c corresponding to the semiconductor module cells 200a to 200c. The auxiliary source external terminal 124 has three auxiliary source external terminals 124a to 124c corresponding to the semiconductor module cells 200a to 200c. The multiple gate external terminals 122 in this example are provided in a third arrangement region 183 extending in the X-axis direction. The multiple auxiliary source external terminals 124 in this example are provided in a third arrangement region 183 extending in the X-axis direction.
[0042] Fig. 1C shows a modified example of the configuration of the semiconductor module 300. In Fig. 1C, the arrangement of control terminals such as the gate external terminal 112 is different from the example shown in Fig. 1B.
[0043] The control terminals in this example are provided on the same side as the side on which the output terminal 110 is provided. That is, the gate external terminal 112, the auxiliary source external terminal 114, the gate external terminal 122, and the auxiliary source external terminal 124 are provided in the first arrangement region 181. As described with reference to FIG. 1A, three of each control terminal may be provided corresponding to each of the semiconductor module cells 200a to 200c.
[0044] The control terminal may be provided on a side opposite to the side on which the output terminal 110 is provided. That is, the gate external terminal 112, the auxiliary source external terminal 114, the gate external terminal 122, and the auxiliary source external terminal 124 may be provided in the second arrangement region 182 in which the positive electrode terminal 142 and the negative electrode terminal 144 are provided. By arranging all the external connection terminals on the long side of the semiconductor module 300, it becomes easy to replace the semiconductor module cell 200 when it breaks down.
[0045] 2 shows an example of the configuration of a semiconductor module cell 200. The semiconductor module cell 200 of this example includes a semiconductor chip 100, a multilayer substrate 150, a sealing portion 220, and a lead frame 230.
[0046] The laminated substrate 150 may be a direct copper bonding (DCB) substrate or an active metal brazing (AMB) substrate. A plurality of semiconductor chips 100 may be provided on the laminated substrate 150. The laminated substrate 150 includes a first metal layer 151, an insulating plate 152, and a second metal layer 153.
[0047] The insulating plate 152 is made of an insulating material such as ceramics, such as alumina (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), etc. The first metal layer 151 is provided on the lower surface of the insulating plate 152 and may be fixed to the upper surface of the substrate base via a bonding member 160.
[0048] The second metal layer 153 is a conductive member provided on the upper surface of the insulating plate 152. The second metal layer 153 may include metal wiring, pads, or the like. The first metal layer 151 and the second metal layer 153 may be formed of a plate containing a metal material such as copper or a copper alloy. The material of the second metal layer 153 may be the same as or different from the material of the first metal layer 151. The first metal layer 151 and the second metal layer 153 may be fixed to the surface of the insulating plate 152 by solder, brazing, or the like. The second metal layer 153 is electrically connected to the semiconductor chip 100 by a bonding member 160.
[0049] The bonding member 160 connects the pad included in the second metal layer 153 to the collector electrode 24 of the semiconductor chip 100. For example, the material of the bonding member 160 is a Sn--Cu based or Sn--Sb based solder.
[0050] Lead frame 230 electrically connects semiconductor chip 100 to an external control device, etc. Lead frame 230 is provided so as to penetrate case portion 210 and be connected to an external terminal when incorporated in semiconductor module 300.
[0051] The sealing portion 220 is provided to cover the semiconductor chip 100. The sealing portion 220 is made of an insulating material. This makes it possible to prevent insulation failure between conductive components in the semiconductor module cell 200. In one example, the sealing portion 220 includes a silicone gel material or a fluorine gel material.
[0052] The sealing portion 220 is provided up to a position covering the upper surface of the lead frame 230. The film thickness from the lower surface to the upper surface of the sealing portion 220 may be such that the elements sealed inside the sealing portion 220 are not exposed when the contact portion 225 described later is formed.
[0053] 3A shows an example of the configuration of a semiconductor module 300 of this example. The semiconductor module 300 of this example includes two semiconductor module cells 200. The semiconductor module 300 may include a first semiconductor module cell 200a and a second semiconductor module cell 200b. The semiconductor module 300 of this example includes a plurality of semiconductor module cells 200, a case portion 210, a connecting portion 240, an interposing portion 250, and a heat sink 260.
[0054] The first semiconductor module cell 200a is provided above the heat sink 260. The first semiconductor module cell 200a may have a first laminated substrate 150a, a first semiconductor chip 100a placed on the first laminated substrate 150a, and a first sealing portion 220a covering the first semiconductor chip 100a. The details of the configuration of the first semiconductor module cell 200a may be the same as those of the semiconductor module cell 200 described in FIG.
[0055] The second semiconductor module cell 200b is provided above the heat sink 260 in contact with the first semiconductor module cell 200a. The second semiconductor module cell 200b may have a second laminated substrate 150b, a second semiconductor chip 100b placed on the second laminated substrate 150b, and a second sealing portion 220b covering the second semiconductor chip 100b. The details of the configuration of the second semiconductor module cell 200b may be the same as or different from the configuration of the first semiconductor module cell 200a.
[0056] The side surfaces of the multiple semiconductor module cells 200 may be in contact with each other. In this example, the side surface of the first sealing portion 220a is in contact with the side surface of the second sealing portion 220b. This causes a frictional force to act on the contact surfaces of the semiconductor module cells 200, and the semiconductor module cells 200 are uniformly pressed against the heat sink 260, reducing the cooling variation of the entire semiconductor module 300.
[0057] The case portion 210 houses the semiconductor module cell 200. The case portion 210 may house the first semiconductor module cell 200a and the second semiconductor module cell 200b. The case portion 210 may be coupled to the heat sink 260. The case portion 210 may be coupled to the heat sink 260 by fixing the case portion 210 to the heat sink 260 using a screw or the like, or by adhering the case portion 210 to the heat sink 260 using an adhesive or the like.
[0058] The case part 210 may have an attachment part for attaching the connecting part 240. The case part 210 of this example has a hole part through which the connecting part 240 passes.
[0059] The case portion 210 is provided separately from the laminated substrate 150. The case portion 210 of this example is provided separately from the first laminated substrate 150a and the second laminated substrate 150b. A sealing portion 220 may be provided between the case portion 210 and the laminated substrate 150. By providing the case portion 210 separately from the laminated substrate 150 and interposing the sealing portion 220, the pressure applied to the semiconductor module cell 200 can be made uniform.
[0060] The pressing portion 215 presses the upper surface of the sealing portion 220. The pressing portion 215 may press the upper surfaces of the first sealing portion 220a and the second sealing portion 220b. When the pressing portion 215 presses the upper surface of the sealing portion 220, the semiconductor module cell 200 is pressed against the heat sink 260, improving the cooling efficiency. The pressing portion in this example is the inner wall of the case portion 210. That is, the inner wall of the case portion 210 may be in contact with the upper surface of the first sealing portion 220a and the upper surface of the second sealing portion 220b.
[0061] The multiple sealing portions 220 may be provided so that their sides are in contact with each other in a mutually separable state. In this example, the first sealing portion 220a and the second sealing portion 220b are provided so that their sides are in contact with each other in a mutually separable state. The multiple sealing portions 220 may not be integrally molded, but may be individually molded.
[0062] The multiple sealing portions 220 have contact portions 225 consisting of one or more contact surfaces where their side surfaces come into contact with each other. In this example, the first sealing portion 220a and the second sealing portion 220b have contact portions 225 in the region where their side surfaces come into contact with each other. As the multiple sealing portions 220 have contact portions 225, frictional force acts between adjacent sealing portions 220, and pressure applied to one sealing portion 220 is also applied to the other sealing portion 220, making the pressure applied to each sealing portion 220 uniform.
[0063] The connecting portion 240 connects the case portion 210 to the heat sink 260. The case portion 210 may have a plurality of connecting portions 240. The plurality of connecting portions 240 may be provided at symmetrical positions of the case portion 210. In this example, the plurality of connecting portions 240 are provided at the four corners of the case portion 210. By providing the connecting portions 240 at symmetrical positions, the pressing force applied by the pressing portion 215 to the sealing portion 220 can be made uniform, and the pressing force applied to the semiconductor module cells 200 can be made uniform.
[0064] The interposition portion 250 is provided on the upper surface of the heat sink 260. The interposition portion 250 may be provided between the upper surface of the heat sink 260 and the lower surface of the laminated substrate 150. The interposition portion 250 may be made of an organic insulating material. The interposition portion 250 may be a TIM (Thermal Interface Material). This improves the cooling efficiency of the semiconductor module 300.
[0065] The interposed portion 250 is, for example, grease. The grease may be silicone grease or an oil compound. By forming the interposed portion 250 from grease, the ease of replacement is improved when the semiconductor module cell 200 breaks down.
[0066] The intermediate portion 250 may be an adhesive or a resin sheet, which allows the semiconductor module cell 200 to be fixed to the upper surface of the heat sink 260.
[0067] The multiple semiconductor module cells 200 may be provided above a common interposition portion 250. In this example, the first semiconductor module cell 200a and the second semiconductor module cell 200b are provided above the common interposition portion 250. This reduces the cooling variation of the entire semiconductor module 300.
[0068] The heat sink 260 cools the semiconductor module cell 200. The heat sink 260 may be made of a material with high thermal conductivity. In one example, the heat sink 260 is made of stainless steel. The heat sink 260 may be connected to an external cooling device (not shown) and cooled.
[0069] 3B shows a modified example of the configuration of the semiconductor module 300 of this example. The semiconductor module 300 of this example includes three semiconductor module cells 200. The semiconductor module 300 may include a first semiconductor module cell 200a, a second semiconductor module cell 200b, and a third semiconductor module cell 200c.
[0070] The third semiconductor module cell 200c may have a third laminated substrate 150c, a third semiconductor chip 100c placed on the third laminated substrate 150c, and a third sealing portion 220c covering the third semiconductor chip 100c. The details of the configuration of the third semiconductor module cell 200c may be the same as or different from the configurations of the first semiconductor module cell 200a and the second semiconductor module cell 200b.
[0071] The side surface forming the contact portion 225 may include an inclined side surface. The multiple sealing portions 220 in this example have the contact portion 225 including one or more contact surfaces 226 where the inclined side surfaces contact each other. By including the inclined side surface in the contact portion 225, between the adjacent sealing portions 220, the pressing force applied to one sealing portion 220 can be applied to the other sealing portion 220 more efficiently.
[0072] The first sealing portion 220a and the second sealing portion 220b in this example have a contact portion 225a including one or more contact surfaces where the inclined side surfaces come into contact with each other. As a result, a part of the pressure applied to the first semiconductor module cell 200a is also applied to the second semiconductor module cell 200b, and the first semiconductor module cell 200a and the second semiconductor module cell 200b are uniformly pressed against the heat sink 260, thereby reducing the cooling variation of the entire semiconductor module 300.
[0073] In this example, the second sealing portion 220b and the third sealing portion 220c have a contact portion 225b including one or more contact surfaces where the inclined side surfaces contact each other. The sidewall of the third sealing portion 220c may contact at least one of the sidewall of the first sealing portion 220a and the sidewall of the second sealing portion 220b. This allows the first semiconductor module cell 200a, the second semiconductor module cell 200b, and the third semiconductor module cell 200c to be uniformly pressed against the heat sink 260, reducing the cooling variation of the entire semiconductor module 300.
[0074] 4A is an example of a top view of a sealing portion 220 having a contact portion 225. The contact portion 225 may have a plurality of contact surfaces 226. In this example, the contact portion 225a in the first sealing portion 220a and the second sealing portion 220b has a first contact surface 226-1a and a second contact surface 226-2a. In this example, the contact portion 225b in the second sealing portion 220b and the third sealing portion 220c has a first contact surface 226-1b and a second contact surface 226-2b.
[0075] The contact surface 226 may include at least one of an inclined portion 227, which is a side surface inclined with respect to the stacking direction of the laminated substrate 150, and a vertical portion 228, which is a side surface parallel to the stacking direction. In the example shown in Fig. 3A, the contact surface 226 includes the vertical portion 228, but does not include the inclined portion 227. In the example shown in Fig. 3B, the contact surface 226 includes both the inclined portion 227 and the vertical portion 228. The inclined portion 227 and the vertical portion 228 will be described later.
[0076] The contact portion 225 in this example has two contact surfaces 226. The contact portion 225 may have one contact surface 226, or may have three or more contact surfaces 226. The number of contact surfaces 226 of the contact portion 225a in the first sealing portion 220a and the second sealing portion 220b may be the same as or different from the number of contact surfaces 226 of the contact portion 225b in the second sealing portion 220b and the third sealing portion 220c.
[0077] In this specification, the number of contact surfaces 226 of the contact portion 225 may be the number of regions in the contact portion 225 where the inclined side surfaces of adjacent sealing portions 220 are in contact with each other at different angles, or may be the number of regions in which the inclined side surfaces are in contact with each other in different shapes. If the contact surface 226 does not have the inclined portion 227, the number of contact surfaces 226 of the contact portion 225 is one. In this example, the contact portion 225a has two contact surfaces 226, a first contact surface 226-1a formed by the second sealing portion 220b extending above the first sealing portion 220a, and a second contact surface 226-2a formed by the first sealing portion 220a extending above the second sealing portion 220b.
[0078] Fig. 4B is a diagram showing an example of the bb' cross section in Fig. 4A. The bb' cross section is a cross section that passes through the first contact surface 226-1a at the boundary between the first sealing portion 220a and the second sealing portion 220b.
[0079] The one or more contact surfaces where the inclined side surfaces come into contact with each other may include a first contact surface 226-1a. The first contact surface 226-1a includes a first inclined portion 227-1a formed by the inclined side surface of the first sealing portion 220a and the inclined side surface of the second sealing portion 220b, and a first vertical portion 228-1a formed by the vertical surface of the first sealing portion 220a and the vertical surface of the second sealing portion 220b.
[0080] The angle of the inclined side surface of the first sealing portion 220a and the angle of the inclined side surface of the second sealing portion 220b with respect to the stacking direction of the first laminated substrate 150a and the second laminated substrate 150b may be the same or different. In this example, the angle of the inclined side surface of the first sealing portion 220a and the angle of the inclined side surface of the second sealing portion 220b are the same.
[0081] The first inclined portion 227-1a constituting the first contact surface 226-1a may have a predetermined angle with respect to the stacking direction of the first laminate substrate 150a and the second laminate substrate 150b. The first inclined portion 227-1a of this example has a predetermined angle α with respect to the stacking direction of the first laminate substrate 150a and the second laminate substrate 150b. In this specification, the angle of the first contact surface 226-1a may refer to the predetermined angle α of the first inclined portion 227-1a. The predetermined angle α may be 10° or more and 90° or less. The predetermined angle α may be 90° or more and 180° or less.
[0082] The first inclined portion 227-1a may be a flat surface or a curved surface. The shape of the first inclined portion 227-1a in the YZ cross section may be a straight line shape, a broken line shape, or a curved line shape. Regardless of the shape of the first inclined portion 227-1a, the pressure applied to the upper surface of the second sealing portion 220b can be applied to the first sealing portion 220a, and the pressure can be dispersed.
[0083] Fig. 4C is a diagram showing an example of the c-c' cross section in Fig. 4A. The c-c' cross section is a cross section that is a boundary between the first sealing portion 220a and the second sealing portion 220b and passes through the second contact surface 226-2a. The second contact surface 226-2a includes a second inclined portion 227-2a that is composed of an inclined side surface of the first sealing portion 220a and an inclined side surface of the second sealing portion 220b, and a second vertical portion 228-2a that is composed of a vertical surface of the first sealing portion 220a and a vertical surface of the second sealing portion 220b.
[0084] One or more contact surfaces where the inclined side surfaces come into contact with each other may have a second contact surface 226-2a. The second inclined portion 227-2a constituting the second contact surface 226-2a may have a predetermined angle with respect to the stacking direction of the first laminated substrate 150a and the second laminated substrate 150b. The second inclined portion 227-2a in this example has a predetermined angle β with respect to the stacking direction of the first laminated substrate 150a and the second laminated substrate 150b. In this specification, the angle of the second contact surface 226-2a may refer to the predetermined angle β of the second inclined portion 227-2a. The predetermined angle β may be -90° or more and -10° or less. The predetermined angle β may be -180° or more and -90° or less.
[0085] The second inclined portion 227-2a may be a flat surface or a curved surface. The shape of the second inclined portion 227-2a in the YZ cross section may be a straight line shape, a broken line shape, or a curved line shape. Regardless of the shape of the second inclined portion 227-2a, the pressure applied to the upper surface of the first sealing portion 220a can be applied to the second sealing portion 220b, and the pressure can be dispersed.
[0086] The predetermined angle α of the first inclined portion 227-1a and the predetermined angle β of the second inclined portion 227-2a may have the same absolute value or may have different absolute values. In this example, the absolute values of the angles of the first inclined portion 227-1a and the second inclined portion 227-2a are the same.
[0087] FIG. 5A shows the vertical stress distribution s acting on the top surface of the heat sink 260. 2 1 is a model diagram for calculating the stress distribution in the vertical direction. A case section 210 housing three semiconductor module cells 200 was placed on the upper surface of a heat sink 260, and a vertical load was applied to the four corners of the case section 210 via the connecting sections 240. The area on the upper surface of the heat sink 260 was then divided into n areas, starting with 260-1, 260-2, 260-3, and so on up to 260-n, and the vertical stress in each divided area was calculated. Here, n is an arbitrary natural number determined according to the scale and time of the simulation. Then, from the obtained stress values, the vertical stress distribution s 2 was calculated. In the formula, σ n is the magnitude of the vertical stress in each region 260-n, and σ avg indicates the average value of the vertical stress.
number
[0088] 5B is a diagram showing the relationship between the number of contact surfaces 226 of contact portion 225 and the distribution of vertical stress acting on the upper surface of heat sink 260. The horizontal axis represents the number of contact surfaces 226 of contact portion 225, and the vertical axis represents the distribution of vertical stress acting on the upper surface of heat sink 260, and the plot is made.
[0089] It can be seen that when the contact portion 225 has one or more inclined portions 227, the variance is smaller than when the contact portion 225 does not have the inclined portion 227. When the contact portion 225 has the inclined portions 227, the pressure applied to the multiple semiconductor module cells 200 can be made uniform.
[0090] 5C is a diagram showing the relationship between the angle of contact surface 226 of contact portion 225 and the distribution of vertical stress acting on the upper surface of heat sink 260. The horizontal axis represents the angle of contact surface 226 of contact portion 225, and the vertical axis represents the distribution of vertical stress acting on the upper surface of heat sink 260, and the graph is plotted. In this example, the angle of contact surface 226 refers to the predetermined angles α and β shown in FIG. 4B and FIG. 4C. In the calculation process of stress distribution, α and β are assumed to be the same.
[0091] It can be seen that when the angle of the contact surface 226 of the contact portion 225 is 10°, 20°, 40°, or 90°, the variance is smaller than when the angle of the contact surface 226 is 0°. By setting the angle of the contact surface 226 of the contact portion 225 to be equal to or greater than 10° and equal to or less than 90°, the pressure applied to the multiple semiconductor module cells 200 can be made uniform.
[0092] 6A shows a modified example of the configuration of the semiconductor module 300 of this example. The semiconductor module 300 of this example includes three semiconductor module cells 200. The semiconductor module 300 may have a spring portion 270 between the case portion 210 and the sealing portion 220. The semiconductor module 300 of this example has, as the pressing portion 215, the spring portion 270 provided between the case portion 210 and the first sealing portion 220a, the second sealing portion 220b, and the third sealing portion 220c.
[0093] The spring portion 270 applies pressure from the inner wall of the case portion 210 to the sealing portion 220. The spring portion 270 may be a leaf spring. The spring portion 270 is made of an elastic material capable of applying pressure from the inner wall of the case portion 210 to the sealing portion 220. The material of the spring portion 270 may be a metal material such as carbon steel, stainless steel, nickel alloy, titanium alloy, etc., or a non-metal material such as natural rubber, plastic, ceramic, etc. By providing the spring portion 270, the pressure applied to the sealing portion 220 can be made uniform.
[0094] Fig. 6B shows an example of a top view of the modified example shown in Fig. 6A. For simplicity, the case part 210 is omitted.
[0095] The spring portion 270 may be provided in common to each of the multiple sealing portions 220, or may be provided individually. In this example, the spring portion 270 is provided in common to the first sealing portion 220a, the second sealing portion 220b, and the third sealing portion 220c. Providing the spring portion 270 in common to each of the multiple sealing portions 220 may mean that a single spring portion 270 for pressing each of the multiple sealing portions 220 is provided in the semiconductor module 300.
[0096] The spring portion 270 may be configured to have a substantially cross shape in top view for each of the multiple sealing portions 220. This allows the pressure applied from the case portion 210 to be applied to the sealing portions 220 uniformly.
[0097] 7A shows a flowchart of a method for manufacturing a semiconductor module 300. The method for manufacturing a semiconductor module 300 of this example includes a step S100 of acquiring a first semiconductor module cell 200a and a step S200 of acquiring a second semiconductor module cell 200b. The method for manufacturing a semiconductor module 300 of this example may include a step S300 of providing an organic insulating intervening portion 250 on the upper surface of a heat sink 260. The method for manufacturing a semiconductor module 300 of this example includes a step S400 of placing the first semiconductor module cell 200a and the second semiconductor module cell 200b. The method for manufacturing a semiconductor module 300 of this example includes a step S500 of connecting a case portion 210 to the heat sink 260 and pressing the first semiconductor module cell 200a and the second semiconductor module cell 200b against the heat sink 260 by a pressing portion 215 of the case portion 210.
[0098] The step S100 of obtaining the first semiconductor module cell 200a may include a step of manufacturing the first semiconductor module cell 200a. The step S200 of obtaining the second semiconductor module cell 200b may include a step of manufacturing the second semiconductor module cell 200b. The actor that manufactures the first semiconductor module cell 200a and the second semiconductor module cell 200b may be the same as or different from the actor that manufactures the semiconductor module 300 of this example.
[0099] The first semiconductor module cell 200a obtained in step S100 includes a first laminated substrate 150a, a first semiconductor chip 100a placed on the first laminated substrate 150a, and a first sealing portion 220a covering the first semiconductor chip 100a. Similarly, the second semiconductor module cell 200b obtained in step S200 includes a second laminated substrate 150b, a second semiconductor chip 100b placed on the second laminated substrate 150b, and a second sealing portion 220b covering the second semiconductor chip 100b.
[0100] In step S300, an organic insulating intervening portion 250 is provided on an upper surface of the heat sink 260. This improves the efficiency of heat transfer between the semiconductor module cells 200 and the heat sink 260, thereby improving the cooling efficiency of the semiconductor module 300. Step S300 may be omitted.
[0101] In step S400, the first semiconductor module cell 200a and the second semiconductor module cell 200b are placed on the upper surface of the heat sink 260. The first semiconductor module cell 200a and the second semiconductor module cell 200b are placed such that their side surfaces are in contact with each other. This causes a frictional force to act between the first semiconductor module cell 200a and the second semiconductor module cell 200b, making the pressure applied to the first semiconductor module cell 200a and the second semiconductor module cell 200b uniform.
[0102] In step S500, the case part 210 is connected to the heat sink 260 so as to cover the first semiconductor module cell 200a and the second semiconductor module cell 200b. As a result, the pressing part 215 of the case part 210 applies a pressing force to the upper surfaces of the first semiconductor module cell 200a and the second semiconductor module cell 200b, thereby improving the cooling efficiency of the semiconductor module 300.
[0103] 7B shows a flowchart of a method for manufacturing the semiconductor module cell 200. The method for manufacturing the semiconductor module cell 200 may be an example of step S100 of obtaining the first semiconductor module cell 200a, and may be an example of step S200 of obtaining the second semiconductor module cell 200b.
[0104] The manufacturing method of the semiconductor module cell 200 includes a step S110 of providing a laminated substrate 150, a step S120 of providing a semiconductor chip 100, a step S130 of connecting the laminated substrate 150 and the semiconductor chip 100, and a step S140 of filling the sealing portion 220. The manufacturing method of the semiconductor module cell 200 may include a step S150 of cutting the sealing portion 220. The step S110 of providing the laminated substrate 150 may be performed by a normal method that can be understood by a person skilled in the art, and therefore a description thereof will be omitted in this specification.
[0105] In step S120, the semiconductor chip 100 is provided above the laminated substrate 150. One or more semiconductor chips 100 may be provided above the laminated substrate 150. As an example, the semiconductor chip 100 is provided above the laminated substrate 150 so as to form an upper arm and a lower arm of the semiconductor module cell 200. A bonding member 160 made of solder or the like may be provided between the laminated substrate 150 and the semiconductor chip 100.
[0106] In step S130, the laminated substrate 150 and the semiconductor chip 100 are electrically connected to each other. The connection between the laminated substrate 150 and the semiconductor chip 100 may be made via a lead frame 230, a bonding wire, or the like, or may be made via a coupling member 160.
[0107] In step S140, the semiconductor chip 100 is covered with the encapsulation portion 220. The encapsulation portion 220 may be filled until the semiconductor chip 100 and the laminated substrate 150 are completely housed therein. The encapsulation portion 220 may be filled using a mold.
[0108] In step S150, at least a part of the end in the short direction of the sealing portion 220 is cut. The sealing portion 220 in this example has one or more contact surfaces where the inclined side surfaces of the sealing portion 220 contact with other sealing portions. The inclined side surfaces of the sealing portion 220 may be formed by cutting at least a part of the sealing portion 220 in step S150.
[0109] The sloped side of the encapsulation portion 220 may be formed by a method other than step S150 of cutting at least a portion of the encapsulation portion 220. In one example, the sloped side of the encapsulation portion 220 is formed in step S140 by providing a slope to a mold when the encapsulation portion 220 is filled.
[0110] Although the present invention has been described above using the embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments. It is clear to those skilled in the art that various modifications and improvements can be made to the above embodiments. It is clear from the description of the claims that such modifications and improvements can also be included in the technical scope of the present invention.
[0111] It should be noted that the order of execution of each process, such as operations, procedures, steps, and stages, in the devices, systems, programs, and methods shown in the claims, specifications, and drawings is not specifically stated as "before," "prior to," etc., and may be realized in any order unless the output of a previous process is used in a later process. Even if the operational flow in the claims, specifications, and drawings is explained using "first," "next," etc. for convenience, it does not mean that it is essential to perform the process in this order. [Explanation of symbols]
[0112] REFERENCE SIGNS LIST 100 semiconductor chip, 110 output terminal, 112 gate external terminal, 114 auxiliary source external terminal, 122 gate external terminal, 124 auxiliary source external terminal, 142 positive electrode terminal, 144 negative electrode terminal, 150 laminated substrate, 151 first metal layer, 152 insulating plate, 153 second metal layer, 160 coupling member, 181 first arrangement region, 182 Second arrangement region, 183...third arrangement region, 200...semiconductor module cell, 210...case portion, 215...pressure portion, 220...sealing portion, 225...contact portion, 226...contact surface, 227...inclined portion, 228...vertical portion, 230...lead frame, 240...connection portion, 250...interposition portion, 260...heat sink, 270...spring portion, 300...semiconductor module
Claims
1. A heat sink; a first semiconductor module cell provided above the heat sink; a second semiconductor module cell provided above the heat sink and in contact with the first semiconductor module cell; a case portion connected to the heat sink and housing the first semiconductor module cell and the second semiconductor module cell; Equipped with The first semiconductor module cell A first laminate substrate; a first semiconductor chip mounted on the first laminated substrate; a first sealing portion that covers the first semiconductor chip; having The second semiconductor module cell A second laminated substrate; a second semiconductor chip mounted on the second laminated substrate; a second sealing portion covering the second semiconductor chip; having a pressing portion for pressing upper surfaces of the first sealing portion and the second sealing portion, The first sealing portion and the second sealing portion have side surfaces that contact each other. Semiconductor device.
2. The first sealing portion and the second sealing portion have one or more contact surfaces where the inclined side surfaces are in contact with each other. The semiconductor device according to claim 1 .
3. An angle of any one of the one or more contact surfaces with respect to a stacking direction of the first laminated substrate and the second laminated substrate is 10° or more and 90° or less. The semiconductor device according to claim 2 .
4. The one or more contact surfaces are a first inclined portion having an angle of 10° or more and 90° or less with respect to a stacking direction of the first laminated substrate and the second laminated substrate; a second inclined portion having an angle of −90° or more and −10° or less with respect to a stacking direction of the first laminated substrate and the second laminated substrate; Includes The semiconductor device according to claim 2 .
5. The absolute values of the angles of the first inclined portion and the second inclined portion are the same. The semiconductor device according to claim 4.
6. The first sealing portion and the second sealing portion are provided so that their side surfaces are in contact with each other and are separable from each other. The semiconductor device according to claim 1 .
7. The case portion has a plurality of connecting portions for connecting to the heat sink. The semiconductor device according to claim 1 .
8. The case portion is separated from the first laminated substrate and the second laminated substrate. The semiconductor device according to claim 1 .
9. An organic insulating intervening portion is provided on the upper surface of the heat sink. The semiconductor device according to claim 1 .
10. The first semiconductor module cell and the second semiconductor module cell are provided above the common intermediate portion. The semiconductor device according to claim 9.
11. A third laminate substrate; a third semiconductor chip mounted on the third laminated substrate; a third sealing portion that covers the third semiconductor chip; and a third semiconductor module cell having The semiconductor device according to claim 1 .
12. A side wall of the third sealing portion is in contact with at least one of a side wall of the first sealing portion and a side wall of the second sealing portion. The semiconductor device according to claim 11.
13. the pressing portion is an inner wall of the case portion, The inner wall of the case is in contact with an upper surface of the first sealing portion and an upper surface of the second sealing portion. The semiconductor device according to claim 1 .
14. The pressing portion is a spring portion provided between the case portion and the first sealing portion and between the case portion and the second sealing portion. The semiconductor device according to claim 1 .
15. A method for manufacturing a semiconductor device, comprising: obtaining a first semiconductor module cell having a first laminated substrate, a first semiconductor chip provided above the first laminated substrate, and a first sealing portion formed to cover the first semiconductor chip; obtaining a second semiconductor module cell having a second laminated substrate, a second semiconductor chip provided above the second laminated substrate, and a second sealing portion formed to cover the second semiconductor chip; placing the first semiconductor module cell and the second semiconductor module cell on an upper surface of a heat sink such that the first semiconductor module cell and the second semiconductor module cell are in contact with each other; connecting a case portion to the heat sink so as to cover the first semiconductor module cell and the second semiconductor module cell, and pressing the first semiconductor module cell and the second semiconductor module cell against the heat sink by a pressing portion of the case portion; A manufacturing method of a semiconductor device comprising:
16. providing an organic insulating intervening portion on the upper surface of the heat sink; The method for manufacturing a semiconductor device according to claim 15.
17. The step of obtaining the first semiconductor module cell includes: providing the first semiconductor chip above the first laminate substrate; electrically connecting the first laminate substrate and the first semiconductor chip; filling the first encapsulation portion so as to cover the first semiconductor chip; cutting at least a part of an end portion in a lateral direction of the first sealing portion; Including, The step of obtaining the second semiconductor module cell includes: providing the second semiconductor chip above the second laminate substrate; electrically connecting the second laminate substrate and the second semiconductor chip; filling the second encapsulation portion so as to cover the second semiconductor chip; cutting at least a part of an end portion in a lateral direction of the second sealing portion; Including, The first sealing portion and the second sealing portion have one or more contact surfaces where the inclined side surfaces are in contact with each other. The method for manufacturing a semiconductor device according to claim 15 or 16.