Inverter device, and electric compressor having the same

Abstract

To provide an inverter device capable of reducing common mode noise without using a special control device or the like in a two-phase modulation system while securing an operation range.SOLUTION: A control device 21 has: a phase voltage command calculation unit 33 for calculating a three-phase modulation voltage command value; an inter-line modulation calculation unit 34 for calculating a two-phase modulation voltage command value that fixes an on / off state of a switching element of one phase of an inverter circuit 28 and modulates the on / off state of the switching element of the other two phases; and a PWM signal generation unit 36 for PWM controlling the inverter circuit. Switching timings of two-phase switching elements that modulate ON / OFF states in one carrier period of consecutive two carrier periods are synchronized, to cancel a variation of a phase voltage applied to a motor 8 by using a variation of the other phase voltage, and those in the other carrier period are not synchronized.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to an inverter device that applies a three-phase AC output to a motor to drive the motor by an inverter circuit, and to an electric compressor equipped with the inverter device. [Background technology]

[0002] Conventional inverter devices for driving motors have consisted of a three-phase inverter circuit made up of multiple switching elements, and the switching elements of each of the UVW phases are controlled using PWM (Pulse Width Modulation) to apply a voltage waveform that is close to a sine wave to the motor to drive it. However, there has been a problem with common mode noise generated by fluctuations in the motor's common mode voltage (neutral point potential).

[0003] For example, in the case of a motor that constitutes an electric compressor, this common mode noise is generated by a common mode current leaking through the stray capacitance between the housing of the electric compressor and the ground, and conventionally, this has been satisfied by installing a noise filter, but installing such a noise filter leads to an increase in the size of the device and a problem of rising costs.

[0004] In response to this, a method has been proposed in which the generation of common-mode noise caused by fluctuations in the common-mode voltage is cancelled by correcting the three-phase modulation voltage command value to match the switching timing of the upper and lower arm switching elements of each phase (see, for example, Patent Documents 1 and 2).

[0005] However, when the switching timing of the upper and lower arm switching elements of each phase is synchronized as in the above method, the modulation width becomes narrow and it becomes impossible to achieve a high modulation rate, so that the range in which the motor can be driven becomes very narrow, making it difficult to apply this method to an inverter for an electric compressor motor which requires a wide operating range.

[0006] Meanwhile, in recent years, inverter devices that apply a method called two-phase modulation have been proposed to reduce loss and heat generation in switching elements. Inverter devices using this two-phase modulation method fix the ON / OFF state of one of the UVW phases and control only the ON / OFF states of the other two phases while modulating them, thereby reducing the number of switching times of the switching elements compared to three-phase modulation, reducing switching loss and heat generation while performing PWM control. Furthermore, by reducing the number of switching times, the number of times the common mode voltage fluctuates naturally also decreases, so common mode noise can be reliably reduced by 2 / 3.

[0007] In addition, a method has been proposed in which the switching timing of upper and lower arm switching elements of each phase in this two-phase modulation method is synchronized to further suppress the generation of common mode noise due to fluctuations in the common mode voltage (see, for example, Patent Document 3). [Prior art documents] [Patent documents]

[0008] [Patent Document 1] Patent No. 7005746 [Patent Document 2] Patent Publication No. 2021-64989 [Patent Document 3] JP 2022-33476 A Summary of the Invention [Problem to be solved by the invention]

[0009] However, phase inversion was necessary in a method such as that in Patent Document 3. That is, for example, in order to fix the ON / OFF state of the W phase, modulate the ON / OFF states of only the U and V phases, and cancel out the falling edge of the U phase voltage with the rising edge of the V phase voltage, the specified switching interval (carrier period) must start from a state in which the upper arm switching element of the U phase is turned ON and the lower arm switching element of the V phase is turned ON.

[0010] This requires the use of a special control device (microcomputer) with a phase inversion function or the modification of wiring, resulting in high costs and a lack of versatility.

[0011] The present invention has been made to solve the above-mentioned conventional technical problems, and provides an inverter device that is based on a two-phase modulation method and can reduce common mode noise while ensuring an operating range without using any special control device, and an electric compressor equipped with the inverter device. [Means for solving the problem]

[0012] The inverter device of the present invention includes an inverter circuit in which an upper arm switching element and a lower arm switching element are connected in series for each phase between an upper arm power line and a lower arm power line, and a phase voltage at a connection point of the upper and lower arm switching elements of each phase is applied to a motor as a three-phase AC output, and a control device which controls the switching of the upper and lower arm switching elements of each phase of the inverter circuit, wherein the control device has a phase voltage command calculation unit which calculates and outputs a three-phase modulated voltage command value for generating a voltage to be applied to each phase of the motor, and a control unit which fixes the ON / OFF state of the upper and lower arm switching elements of one phase of the inverter circuit based on the three-phase modulated voltage command value and the inverter circuit is characterized in that, in one of two consecutive carrier cycles, the switching timing of the two-phase upper and lower arm switching elements whose ON / OFF states are modulated is synchronized, and a change in the phase voltage applied to the motor is cancelled out by a change in the other phase voltage, while, in the other carrier cycle, the switching timing of the two-phase upper and lower arm switching elements whose ON / OFF states are modulated is not synchronized.

[0013] The inverter device of the invention of claim 1 is characterized in that in the above invention, the control device synchronizes only one of the timings of the falling edge of one phase voltage and the rising edge of the other phase voltage of the two phases that modulate the ON / OFF state, and the timing of the rising edge of one phase voltage and the falling edge of the other phase voltage.

[0014] The inverter device of the invention of claim 3 is characterized in that in the above invention, the control device starts a specified switching period from a state in which a two-phase upper arm switching element that modulates the ON / OFF state is turned ON, or a two-phase lower arm switching element is turned ON.

[0015] The inverter device of the invention of claim 4 is characterized in that in the invention of claim 1, the control device fixes a lower arm switching element of one phase to an ON state, and if it is not possible to synchronize the switching timing of the upper and lower arm switching elements of two phases in that state, fixes an upper arm switching element of a phase different from the one phase to an ON state.

[0016] The inverter device of the invention of claim 5 is characterized in that in the invention of claim 1, the control device adds up the pulse widths that PWM control the two phases that modulate the ON / OFF state in one carrier period, and generates a total pulse width.

[0017] The inverter device of the invention of claim 6 is characterized in that in the above invention, when the total pulse width is larger than a specified pulse width that can be output within one carrier cycle, the control device performs a correction to reduce the two-phase pulse width that modulates the ON / OFF state in one carrier cycle and to expand the two-phase pulse width that modulates the ON / OFF state in the other carrier cycle, thereby preventing the line voltage from changing over two consecutive carrier cycles.

[0018] The inverter device of the present invention according to claim 7 is characterized in that in the above invention, the control device generates a pulse width of two carrier periods and has a PWM signal buffer that stores the generated pulse width.

[0019] The electric compressor of the present invention according to claim 8 comprises, within a housing, an inverter device of any of the above-mentioned inventions, a motor, and a compression mechanism driven by the motor to compress a refrigerant. Effect of the Invention

[0020] According to the present invention, in an inverter device including an inverter circuit in which an upper arm switching element and a lower arm switching element are connected in series for each phase between an upper arm power line and a lower arm power line, and a phase voltage at a connection point of the upper and lower arm switching elements of each phase is applied to a motor as a three-phase AC output, and a control device for controlling the switching of the upper and lower arm switching elements of each phase of the inverter circuit, the control device includes a phase voltage command calculation unit that calculates and outputs a three-phase modulation voltage command value for generating a voltage to be applied to each phase of the motor, a line modulation calculation unit that calculates a two-phase modulation voltage command value that fixes the ON / OFF state of the upper and lower arm switching elements of one phase of the inverter circuit based on the three-phase modulation voltage command value and modulates the ON / OFF states of the upper and lower arm switching elements of the other two phases, and a PWM signal generation unit that generates a PWM signal that PWM controls the inverter circuit based on the two-phase modulation voltage command value. Therefore, it is possible to reduce the number of switching of the upper and lower arm switching elements by two-phase modulation and reduce fluctuations in the common mode voltage (neutral point potential) of the motor.

[0021] In addition, the control device synchronizes the switching timing of the two-phase upper and lower arm switching elements that modulate the ON / OFF state in one of two consecutive carrier cycles so that changes in the phase voltage applied to the motor are cancelled out by changes in the other phase voltage.This makes it possible to further reduce fluctuations in the motor's common mode voltage by the switching timing of the switching elements, and further reduce the generation of common mode noise.

[0022] In addition, in the present invention, the control device does not synchronize the switching timing of the two-phase upper and lower arm switching elements that modulate the ON / OFF state in the other carrier cycle of two consecutive carrier cycles, thereby eliminating the inconvenience of the modulation width becoming narrow and not being able to achieve a high modulation rate, and making it possible to ensure a wide range in which the motor can be driven. This makes the present invention extremely suitable for electric compressors that require a wide operating range, as in the invention of claim 8.

[0023] In this case, as in the invention of claim 2, the control device synchronizes only one of the timings of the falling edge of the voltage of one of the two phases that modulate the ON / OFF state and the rising edge of the voltage of the other phase, and the timing of the rising edge of the voltage of one phase and the falling edge of the voltage of the other phase. This makes it possible to equally suppress common mode noise throughout the entire operating range, and effectively achieves both the reduction of common mode noise and the assurance of a wide operating range.

[0024] In particular, it becomes possible for the control device to start the specified switching period from a state in which the two-phase upper arm switching elements that modulate the ON / OFF state are turned ON or the two-phase lower arm switching elements are turned ON, as in claim 3. In other words, since there is no need to invert the phases, there is no need to use a special control device or change the wiring, and this is very versatile.

[0025] Furthermore, as in the invention of claim 4, when the control device fixes the lower arm switching element of one phase to the ON state and is unable to synchronize the switching timing of the upper and lower arm switching elements of two phases in that state, by fixing the upper arm switching element of a phase different from the one phase to the ON state, it becomes possible to stably reduce common mode noise over the entire operating range.

[0026] Then, as in the invention of claim 5, the control device adds up the pulse widths that PWM control the two phases that modulate the ON / OFF state in one carrier cycle to generate a total pulse width, and as in the invention of claim 6, if the total pulse width is larger than the specified pulse width that can be output within one carrier cycle, a correction is made to reduce the pulse width of the two phases that modulate the ON / OFF state in one carrier cycle and to increase the pulse width of the two phases that modulate the ON / OFF state in the other carrier cycle, thereby preventing the line voltage from changing over two consecutive carrier cycles, thereby achieving stable motor drive.

[0027] Furthermore, if the control device generates a pulse width for two carrier periods as in the invention of claim 7 and has a PWM signal buffer that stores the generated pulse width, it becomes possible to smoothly and efficiently correct the pulse width every two carrier periods. [Brief description of the drawings]

[0028] [Figure 1] 1 is an electrical circuit diagram of an inverter device according to an embodiment of the present invention. [Diagram 2] 2 is a vertical sectional side view of an electric compressor equipped with the inverter device of FIG. 1 according to one embodiment. [Diagram 3] 3 is a side view of the electric compressor of FIG. 2, excluding the cover and the circuit board, as viewed from the inverter accommodating portion side. [Figure 4] 2 is a flowchart illustrating the operation of the control device of FIG. 1. [Diagram 5] FIG. 2 is a diagram for explaining the maximum pulse width that can be output by PWM. [Figure 6] This is a diagram showing FIG. 5 expressed for two carriers. [Figure 7] 2 is a diagram illustrating an example of the operation of the control device of FIG. 1. [Figure 8] 1. FIG. 4 is a diagram illustrating another example of the operation of the control device in FIG. [Figure 9] 1. FIG. 4 is a diagram illustrating yet another example of the operation of the control device in FIG. [Figure 10]FIG. 11 is a diagram illustrating a common mode voltage when a modulation rate is 0.4 in normal three-phase modulation. [Figure 11] 2 is a diagram illustrating a common mode voltage when a modulation factor is 0.4 under the control of the control device of the embodiment of FIG. 1. [Figure 12] FIG. 2 is a diagram illustrating a common mode voltage when a modulation factor is 1.0 in normal three-phase modulation. [Figure 13] 2 is a diagram illustrating a common mode voltage when a modulation factor is 1.0 under the control of the control device of the embodiment of FIG. 1. [Figure 14] 2 is a diagram showing a comparison of common mode noise in the case of normal three-phase modulation and in the case of control by the control device of the embodiment of FIG. 1. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. First, an electric compressor (so-called inverter-integrated electric compressor) 16 according to the embodiment integrally equipped with an inverter device 1 of the present invention will be described with reference to Fig. 2 and Fig. 3. The electric compressor 16 according to the embodiment constitutes a part of a refrigerant circuit of a vehicle air conditioner mounted on a vehicle such as an engine-driven vehicle, a hybrid vehicle, or an electric vehicle.

[0030] (1) Configuration of electric compressor 16 2, the inside of a metallic cylindrical housing 2 of an electric compressor 16 is divided into a compression mechanism accommodating section 4 and an inverter accommodating section 6 by a partition wall 3 that intersects with the axial direction of the housing 2, and a scroll-type compression mechanism 7, for example, and a motor 8 that drives the compression mechanism 7 are accommodated in the compression mechanism accommodating section 4. In this case, the motor 8 is an interior permanent magnet synchronous motor (IPMSM) consisting of a stator 9 fixed to the housing 2 and a rotor 11 that rotates inside the stator 9.

[0031] A bearing portion 12 is formed in the center of the partition wall 3 on the compression mechanism accommodating portion 4 side, one end of a drive shaft 13 of the rotor 11 is supported by this bearing portion 12, and the other end of the drive shaft 13 is connected to the compression mechanism 7. A suction port 14 is formed near the partition wall 3 at a position corresponding to the compression mechanism accommodating portion 4 of the housing 2, and when the rotor 11 (drive shaft 13) of the motor 8 rotates to drive the compression mechanism 7, a low-temperature refrigerant, which is a working fluid, flows from this suction port 14 into the compression mechanism accommodating portion 4 of the housing 2, where it is sucked into the compression mechanism 7 and compressed.

[0032] The refrigerant compressed by the compression mechanism 7 and having a high temperature and pressure is discharged from a discharge port (not shown) into the refrigerant circuit outside the housing 2. The low-temperature refrigerant that flows in from the suction port 14 passes near the partition wall 3, passes around the motor 8, and is sucked into the compression mechanism 7, so that the partition wall 3 is also cooled.

[0033] The inverter device 1 of the present invention that drives and controls a motor 8 is accommodated in the inverter accommodating section 6 that is separated from the compression mechanism accommodating section 4 by the partition wall 3. In this case, the inverter device 1 is configured to supply power to the motor 8 via a sealed terminal or a lead wire that penetrates the partition wall 3.

[0034] (2) Structure of the inverter device 1 (arrangement of switching elements 18A to 18F) In the embodiment, the inverter device 1 is composed of a substrate 17, a total of six switching elements, namely upper arm switching elements 18A, 18B, 18C and lower arm switching elements 18D, 18E, 18F, which are wired on one side of the substrate 17, a control device 21 wired on the other side of the substrate 17, and an HV connector, an LV connector, etc. (not shown). In the embodiment, each of the upper and lower arm switching elements 18A to 18F is composed of an insulated gate bipolar transistor (IGBT) or the like having a MOS structure incorporated in the gate portion.

[0035] In this case, in the embodiment, the upper arm switching element 18A and the lower arm switching element 18D of the U-phase inverter 19U, the upper arm switching element 18B and the lower arm switching element 18E of the V-phase inverter 19V, and the upper arm switching element 18C and the lower arm switching element 18F of the W-phase inverter 19W of the three-phase inverter circuit 28 described later are arranged in pairs. Further, the terminal portion 22 of each of the switching elements 18A to 18F is connected to the substrate 17.

[0036] The inverter device 1 thus assembled is accommodated in the inverter accommodating section 6 with the side on which the switching elements 18A-18F are located facing the partition wall 3, attached to the partition wall 3, and closed with the cover 23. In this case, the substrate 17 is fixed to the partition wall 3 via the boss portion 24 standing upright from the partition wall 3.

[0037] With the inverter device 1 attached to the partition wall 3 in this manner, the switching elements 18A-18F are in close contact with the partition wall 3 directly or via a predetermined insulating and heat-conducting material, and are in a heat exchange relationship with the partition wall 3 of the housing 2. As described above, the partition wall 3 is cooled by the refrigerant drawn into the compression mechanism accommodating portion 4, and therefore the switching elements 18A-18F are in a heat exchange relationship with the drawn refrigerant via the partition wall 3, are cooled by the refrigerant drawn into the compression mechanism accommodating portion 4 through the thickness of the partition wall 3, and the switching elements 18A-18F themselves radiate heat to the refrigerant via the partition wall 3.

[0038] (3) Circuit configuration of inverter device 1 1, the inverter device 1 includes the above-mentioned three-phase inverter circuit 28 and the control device 21. The inverter circuit 28 is a circuit that converts the DC voltage of a DC power source (vehicle battery: for example, 350 V) 29 into a three-phase AC voltage (three-phase AC output) and applies it to the motor 8. The inverter circuit 28 includes a U-phase half-bridge circuit 19U, a V-phase half-bridge circuit 19V, and a W-phase half-bridge circuit 19W, and each of the half-bridge circuits 19U to 19W for each phase includes upper arm switching elements 18A to 18C and lower arm switching elements 18D to 18F. Furthermore, a flywheel diode 31 is connected in inverse parallel to each of the switching elements 18A to 18F.

[0039] The upper end sides of the upper arm switching elements 18A to 18C of the inverter circuit 28 are connected to an upper arm power supply line (positive electrode side bus) 10 of a DC power supply 29 and a smoothing capacitor 32. On the other hand, the lower end sides of the lower arm switching elements 18D to 18F of the inverter circuit 28 are connected to a lower arm power supply line (negative electrode side bus) 15 of the DC power supply 29 and the smoothing capacitor 32.

[0040] In this case, the upper arm switching element 18A and the lower arm switching element 18D of the U-phase half-bridge circuit 19U are connected in series, the upper arm switching element 18B and the lower arm switching element 18E of the V-phase half-bridge circuit 19V are connected in series, and the upper arm switching element 18C and the lower arm switching element 18F of the W-phase half-bridge circuit 19W are connected in series.

[0041] The connection point (U-phase voltage v u ) is connected to the U-phase armature coil 41 of the motor 8, and the connection point (V-phase voltage v v) is connected to the V-phase armature coil 42 of the motor 8, and the connection point (W-phase voltage v w ) is connected to the W-phase armature coil 43 of the motor 8.

[0042] (4) Configuration of control device 21 Next, the control device 21 is composed of a microcomputer having a processor, and in this embodiment, receives a rotation speed command value from the vehicle ECU and a motor current (phase current) from the motor 8, and based on these, controls the ON / OFF state (switching) of each of the switching elements 18A-18F of the inverter circuit 28. Specifically, it controls the gate voltage applied to the gate terminal of each of the switching elements 18A-18F.

[0043] The control device 21 of the embodiment includes a phase voltage command calculation unit 33, a line modulation calculation unit 34, a PWM signal generation unit 36, a PWM signal buffer 35, a gate driver 37, and a U-phase current i u , V phase current i v , W phase current i w The current sensors 26A and 26B are connected to the phase voltage command calculation unit 33.

[0044] The current sensor 26A detects the U-phase current i u The current sensor 26B measures the V-phase current i v Then, measure the W-phase current i w is calculated from these. In addition, the method of detecting the motor current of each phase is not particularly limited since, in addition to measuring with current sensors 26A and 26B as in the embodiment, the current value of lower arm power supply line 15 is detected and estimated by phase voltage command calculation unit 33 from the current value and the operating state of motor 8.

[0045] (4-1) Phase voltage command calculation unit 33 The phase voltage command calculation unit 33 calculates the U-phase voltage v applied to the armature coils 41 to 43 of the motor 8 by vector control based on the electrical angle of the motor 8, the d-axis current, and the q-axis current obtained from the current command value and the phase current. u , V phase voltage v v , W phase voltage v w The three-phase modulation voltage command value V u * (Hereinafter, U-phase voltage command value V u * ), V v * (Hereinafter, V-phase voltage command value V v * ), V w * (Hereinafter, W-phase voltage command value V w * ) is calculated and generated. u * , V v * , V w * is a voltage command value when three-phase modulation control of the motor 8 is performed.

[0046] In the present invention, the phase voltage command calculation unit 33 operates only once every two carrier periods, and calculates the three-phase modulated voltage command value V for two consecutive carrier periods in one operation. u * , V v * , V w * The operation of this phase voltage command calculation unit 33 will be described in detail later.

[0047] (4-2) Line modulation calculation unit 34 The line modulation calculation unit 34 calculates the three-phase modulation voltage command value V u * , V v * , V w * Based on this, the two-phase modulation voltage command value V u (Hereinafter, the U-phase voltage command value V u ), V v (Hereinafter, the V-phase voltage command value V after line modulationv ), V w (Hereinafter, the W-phase voltage command value V after line modulation w ) is calculated.

[0048] In the present invention, the line modulation calculation unit 34 also operates only once every two carrier periods, and calculates the U-phase voltage command value V after line modulation for two consecutive carrier periods in one operation. u , the V-phase voltage command value after line modulation V v , W-phase voltage command value after line modulation V w The operation of the line modulation calculation unit 34 will be described in detail later.

[0049] (4-3) PWM signal generation section 36 The PWM signal generating unit 36 ​​receives the voltage command value V of each of the UVW phases after line modulation calculated by the line modulation calculation unit 34. u , V v , V w The voltage command value V for each UVW phase after line modulation is input. u , V v , V w and the sawtooth carrier CS (sawtooth carrier signal shown in Figures 5 and 6), a PWM signal (rise and fall command values ​​for the upper arms of each phase, described later) which serves as a drive command signal for U-phase inverter 19U, V-phase inverter 19V, and W-phase inverter 19W of inverter circuit 28 is generated and output.

[0050] In the present invention, the PWM signal generating unit 36 ​​also operates only once every two carrier cycles, and generates a PWM signal for two consecutive carrier cycles in one operation. That is, the PWM signal generating unit 36 ​​generates the U-phase upper arm rise command value C uu1 , U-phase upper arm down command value C in the first carrier cycle ud1 , U-phase upper arm rise command value C in the second carrier cycle uu2 , U-phase upper arm down command value C in the second carrier cycle ud2 and the V-phase upper arm rise command value C vu1 , V-phase upper arm down command value C in the first carrier cycle vd1, V-phase upper arm rise command value C in the second carrier cycle vu2 , V-phase upper arm down command value C in the second carrier cycle vd2 and the W-phase upper arm rise command value C wu1 , W-phase upper arm down command value C in the first carrier cycle wd1 , W-phase upper arm rise command value C in the second carrier cycle wu2 , W-phase upper arm down command value C in the second carrier cycle wd2 The operation of the PWM signal generating unit 36 ​​will be described in detail later.

[0051] (4-4) PWM signal buffer 35 The upper arm rise command value C for each phase for two consecutive carrier periods generated by the PWM signal generating unit 36 uu1 , C vu1 , C wu1 , C uu2 , C vu2 , C wu2 , Fall command value C ud1 , C vd1 , C wd1 , C ud2 , C vd2 , C wd2 is stored in the PWM signal buffer 35.

[0052] (4-5) Gate driver 37 The gate driver 37 receives the PWM signal (the upper arm rise command value C of each phase) stored in the PWM signal buffer 35 every carrier period. uu1 , C vu1 , C wu1 , C uu2 , C vu2 , C wu2 , Fall command value C ud1 , C vd1 , C wd1 , C ud2 , C vd2 , C wd2 ) is acquired, and based on them, the gate voltage V of the upper arm switching element 18A of the U-phase inverter 19U is calculated. up , the gate voltage V of the lower arm switching element 18D unand the gate voltage V of the upper arm switching element 18B of the V-phase inverter 19V. vp , the gate voltage V of the lower arm switching element 18E vn and the gate voltage V of the upper arm switching element 18C of the W-phase inverter 19W. wp , the gate voltage V of the lower arm switching element 18F wn and turns on and off the three-phase upper and lower arm switching elements 18A to 18F. In this case, the gate driver 37 acquires the PWM signals for two carrier periods stored in the PWM signal buffer 35 in order from the first one stored.

[0053] Each of the switching elements 18A-18F of the inverter circuit 28 is driven to turn ON / OFF based on the gate voltage output from the gate driver 37. That is, when the gate voltage is in the ON state (a predetermined voltage value), the switching element operates to turn ON, and when the gate voltage is in the OFF state (zero), the switching element operates to turn OFF. When the switching elements 18A-18F are the above-mentioned IGBTs, this gate driver 37 is a circuit for applying the gate voltage to the IGBTs based on a PWM signal, and is composed of a photocoupler, a logic IC, a transistor, etc.

[0054] The voltage at the connection point between the upper arm switching element 18A and the lower arm switching element 18D of the U-phase half-bridge circuit 19U is the U-phase voltage v u (phase voltage) is applied (output) to the U-phase armature coil 41 of the motor 8, and the voltage at the connection point between the upper arm switching element 18B and the lower arm switching element 18E of the V-phase half-bridge circuit 19V is the V-phase voltage v v (phase voltage) is applied (output) to the V-phase armature coil 42 of the motor 8, and the voltage at the connection point between the upper arm switching element 18C and the lower arm switching element 18F of the W-phase half-bridge circuit 19W is the W-phase voltage v w The voltage is applied (output) to the W-phase armature coil 43 of the motor 8 as a W-phase voltage.

[0055] (5) Operation of the control device 21 Next, the operation of the control device 21 will be described with reference to FIGS. (5-1) Operation of Phase Voltage Command Calculation Unit 33 The phase voltage command calculation unit 33 calculates the U-phase voltage command value V u * , V-phase voltage command value V v * , W-phase voltage command value V w * (Three-phase modulation voltage command value) is calculated. V in the formula d , V q are the d-axis voltage command value and the q-axis voltage command value obtained by vector control from the d-axis current and the q-axis current. Also, V m is the amplitude of the motor voltage command value, θ is the magnetic pole position based on the U phase, θ m is the voltage phase difference with respect to the magnetic pole position.

[0056]

number

[0057] As described above, the phase voltage command calculation unit 33 operates only once every two carrier periods, and calculates the three-phase modulated voltage command value V for two consecutive carrier periods in one operation. u * , V v * , V w * Calculate and generate.

[0058] (5-2) Operation of Line-to-Line Modulation Calculation Unit 34 The line modulation calculation unit 34 modulates the ON / OFF state of the upper and lower arm switching elements 18A and 18D of a specific phase, for example, the U phase, and modulates the ON / OFF state of the upper and lower arm switching elements 18A and 18D of the U phase, and modulates the V phase voltage command value V, which is a three-phase modulated voltage command value calculated by the phase voltage command calculation unit 33, for the remaining two phases, i.e., the V phase and the W phase. v * and W-phase voltage command value V w *The U-phase voltage command value V after line modulation described above is a two-phase modulation voltage command value that fixes the ON / OFF state of the switching elements 18B, 18E, 18C, and 18F of the phase with the largest absolute value to the ON or OFF state. u and the V-phase voltage command value V v and the W-phase voltage command value V w By calculating and outputting the above, two-phase modulation control is executed, which reduces the number of times that the switching elements 18A to 18F are switched, as compared to the case where three-phase modulation control is executed.

[0059] In the two-phase modulation control, the number of switching times of the switching elements 18A to 18F of each phase is reduced to 2 / 3, so that the switching loss and the heat generation caused by the switching loss in each of the switching elements 18A to 18F are suppressed compared to the three-phase modulation control. In addition, the reduction in the number of switching times reduces the common mode voltage (neutral point potential of the motor 8) v c The fluctuations in the output voltage are also reliably reduced to 2 / 3 by two-phase modulation control.

[0060] 4 and the following formulas (III) to (XVI), the operation of the line modulation calculation unit 34 will be specifically described below. The line modulation calculation unit 34 of the embodiment basically performs two-phase modulation control to fix the lower arm switching element to the ON state, but when it is not possible to execute synchronous control of the switching timing by the PWM signal generation unit 36 ​​described later, it switches to two-phase modulation control to fix the upper arm switching element to the ON state.

[0061] That is, in step S1 of the flowchart in FIG. 4, the line modulation calculation unit 34 determines whether the following formula (III) is satisfied. If not satisfied, in step S2, the three-phase modulation voltage command value V u * , V v * , V w * The two-phase modulation control is performed to fix the lower arm switching element of one phase for which the voltage command value V is smallest in the ON state, and only when the two-phase modulation control is performed, the flow proceeds to step S6 to determine the three-phase modulation voltage command value V u * , Vv * , V w * Two-phase modulation control is performed to fix the upper arm switching element of one phase (one phase different from the one phase where the above-mentioned minimum value is obtained) in the ON state. The following formula (IV) expresses the three-phase modulation voltage command value V u * , V v * , V w * to the voltage command value V after line modulation u , V v , V w The formula is the formula for calculating the additional value V in formula (IV). mod is calculated using the following formula (V) in step S2, and is calculated using the following formula (VI) in step S6.

[0062] In addition, V in each formula dc is the DC voltage input to the inverter device 1, V min is C, which will be described later. min (The minimum pulse width required for rising and falling when outputting voltage with PWM) is converted into a voltage amount. The formula (V) is the three-phase modulation voltage command value V u * , V v * , V w * The smallest phase is -V dc The three-phase modulation voltage command value V u * , V v * , V w * The same value is subtracted from the three-phase modulation voltage command value V u * , V v * , V w * The maximum phase of dc The three-phase modulation voltage command value V u * , V v * , V w *The answer is to add the same value to

[0063]

number

[0064] Next, the above formula (III) will be described with reference to Figures 5 and 6. First, a condition for outputting a target pulse width (a pulse width that allows synchronous control of switching timing by a PWM signal generating unit 36, which will be described later) in the present invention using two-phase modulation control for fixing the lower arm switching element to the ON state will be considered. As an example, consider a case in which the U phase and V phase are switched and the lower arm switching element 18F of the W phase is fixed to the ON state.

[0065] The pulse width of U phase for one carrier period is C u , the pulse width of V phase is C v Then, the maximum PWM pulse width in one carrier period is C max However, for phases that modulate the ON / OFF state, the minimum pulse width for switching is C min This minimum pulse width C min is required for both the rising and falling edges as shown in Figure 4, so the pulse width C of the U phase u is expressed by the following formula (VII). x is the maximum pulse width (prescribed pulse width) that can be output by PWM, and C x =C max -2C min It becomes.

[0066]

number

[0067] In this invention, two carrier periods are considered, and in order to perform synchronous control of the switching timing in the first carrier period, the first carrier period has a pulse width C u +C v is the maximum pulse width C mentioned above. xThe second carrier cycle must be equal to or less than the U-phase pulse width C u and V phase pulse width C v are the maximum pulse widths C x It must be the following (see Figure 6).

[0068] From the above, the pulse width of U phase C u and V phase pulse width C v and maximum pulse width C x The relationship is expressed as the above formula (VIII), and when expressed in terms of voltage, it becomes the above formula (IX). Here, in order to fix the lower arm switching element 18F of the W phase in the ON state, the additional value V mod is the above formula (X), and the U-phase voltage command value V u is the above formula (XI), and the V-phase voltage command value V v is expressed by the above formula (XII). In addition, the three-phase modulation voltage command value V u * , V v * , V w * When added together, they become 0 (see formula (XIII) above).

[0069] From the above, in order to perform two-phase modulation control in which the lower arm switching element (lower arm switching element 18F of the W phase in the above case) is fixed to the ON state, the following formula (XIV) must be satisfied, which can be rearranged to obtain the following formula (XV), and further to obtain formula (XVI).

[0070]

number

[0071] The above formula (XVI) is the formula (III) with the inequality sign reversed. In other words, when formula (III) is not satisfied, the lower arm switching element is fixed to the ON state, and the switching timings of the other two-phase upper and lower arm switching elements can be synchronized. In this case, the line modulation calculation unit 34 proceeds to step S3 to set the three-phase modulation voltage command value V u * , V v* , V w * Two-phase modulation control is performed to fix the lower arm switching element of one phase for which the voltage command value V is minimum in the ON state. If the formula (III) is satisfied, the lower arm switching element of one phase is fixed in the ON state, and the switching timings of the upper and lower arm switching elements of the other two phases cannot be synchronized. Therefore, the process proceeds to step S6 to set the three-phase modulation voltage command value V u * , V v * , V w * In other words, two-phase modulation control is executed in which the upper arm switching element of one phase in which the current is maximum (one phase different from the phase in which the current is minimum) is fixed to the ON state.

[0072] As described above, the line modulation calculation unit 34 also operates only once every two carrier periods, and calculates the U-phase voltage command value V after line modulation for two consecutive carrier periods in one operation. u , the V-phase voltage command value after line modulation V v , W-phase voltage command value after line modulation V w (Both are two-phase modulation voltage command values) are calculated and generated.

[0073] (5-3) Operation of the PWM signal generator 36 Next, the operation of the PWM signal generating unit 36 ​​will be specifically described. In order to perform calculations as a PWM signal, the PWM signal generating unit 36 ​​generates the U-phase voltage command value V u , the V-phase voltage command value after line modulation V v , W-phase voltage command value after line modulation V w is converted into a count value by the following formula (XVII).

[0074]

number

[0075] In addition, C in the formula u1 * is the U-phase pulse width command value set in the first carrier cycle, Cu2 * is the U-phase pulse width command value set in the second carrier cycle, C v1 * is the V-phase pulse width command value set in the first carrier cycle, C v2 * is the V-phase pulse width command value set in the second carrier period, C w1 * is the pulse width command value of W phase set in the first carrier cycle, C w2 * is the pulse width command value of the W phase set in the second carrier period. max is the maximum PWM pulse width mentioned above, and when this width is output, the phase voltage becomes V dc / 2.

[0076] Here, the phase for fixing the ON / OFF states of the upper and lower arm switching elements calculated by the line modulation calculation unit 34 is the W phase (the W phase three-phase modulation voltage command value V w * is the minimum), and among the two phases whose ON / OFF states are modulated, the phase with the widest pulse width is U phase. First, the total pulse width command value C1 * Then, in step S4 of the flowchart in FIG. 4, if the formula (XIX) is satisfied, the PWM signal generating unit 36 ​​proceeds to step S7 to obtain the pulse width C of the U phase in the first carrier cycle and the second carrier cycle using the formula (XX). u1 , C u2 The correction value C for adjusting adj Calculate.

[0077] Then, in step S5, the U-phase pulse width command value C to be set in the second carrier period is calculated by the formula (XXI). u2 * , the calculated correction value C adj The pulse width is expanded by adding C u2 The total pulse width command value C1 is calculated by the above formula (XXII). * to correction value C adjThe total pulse width C1 is calculated by subtracting the above formula (XXIII), and the U-phase pulse width command value C u1 * to correction value C adj The pulse width is reduced by subtracting C u1 Request.

[0078] If the formula (XIX) is not satisfied in step S4, the correction value C adj becomes 0, and the pulse width C of the V phase in the first carrier period v1 , V-phase pulse width C in the second carrier period v2 , W phase pulse width C in the first carrier cycle w1 , W phase pulse width C in the second carrier period w2 is the result of the formula (XVII), that is, each pulse width command value C v1 * , C v2 * , C w1 * , C w2 * Substitute as is.

[0079] Next, the PWM signal generating unit 36 ​​sets the switching timing by the following formulas (XXIV) to (XXVII) using the values ​​obtained above. That is, the U-phase upper arm rise command value C uu1 , U-phase upper arm down command value C in the first carrier cycle ud1 , U-phase upper arm rise command value C in the second carrier cycle uu2 , U-phase upper arm down command value C in the second carrier cycle ud2 and the V-phase upper arm rise command value C vu1 , V-phase upper arm down command value C in the first carrier cycle vd1 , V-phase upper arm rise command value C in the second carrier cycle vu2 , V-phase upper arm down command value C in the second carrier cycle vd2 and the W-phase upper arm rise command value C wu1 , W-phase upper arm down command value C in the first carrier cycle wd1, W-phase upper arm rise command value C in the second carrier cycle wu2 , W-phase upper arm down command value C in the second carrier cycle wd2 The following is calculated and generated. half is the intermediate value of the PWM pulse width and represents a 0V command.

[0080]

number

[0081] As a result, in the U phase and V phase, which modulate the ON / OFF state in the first carrier cycle, the U phase upper arm lowering command value C ud1 and V-phase upper arm start command value C vu1 Both are C half +(2C u1 -C1) / 2, which synchronizes the rising edge of the V phase with the falling edge of the U phase. However, they are not synchronized in the second carrier cycle.

[0082] Although formulas (XXIV) to (XXVII) synchronize the switching timing in the first carrier cycle, they may be performed in the second carrier cycle. In that case, they are not synchronized in the first carrier cycle. In addition, formulas (XXIV) to (XXVII) in the above example are processing in which the ON / OFF state of the W phase is fixed, the ON / OFF states of the U phase and the V phase are switched, and the U phase has a higher voltage command than the V phase, but if the relationship is reversed, formulas (XVIII) to (XXVII) will be reversed.

[0083] (5-4) Example 1 Next, an operation example of the inverter device 1 of the present invention with the above configuration will be described with reference to Figs. 7 to 9. Operation example 1 shown in the lower part of Fig. 7 is a case where formula (III) is not satisfied (No) in step S1 of the flow chart of Fig. 4, and formula (XIX) is not satisfied (No) in step S4. That is, the lower arm switching element 18F of the W phase is fixed to the ON state, and the U phase voltage v in the first carrier cycle is not corrected without correcting the pulse widths of the U phase and V phase. uand V phase voltage V v In this case, the timing of the rising edge of the first carrier cycle is synchronized with that of the second carrier cycle, but not synchronized with that of the third carrier cycle. Also, phase inversion is not performed, and the prescribed switching interval (in this embodiment, the carrier cycle) begins with the state in which the lower arm switching elements 18D, 18E of both the U phase and the V phase are turned on.

[0084] The upper part of Fig. 7 shows the case of normal two-phase modulation control. In the case of normal two-phase modulation control, the common mode voltage V c fluctuates four times in each carrier cycle, and fluctuates eight times in total in the first and second carrier cycles. On the other hand, according to the control of the control device 21 of the present invention, in the first carrier cycle, the common mode voltage V c In the first carrier cycle, the common mode voltage V c The fluctuation of is reduced by 3 / 4.

[0085] In addition, in this operation example 1, it is possible to perform timing synchronization even in the second carrier cycle, but this is not possible in operation example 2 described later, and since it is preferable to make the generated common mode noise equal across the entire operating range, timing synchronization is not performed in the second carrier cycle.

[0086] (5-5) Example 2 Next, the second operation example shown in the lower part of Fig. 8 is a case where formula (III) is not satisfied (No) in step S1 of the flow chart of Fig. 4, and formula (XIX) is satisfied (Yes) in step S4. That is, in this case as well, the lower arm switching element 18F of the W phase is fixed to the ON state, but since the pulse width of the U phase is wide, the pulse width command value C u1 * Part of (C adj ) is the U-phase pulse width command value C u2 * The pulse width command value C of the V phase in the first carrier cycle isv1 * A part of the V-phase pulse width command value C v2 * It is divided into:

[0087] Then, the U-phase voltage v in the first carrier cycle u and V phase voltage V v In this case, the rising timings of the first and second carrier cycles are synchronized, but not synchronized. In this case, phase inversion is not performed either, and the prescribed switching interval (carrier cycle) begins with the lower arm switching elements 18D, 18E of both the U phase and the V phase being turned on. In this way, by performing a correction to reduce the pulse width of the first carrier cycle and to increase the pulse width of the second carrier cycle, the line voltage does not change over the entire two consecutive carrier cycles.

[0088] The upper part of Figure 8 shows the case of normal two-phase modulation control. In the case of normal two-phase modulation control, the common mode voltage V c fluctuates four times in each carrier cycle, and fluctuates eight times in total in the first and second carrier cycles. On the other hand, according to the control of the control device 21 of the present invention, in the first carrier cycle, the common mode voltage V c In the first carrier cycle, the common mode voltage V c The fluctuation of is reduced by 3 / 4.

[0089] (5-6) Example 3 Next, the operation example 3 shown in the lower part of Fig. 9 is a case where the formula (III) is satisfied (Yes) in step S1 of the flowchart in Fig. 4, and the formula (XIX) is not satisfied (No) in step S4. That is, in this case, when the formula (III) is satisfied and the lower arm switching element 18F of the W phase shown in the upper part of Fig. 9 is fixed to the ON state, the switching timing cannot be synchronized. Therefore, the U phase, which is one phase different from the W phase (the three-phase modulation voltage command value V of the U phase) is not satisfied. u* is maximum) is switched to a state in which the upper arm switching element 18A is fixed in the ON state.

[0090] Then, the V phase voltage v in the first carrier cycle u and W-phase voltage V w In this case, the falling timings of the first and second carrier cycles are synchronized, but not synchronized. In this case, phase inversion is not performed either, and the V-phase and W-phase both start the specified switching interval (carrier cycle) from a state in which lower arm switching elements 18E, 18F are turned on. If necessary, the pulse width of the first carrier cycle is divided into the second carrier cycle as in operation example 2.

[0091] The upper part of Fig. 9 shows the case of normal two-phase modulation control, and as before, the common-mode voltage V c fluctuates four times in each carrier cycle, and fluctuates eight times in total in the first and second carrier cycles. On the other hand, according to the control of the control device 21 of the present invention, in the first carrier cycle, the common mode voltage V c In the first carrier cycle, the common mode voltage V c The fluctuation of is reduced by 3 / 4.

[0092] (5-7) Effect of each modulation rate and common mode noise level 10 to 14 show the results of comparing the normal three-phase modulation with the control of the control device 21 of the present invention for each modulation factor, and comparing the two in terms of the final common mode noise level. uave , V vave , V wave indicates the waveforms (average applied voltage values) obtained by smoothing the PWM voltage waveforms of the UVW phases using a low-pass filter.

[0093] Fig. 10 shows the case of normal three-phase modulation with a modulation factor of 0.4, and Fig. 11 shows the case of control by the control device 21 of the embodiment of the present invention with a modulation factor of 0.4. Fig. 12 shows the case of normal three-phase modulation with a modulation factor of 1.0, and Fig. 13 shows the case of control by the control device 21 of the embodiment of the present invention with a modulation factor of 1.0. In the case of control by the control device 21 of the present invention, the distortion of the average applied voltage increases, but the common mode voltage V c It can be seen that the number of fluctuations in has been significantly reduced.

[0094] Fig. 14 shows the common mode noise level in the case of normal three-phase modulation (conventional) and in the case of control (proposed) by the control device 21 of the present invention. As is clear from this figure, the control by the control device 21 of the present invention makes it possible to reduce the common mode noise level equally in the entire operating region (wide operating range).

[0095] As described above in detail, according to the present invention, the control device 21 includes the phase voltage command calculation unit 33 that calculates and outputs a three-phase modulation voltage command value for generating a voltage to be applied to each phase of the motor 8, the line modulation calculation unit 34 that calculates a two-phase modulation voltage command value for fixing the ON / OFF state of the upper and lower arm switching elements of one phase of the inverter circuit 28 based on the three-phase modulation voltage command value and modulating the ON / OFF states of the upper and lower arm switching elements of the other two phases, and the PWM signal generation unit 36 ​​that generates a PWM signal for PWM controlling the inverter circuit 28 based on the two-phase modulation voltage command value. Therefore, the number of switching times of the upper and lower arm switching elements 18A to 18F is reduced by the two-phase modulation, and the common mode voltage (neutral point potential) V c It is possible to reduce the fluctuation of the

[0096] In addition, the control device 21 synchronizes the switching timing of the two-phase upper and lower arm switching elements that modulate the ON / OFF state in one of two consecutive carrier periods, so that the change in the phase voltage applied to the motor 8 is canceled out by the change in the other phase voltage. Therefore, the common mode voltage Vc This further reduces the fluctuation in the input signal, and further reduces the occurrence of common mode noise.

[0097] In addition, in the present invention, the control device 21 does not synchronize the switching timing of the two-phase upper and lower arm switching elements that modulate the ON / OFF state in the other carrier cycle of two consecutive carrier cycles, thereby eliminating the inconvenience of the modulation width becoming narrow and not being able to achieve a high modulation rate, and making it possible to ensure a wide range in which the motor 8 can be driven. This makes the motor extremely suitable for use in an electric compressor such as the embodiment, which requires a wide operating range.

[0098] In this case, as in the embodiment, the control device 21 synchronizes only one of the timings of the falling edge of one phase voltage and the rising edge of the other phase voltage of the two phases that modulate the ON / OFF state, and the timing of the rising edge of one phase voltage and the falling edge of the other phase voltage, thereby making it possible to effectively achieve both reduction in common mode noise and ensuring a wide operating range.

[0099] In particular, it becomes possible for the control device 21 to start the specified switching period from a state in which the two-phase upper arm switching elements that modulate the ON / OFF state are turned ON or the two-phase lower arm switching elements are turned ON. In other words, since there is no need to invert the phases, there is no need to use a special control device or change the wiring, and this makes it highly versatile.

[0100] Furthermore, when the control device 21 fixes the lower arm switching element of one phase to the ON state as in the embodiment and is unable to synchronize the switching timing of the upper and lower arm switching elements of two phases in that state, by fixing the upper arm switching element of a different phase to the ON state, it becomes possible to stably reduce common mode noise over the entire operating range.

[0101] Then, as in the embodiment, the control device 21 adds up the pulse widths (pulse width command values ​​in the embodiment) that PWM-control the two phases that modulate the ON / OFF state in one carrier cycle to obtain a total pulse width (total pulse width command value C1 in the embodiment). * ), and the total pulse width is the specified pulse width that can be output within one carrier period (in this example, the maximum pulse width C x ), the pulse width of the two phases that modulate the ON / OFF state in one carrier cycle is reduced, and the pulse width of the two phases that modulate the ON / OFF state in the other carrier cycle is expanded (C adj ) to prevent the line voltage from changing over two consecutive carrier periods, thereby enabling stable motor drive to be achieved.

[0102] Furthermore, as in the embodiment, the control device 21 sets a pulse width of two carrier periods (in the embodiment, the rising command value C uu1 , C vu1 , C wu1 , C uu2 , C vu2 , C wu2 , Fall command value C ud1 , C vd1 , C wd1 , C ud2 , C vd2 , C wd2 ), and by providing a PWM signal buffer 35 for storing the generated pulse width, it becomes possible to smoothly and efficiently correct the pulse width every two carrier periods.

[0103] In the embodiment, the U-phase voltage v u Falling edge of and V phase voltage v v The timing of the rise of the U-phase voltage v u Rise of V phase voltage v v Alternatively, both of the timings may be synchronized, but this requires phase inversion and the operation range can be more effectively secured by synchronizing only one of them, so it is better to synchronize only one of them as in the embodiment.

[0104] In addition, in the embodiment, the switching specified period is started from the ON state of the two-phase lower arm switching element that modulates the ON / OFF state, but the present invention is not limited to this, and may be started from the ON state of the two-phase upper arm switching element. Furthermore, in the embodiment, the present invention is applied to the inverter device 1 that controls the drive of the motor 8 of the electric compressor 16, but the invention other than claim 8 is not limited to this, and the present invention is effective for the drive control of the motors of various devices. [Explanation of symbols]

[0105] 1. Inverter device 8 Motor 16 Electric compressor 18A~18F Upper and lower arm switching elements 19U U-phase inverter 19V V-phase inverter 19W W-phase inverter 21 Control device 28 Inverter Circuit 33 Phase voltage command calculation section 34 Line modulation calculation section 35 PWM signal buffers 36 PWM signal generation section 37 Gate Driver

Claims

1. an inverter circuit in which an upper arm switching element and a lower arm switching element are connected in series for each phase between an upper arm power supply line and a lower arm power supply line, and a phase voltage at a connection point of the upper and lower arm switching elements of each phase is applied to a motor as a three-phase AC output; In an inverter device including a control device for controlling switching of upper and lower arm switching elements of each phase of the inverter circuit, The control device includes: a phase voltage command calculation unit that calculates and outputs a three-phase modulated voltage command value for generating a voltage to be applied to each phase of the motor; a line modulation calculation unit that calculates a two-phase modulation voltage command value that fixes an ON / OFF state of the upper and lower arm switching elements of one phase of the inverter circuit and modulates the ON / OFF states of the upper and lower arm switching elements of the other two phases based on the three-phase modulation voltage command value; a PWM signal generating unit that generates a PWM signal for PWM-controlling the inverter circuit based on the two-phase modulation voltage command value; In one of two consecutive carrier cycles, the switching timings of the two-phase upper and lower arm switching elements that modulate the ON / OFF states are synchronized, and a change in a phase voltage applied to the motor is cancelled out by a change in the other phase voltage, In the other carrier cycle, the switching timings of the two-phase upper and lower arm switching elements that modulate the ON / OFF states are not synchronized. An inverter device characterized in that

2. 2. The inverter device according to claim 1, wherein the control device synchronizes only one of the timings of a falling edge of a voltage of one of the two phases that modulates the ON / OFF state and a rising edge of a voltage of the other phase, and a timing of a rising edge of the voltage of the one phase and a falling edge of the voltage of the other phase.

3. The inverter device according to claim 2, characterized in that the control device starts a specified switching period from a state in which the two-phase upper arm switching elements that modulate the ON / OFF state are turned ON or the two-phase lower arm switching elements are turned ON.

4. The inverter device according to claim 1, characterized in that the control device fixes the lower arm switching element of the one phase to an ON state, and if it is not possible to synchronize the switching timings of the upper and lower arm switching elements of the two phases in that state, fixes an upper arm switching element of a phase different from the one phase to an ON state.

5. 2. The inverter device according to claim 1, wherein the control device adds up pulse widths for PWM-controlling the two phases whose ON / OFF states are modulated in one of the carrier periods to generate a total pulse width.

6. 6. The inverter device according to claim 5, wherein when the total pulse width is greater than a specified pulse width that can be output within one carrier cycle, the control device performs a correction to reduce the pulse width of the two phases that modulate the ON / OFF state in one carrier cycle and to increase the pulse width of the two phases that modulate the ON / OFF state in the other carrier cycle, thereby preventing a change in the line voltage over the entire two consecutive carrier cycles.

7. 7. The inverter device according to claim 6, wherein the control device generates the pulse width for two carrier periods and has a PWM signal buffer that stores the generated pulse width.

8. 8. An electric compressor comprising: an inverter device according to claim 1; a motor; and a compression mechanism driven by the motor to compress a refrigerant, the compression mechanism being housed within a housing.

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