Semiconductor device

Abstract

To provide a semiconductor device that can improve the transmission characteristics of high-frequency signals.SOLUTION: A semiconductor device has a substrate, a transistor provided on the substrate, a light receiving element, and a light emitting element. The substrate, the transistor, the light emitting element, and the light receiving element are aligned in the first direction in this order.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The embodiments relate to a semiconductor device. [Background technology]

[0002] 2. Description of the Related Art A photorelay device is known as a semiconductor device. The photorelay device is a semiconductor relay device including a light emitting element and a light receiving element. The photorelay device is a contactless relay and is used for transmitting AC signals or DC signals. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2022-146698 A [Patent Document 2] JP 2021-89971 A [Patent Document 3] JP 2021-125620 A [Patent Document 4] JP 2021-125670 A [Patent Document 5] JP 2011-166077 A Summary of the Invention [Problem to be solved by the invention]

[0004] A semiconductor device capable of improving the transmission characteristics of high-frequency signals is provided. [Means for solving the problem]

[0005] The semiconductor device according to the embodiment includes a substrate, a transistor provided on the substrate, a light receiving element, and a light emitting element, The substrate, the transistor, the light emitting element, and the light receiving element are arranged in this order in a first direction. [Brief description of the drawings]

[0006] [Figure 1]FIG. 1 is a perspective view showing an example of the overall configuration of a photorelay device according to the first embodiment. [Diagram 2] FIG. 2 is a plan view showing a planar layout of various elements included in the photorelay device according to the first embodiment. [Diagram 3] FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2, showing an example of the cross-sectional structure of the photorelay device according to the first embodiment. [Figure 4] FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2, showing an example of the cross-sectional structure of the photorelay device according to the first embodiment. [Diagram 5] FIG. 5 is a cross-sectional view taken along line VV in FIG. 2, showing an example of the cross-sectional structure of the photorelay device according to the first embodiment. [Figure 6] FIG. 6 is a circuit diagram showing an example of a circuit configuration of the photorelay device according to the first embodiment. [Figure 7] FIG. 7 is a cross-sectional view showing an example of a cross-sectional structure during a manufacturing process of the photorelay device according to the first embodiment. [Figure 8] FIG. 8 is a cross-sectional view showing an example of a cross-sectional structure in a manufacturing process of the photorelay device according to the first embodiment. [Figure 9] FIG. 9 is a cross-sectional view showing an example of a cross-sectional structure during a manufacturing process of the photorelay device according to the first embodiment. [Figure 10] FIG. 10 is a cross-sectional view showing an example of a cross-sectional structure during a manufacturing process of the photorelay device according to the first embodiment. [Figure 11] FIG. 11 is a cross-sectional view showing an example of a cross-sectional structure of the photorelay device according to the second embodiment. [Figure 12] FIG. 12 is a cross-sectional view showing an example of a cross-sectional structure of the photorelay device according to the second embodiment. [Figure 13] FIG. 13 is a cross-sectional view showing an example of a cross-sectional structure of the photorelay device according to the second embodiment during a manufacturing process. [Figure 14] FIG. 14 is a cross-sectional view showing an example of a cross-sectional structure during a manufacturing process of the photorelay device according to the second embodiment. [Figure 15] FIG. 15 is a perspective view illustrating an example of the overall configuration of a photorelay device according to the third embodiment. [Figure 16] FIG. 16 is a cross-sectional view showing an example of the cross-sectional structure of the photorelay device according to the third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0007] Hereinafter, the embodiments will be described with reference to the drawings. Each embodiment illustrates an apparatus or method for embodying the technical idea of ​​the invention. The drawings are schematic or conceptual, and the dimensions and ratios of each drawing are not necessarily the same as those in reality. The technical idea of ​​the present invention is not specified by the shape, structure, arrangement, etc. of the components.

[0008] In the following description, components having substantially the same functions and configurations are denoted by the same reference numerals. When there is no need to distinguish between elements denoted by reference numerals containing the same letters, these elements are referred to by reference numerals containing only letters.

[0009] A first embodiment will be described below. In this embodiment, a photorelay device will be described as an example of a semiconductor device.

[0010] Fig. 1 is a perspective view showing an example of the overall configuration of a photorelay device according to a first embodiment of the present invention, Fig. 2 is a plan view showing a planar layout of various elements included in the photorelay device in Fig. 1.

[0011] 1 and 2, the photorelay device 1 includes two transistors 20a and 20b, a light receiving element 30, an adhesive layer 40, a light emitting element 50, electrodes 60, 61, 62, and 63, input terminals 80 and 81, output terminals 82a and 82b, and wirings 90, 91, 92, 93, 94, 95, 96, 97, and 98. The transistors 20a and 20b are, for example, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). In the following, a case where the transistors 20a and 20b are MOSFETs (MOSFETs 20a and 20b) will be described. The MOSFETs 20a and 20b are disposed so as to face the light receiving element 30, the adhesive layer 40, and the light emitting element 50.

[0012] In the following, the direction from the MOSFETs 20a and 20b toward the light receiving element 30 and the light emitting element 50 is referred to as the Z direction or the upward direction. The direction from the light receiving element 30 and the light emitting element 50 toward the MOSFETs 20a and 20b is referred to as the downward direction. The plane intersecting with the Z direction is referred to as the XY plane. The directions intersecting with each other in the XY plane are referred to as the X direction and the Y direction. That is, the upper part of the plan view shown in FIG. 2 corresponds to the plan layout of the light receiving element 30, the adhesive layer 40, and the light emitting element 50 when the photorelay device 1 is viewed from above. Moreover, the lower part of the plan view shown in FIG. 2 corresponds to the plan layout of the MOSFETs 20a and 20b, the electrodes 60, 61, 62, and 63, the input terminals 80 and 81, and the output terminals 82a and 82b when the photorelay device 1 is viewed from below.

[0013] The MOSFETs 20a and 20b are, for example, enhancement-type n-channel MOS transistors. The MOSFETs 20a and 20b are used to control AC or DC signals to be transmitted. When the MOSFETs 20a and 20b are in an on state, the photorelay device 1 transmits a signal, and when the MOSFETs 20a and 20b are in an off state, the photorelay device 1 does not transmit a signal.

[0014] The MOSFET 20a (hereinafter also referred to as "MOS1") includes electrodes 21a, 22a, and 23a. The electrode 21a functions as a drain electrode of the MOSFET 20a. The electrode 22a functions as a source electrode of the MOSFET 20a. The electrode 23a functions as a gate electrode of the MOSFET 20a. The electrode 21a is provided on a lower surface of the MOSFET 20a. The electrodes 22a and 23a are provided on an upper surface of the MOSFET 20a.

[0015] The MOSFET 20b (hereinafter also referred to as "MOS2") has the same structure as the MOSFET 20a. For example, the MOSFET 20b is arranged next to the MOSFET 20a in the Y direction. The MOSFET 20a and the MOSFET 20b may be arranged in any desired manner.

[0016] The MOSFET 20b includes electrodes 21b, 22b, and 23b. The electrode 21b functions as a drain electrode of the MOSFET 20b. The electrode 22b functions as a source electrode of the MOSFET 20b. The electrode 23b functions as a gate electrode of the MOSFET 20b. The electrode 21b is provided on a lower surface of the MOSFET 20b. The electrodes 22b and 23b are provided on an upper surface of the MOSFET 20b. In the example of FIGS. 1 and 2, the electrodes 22a and 23a of the MOSFET 20a are arranged symmetrically with the electrodes 22b and 23b of the MOSFET 20b with respect to a plane extending in the X direction and the Z direction.

[0017] The light receiving element 30 is a PDA (Photo Diode Array) or a phototransistor. FIGS. 1 and 2 show a case where the light receiving element 30 is a PDA. The case where the light receiving element 30 is a PDA will be described below. The light receiving element 30 is provided above the MOSFET 20a and the MOSFET 20b. A light receiving surface is provided on the lower surface of the light receiving element 30. In other words, the light receiving surface of the light receiving element 30 faces the side (downward) where the MOSFET 20a and the MOSFET 20b are arranged.

[0018] The light receiving element 30 includes electrodes 31, 32, 33, and 34. The electrodes 31, 32, 33, and 34 are provided on the lower surface of the light receiving element 30. For example, the electrodes 31 and 33 are electrically connected by a wiring (not shown) provided in the light receiving element 30. For example, the electrodes 32 and 34 are electrically connected by a wiring (not shown) provided in the light receiving element 30. For example, the electrodes 31, 32, 33, and 34 are protruding electrodes. The electrode 31 is connected to the electrode 22a of the MOSFET 20a via a wiring 91. The electrode 32 is connected to the electrode 23a of the MOSFET 20a via a wiring 92. The electrode 33 is connected to the electrode 22b of the MOSFET 20b via a wiring 93. The electrode 34 is connected to the electrode 23b of the MOSFET 20b via a wiring 94.

[0019] The light emitting element 50 is, for example, an LED (Light Emitting Diode). The light emitting element 50 is provided on the lower surface of the light receiving element 30 via the adhesive layer 40. That is, the light emitting element 50 is disposed between the MOSFETs 20a and 20b and the light receiving element 30. Note that the adhesive layer 40 is made of an insulating material having light transmissivity. A light irradiation surface is provided on the upper surface of the light emitting element 50. The light irradiation surface of the light emitting element 50 faces the light receiving surface of the light receiving element 30.

[0020] The light-emitting element 50 includes electrodes 51 and 52. The electrodes 51 and 52 are provided on the lower surface of the light-emitting element 50. One of the electrodes 51 and 52 is an anode electrode of the light-emitting element 50, and the other is a cathode electrode of the light-emitting element 50. The electrode 51 is connected to an electrode 62 via wirings 95 and 97. The electrode 52 is connected to an electrode 63 via wirings 96 and 98.

[0021] The electrodes 60 and 61 are provided, for example, on the bottom surfaces of the MOSFETs 20a and 20b, respectively. The electrodes 60 and 61 are aligned in the Y direction. The electrode 60 is electrically connected to the electrode 21a of the MOSFET 20a. The electrode 61 is electrically connected to the electrode 21b of the MOSFET 20b.

[0022] The electrodes 62 and 63 are arranged, for example, at approximately the same positions as the electrodes 60 and 61 in the Z direction, and aligned in the X direction with the electrodes 60 and 61. The electrodes 62 and 63 are aligned with each other in the Y direction.

[0023] Input terminals 80 and 81 are provided below electrodes 62 and 63, respectively. Input terminal 80 is connected to electrode 62 via a conductor (not shown). Input terminal 81 is connected to electrode 63 via a conductor (not shown). Input terminals 80 and 81 are connected to an external power supply (not shown). The power supply is an AC power supply or a DC power supply. A voltage for controlling photorelay device 1 is applied to input terminals 80 and 81.

[0024] The output terminals 82a and 82b are provided below the electrodes 60 and 61, respectively. The output terminal 82a is connected to the electrode 60 via a conductor (not shown). The output terminal 82b is connected to the electrode 61 via a conductor (not shown). The output terminals 82a and 82b are each connected to an external circuit (not shown). As a result, an AC or DC signal is transmitted from the power source to the circuit via the photorelay device 1.

[0025] FIG. 3 is a cross-sectional view taken along line III-III in FIG. 2, showing an example of the cross-sectional structure of the photorelay device according to the first embodiment. FIG. 4 is a cross-sectional view taken along line IV-IV in FIG. 2, showing an example of the cross-sectional structure of the photorelay device according to the first embodiment. FIG. 5 is a cross-sectional view taken along line V-V in FIG. 2, showing an example of the cross-sectional structure of the photorelay device according to the first embodiment. FIG. 3 corresponds to a YZ cross section of a portion including wirings 90, 91, and 93 of the photorelay device 1. FIG. 4 corresponds to an XZ cross section of a portion including wirings 91 and 92 of the photorelay device 1. FIG. 5 corresponds to an XZ cross section of a portion including wiring 95 of the photorelay device 1.

[0026] First, the overall structure of the photorelay device 1 will be described with reference to FIGS.

[0027] As shown in FIGS. 3, 4, and 5, the photorelay device 1 further includes a substrate 10, an intermediate substrate 70, and a sealing resin 100.

[0028] The substrate 10 is, for example, a flexible substrate (FPC: Flexible Printed Circuits) using polyimide, a resin substrate, or a polyimide substrate. The substrate 10 includes wiring layers 11, 13, and 15, and insulator layers 12 and 14. The substrate 10 includes, for example, a five-layer structure in which the wiring layer 11, the insulator layer 12, the wiring layer 13, the insulator layer 14, and the wiring layer 15 are stacked in this order upward. The substrate 10 has an opening that is a hole that penetrates the wiring layer 15 and the insulator layer 14 to reach the wiring layer 13. The MOSFETs 20a and 20b are disposed in the opening of the substrate 10. That is, the MOSFETs 20a and 20b are provided at positions that intersect with the substrate 10 in the XY plane. The upper portion of the substrate 10 contacts the lower portion of the intermediate substrate 70.

[0029] The intermediate substrate 70 is, for example, a resin substrate, a polyimide substrate, or a silicon substrate. The intermediate substrate 70 includes wiring layers 71, 73, and 75, and insulator layers 72 and 74. The intermediate substrate 70 includes, for example, a five-layer structure in which the wiring layer 71, the insulator layer 72, the wiring layer 73, the insulator layer 74, and the wiring layer 75 are stacked in this order upward. The wiring layer 71 of the intermediate substrate 70 contacts the wiring layer 15 of the substrate 10 and the upper portions of the MOSFETs 20a and 20b. The wiring layer 75 of the intermediate substrate 70 contacts the lower portions of the light receiving element 30 and the light emitting element 50. Therefore, the substrate 10, the MOSFETs 20a and 20b, the intermediate substrate 70, the light emitting element 50, and the light receiving element 30 are arranged in this order in the Z direction.

[0030] The sealing resin 100 is, for example, a molding resin having a light-shielding property. The sealing resin 100 covers the MOSFETs 20a and 20b, the light receiving element 30, the light emitting element 50, and the intermediate substrate 70, thereby protecting them from physical or electrical disturbances.

[0031] Next, a configuration for electrically connecting the MOSFETs 20a and 20b to the output terminals 82a and 82b will be described with reference to FIGS.

[0032] The wiring layer 11 includes output terminals 82a and 82b. The insulator layer 12 includes conductors 87a and 87b and an insulator 12-1. The wiring layer 13 includes electrodes 60 and 61 and an insulator 13-1.

[0033] The electrode 60 contacts the electrode 21a of the MOSFET 20a. The electrode 61 contacts the electrode 21b of the MOSFET 20b. The insulator 13-1 insulates the electrodes 60 and 61 from each other. The conductor 87a functions as a via extending in the Z direction in the insulator 12-1 so as to connect between the upper surface of the output terminal 82a and the lower surface of the electrode 60. The conductor 87b functions as a via extending in the Z direction in the insulator 12-1 so as to connect between the upper surface of the output terminal 82b and the lower surface of the electrode 61. Although three conductors 87a are provided in the example of FIG. 4, one or more conductors 87a may be provided. The same applies to the conductor 87b.

[0034] With the above-mentioned configuration, the MOSFETs 20a and 20b are electrically connected to the output terminals 82a and 82b.

[0035] Next, a configuration for electrically connecting the MOSFETs 20a and 20b to the light receiving element 30 will be described with reference to FIGS.

[0036] The wiring layer 71 includes electrodes 90-1, 91-1, 92-1, and 93-1. The insulator layer 72 includes conductors 91-4, 92-4, and 93-4, and an insulator 72-1. The wiring layer 73 includes an insulator 73-1, and conductors 91-3, 92-3, and 93-3. The insulator layer 74 includes conductors 91-5, 92-5, and 93-5, and an insulator 74-1. The wiring layer 75 includes electrodes 91-2, 92-2, and 93-2.

[0037] The electrodes 90-1, 91-1, 91-2, 92-1, 92-2, 93-1, and 93-2 are, for example, a conductive paste material of silver or gold. The electrodes 90-1, 91-1, 92-1, and 93-1 are not in contact with each other and are not electrically connected within the wiring layer 71. The electrodes 91-2, 92-2, and 93-2 are not in contact with each other and are not electrically connected within the wiring layer 75.

[0038] The electrode 90-1 corresponds to the wiring 90. The structure corresponding to the wiring 90 electrically connects between the electrode 22a of the MOSFET 20a and the electrode 22b of the MOSFET 20b.

[0039] The electrodes 91-1 and 91-2 and the conductors 91-3, 91-4, and 91-5 correspond to the wiring 91. The structure corresponding to the wiring 91 electrically connects the light receiving element 30 and the electrode 22a of the MOSFET 20a.

[0040] The electrodes 92-1 and 92-2 and the conductors 92-3, 92-4, and 92-5 correspond to the wiring 92. The structure corresponding to the wiring 92 electrically connects the light receiving element 30 and the electrode 23a of the MOSFET 20a.

[0041] The electrodes 93-1 and 93-2 and the conductors 93-3, 93-4, and 93-5 correspond to the wiring 93. The structure corresponding to the wiring 93 electrically connects the light receiving element 30 and the electrode 22b of the MOSFET 20b.

[0042] The electrode 90-1 extends in the Y direction so that both ends are in contact with the upper surface of the electrode 22a of the MOSFET 20a and the upper surface of the electrode 22b of the MOSFET 20b.

[0043] The electrode 91-1 contacts the upper surface of the electrode 22a of the MOSFET 20a. The electrode 91-2 contacts the lower surface of the electrode 31. The conductor 91-3 has a function of adjusting the positional deviation between the electrode 22a and the electrode 31 when viewed in the Z direction, for example. The conductor 91-4 functions as a via extending in the Z direction in the insulator 72-1 so as to connect the upper surface of the electrode 91-1 and the lower surface of the conductor 91-3. The conductor 91-5 functions as a via extending in the Z direction in the insulator 74-1 so as to connect the upper surface of the conductor 91-3 and the lower surface of the electrode 91-2.

[0044] The electrode 92-1 contacts the upper surface of the electrode 23a of the MOSFET 20a. The electrode 92-2 contacts the lower surface of the electrode 32. The conductor 92-3 has a function of adjusting the positional deviation between the electrode 23a and the electrode 32 when viewed in the Z direction, for example. The conductor 92-4 functions as a via extending in the Z direction in the insulator 72-1 so as to connect the upper surface of the electrode 92-1 and the lower surface of the conductor 92-3. The conductor 92-5 functions as a via extending in the Z direction in the insulator 74-1 so as to connect the upper surface of the conductor 92-3 and the lower surface of the electrode 92-2.

[0045] The electrode 93-1 contacts the upper surface of the electrode 22b of the MOSFET 20b. The electrode 93-2 contacts the lower surface of the electrode 33. The conductor 93-3 has a function of adjusting the positional deviation between the electrode 22b and the electrode 33 when viewed in the Z direction, for example. The conductor 93-4 functions as a via extending in the Z direction in the insulator 72-1 so as to connect the upper surface of the electrode 93-1 and the lower surface of the conductor 93-3. The conductor 93-5 functions as a via extending in the Z direction in the insulator 74-1 so as to connect the upper surface of the conductor 93-3 and the lower surface of the electrode 93-2.

[0046] 3 and 4, intermediate substrate 70 further includes a configuration corresponding to wiring 94. The configuration corresponding to wiring 94 electrically connects light receiving element 30 and electrode 23b of MOSFET 20b. The configuration corresponding to wiring 94 is similar to the configuration corresponding to wiring 92. Insulator 73-1 insulates conductors 91-3, 92-3, 93-3, and the conductor corresponding to conductor 92-3 in wiring 94 from one another.

[0047] With the above-mentioned configuration, the MOSFETs 20a and 20b and the light receiving element 30 are electrically connected to each other.

[0048] Next, with reference to FIG. 5, a configuration for electrically connecting the input terminals 80 and 81 to the light emitting element 50 will be described.

[0049] The wiring layer 11 further includes an input terminal 80. The insulator layer 12 further includes a conductor 85. The wiring layer 13 further includes an electrode 62. The insulator layer 14 further includes a conductor 95-2. The wiring layer 15 further includes an electrode 95-1.

[0050] The wiring layer 71 further includes an electrode 97-1. The insulator layer 72 further includes a conductor 97-4. The wiring layer 73 further includes a conductor 97-3. The insulator layer 74 further includes a conductor 97-5. The wiring layer 75 further includes an electrode 97-2.

[0051] The electrode 95-1 and the conductor 95-2 correspond to the wiring 95. The electrodes 97-1 and 97-2 and the conductors 97-3, 97-4, and 97-5 correspond to the wiring 97. The components corresponding to the wirings 95 and 97 electrically connect the light-emitting element 50 and the electrode 62.

[0052] The conductor 85 functions as a via extending in the Z direction within the insulator 12-1 to connect between the upper surface of the input terminal 80 and the lower surface of the electrode 62. The conductor 95-2 functions as a via extending in the Z direction within the insulator 14-1 to connect between the upper surface of the electrode 62 and the lower surface of the electrode 95-1. The electrode 62 is insulated from the electrodes 60 and 61 by the insulator 13-1.

[0053] The electrode 97-1 contacts the upper surface of the electrode 95-1. The electrode 97-2 contacts the lower surface of the electrode 51. The conductor 97-3 has a function of adjusting the positional deviation between the electrode 95-1 and the electrode 51 when viewed in the Z direction, for example. The conductor 97-3 is insulated from the conductors 91-3, 92-3, and 93-3, and the conductor corresponding to the conductor 92-3 in the wiring 94 by the insulator 73-1. The conductor 97-4 functions as a via extending in the Z direction in the insulator 72-1 so as to connect the upper surface of the electrode 97-1 and the lower surface of the conductor 97-3. The conductor 97-5 functions as a via extending in the Z direction in the insulator 74-1 so as to connect the upper surface of the conductor 97-3 and the lower surface of the electrode 97-2.

[0054] Although not shown in FIG. 5, the wiring layer 11 further includes an input terminal 81. The insulator layer 12 further includes a conductor that electrically connects the electrode 63 and the input terminal 81. The wiring layer 13 further includes an electrode 63. The insulator layer 14 and the wiring layer 15 further include a configuration corresponding to the wiring 96. The intermediate substrate 70 further includes a configuration corresponding to the wiring 98. The electrode 63 is insulated from the electrodes 60, 61, and 62 by the insulator 13-1. The conductor that electrically connects the electrode 63 and the input terminal 81 is equivalent to the configuration corresponding to the conductor 85. The configuration corresponding to the wirings 96 and 98 electrically connects between the electrode 52 and the electrode 62 of the light-emitting element 50. The configuration corresponding to the wiring 96 is equivalent to the configuration corresponding to the wiring 95. The configuration corresponding to the wiring 98 is equivalent to the configuration corresponding to the wiring 97. In the wiring 98, a conductor corresponding to the conductor 97-3 is insulated from the conductor 97-3 by an insulator 73-1. The components corresponding to the wirings 96 and 98 electrically connect the light emitting element 50 and the electrode 63.

[0055] With the above-mentioned configuration, the input terminals 80 and 81 are electrically connected to the light-emitting element 50.

[0056] 6 is a circuit diagram showing an example of a circuit configuration of the photorelay device according to the first embodiment. An example of the circuit configuration of the photorelay device 1 in the first embodiment will be described with reference to FIG.

[0057] 6, the light emitting element 50 is connected to input terminals 80 and 81. An input voltage for controlling the photorelay device 1 is applied to the input terminals 80 and 81.

[0058] The light receiving element 30 is, for example, a photodiode array including a control circuit 30a and several to several tens of photodiodes 30b connected in series. Both ends of the multiple photodiodes 30b connected in series are connected to the control circuit 30a.

[0059] The gates of the MOSFETs 20a and 20b are commonly connected to the anode of the light receiving element 30. The sources of the MOSFETs 20a and 20b are commonly connected to the cathode of the light receiving element 30. The drain of the MOSFET 20a is connected to the output terminal 82a. The drain of the MOSFET 20b is connected to the output terminal 82b.

[0060] When the light-emitting element 50 on the input side is turned on (light-emitting state), the light-receiving element 30 that drives the MOSFETs 20a and 20b receives light from the light-emitting element 50 and generates a voltage of, for example, 7 V to several tens of V. This brings the MOSFETs 20a and 20b into the on state, and the output terminals 82a and 82b into an electrically connected state. On the other hand, when the light-emitting element 50 is turned off (light-extinguishing state), the MOSFETs 20a and 20b are turned off, and the output terminals 82a and 82b are electrically disconnected.

[0061] Next, an example of a manufacturing method of the photorelay device according to the first embodiment will be described. Figures 7, 8, 9, and 10 are cross-sectional views showing an example of a cross-sectional structure in a manufacturing process of the photorelay device according to the first embodiment. The cross sections shown in Figures 7, 8, 9, and 10 correspond to the cross section shown in Figure 3.

[0062] First, the substrate 10 without any openings, the MOSFETs 20a and 20b, the light receiving element 30, the light emitting element 50, and the intermediate substrate 70 are individually formed. The light receiving element 30 and the light emitting element 50 are bonded via the adhesive layer 40 so that the light receiving surface and the light emitting surface face each other.

[0063] Next, openings are formed in the substrate 10, for example, by laser processing, as shown in Figure 7. The electrodes 60 and 61 are exposed by the laser processing.

[0064] 8, the electrode 21a of the MOSFET 20a is bonded to the upper surface of the electrode 60, and the electrode 21b of the MOSFET 20b is bonded to the upper surface of the electrode 61. In this way, the MOSFETs 20a and 20b are supported by the substrate 10.

[0065] Next, as shown in FIG. 9, the intermediate substrate 70 is provided on the upper surfaces of the substrate 10 and the MOSFETs 20a and 20b. Specifically, the electrode 22a of the MOSFET 20a is bonded to the electrodes 90-1 and 91-1 of the intermediate substrate 70. The electrode 22b of the MOSFET 20b is bonded to the electrodes 90-1 and 93-1 of the intermediate substrate. Although not shown in FIG. 9, the electrode 23a of the MOSFET 20a is bonded to the electrode 92-1 of the intermediate substrate 70. The electrode 23b of the MOSFET 20b is bonded to the electrode on the lower surface side corresponding to the wiring 94 of the intermediate substrate 70. The electrode 95-1 is bonded to the electrode 97-1 of the intermediate substrate 70. The electrode corresponding to the wiring 96 is bonded to the electrode on the lower surface side corresponding to the wiring 98 of the intermediate substrate 70. In this way, the intermediate substrate 70 is supported by the substrate 10 and the MOSFETs 20a and 20b.

[0066] Next, as shown in Fig. 10, the light receiving element 30 and the light emitting element 50 bonded by the adhesive layer 40 are provided on the upper surface of the intermediate substrate 70. Specifically, the electrode 31 of the light receiving element 30 is bonded to the electrode 91-2 of the intermediate substrate 70, and the electrode 33 of the light receiving element 30 is bonded to the electrode 93-2 of the intermediate substrate 70. Although not shown in Fig. 10, the electrode 32 of the light receiving element 30 is bonded to the electrode 92-2 of the intermediate substrate, and the electrode 34 of the light receiving element 30 is bonded to the upper electrode corresponding to the wiring 94 of the intermediate substrate. The electrode 51 of the light emitting element 50 is bonded to the electrode 97-2 of the intermediate substrate 70, and the electrode 52 of the light emitting element 50 is bonded to the upper electrode corresponding to the wiring 98 of the intermediate substrate.

[0067] Next, the structure obtained by the above steps, except for the lower part, is sealed with sealing resin 100. In this manner, the photorelay device 1 is manufactured.

[0068] In a photorelay device, a light receiving element and a light emitting element may be disposed between a MOSFET (output terminal) and an electrode (input terminal). In this case, a coupling capacitance occurs between the light receiving element and the input terminal, and between the light receiving element and the output terminal. Due to the influence of this coupling capacitance, high frequency transmission characteristics, for example, at 1 GHz or higher, may deteriorate. In addition, for example, if the length of the conductor connecting the light receiving element and the MOSFET becomes long, the transmission characteristics deteriorate in the lower frequency range due to the influence of an open stub.

[0069] In the configuration according to the first embodiment, the light receiving element 30 and the light emitting element 50 are disposed above the MOSFET 20a and the MOSFET 20b. This can reduce the coupling capacitance between the light receiving element 30 and the input terminals 80 and 81, and between the light receiving element 30 and the output terminals 82a and 82b. In addition, by disposing the light receiving element 30 and the light emitting element 50 above the MOSFET 20a and the MOSFET 20b, the length of the circuit connecting the electrodes of the light receiving element 30 and the electrodes of the MOSFET 20a and the MOSFET 20b can be relatively shortened. Similarly, the length of the circuit connecting the electrodes of the light emitting element 50 and the input terminals provided on the lower layer surface of the substrate 10 can be relatively shortened. Therefore, the influence of the open stub can be shifted to a higher frequency region. Therefore, the transmission characteristics of the high frequency signal of the semiconductor device can be improved.

[0070] Furthermore, with the configuration according to the first embodiment, the light receiving element 30 and the light emitting element 50 are disposed above the MOSFETs 20a and 20b, thereby making it possible to reduce the installation area of ​​the photorelay device 1. In other words, the photorelay device 1 can be made smaller in size.

[0071] Furthermore, by using a multilayer substrate as the intermediate substrate 70, it is possible to adjust misalignment between the electrodes 22a and 23a of the MOSFET 20a and the electrodes 22b and 23b of the MOSFET 20b and the electrodes 31, 32, 33, and 34 of the light receiving element 30 when viewed in the Z direction. Similarly, it is possible to adjust misalignment between the electrodes 51 and 52 of the light emitting element 50 and the electrodes of the input terminals 80 and 81 when viewed in the Z direction. In other words, it is possible to reduce the possibility of malfunction due to misalignment of the electrodes during manufacturing.

[0072] Moreover, the MOSFETs 20a and 20b are disposed in a recess in the substrate 10. That is, the MOSFETs 20a and 20b are disposed at positions intersecting with the substrate 10 in the XY plane. This allows the position of the top surface of the region of the substrate 10 where the MOSFETs 20a and 20b are not provided and the position of the top surfaces of the MOSFETs 20a and 20b to be aligned in the Z direction. This allows the loads of the light receiving element 30, the light emitting element 50, and the intermediate substrate 70 to be distributed to the substrate 10 and the MOSFETs 20a and 20b. This allows the manufacturing load to be reduced in order to realize a structure in which the light receiving element 30 and the light emitting element 50 are disposed above the MOSFETs 20a and 20b.

[0073] Next, a second embodiment will be described, focusing mainly on the configuration and manufacturing method that are different from the first embodiment.

[0074] Fig. 11 and Fig. 12 are cross-sectional views showing an example of a cross-sectional structure of a photorelay device according to the second embodiment. Fig. 11 corresponds to Fig. 3 in the first embodiment. Fig. 12 corresponds to Fig. 5 in the first embodiment.

[0075] 11 and 12, the photorelay device 1A includes an intermediate substrate 70A instead of the intermediate substrate 70 in the first embodiment. The configuration of the photorelay device 1A excluding the intermediate substrate 70A is the same as the configuration of the photorelay device 1A excluding the intermediate substrate 70 in the first embodiment.

[0076] The intermediate substrate 70A includes an insulator layer 74A instead of the insulator layer 74. The insulator layer 74A includes an insulator 74-1A as a base. The intermediate substrate 70A has an opening which is a hole that penetrates the wiring layer 75 and the insulator layer 74A to reach the wiring layer 73. The light emitting element 50 is disposed in the opening of the intermediate substrate 70A. That is, the light emitting element 50 in the second embodiment is provided at a position intersecting with the intermediate substrate 70A in the XY plane.

[0077] By providing the opening, intermediate substrate 70A does not include electrode 97-2 and conductor 97-5 as components corresponding to wiring 97. Then, light emitting element 50 is provided such that electrode 51 is in contact with the upper surface of conductor 97-3.

[0078] Furthermore, by providing the light receiving element 30 in the opening, the intermediate substrate 70A and the light receiving element 30 are close enough to each other so that they can be connected by flat electrodes. Therefore, the electrodes 31, 32, 33, and 34 of the light receiving element 30 may be flat electrodes instead of protruding electrodes.

[0079] Although not shown in FIGS. 11 and 12, the configuration corresponding to the wiring 98 is the same as the configuration corresponding to the wiring 97.

[0080] With the above-mentioned configuration, the input terminals 80 and 81 are electrically connected to the light-emitting element 50.

[0081] Next, an example of a manufacturing method of the photorelay device according to the second embodiment will be described. Figures 13 and 14 are cross-sectional views showing an example of a cross-sectional structure in a manufacturing process of the photorelay device according to the second embodiment. Figure 13 corresponds to Figure 9 of the first embodiment. Figure 14 corresponds to Figure 10 of the first embodiment.

[0082] First, an opening is formed in advance in intermediate substrate 70A, which does not have an opening, for example, by laser processing. This laser processing exposes conductor 97-3 and conductors corresponding to wiring 98 of intermediate substrate 70A. Thereafter, substrate 10 and MOSFETs 20a and 20b are provided in the same manner as in the process described in the first embodiment with reference to FIGS. 7 and 8.

[0083] Subsequently, an intermediate substrate 70A is provided on the upper surfaces of the substrate 10 and the MOSFETs 20a and 20b as shown in Fig. 13. The specific bonding relationship is similar to that in Fig. 9 in the first embodiment.

[0084] Next, as shown in Fig. 14, the light receiving element 30 and the light emitting element 50 bonded by the adhesive layer 40 are provided on the upper surface of the intermediate substrate 70A. At this time, at least a part of the light emitting element 50 is shaped to fit in the opening of the intermediate substrate 70A. Specifically, the electrode 51 of the light emitting element 50 is bonded to the conductor 97-3 of the intermediate substrate 70A. Although not shown in Fig. 14, the electrode 52 of the light emitting element 50 is bonded to a conductor corresponding to the wiring 98 of the intermediate substrate 70A. The bonding relationship between the light receiving element 30 and the MOSFETs 20a and 20b is the same as that in Fig. 10 in the first embodiment.

[0085] Next, the structure obtained by the above steps, except for the lower part, is sealed with sealing resin 100. In this manner, the photorelay device 1A is manufactured.

[0086] With the configuration according to the second embodiment, the height of the photorelay device can be reduced, and therefore the photorelay device can be made smaller.

[0087] Furthermore, in the configuration according to the second embodiment, the light receiving element 30 and the light emitting element 50 are disposed above the MOSFETs 20a and 20b, as in the first embodiment, which improves the transmission characteristics of high frequency signals in the semiconductor device.

[0088] Next, a third embodiment will be described, focusing mainly on the configuration and manufacturing method that differ from the first embodiment.

[0089] Fig. 15 is a perspective view showing an example of the overall configuration of the photorelay device according to the third embodiment. Fig. 16 is a cross-sectional view showing an example of the cross-sectional structure of the photorelay device according to the third embodiment. In Fig. 15, the substrate 10, the intermediate substrate 70, and the sealing resin 100 are omitted in order to clarify the internal structure.

[0090] 15 and 16, a photorelay device 1B of the present embodiment includes a substrate 10B instead of the substrate 10 in the first embodiment. Also, an intermediate substrate 70B is provided instead of the intermediate substrate 70 in the first embodiment. Note that the configuration of the photorelay device 1B, excluding the substrate 10 and intermediate substrate 70, is the same as the configuration of the first embodiment, excluding the substrate 10 and intermediate substrate 70.

[0091] The photorelay device 1B includes input terminals 80B and 81B instead of the input terminals 80 and 81. Unlike the first embodiment, the input terminals 80B and 81B are not included in the substrate 10B. The input terminals 80B and 81B have, for example, a plate shape extending in the YZ plane, and are provided on the outer side surface in the X direction of the sealing resin 100. The input terminals 80B and 81B are provided at positions intersecting with the substrate 10B and the intermediate substrate 70B.

[0092] Intermediate substrate 70B extends in the X direction and contacts input terminal 80B. Intermediate substrate 70B includes conductor 97-3B instead of conductor 97-3. Conductor 97-3B is included in wiring layer 73. Conductor 97-3B extends to an end of intermediate substrate 70B in the X direction and is electrically connected to input terminal 80B.

[0093] Because intermediate substrate 70B is in contact with input terminal 80B, substrate 10B does not include electrode 62, conductor 85, or wiring 95. Moreover, intermediate substrate 70B does not include electrode 97-1 and conductor 97-4 as components corresponding to wiring 97. Input terminal 80B is connected to electrode 51 of light-emitting element 50 through wiring 97.

[0094] Although not shown in FIG. 16, the configuration corresponding to the wiring 98 is the same as the configuration corresponding to the wiring 97.

[0095] With the above-mentioned configuration, the input terminals 80B and 81B and the light-emitting element 50 are electrically connected.

[0096] As a manufacturing method of the input terminals 80B and 81B, for example, there is a method of using MID (Molded Interconnect Device) technology to provide electrodes on the surface of the sealing resin 100. By using the MID technology, it becomes possible to arrange the input terminals 80B and 81B on the outer surface of the sealing resin 100.

[0097] With the configuration according to this embodiment, the length of the wiring connecting the input terminal and the light emitting element can be further shortened. As a result, the effect of the open stub can be shifted to a higher frequency range. Therefore, the transmission characteristics of high frequency signals of the semiconductor device can be further improved.

[0098] Furthermore, with the configuration according to this embodiment, the installation area of ​​the photorelay device can be further reduced, that is, the photorelay device can be made smaller.

[0099] As a modification of the photorelay device 1B according to the third embodiment described above, a photorelay device in which the light emitting element 50 is accommodated in the opening of the intermediate substrate 70A as in the second embodiment can be considered. In this modification, the height of the photorelay device can be reduced.

[0100] In addition to the embodiments described so far, examples of possible embodiments are shown below. For example, the medium for electrically connecting the MOSFET and the light receiving element is not limited to the intermediate substrate. Conductive wires may be used to establish an electrical connection similar to that of the embodiments described above. For example, the method for supporting the light receiving element and the light emitting element is not limited to supporting them from below. The light receiving element and the light emitting element may be supported from above using something like a support stand.

[0101] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]

[0102] 1, 1A, 1B...Photorelay device 10, 10B…Substrate 12, 14, 72, 74, 74A…Insulator layers 11, 13, 15, 71, 73, 75...wiring layer 12-1, 13-1, 14-1, 72-1, 73-1, 74-1...Insulators 20a, 20b…MOSFET electrode 30...Photo-receiving element 30a...Control circuit 30b...Photodiode 40...adhesive layer 50...Light emitting element 70, 70A, 70B...Intermediate board 80, 81, 80B, 81B...Input terminals 82a, 82b...Output terminals 85, 87a, 87b, 91-3, 91-4, 91-5, 92-3, 92-4, 92-5, 93-3, 93-4, 93-5, 95-2, 97-3, 97-3B, 97-4, 97-5...Conductor 90, 91, 92, 93, 94, 95, 96, 97, 98…Wiring 100…Sealing resin

Claims

1. A first substrate; A transistor provided on the first substrate; A light receiving element; A light emitting element provided on the light receiving element; Equipped with the first substrate, the transistor, the light-emitting element, and the light-receiving element are arranged in this order in a first direction; Semiconductor device.

2. The semiconductor device further includes a second substrate provided between the first substrate and the transistor, and the light receiving element and the light emitting element. The semiconductor device according to claim 1.

3. a first wiring that electrically connects a gate of the transistor and a first electrode of the light receiving element; a second wiring electrically connecting a source of the transistor and a second electrode of the light receiving element; Further comprising: the first wiring and the second wiring pass through an inside of the second substrate; 3. The semiconductor device according to claim 2.

4. An input terminal; a third wiring electrically connecting the input terminal and a third electrode of the light-emitting element; Further comprising: The third wiring passes through the inside of the second substrate.

3. The semiconductor device according to claim 2.

5. the third wiring further passes through the inside of the first substrate, The input terminal is provided on the first substrate.

5. The semiconductor device according to claim 4.

6. the input terminal is arranged in a line with the first substrate, the second substrate, the transistor, the light receiving element, and the light emitting element in a second direction intersecting the first direction, and is arranged to intersect with the first substrate and the second substrate; 5. The semiconductor device according to claim 4.

7. an output terminal provided on the first substrate; a fourth wiring electrically connecting the output terminal and the drain of the transistor; Further comprising: The fourth wiring passes through the inside of the first substrate. The semiconductor device according to claim 1.

8. The transistor is provided at a position intersecting the first substrate in a second direction intersecting the first direction. The semiconductor device according to claim 1.

9. The light emitting element is provided at a position intersecting the second substrate in a second direction intersecting the first direction.

3. The semiconductor device according to claim 2.

Images