Semiconductor device

JP2025024461APending Publication Date: 2025-02-20ROHM CO LTD
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Patent Information

Application Number
JP2023128594
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-07
Publication Date
2025-02-20

AI Technical Summary

Benefits of technology

【0075】 (効果) 以上記述したように、本実施形態によれば、以下の効果を奏する。 (1) 半導体装置10は、ゲート電極303、ソース領域301、およびドレイン領域302を含むトランジスタ300が形成された半導体装置であって、半導体基板20と、半導体基板20上に形成され絶縁層40と、絶縁層40上に形成され、トランジスタ300のソース領域301と電気的に接続された外部電極63と、絶縁層40上であって、絶縁層の厚さ方向から視て第1方向に外部電極63と離隔した位置に形成され、トランジスタ300のドレイン領域302と電気的に接続された外部電極62と、を含む。

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Abstract

To relieve current concentration.SOLUTION: In a semiconductor device 10, both an external electrode 63 and an external electrode 62 include pad parts 631 and 911 formed in a rectangular shape, tapered parts 632 and 912 extending from the first pad parts 631 and 911 in a Y direction, which is orthogonal to an X direction when viewed from a Z direction, and having wiring widths W52 and W12 in the X direction gradually reducing as being separated from the pad parts 631 and 911, and end parts 633 and 913 extending in the Y direction from the tapered parts 632 and 912 and formed in a rectangular shape whose wiring widths W53 and W13 in the X direction are narrower than that of the pad parts 631 and 911. The pad part 631 of the external electrode 63 and the end part 913 of the external electrode 62 are disposed apart from each other in the X direction. The end part 633 of the external electrode 63 and the pad part 911 of the external electrode 62 are disposed apart from each other in the X direction.SELECTED DRAWING: Figure 4
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Description

[Technical field]

[0001] The present disclosure relates to a semiconductor device. [Background technology]

[0002] Patent Document 1 shows a semiconductor device including a source and a drain formed in a linear shape. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2022 / 054600

[0004] [overview] Incidentally, it is required to reduce current concentration in wiring such as source and drain.

[0005] A semiconductor device according to one aspect of the present disclosure is a semiconductor device having a first transistor formed thereon, the first transistor including a gate electrode, a first element electrode, and a second element electrode, the semiconductor device including: a semiconductor substrate; an insulating layer formed on the semiconductor substrate; a first external electrode formed on the insulating layer and electrically connected to the first element electrode of the first transistor; and a second external electrode formed on the insulating layer at a position spaced apart from the first external electrode in a first direction as viewed from a thickness direction of the insulating layer and electrically connected to the second element electrode of the first transistor, the first external electrode and the second external electrode each having a first pad portion formed in a rectangular shape. a first tapered portion extending from the first pad portion in a second direction perpendicular to the first direction when viewed from the thickness direction and formed so that the wiring width in the first direction gradually decreases with distance from the first pad portion; and a first tip portion extending from the first tapered portion along the second direction and formed in a rectangular shape having a narrower wiring width in the first direction than the first pad portion, wherein the first pad portion of the first external electrode and the first tip portion of the second external electrode are arranged at a distance from each other in the first direction, and the first tip portion of the first external electrode and the first pad portion of the second external electrode are arranged at a distance from each other in the first direction. [Brief description of the drawings]

[0006] [Figure 1] FIG. 1 is a schematic plan view of a semiconductor device according to an embodiment. [Diagram 2] FIG. 2 is a block diagram showing an electrical configuration of the semiconductor device of FIG. [Diagram 3] FIG. 3 is a schematic cross-sectional view of the semiconductor device taken along line F3-F3 in FIG. [Figure 4] FIG. 4 is a schematic plan view showing an enlarged portion of the semiconductor device of FIG. [Diagram 5] FIG. 5 is a schematic plan view showing a connection state of external electrodes of the semiconductor device of FIG. [Figure 6] FIG. 6 is a schematic cross-sectional view showing a connection state between the semiconductor device of FIG. 1 and an external electrode. [Figure 7]FIG. 7 is a schematic plan view showing a part of a semiconductor device of a comparative example. [Figure 8] FIG. 8 is a schematic plan view of a semiconductor device according to a modified example. [Figure 9] FIG. 9 is a schematic plan view showing a part of the semiconductor device of FIG. [Figure 10] FIG. 10 is a schematic plan view showing a part of a semiconductor device according to a modified example.

[0007] [Detailed Description] Hereinafter, some embodiments of the semiconductor device of the present disclosure will be described with reference to the accompanying drawings. Note that for simplicity and clarity of description, components shown in the drawings are not necessarily drawn to scale. Also, hatching lines may be omitted in cross-sectional views to facilitate understanding. The accompanying drawings are merely illustrative of embodiments of the present disclosure and should not be considered as limiting the present disclosure. Terms such as "first", "second", and "third" in the present disclosure are used merely to distinguish objects and do not rank the objects.

[0008] The following detailed description includes devices, systems, and methods embodying exemplary embodiments of the present disclosure. This detailed description is merely illustrative in nature and is not intended to limit the embodiments of the present disclosure or the application and uses of such embodiments.

[0009] The phrase "at least one" as used in this disclosure means "one or more" of the desired options. As an example, the phrase "at least one" as used in this disclosure means "only one option" or "both of two options" if the number of options is two. As another example, the phrase "at least one" as used in this disclosure means "only one option" or "any combination of two or more options" if the number of options is three or more.

[0010] FIG. 1 is a schematic plan view showing an example of a semiconductor device 10. FIG. 6 is a block diagram showing an electrical configuration of the semiconductor device of FIG. 1. FIG. 3 is a schematic cross-sectional view of the semiconductor device 10 cut along the line F3-F3 of FIG. 1. FIG. 4 is a schematic plan view showing an enlarged part of the semiconductor device 10 of FIG. 1. FIG. 5 is a schematic plan view showing the connection between the external electrodes and wiring of the semiconductor device of FIG. 1. FIG. 6 is a schematic cross-sectional view showing the connection between the external electrodes and wiring of the semiconductor device of FIG. 1. The term "plan view" used in the present disclosure refers to viewing the semiconductor device 10 in the Z direction of the XYZ axes perpendicular to each other shown in FIG. 1. Here, the X direction is an example of the "first direction" and the Y direction is an example of the "second direction".

[0011] (Overview of Semiconductor Device) 2, the semiconductor device 10 includes an internal circuit 201 and transistors 211 and 212. The transistors 211 and 212 are power transistors. The transistors 211 and 212 may be lateral power MOSFETs. The internal circuit 201 includes drive circuits 202 and 203. The transistor 211 includes a gate terminal connected to the drive circuit 202, a drain terminal connected to an external terminal 222, and a source terminal connected to an external terminal 223. The transistor 212 includes a gate terminal connected to the drive circuit 203, a drain terminal connected to an external terminal 224, and a source terminal connected to an external terminal 225.

[0012] The internal circuit 201 is connected to a plurality of external terminals 221. The plurality of external terminals 221 may include a power supply terminal and a ground terminal for supplying operating power to the internal circuit 201, and a signal terminal for inputting or outputting a signal. In one example, the internal circuit 201 controls the transistors 211 and 212 by the drive circuits 202 and 203 based on a control signal supplied to the external terminal 221.

[0013] (Schematic configuration of semiconductor device) As shown in FIG. 1, the semiconductor device 10 is formed in a rectangular flat plate shape with the thickness direction being the Z direction. The semiconductor device 10 includes a device front surface 11 and a device back surface 12 facing opposite sides to each other in the Z direction, and four device side surfaces 13, 14, 15, and 16 connecting the device front surface 11 and the device back surface 12 in the Z direction. The device side surfaces 13 and 14 extend along the X direction and constitute both end faces of the semiconductor device 10 in the Y direction. The device side surfaces 15 and 16 extend along the Y direction and constitute both end faces of the semiconductor device 10 in the X direction. In one example, the semiconductor device 10 may be formed in a rectangular shape in which the length of the device side surfaces 13 and 14 in the Y direction is longer than the length of the device side surfaces 15 and 16 in the X direction in a plan view. In one example, the device front surface 11 is a mounting surface, and the semiconductor device 10 is a surface-mounted package arranged facing a circuit board on which the device front surface 11 is mounted.

[0014] As shown in FIG. 3, the semiconductor device 10 includes a semiconductor substrate 20, an insulating layer 40, and an interconnection layer 50. The semiconductor substrate 20 is formed in a rectangular shape in a plan view. In one example, the semiconductor substrate 20 may be rectangular in a plan view. The semiconductor substrate 20 may be formed of a material including Si (silicon), SiC (silicon carbide), etc.

[0015] The semiconductor substrate 20 includes a substrate front surface 21 and a substrate back surface 22 facing opposite directions in the Z direction, and four substrate side surfaces 23, 24, 25, and 26 connecting the substrate front surface 21 and the substrate back surface 22 in the Z direction. In one example, the substrate back surface 22 constitutes the device back surface 12. In one example, the substrate side surfaces 23 to 26 are included in the device side surfaces 13 to 16. The substrate side surfaces 23 and 24 extend along the X direction and are spaced apart in the Y direction. The substrate side surfaces 23 and 24 constitute both end surfaces of the semiconductor substrate 20 in the Y direction. The substrate side surfaces 25 and 26 extend along the Y direction and are spaced apart in the X direction. The substrate side surfaces 25 and 26 constitute both end surfaces of the semiconductor substrate 20 in the X direction.

[0016] As shown in FIG. 1, FIG. 3, and FIG. 4, the semiconductor substrate 20 may include first regions 31, 32, 33, and 34 and a second region 35. The first regions 31 to 34 and the second region 35 are indicated by dashed lines. In one example, the first regions 31 and 32, the second region 35, and the first regions 34 and 33 are arranged in this order from the substrate side surface 25 to the substrate side surface 26 of the semiconductor substrate 20. The second region 35 is set in the center of the semiconductor substrate 20. The first regions 31, 32 to 34 are regions in which the transistors 211 and 212 shown in FIG. 2 are arranged. The transistor 211 shown in FIG. 2 may include a transistor 211A arranged in the first region 31 and a transistor 211B arranged in the first region 32. The transistor 212 shown in FIG. 2 may include a transistor 212A arranged in the first region 33 and a transistor 212B arranged in the first region 34. The second region 35 is a region in which various devices constituting the internal circuit 201 shown in FIG. 2 are arranged.

[0017] The insulating layer 40 is formed on the substrate front surface 21. The insulating layer 40 includes an insulating front surface 41 and an insulating back surface 42 that face opposite each other in the Z direction. In one example, the insulating back surface 42 contacts the substrate front surface 21.

[0018] 3, the insulating layer 40 may be composed of a plurality of insulating films 411, 412, 413, 414, and 415. The insulating films 411 to 415 may be referred to as interlayer insulating films. The insulating layer 40 may be formed of a material including SiO2 (silicon oxide), SiN (silicon nitride), and the like.

[0019] The layer wiring 50 is formed on the semiconductor substrate 20. The semiconductor device 10 may include a plurality of layer wirings 50 in the Z direction. In one example, as shown in FIG 3, the semiconductor device 10 may include layer wirings 51-54 formed on insulating films 411-414.

[0020] 1, the semiconductor device 10 includes a plurality of external electrodes 61 formed on an insulating layer 40. In one example, the plurality of external electrodes 61 are arranged along device side surfaces 13 and 14. The plurality of external electrodes 61 are formed in a rectangular shape in a plan view. The plurality of external electrodes 61 correspond to external terminals 221 shown in FIG.

[0021] 1 and 3, the semiconductor device 10 includes a plurality of external electrodes 62, 63, 64, 65, 66, and 67 formed on the insulating layer 40. The external electrodes 62 to 64 are formed so as to overlap the first regions 31 and 32. The external electrodes 65 to 67 are formed so as to overlap the first regions 33 and 34.

[0022] The external electrodes 62 to 64 are arranged closer to the device side surface 15. The external electrodes 62 to 64 are electrically connected to the transistors 211 (211A, 211B) arranged in the first regions 31 and 32. The external electrode 62 can be said to correspond to the external terminal 222 shown in FIG. 2. The external electrodes 63 and 64 can be said to correspond to the external terminal 223 shown in FIG. 2. The external electrodes 65 to 67 are arranged closer to the device side surface 16. The external electrodes 65 to 67 are electrically connected to the transistors 212 (212A, 212B) arranged in the first regions 33 and 34. The external electrode 66 can be said to correspond to the external terminal 224 shown in FIG. 2. The external electrodes 66 and 67 can be said to correspond to the external terminal 225 shown in FIG. 2.

[0023] The semiconductor device 10 includes a protective layer 70. The protective layer 70 may have insulating properties. The protective layer 70 covers the insulating surface 41 of the insulating layer 40 and the external electrodes 61 to 67 formed on the insulating surface 41. The protective layer 70 may be formed of an insulating material such as a phenol resin or a polyimide resin. In one example, the protective layer 70 may be formed of a polyimide resin.

[0024] The protective layer 70 includes openings 71 that expose some of the multiple external electrodes 61-67 as pads 81-87. In Fig. 1 and Fig. 4, the openings 71 are indicated by dashed lines. In one example, the openings 71 are formed in a circular shape in a plan view. The pads 81-87 are used for inputting and outputting signals and currents from outside the semiconductor device 10. Bumps, pillars, etc. may be connected to the pads 81-87.

[0025] (Transistors and Layer Wiring) 6 is a cross-sectional view showing a transistor 300 and an outline of connections to the transistor 300. The transistor 300 shown in FIG. 6 corresponds to the transistors 211 (211A, 211B) and 212 (212A, 212B) arranged in the first regions 31 to 34 shown in FIG.

[0026] As shown in FIG. 6, the transistor 300 includes a plurality of source regions 301 and drain regions 302 formed in the semiconductor substrate 20, and a plurality of gate electrodes 303 formed on the semiconductor substrate 20. One gate electrode 303 and the source region 301 and the drain region 302 sandwiching the gate electrode 303 constitute one unit transistor 310. The transistor 300 includes a plurality of unit transistors 310. The source region 301 and the drain region 302 can be the source electrode and the drain electrode of the unit transistor 310. Note that a configuration in which a source electrode is connected to the source region 301 and a drain electrode is connected to the drain region 302 may also be used. The "first element electrode" may be a source electrode or a drain electrode, and the "second element electrode" may be a drain electrode or a source electrode. Note that FIG. 6 provides a simplified explanation of the unit transistors 310 that constitute the transistor 300. Some of the components that constitute the unit transistors 310, such as the gate insulating film, are omitted in FIG. 6. The unit transistors 310 may be any type of MOSFET, such as, for example, an LDMOSFET.

[0027] The layer wiring 51 on the first insulating film 411 includes a plurality of source wirings 511, a plurality of drain wirings 512, and a plurality of gate wirings 513 connected to the plurality of unit transistors 310. In one example, the plurality of source wirings 511, the plurality of drain wirings 512, and the plurality of gate wirings 513 are formed to extend in the Y direction. The source wirings 511, the drain wirings 512, and the gate wirings 513 are electrically connected to the source region 301, the drain region 302, and the gate electrode 303 by contacts 515.

[0028] The layer wiring 52 on the second insulating film 412 includes a plurality of source wirings 521 and a plurality of drain wirings 522. In one example, the plurality of source wirings 521 and the plurality of drain wirings 522 are formed to extend in the X direction. The plurality of source wirings 521 and the plurality of drain wirings 522 are alternately arranged in the Y direction. The plurality of source wirings 521 are electrically connected to the source wirings 511 on the first insulating film 411 by vias 525. The plurality of drain wirings 522 are electrically connected to the drain wirings 512 on the first insulating film 411 by vias 525.

[0029] The layer wiring 53 on the third insulating film 413 includes a plurality of source wirings 531 and a plurality of drain wirings 532 (see FIG. 5). As shown in FIG. 5, the plurality of source wirings 531 and the plurality of drain wirings 532 are formed so as to extend in the Y direction. The plurality of source wirings 531 and the plurality of drain wirings 532 are alternately arranged in the X direction. As shown in FIG. 6, the plurality of source wirings 531 are electrically connected to the source wirings 521 on the second insulating film 412 by vias 535. The plurality of drain wirings 532 are electrically connected to the drain wirings 522 on the second insulating film 412 by vias 535.

[0030] The layer wiring 54 on the fourth insulating film 414 includes a plurality of source wirings 541 and a plurality of drain wirings 542. As shown in FIG. 5, the plurality of source wirings 541 and the plurality of drain wirings 542 are formed to extend in the X direction. The plurality of source wirings 541 and the plurality of drain wirings 542 are alternately arranged in the Y direction. As shown in FIG. 6, the plurality of source wirings 541 are electrically connected to the source wirings 531 on the third insulating film 413 by vias 545. The plurality of drain wirings 542 are electrically connected to the drain wirings 532 on the third insulating film 413 by vias 545.

[0031] External electrodes 62 and 63 are formed on the fifth insulating film 415. The external electrode 62 is electrically connected to the drain wiring 542 on the fourth insulating film 414 through a via 555. The external electrode 63 is electrically connected to the source wiring 541 on the fourth insulating film 414 through a via 555.

[0032] The upper surface of the fifth insulating film 415 constitutes the insulating surface 41 of the insulating layer 40. It can be said that the external electrodes 62, 63 are formed on the insulating surface 41 of the insulating layer 40. Note that FIG. 6 shows the external electrodes 62, 63 on the fifth insulating film 415. The external electrodes 61, 64 to 67 shown in FIG. 1 are formed on the fifth insulating film 415, similar to the external electrodes 62, 63. It can be said that the external electrodes 61, 64 to 67 are formed on the insulating surface 41 of the insulating layer 40.

[0033] (Details of external electrodes) 4, the external electrode 62 includes first to fourth electrode portions 91 to 94 and a connection portion 95 that connects the first to fourth electrode portions 91 to 94. In one example, the first electrode portion 91 and the third electrode portion 93 are connected to a drain region of a transistor 211A arranged in the first region 31. In one example, the second electrode portion 92 and the fourth electrode portion 94 are connected to a drain region of a transistor 211B arranged in the first region 32.

[0034] As shown in FIG. 4, the first electrode portion 91 includes a pad portion 911, a tapered portion 912, and a tip portion 913. The pad portion 911 is formed in a rectangular shape in a plan view. The pad portion 911 has a predetermined wiring width W11 in the X direction in a plan view. A part of the pad portion 911 is exposed as the pad 82 through an opening 71 in the protective layer 70. The pad portion 911 formed in a rectangular shape can secure the part exposed as the pad 82. The tapered portion 912 extends from the pad portion 911 in the Y direction in a plan view, and is formed so that the wiring width W12 in the X direction gradually decreases as it moves away from the pad portion 911. The tip portion 913 extends from the tapered portion 912 in the Y direction in a plan view, and is formed in a rectangular shape with a wiring width W13 in the X direction narrower than that of the pad portion 911.

[0035] The pad portion 911 includes pad portion side surfaces 911A and 911B at both ends in the X direction. The pad portion side surfaces 911A and 911B extend in the Y direction. The tapered portion 912 includes tapered portion side surfaces 912A and 912B at both ends in the X direction. The tapered portion side surface 912B is inclined with respect to the X direction and the Y direction. The tapered portion side surface 912A extends in the Y direction. In one example, the tapered portion side surface 912A is continuous with the pad portion side surface 911A in the Y direction. The tip portion 913 includes tip portion side surfaces 913A and 913B at both ends in the X direction. The tip portion side surfaces 913A and 913B extend in the Y direction. In one example, the tip portion side surface 913A is continuous with the tapered portion side surface 912A in the Y direction. In one example, the pad portion side surface 911A, the tapered portion side surface 912A, and the tip portion side surface 913A extend in the Y direction and are continuous.

[0036] The second electrode portion 92 includes a pad portion 921, a tapered portion 922, and a tip portion 923. The pad portion 921 is formed in a rectangular shape in a plan view. The pad portion 921 has a predetermined wiring width W21 in the X direction in a plan view. A part of the pad portion 921 is exposed as the pad 82 through the opening 71 of the protective layer 70. The pad portion 921 formed in a rectangular shape can secure the portion exposed as the pad 82. The tapered portion 922 extends from the pad portion 921 in the Y direction in a plan view, and is formed so that the wiring width W22 in the X direction gradually decreases as it moves away from the pad portion 921. The tip portion 923 extends from the tapered portion 922 in the Y direction in a plan view, and is formed in a rectangular shape with a wiring width W23 in the X direction narrower than that of the pad portion 921.

[0037] The pad portion 921 includes pad portion side surfaces 921A and 921B at both ends in the X direction. The pad portion side surfaces 921A and 921B extend in the Y direction. The tapered portion 922 includes tapered portion side surfaces 922A and 922B at both ends in the X direction. The tapered portion side surface 922B extends in the Y direction. In one example, the tapered portion side surface 922B is continuous with the pad portion side surface 921B in the Y direction. The tapered portion side surface 922A is inclined with respect to the X direction and the Y direction. The tip portion 923 includes tip portion side surfaces 923A and 923B at both ends in the X direction. The tip portion side surfaces 923A and 923B extend in the Y direction. In one example, the tip portion side surface 923B is continuous with the tapered portion side surface 922B in the Y direction. In one example, the pad portion side surface 921B, the tapered portion side surface 922B, and the tip portion side surface 923B extend in the Y direction and are continuous.

[0038] The third electrode portion 93 includes a pad portion 931, a tapered portion 932, and a tip portion 933. The pad portion 931 is formed in a rectangular shape in a plan view. The pad portion 931 has a predetermined wiring width W31 in the X direction in a plan view. The pad portion 931 of the third electrode portion 93 is electrically connected to the pad portion 911 of the first electrode portion 91. The tapered portion 932 extends from the pad portion 931 in the Y direction in a plan view, and is formed so that the wiring width W32 in the X direction gradually decreases as it moves away from the pad portion 931. The tip portion 933 extends from the tapered portion 932 in the Y direction in a plan view, and is formed in a rectangular shape with a wiring width W33 in the X direction narrower than that of the pad portion 931.

[0039] The pad portion 931 includes pad portion side surfaces 931A and 931B at both ends in the X direction. The pad portion side surfaces 931A and 931B extend in the Y direction. The tapered portion 932 includes tapered portion side surfaces 932A and 932B at both ends in the X direction. The tapered portion side surface 932B is inclined with respect to the X direction and the Y direction. The tapered portion side surface 932A extends in the Y direction. In one example, the tapered portion side surface 932A is continuous with the pad portion side surface 931A in the Y direction. The tip portion 933 includes tip portion side surfaces 933A and 933B at both ends in the X direction. The tip portion side surfaces 933A and 933B extend in the Y direction. In one example, the tip portion side surface 933A is continuous with the tapered portion side surface 932A in the Y direction. In one example, the pad portion side surface 931A, the tapered portion side surface 932A, and the tip portion side surface 933A extend in the Y direction and are continuous.

[0040] The fourth electrode portion 94 includes a pad portion 941, a tapered portion 942, and a tip portion 943. The pad portion 941 is formed in a rectangular shape in a plan view. The pad portion 941 has a predetermined wiring width W41 in the X direction in a plan view. The pad portion 941 of the fourth electrode portion 94 is electrically connected to the pad portion 921 of the second electrode portion 92. The tapered portion 942 extends from the pad portion 941 in the Y direction in a plan view, and is formed so that the wiring width W42 in the X direction gradually decreases as it moves away from the pad portion 941. The tip portion 943 extends from the tapered portion 942 in the Y direction in a plan view, and is formed in a rectangular shape with a wiring width W43 in the X direction narrower than that of the pad portion 941.

[0041] The pad portion 941 includes pad portion side surfaces 941A and 941B at both ends in the X direction. The pad portion side surfaces 941A and 941B extend in the Y direction. The tapered portion 942 includes tapered portion side surfaces 942A and 942B at both ends in the X direction. The tapered portion side surface 942B extends in the Y direction. In one example, the tapered portion side surface 942B is continuous with the pad portion side surface 941B in the Y direction. The tapered portion side surface 942A is inclined with respect to the X direction and the Y direction. The tip portion 943 includes tip portion side surfaces 943A and 943B at both ends in the X direction. The tip portion side surfaces 943A and 943B extend in the Y direction. In one example, the tip portion side surface 943B is continuous with the tapered portion side surface 942B in the Y direction. In one example, the pad portion side surface 941B, the tapered portion side surface 942B, and the tip portion side surface 943B extend in the Y direction and are continuous.

[0042] The external electrode 63 includes a pad portion 631, a tapered portion 632, and a tip portion 633. The pad portion 631 is formed in a rectangular shape in a plan view. The pad portion 631 has a predetermined wiring width W51 in the X direction in a plan view. A part of the pad portion 631 is exposed as a pad 83 through an opening 71 in the protective layer 70. The pad portion 631 formed in a rectangular shape can secure a portion exposed as the pad 83. The tapered portion 632 extends from the pad portion 631 in the Y direction in a plan view, and is formed so that the wiring width W52 in the X direction gradually decreases as it moves away from the pad portion 631. The tip portion 633 extends from the tapered portion 632 in the Y direction in a plan view, and is formed in a rectangular shape with a wiring width W53 in the X direction narrower than that of the pad portion 631.

[0043] The pad portion 631 includes pad portion side surfaces 631A, 631B at both ends in the X direction. The pad portion side surfaces 631A, 631B extend in the Y direction. The tapered portion 632 includes tapered portion side surfaces 632A, 632B at both ends in the X direction. The tapered portion side surfaces 632A, 632B are inclined with respect to the X and Y directions. The tip portion 633 includes tip portion side surfaces 633A, 633B at both ends in the X direction. The tip portion side surfaces 633A, 633B extend in the Y direction.

[0044] The external electrode 64 includes a pad portion 641, a tapered portion 642, and a tip portion 643. The pad portion 641 is formed in a rectangular shape in a plan view. The pad portion 641 has a predetermined wiring width W61 in the X direction in a plan view. A part of the pad portion 641 is exposed as a pad 83 through an opening 71 in the protective layer 70. The pad portion 641 formed in a rectangular shape can secure a portion exposed as the pad 83. The tapered portion 642 extends from the pad portion 641 in the Y direction in a plan view, and is formed so that the wiring width W62 in the X direction gradually decreases as it moves away from the pad portion 641. The tip portion 643 extends from the tapered portion 642 in the Y direction in a plan view, and is formed in a rectangular shape with a wiring width W63 in the X direction narrower than that of the pad portion 641.

[0045] The pad portion 641 includes pad portion side surfaces 641A, 641B at both ends in the X direction. The pad portion side surfaces 641A, 641B extend in the Y direction. The tapered portion 642 includes tapered portion side surfaces 642A, 642B at both ends in the X direction. The tapered portion side surfaces 642A, 642B are inclined with respect to the X and Y directions. The tip portion 643 includes tip portion side surfaces 643A, 643B at both ends in the X direction. The tip portion side surfaces 643A, 643B extend in the Y direction.

[0046] The first electrode portion 91 of the external electrode 62 and the external electrode 63 are arranged such that their pad portions 911, 631 and their tip portions 913, 633 are adjacent to each other in the Y direction in a plan view. The first electrode portion 91 and the external electrode 63 are arranged such that the pad portion 911 of the first electrode portion 91 and the tip portion 633 of the external electrode 63 are adjacent to each other in the Y direction, and the tip portion 913 of the first electrode portion 91 and the pad portion 631 of the external electrode 63 are adjacent to each other in the Y direction. The first electrode portion 91 and the external electrode 63 are arranged such that the tip portion 913 of the first electrode portion 91 and the pad portion 631 of the external electrode 63 are spaced apart in the Y direction, and the first electrode portion 91 and the external electrode 63 are arranged such that the tip portion 913 of the first electrode portion 91 and the pad portion 631 of the external electrode 63 are spaced apart in the Y direction.

[0047] In one example, the pad portion side surface 911B of the pad portion 911 of the first electrode portion 91 of the external electrode 62 faces the tip portion side surface 633A of the tip portion 633 of the external electrode 63 in the X direction. The pad portion side surface 911B of the first electrode portion 91 and the tip portion side surface 633A of the external electrode 63 are parallel. Here, "parallel" does not only mean strictly parallel, but also includes approximately parallel within the range in which the effects of this embodiment are achieved. The tapered portion side surface 912B of the tapered portion 912 of the first electrode portion 91 faces the tapered portion side surface 632A of the tapered portion 632 of the external electrode 63. The tapered portion side surface 912B of the first electrode portion 91 and the tapered portion side surface 632A of the external electrode 63 are parallel. The tip portion side surface 913B of the tip portion 913 of the first electrode portion 91 faces the pad portion side surface 631A of the pad portion 631 of the external electrode 63. A tip portion side surface 913B of the first electrode portion 91 and a pad portion side surface 631A of the external electrode 63 are parallel to each other.

[0048] In one example, the pad portion side surface 631B of the pad portion 631 of the external electrode 63 faces the tip portion side surface 923A of the tip portion 923 of the second electrode portion 92 of the external electrode 62 in the X direction. The pad portion side surface 631B of the external electrode 63 and the tip portion side surface 923A of the second electrode portion 92 are parallel. The tapered portion side surface 632B of the tapered portion 632 of the external electrode 63 faces the tapered portion side surface 922A of the tapered portion 922 of the second electrode portion 92. The tapered portion side surface 632B of the external electrode 63 and the tapered portion side surface 922A of the second electrode portion 92 are parallel. The tip portion side surface 633B of the tip portion 633 of the external electrode 63 faces the pad portion side surface 921A of the pad portion 921 of the second electrode portion 92. A tip portion side surface 633B of the external electrode 63 and a pad portion side surface 921A of the second electrode portion 92 are parallel to each other.

[0049] In one example, the distance D11 in the X direction between the pad portion 911 of the first electrode portion 91 of the external electrode 62 and the tip portion 633 of the external electrode 63 is equal to the distance D13 in the X direction between the tip portion 913 of the first electrode portion 91 and the pad portion 631 of the external electrode 63. In this disclosure, "equal" includes not only the case where they are exactly equal, but also the case where there is some difference between the compared objects due to the influence of dimensional tolerances, etc. In one example, the distance D12 between the tapered portion 912 of the first electrode portion 91 and the tapered portion 632 of the external electrode 63 is equal to the distance D11 between the pad portion 911 of the first electrode portion 91 and the tip portion 633 of the external electrode 63. The distance D12 between the tapered portion 912 of the first electrode portion 91 and the tapered portion 632 of the external electrode 63 is the distance between the tapered portion 912 of the first electrode portion 91 and the tapered portion 632 of the external electrode 63 in a direction perpendicular to the tapered portion side surface 912B of the tapered portion 912.

[0050] In one example, a distance D23 in the X direction between the pad portion 631 of the external electrode 63 and the tip portion 923 of the second electrode portion 92 of the external electrode 62 is equal to a distance D21 in the X direction between the tip portion 633 of the external electrode 63 and the pad portion 921 of the second electrode portion 92. In one example, a distance D22 between the tapered portion 632 of the external electrode 63 and the tapered portion 922 of the second electrode portion 92 is equal to a distance D23 between the pad portion 631 of the external electrode 63 and the tip portion 923 of the second electrode portion 92. The distance D22 between the tapered portion 632 of the external electrode 63 and the tapered portion 922 of the second electrode portion 92 is the distance between the tapered portion 632 of the external electrode 63 and the tapered portion 922 of the second electrode portion 92 in a direction perpendicular to the tapered portion side surface 922A of the tapered portion 922. In one example, the distance D21 between the tip 633 of the external electrode 63 and the pad portion 921 of the second electrode portion 92 is equal to the distance D11 between the pad portion 911 of the first electrode portion 91 of the external electrode 62 and the tip 633 of the external electrode 63.

[0051] The third electrode portion 93 of the external electrode 62 and the external electrode 64 are arranged such that their pad portions 931, 641 and their tip portions 643, 933 are adjacent to each other in a plan view in the Y direction. The third electrode portion 93 and the external electrode 64 are arranged such that the pad portion 931 of the third electrode portion 93 and the tip portion 643 of the external electrode 64 are adjacent to each other in the Y direction, and the tip portion 933 of the third electrode portion 93 and the pad portion 641 of the external electrode 64 are adjacent to each other in the Y direction. The third electrode portion 93 and the external electrode 64 are arranged such that the tip portion 933 of the third electrode portion 93 and the pad portion 641 of the external electrode 64 are spaced apart in the Y direction, and the third electrode portion 93 and the external electrode 64 are arranged such that the tip portion 933 of the third electrode portion 93 and the pad portion 641 of the external electrode 64 are spaced apart in the Y direction.

[0052] In one example, the pad portion side surface 931B of the pad portion 931 of the third electrode portion 93 of the external electrode 62 faces the tip portion side surface 643A of the tip portion 643 of the external electrode 64 in the X direction. The pad portion side surface 931B of the third electrode portion 93 and the tip portion side surface 643A of the external electrode 64 are parallel. The tapered portion side surface 932B of the tapered portion 932 of the third electrode portion 93 faces the tapered portion side surface 642A of the tapered portion 642 of the external electrode 64. The tapered portion side surface 932B of the third electrode portion 93 and the tapered portion side surface 642A of the external electrode 64 are parallel. The tip portion side surface 933A of the tip portion 933 of the third electrode portion 93 faces the pad portion side surface 641A of the pad portion 641 of the external electrode 64. The tip portion side surface 933B of the third electrode portion 93 and the pad portion side surface 641A of the external electrode 64 are parallel.

[0053] In one example, the pad portion side surface 641B of the pad portion 641 of the external electrode 64 faces the tip portion side surface 943A of the tip portion 943 of the fourth electrode portion 94 of the external electrode 62 in the X direction. The pad portion side surface 641B of the external electrode 64 and the tip portion side surface 943A of the fourth electrode portion 94 are parallel to each other. The tapered portion side surface 642B of the tapered portion 642 of the external electrode 64 faces the tapered portion side surface 942A of the tapered portion 942 of the fourth electrode portion 94. The tapered portion side surface 642B of the external electrode 64 and the tapered portion side surface 942A of the fourth electrode portion 94 are parallel to each other. The tip portion side surface 643A of the tip portion 643 of the external electrode 64 faces the pad portion side surface 941A of the pad portion 941 of the fourth electrode portion 94. A tip portion side surface 643B of the external electrode 64 and a pad portion side surface 941A of the fourth electrode portion 94 are parallel to each other.

[0054] In one example, a distance D31 in the X direction between the pad portion 931 of the third electrode portion 93 of the external electrode 62 and the tip portion 643 of the external electrode 64 is equal to a distance D33 in the X direction between the tip portion 933 of the third electrode portion 93 and the pad portion 641 of the external electrode 64. In one example, a distance D32 between the tapered portion 932 of the third electrode portion 93 and the tapered portion 642 of the external electrode 64 is equal to the distance D31 between the pad portion 931 of the third electrode portion 93 and the tip portion 643 of the external electrode 64. The distance D32 between the tapered portion 932 of the third electrode portion 93 and the tapered portion 642 of the external electrode 64 is the distance between the tapered portion 932 of the third electrode portion 93 and the tapered portion 642 of the external electrode 64 in a direction perpendicular to the tapered portion side surface 932B of the tapered portion 932.

[0055] In one example, a distance D43 in the X direction between the pad portion 641 of the external electrode 64 and the tip portion 943 of the fourth electrode portion 94 of the external electrode 62 is equal to a distance D41 in the X direction between the tip portion 643 of the external electrode 64 and the pad portion 941 of the fourth electrode portion 94. In one example, a distance D42 between the tapered portion 642 of the external electrode 64 and the tapered portion 942 of the fourth electrode portion 94 is equal to a distance D43 between the pad portion 641 of the external electrode 64 and the tip portion 943 of the fourth electrode portion 94. The distance D42 between the tapered portion 642 of the external electrode 64 and the tapered portion 942 of the fourth electrode portion 94 is the distance between the tapered portion 642 of the external electrode 64 and the tapered portion 942 of the fourth electrode portion 94 in a direction perpendicular to the tapered portion side surface 942A of the tapered portion 942. In one example, the distance D41 between the tip 643 of the external electrode 64 and the pad portion 941 of the fourth electrode portion 94 is equal to the distance D31 between the pad portion 931 of the third electrode portion 93 of the external electrode 62 and the tip 643 of the external electrode 64.

[0056] In one example, the distance D11 between the pad portion 911 of the first electrode portion 91 of the external electrode 62 and the tip portion 633 of the external electrode 63 is equal to the distance D31 between the pad portion 931 of the third electrode portion 93 of the external electrode 62 and the tip portion 643 of the external electrode 64.

[0057] With regard to the external electrodes 62, 63, and 64 shown in FIG. 4, the first to fourth electrode portions 91 to 94 of the external electrode 62 correspond to the "first external electrode", and the external electrodes 63 and 64 correspond to the "second external electrode". It is also possible to say that the first to fourth electrode portions 91 to 94 of the external electrode 62 correspond to the "second external electrode", and the external electrodes 63 and 64 correspond to the "first external electrode". It is also possible to say that the second electrode portion 92 corresponds to the "third external electrode" relative to the first electrode portion 91 of the external electrode 62. It is also possible to say that the first electrode portion 91 corresponds to the "third electrode portion" relative to the second electrode portion 92 of the external electrode 62. Similarly, it is also possible to say that the fourth electrode portion 94 corresponds to the "third external electrode" relative to the third electrode portion 93 of the external electrode 62, and that the third electrode portion 93 corresponds to the "third electrode portion" relative to the fourth electrode portion 94 of the external electrode 62.

[0058] 1, the external electrodes 65, 66, and 67 arranged closer to the device side surface 16 of the semiconductor device 10 are configured similarly to the external electrodes 62, 63, and 64 arranged closer to the device side surface 15. In one example, the external electrodes 65 to 67 are formed line-symmetrically in the X direction with respect to the external electrodes 62 to 64. For this reason, a detailed description of the external electrodes 65 to 67 will be omitted.

[0059] 5 and 6 show the first electrode portion 91 of the external electrode 62 and the external electrode 63. In FIG. 5, for convenience, the external electrodes 62, 63 are shown as having the same shape, and the relationship between the external electrodes 62, 63 and the underlying wiring is shown in an easily understandable manner. The external electrode 63 is electrically connected to the source wiring 541 on the fourth insulating film 414 by a via 555. The external electrode 63 is therefore an electrode electrically connected to the source region 301 (source electrode) of the unit transistor 310 that constitutes the transistor 300. The external electrode 62 is electrically connected to the drain wiring 542 on the fourth insulating film 414 by a via 555. The external electrode 62 is therefore an electrode electrically connected to the drain region 302 (drain electrode) of the unit transistor 310 that constitutes the transistor 300.

[0060] The second electrode portion 92 and the external electrode 63 of the external electrode 62 shown in Fig. 4 are similar to the positional relationship and connection of the first electrode portion 91 and the external electrode 63 of the external electrode 62 shown in Fig. 5 and Fig. 6. In addition, the positional relationship and connection of the third electrode portion 93 and the fourth electrode portion 94 of the external electrode 62 and the external electrode 64 shown in Fig. 4 are similar to those of the third electrode portion 93 and the fourth electrode portion 94 of the external electrode 62 and the external electrode 64.

[0061] (action) Next, the operation of the semiconductor device 10 will be described. (Comparative Example Semiconductor Device) First, a comparative example to the semiconductor device 10 of the present disclosure will be described.

[0062] 7 is a schematic plan view showing a portion of a semiconductor device 10X of the comparative example, showing a first region 410 and external electrodes 62X, 63X of the semiconductor device 10X of the comparative example. In the semiconductor device 10 of the comparative example, a transistor 300 is arranged in the first region 410, as in the above embodiment. In the semiconductor device 10X of the comparative example, the external electrode 62X is a drain electrode electrically connected to the drain region 302 (see FIG. 6) of the unit transistor 310 of the transistor 300, and the external electrode 63X is a source electrode electrically connected to the source region 301 (see FIG. 6) of the unit transistor 310 of the transistor 300.

[0063] The external electrodes 62X, 63X include pad portions 62X1, 63X1 extending in the X direction and a plurality of connection portions 62X2, 63X2 extending in the Y direction from the pad portions 62X1, 63X1. The connection portions 62X2, 63X2 are alternately arranged in the X direction. The connection portions 62X2, 63X2 are formed in a rectangular shape. In other words, the connection portions 62X2, 63X2 are formed to have a uniform width from the base ends 62X2A, 63X2A connected to the pad portions 62X1, 63X1 to the tip ends 62X2B, 63X2B.

[0064] In the semiconductor device 10X of this comparative example, when the transistor 300 is turned on, a current flows between the external electrode 62X and the external electrode 63X through the transistor 300. In one example, the current flows from the pad portion 62X1 of the external electrode 62X through the path of the connection portion 62X2 of the external electrode 62X, the transistor 300, the connection portion 63X2 of the external electrode 63X, and the pad portion 63X1 of the external electrode 63X. In this case, the current flows from the base ends 62X2A, 63X2A of the respective connection portions 62X2, 63X2 to the tips 62X2B, 63X2B of the respective connection portions 62X2, 63X2. For this reason, current concentration occurs at the base ends 62X2A, 63X2A of the respective connection portions 62X2, 63X2. The current concentration can be a cause of electromigration, etc.

[0065] (Semiconductor device of the present disclosure) FIG. 5 clearly shows the relationship between the external electrodes 62, 63 and the wiring below the external electrodes 62, 63 in the semiconductor device 10 of the present disclosure.

[0066] The external electrode 63 is electrically connected to the underlying source wiring 541 through a via 555. The external electrode 62 is electrically connected to the underlying drain wiring 542 through a via 555.

[0067] The pad portion 631 of the external electrode 63 includes a pad 83 exposed by an opening 71 of the protective layer 70 covering the external electrode 63. The pad portion 911 of the external electrode 62 includes a pad 82 exposed by an opening 71 of the protective layer 70 covering the external electrode 62. When the transistors 211 in the first regions 31 and 32 are turned on, a current flows from the pad portion 631 to the tapered portion 632 and the tip portion 633 in the external electrode 63, and the current is supplied to the transistors 211 in the first regions 31 and 32. Then, the current flowing from the transistors 211 in the first regions 31 and 32 flows from the tip portion 913 and the tapered portion 912 to the pad portion 911 in the external electrode 62.

[0068] In the tip portion 633 of the external electrode 63, a current flows to be supplied to the unit transistors 310 arranged in the vicinity of the tip portion 633. In the pad portion 631, the total current supplied from the pad 83 flows. The same applies to the external electrode 62 (first electrode portion 91).

[0069] The wiring width W51 of the pad portion 631 of the external electrode 63 is larger than the wiring width W53 of the tip portion 633 of the external electrode 63. The wiring width W11 of the pad portion 911 of the external electrode 62 is larger than the wiring width W13 of the tip portion 913 of the external electrode 62. Therefore, current concentration in the pad portions 911, 631 of the external electrodes 62, 63 can be alleviated.

[0070] In the comparative external electrodes 62X, 63X shown in Fig. 7, increasing the wiring width of the connection parts 62X2, 63X2 is effective in alleviating current concentration. However, in the comparative semiconductor device 10, in which the wiring width of the connection parts 62X2, 63X2 is uniform up to the tips 62X2B, 63X2B, increasing the wiring width increases the arrangement pitch of the connection parts 62X2, 63X2. This leads to an increase in the size of the semiconductor device 10.

[0071] 4 and 5, the wiring width W13 of the tip 913 of the external electrode 62 is smaller than the wiring width W11 of the pad portion 911 of the external electrode 62. The wiring width W53 of the tip 633 of the external electrode 63 is smaller than the wiring width W51 of the pad portion 631 of the external electrode 62. The tip 913 of the external electrode 62 is arranged to be spaced apart from the pad portion 631 of the external electrode 63 in the X direction. This makes it possible to suppress an increase in the arrangement pitch of the external electrodes 62, 63 in the X direction.

[0072] As shown in FIG. 5, the tip 633 of the external electrode 63 is formed in a rectangular shape. The tip 633 of the external electrode 63 is electrically connected to the source wiring 541 in the lower layer by the via 555. If the external electrode 63 is formed in a tapered shape up to the tip, it may be difficult to secure a space for arranging the via 555 that connects the external electrode 63 and the source wiring 541 in the lower layer at the tip, and the number of the vias 555 may be reduced. By forming the tip 633 in a rectangular shape, it is possible to arrange a plurality of vias 555 at the tip 633. That is, it is possible to secure a space for arranging the via 555 at the tip 633 of the external electrode 63. Therefore, it is possible to ensure the connection between the tip 633 of the external electrode 63 and the source wiring 541 in the lower layer.

[0073] Similarly, the tip 913 of the external electrode 62 is formed in a rectangular shape. The tip 913 of the external electrode 62 is electrically connected to the drain wiring 542 in the lower layer by the via 555. If the external electrode 62 is formed in a tapered shape up to the tip, it may be difficult to secure a space for arranging the vias 555 that connect the external electrode 63 and the drain wiring 542 in the lower layer at the tip, and the number of the vias 555 may be reduced. By forming the tip 913 in a rectangular shape, it is possible to arrange multiple vias 555 at the tip 913. In other words, it is possible to secure a space for arranging the vias 555 at the tip of the external electrode 62. Therefore, it is possible to ensure the connection between the tip 913 of the external electrode 62 and the drain wiring 542 in the lower layer.

[0074] The above has described the first electrode portion 91 of the external electrode 62 and the external electrode 63. Similar actions and effects are achieved between the second electrode portion 92 of the external electrode 62 and the external electrode 63, and between the third electrode portion 93 and the fourth electrode portion 94 of the external electrode 62 and the external electrode 64.

[0075] (effect) As described above, according to this embodiment, the following effects are achieved. (1) The semiconductor device 10 is a semiconductor device in which a transistor 300 including a gate electrode 303, a source region 301, and a drain region 302 is formed, and includes a semiconductor substrate 20, an insulating layer 40 formed on the semiconductor substrate 20, an external electrode 63 formed on the insulating layer 40 and electrically connected to the source region 301 of the transistor 300, and an external electrode 62 formed on the insulating layer 40 at a position spaced apart from the external electrode 63 in the first direction when viewed from the thickness direction of the insulating layer, and electrically connected to the drain region 302 of the transistor 300.

[0076] Both of the external electrode 63 and the external electrode 62 include a pad portion 631, 911 formed in a rectangular shape, a tapered portion 632, 912 extending from the first pad portion 631, 911 in the Y direction perpendicular to the X direction when viewed from the Z direction and formed so that the wiring width W52, W12 in the X direction gradually decreases with distance from the pad portion 631, 911, and a tip portion 633, 913 extending along the Y direction from the tapered portion 632, 912 and formed in a rectangular shape having a wiring width W53, W13 in the X direction narrower than that of the pad portion 631, 911. The pad portion 631 of the external electrode 63 and the tip portion 913 of the external electrode 62 are arranged at a distance in the X direction, and the tip portion 633 of the external electrode 63 and the pad portion 911 of the external electrode 62 are arranged at a distance in the X direction. The semiconductor device 10 can reduce current concentration at the pad portions 911 and 631 of the external electrodes 62 and 63.

[0077] (2) In the semiconductor device 10 of the present disclosure, the wiring width W13 of the tip 913 of the external electrode 62 is smaller than the wiring width W11 of the pad portion 911 of the external electrode 62. The wiring width W53 of the tip 633 of the external electrode 63 is smaller than the wiring width W51 of the pad portion 631 of the external electrode 62. The tip 913 of the external electrode 62 is arranged to be spaced apart from the pad portion 631 of the external electrode 63 in the X direction. This makes it possible to suppress an increase in the arrangement pitch of the external electrodes 62, 63 in the X direction.

[0078] (3) The tip 633 of the external electrode 63 is formed in a rectangular shape. The tip 633 of the external electrode 63 is electrically connected to the lower layer source wiring 541 by the via 555. If the external electrode 63 is formed in a tapered shape up to the tip, it may be difficult to secure a space for arranging the via 555 that connects the external electrode 63 and the lower layer source wiring 541 at the tip, and the number of the vias 555 may be reduced. By forming the tip 633 in a rectangular shape, it is possible to arrange multiple vias 555 at the tip 633. In other words, it is possible to secure a space for arranging the via 555 at the tip 633 of the external electrode 63. Therefore, it is possible to ensure the connection between the tip 633 of the external electrode 63 and the lower layer source wiring 541.

[0079] (4) The tip 913 of the external electrode 62 is formed in a rectangular shape. The tip 913 of the external electrode 62 is electrically connected to the drain wiring 542 in the lower layer by the via 555. If the external electrode 62 is formed in a tapered shape up to the tip, it may be difficult to secure a space for arranging the vias 555 that connect the external electrode 63 and the drain wiring 542 in the lower layer at the tip, and the number of the vias 555 may be reduced. By forming the tip 913 in a rectangular shape, it is possible to arrange multiple vias 555 at the tip 913. In other words, it is possible to secure a space for arranging the vias 555 at the tip of the external electrode 62. Therefore, it is possible to ensure the connection between the tip 913 of the external electrode 62 and the drain wiring 542 in the lower layer.

[0080] (Example of change) The above embodiment can be modified, for example, as follows. The above embodiment and the following modified examples can be combined with each other as long as no technical contradiction occurs. In the following modified examples, the same reference numerals as in the above embodiment are used for the parts common to the above embodiment, and the description thereof will be omitted.

[0081] The configuration of the semiconductor device 10 may be changed as appropriate. As shown in FIG. 4, the external electrode 62 of the semiconductor device 10 includes the first to fourth electrode portions 91 to 94, but may include at least one of the first to fourth electrode portions 91 to 94.

[0082] Fig. 8 is a schematic plan view of a semiconductor device 10A according to a modified example, and Fig. 9 is an enlarged plan view showing a part of the semiconductor device 10A according to the modified example. The semiconductor device 10A of the modified example includes a plurality of external electrodes 62A formed on the first region 31A. The external electrode 62A of the modified example includes a pad portion 62A1, first and second tapered portions 62A2 and 62A3, and first and second tip portions 62A4 and 62A5. The pad portion 62A1 is formed in a rectangular shape. The first tapered portion 62A2 extends in the Y direction from the pad portion 62A1. The first tip portion 62A4 extends in the Y direction from the first tapered portion 62A2. The second tapered portion 62A3 extends from the pad portion 62A1 in the opposite direction to the first tapered portion 62A2. The second tip portion 62A5 extends in the Y direction from the second tapered portion 62A3. The wiring width in the X direction of the first and second tip portions 62A4 and 62A5 is smaller than the wiring width in the X direction of the pad portion 62A1. In the multiple external electrodes 62A arranged side by side in the X direction, the pad portion 62A1 is adjacent to at least one of the first and second tip portions 62A4, 62A5 in the X direction. In the semiconductor device 10A of this modified example, the same effects as those of the semiconductor device 10 of the above embodiment can be obtained.

[0083] FIG. 10 is a schematic plan view showing a part of a semiconductor device 10B of a modified example. The semiconductor device 10B of the modified example includes one external electrode 62B and multiple external electrodes 63B. The external electrode 62B includes a rectangular base 62B1 extending in the X direction and multiple electrode portions 62B2 extending from the base 62B1 in the Y direction. The multiple external electrodes 63B extend in the Y direction. The multiple electrode portions 62B2 and the multiple external electrodes 62B are alternately arranged in the X direction. The multiple electrode portions 62B2 include a pad portion 62B21, a tapered portion 62B22, and a tip portion 62B23. The multiple external electrodes 63B include a pad portion 63B1, a tapered portion 63B2, and a tip portion 63B3. The pad portions 62B21 of the multiple electrode portions 62B2 and the tip portions 63B3 of the multiple external electrodes 63B are alternately arranged in the X direction. The tip portions 62B23 of the electrode portions 62B2 and the pad portions 63B1 of the external electrodes 63B are arranged alternately in the X direction.

[0084] The multiple electrode portions 62B2 of the external electrode 62B correspond to the "first external electrodes," and the multiple external electrodes 63B correspond to the "second external electrodes." The multiple external electrodes 63B include end electrodes 63BA arranged at both ends in the X direction, and an intermediate electrode 63BB between the end electrodes 63BA. The tapered portion 63B2 of the end electrode 63BA is formed narrower than the tapered portion 63B2 of the intermediate electrode 63BB. With the semiconductor device 10B of this modified example, the same effects as those of the semiconductor device 10 of the above embodiment can be obtained.

[0085] The term "on" as used in this disclosure includes both the meanings of "on" and "above" unless the context clearly indicates otherwise. Thus, the phrase "a first layer is formed on a second layer" is intended to mean that in some embodiments, the first layer may be disposed directly on the second layer in contact with the second layer, while in other embodiments, the first layer may be disposed above the second layer without contacting the second layer. That is, the term "on" does not exclude a structure in which another layer is formed between the first layer and the second layer.

[0086] The Z-axis direction used in the present disclosure does not necessarily have to be a vertical direction, nor does it have to completely coincide with the vertical direction. Therefore, various structures according to the present disclosure (for example, the structure shown in FIG. 1) are not limited to the "up" and "down" of the Z-axis direction described in this specification being "up" and "down" of the vertical direction. For example, the X-axis direction may be a vertical direction, or the Y-axis direction may be a vertical direction.

[0087] (Additional Note) The technical ideas that can be understood from the present disclosure are described below. Note that, for the purpose of aiding understanding, not for the purpose of limitation, the components described in the appendices are given the reference symbols of the corresponding components in the embodiments. The reference symbols are shown as examples for the purpose of aiding understanding, and the components described in each appendix should not be limited to the components indicated by the reference symbols.

[0088] (Appendix 1) A semiconductor device including a first transistor (300) including a gate electrode, a first element electrode, and a second element electrode, A semiconductor substrate (20); An insulating layer (40) formed on the semiconductor substrate; a first external electrode (62) formed on the insulating layer and electrically connected to a first element electrode of the first transistor; a second external electrode (63) formed on the insulating layer at a position spaced apart from the first external electrode in a first direction (X) as viewed from a thickness direction (Z) of the insulating layer, and electrically connected to a second element electrode of the first transistor (300); Including, Both the first external electrode (62) and the second external electrode (63) A first pad portion (911, 631) formed in a rectangular shape; a first tapered portion (912, 632) extending from the first pad portion in a second direction perpendicular to the first direction when viewed from the thickness direction and formed so that the wiring width in the first direction gradually decreases as the wiring width becomes farther from the first pad portion; a first tip portion (913, 633) extending from the first taper portion along the second direction and formed in a rectangular shape having a wiring width in the first direction narrower than that of the first pad portion; Including, the first pad portion (911) of the first external electrode (62) and the first tip portion (633) of the second external electrode (63) are spaced apart from each other in the first direction, The first tip portion (913) of the first external electrode (62) and the first pad portion (631) of the second external electrode (63) are spaced apart from each other in the first direction. Semiconductor device.

[0089] (Appendix 2) a plurality of source patterns (541) electrically connected to a first element electrode of the first transistor, extending in the first direction, and arranged in the second direction; a plurality of drain patterns (542) electrically connected to second element electrodes of the first transistors, extending in the first direction, arranged in the second direction, and alternately disposed with the plurality of first external electrodes; Including, the first external electrode and the second external electrode are formed on the source patterns and the drain patterns; the first external electrode is electrically connected to a first element electrode of the first transistor via the plurality of source patterns; the second external electrode is electrically connected to a second element electrode of the first transistor via the plurality of drain patterns; 2. The semiconductor device according to claim 1.

[0090] (Appendix 3) The first external electrode (911, 912) is disposed on either side of the second external electrode (63) in the first direction. 3. The semiconductor device according to claim 1 or 2.

[0091] (Appendix 4) The first external electrode (62B2) and the second external electrode (63B) are each provided in plurality and are alternately arranged in the first direction. 4. The semiconductor device according to claim 1,

[0092] (Appendix 5) the second external electrodes (63B) include end electrodes arranged at both ends in the first direction and intermediate electrodes arranged between the end electrodes at both ends, The first tapered portion of the end electrode is formed to be narrower than the first tapered portion of the intermediate electrode. 5. The semiconductor device according to claim 1,

[0093] (Appendix 6) the first external electrode (62A) includes a second tapered portion (62A3) extending from the first pad portion (62A1) in a direction opposite to the first tapered portion (62A2) and formed such that a wiring width in the first direction gradually decreases from the first pad portion; 6. The semiconductor device according to claim 1,

[0094] (Appendix 7) The first transistor is a power MOS transistor (300); 7. The semiconductor device according to claim 1,

[0095] (Appendix 8) a first region (31, 32) in which the first transistor is disposed; the first external electrode (62) and the second external electrode (63) are disposed on the first region; 8. The semiconductor device according to claim 1,

[0096] (Appendix 9) a protective layer (70) covering both the first external electrode and the second external electrode and having an opening (71) exposing a part of the first pad portion of the first external electrode and an opening (71) exposing a part of the first pad portion of the second external electrode; 9. The semiconductor device according to claim 1,

[0097] (Appendix 10) a second region (35) including a driving circuit (202, 203) connected to the gate electrode of the first transistor; a plurality of pad wirings (61) that are disposed at the same positions as the first external electrodes and the second external electrodes in the thickness direction, are electrically connected to a plurality of circuit elements disposed in the second region, and are formed in a rectangular shape when viewed in the thickness direction; Including, The protective layer has a plurality of openings (71) that expose a portion of each of the pad wirings. 10. The semiconductor device according to claim 9.

[0098] (Appendix 11) The first transistor is composed of a plurality of unit transistors (310). 10. The semiconductor device according to claim 1,

[0099] (Appendix 12) a second transistor (211B) connected in parallel to the first transistor (211A) and including a gate electrode, a first element electrode, and a second element electrode; the second element electrode of the second transistor is electrically connected to the second external electrode, a third external electrode (92) formed on the insulating layer at a position spaced apart from the second external electrode in a first direction when viewed from a thickness direction of the insulating layer, and electrically connected to a first element electrode of the second transistor; The third external electrode (92) is A second pad portion (921) formed in a rectangular shape; a third tapered portion (922) extending from the first pad portion in a second direction perpendicular to the first direction when viewed from the thickness direction and formed so that the wiring width in the first direction gradually decreases with increasing distance from the first pad portion; a second tip portion (923) extending from the third taper portion along the second direction and formed in a rectangular shape having a wiring width in the first direction narrower than that of the first pad portion; Including, the second pad portion of the third external electrode and the first tip portion of the second external electrode are spaced apart from each other in the first direction, the second tip portion of the third external electrode and the first pad portion of the second external electrode are spaced apart from each other in the first direction. 12. The semiconductor device according to claim 1,

[0100] (Appendix 13) A semiconductor substrate (20) including a substrate front surface (21) and a substrate back surface (22) facing in opposite directions in a thickness direction; an insulating layer (40) formed on the substrate surface and including an insulating surface (41) facing in the same direction as the substrate surface; a first external electrode (62) and a second external electrode (63) formed on the insulating surface and arranged spaced apart in a first direction when viewed from the thickness direction; a protective layer (70) covering both the first external electrode and the second external electrode; Including, Both the first external electrode and the second external electrode are A first pad portion (911, 631) formed in a rectangular shape; a first tapered portion (912, 632) extending from the first pad portion in a second direction perpendicular to the first direction when viewed from the thickness direction and formed so that the wiring width in the first direction gradually decreases from the first pad portion; a first tip portion (913, 633) extending from the first taper portion along the second direction and formed in a rectangular shape having a wiring width in the first direction narrower than that of the first pad portion; Including, the first pad portion of the first external electrode and the first tip portion of the second external electrode are spaced apart from each other in the first direction, the first tip portion of the first external electrode and the first pad portion of the second external electrode are spaced apart from each other in the first direction, the protective layer includes a first opening exposing a portion of the first pad portion of the first external electrode and a second opening exposing a portion of the first pad portion of the second external electrode. Semiconductor device.

[0101] The above description is merely illustrative. Those skilled in the art may recognize that many more possible combinations and permutations are possible other than the components and methods (manufacturing processes) listed for the purpose of describing the technology of the present disclosure. The present disclosure is intended to embrace all alternatives, modifications, and alterations that fall within the scope of the present disclosure, including the scope of the claims. [Explanation of symbols]

[0102] 10 Semiconductor device 20 Semiconductor substrate 31~34 1st area 35 Second area 40 Insulating layer 62~67 External electrode 631 Pad section 632 Tapered section 633 Tip 91~94 1st~4th electrode part 911,921,931,941 Pad section 912,922,923,942 Tapered section 913,923,933,943 Tip 541 Source wiring 542 Drain wiring 62A External electrode 62A1 Pad section 62A2 First taper section 62A3 Second taper section 62A4 1st tip 62A5 Second tip 62B External electrode 63B External electrode 63BA End external electrode 63BB Intermediate external electrode 70 protective layer 71 Aperture 300 Transistors 310 Unit Transistor

Claims

1. A semiconductor device including a first transistor including a gate electrode, a first element electrode, and a second element electrode, A semiconductor substrate; an insulating layer formed on the semiconductor substrate; a first external electrode formed on the insulating layer and electrically connected to the first element electrode of the first transistor; a second external electrode formed on the insulating layer at a position spaced apart from the first external electrode in a first direction when viewed from a thickness direction of the insulating layer, and electrically connected to the second element electrode of the first transistor; Including, Both the first external electrode and the second external electrode are A first pad portion formed in a rectangular shape; a first tapered portion extending from the first pad portion in a second direction perpendicular to the first direction when viewed from the thickness direction, and formed such that a wiring width in the first direction gradually decreases with increasing distance from the first pad portion; a first tip portion extending from the first tapered portion along the second direction and formed in a rectangular shape having a wiring width in the first direction narrower than that of the first pad portion; Including, the first pad portion of the first external electrode and the first tip portion of the second external electrode are spaced apart from each other in the first direction, the first tip portion of the first external electrode and the first pad portion of the second external electrode are disposed apart from each other in the first direction; Semiconductor device.

2. a plurality of source patterns electrically connected to the first element electrode of the first transistor, extending in the first direction, and arranged in the second direction; a plurality of drain patterns electrically connected to the second element electrode of the first transistor, extending in the first direction, arranged in the second direction, and alternately disposed with the plurality of first external electrodes; Including, the first external electrode and the second external electrode are formed on the source patterns and the drain patterns; the first external electrode is electrically connected to the first element electrode of the first transistor via the plurality of source patterns; the second external electrode is electrically connected to the second element electrode of the first transistor via the drain patterns; The semiconductor device according to claim 1 .

3. the first external electrode is disposed between the first and second external electrodes in the first direction; The semiconductor device according to claim 1 .

4. A plurality of the first external electrodes and a plurality of the second external electrodes are provided, and are alternately arranged in the first direction. The semiconductor device according to claim 1 .

5. the second external electrodes include end electrodes disposed at both ends in the first direction and intermediate electrodes disposed between the end electrodes at both ends, The first tapered portion of the end electrode is formed to be narrower than the first tapered portion of the intermediate electrode. The semiconductor device according to claim 1 .

6. the first external electrode includes a second tapered portion extending from the first pad portion in a direction opposite to the first tapered portion and formed such that a wiring width in the first direction gradually decreases from the first pad portion; The semiconductor device according to claim 1 .

7. the first transistor is a power MOS transistor; The semiconductor device according to claim 1 .

8. a first region in which the first transistor is disposed; the first external electrode and the second external electrode are disposed on the first region. The semiconductor device according to claim 1 .

9. a protective layer covering both the first external electrode and the second external electrode, the protective layer having an opening exposing a part of the first pad portion of the first external electrode and an opening exposing a part of the first pad portion of the second external electrode; The semiconductor device according to claim 1 .

10. a second region including a drive circuit connected to the gate electrode of the first transistor; a plurality of pad wirings arranged at the same positions as the first external electrodes and the second external electrodes in the thickness direction, electrically connected to a plurality of circuit elements arranged in the second region, and formed in a rectangular shape when viewed in the thickness direction; Including, the protective layer has a plurality of openings each exposing a portion of the pad wirings; The semiconductor device according to claim 9.

11. the first transistor is composed of a plurality of unit transistors; The semiconductor device according to claim 1 .

12. a second transistor connected in parallel to the first transistor and including a gate electrode, a first element electrode, and a second element electrode; the second element electrode of the second transistor is electrically connected to the second external electrode; a third external electrode formed on the insulating layer at a position spaced apart from the second external electrode in the first direction when viewed from the thickness direction, and electrically connected to the first element electrode of the second transistor; The third external electrode is A second pad portion formed in a rectangular shape; a third tapered portion extending from the first pad portion in the second direction when viewed from the thickness direction and formed such that a wiring width in the first direction gradually decreases with increasing distance from the first pad portion; a second tip portion extending from the third tapered portion along the second direction and formed in a rectangular shape having a wiring width in the first direction narrower than that of the first pad portion; Including, the second pad portion of the third external electrode and the first tip portion of the second external electrode are spaced apart from each other in the first direction, the second tip portion of the third external electrode and the first pad portion of the second external electrode are spaced apart from each other in the first direction. The semiconductor device according to claim 1 .

Citation Information

Patent Citations

  • Semiconductor device

    WO2022054600A1