Semiconductor device

JP2025025958APending Publication Date: 2025-02-21ASTEMO LTD
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Patent Information

Application Number
JP2023131251
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-10
Publication Date
2025-02-21

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【0007】 本発明によれば、高温下であっても、高い接合信頼性を確保できる半導体装置を提供できる。

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Abstract

To provide a semiconductor device that can ensure high bonding reliability even at high temperatures.SOLUTION: A semiconductor device includes a semiconductor element and a conductor plate and is formed with a solder bonding part that bonds the semiconductor element and the conductor plate together using solder. The solder in the solder bonding part is lead-free solder with Sn as a main component. The percentage content of Cu is between 4 wt% and 6 wt%. The total of the percentage contents of Bi and Sb is 3 wt% or greater. The percentage content of Bi is 3 wt% or less. At the bonding interface between an Ni-based electrode formed on the semiconductor element and the solder bonding part, or at the bonding interface between an Ni plating layer formed on the conductor plate and the solder bonding part, a Cu-Sn-based compound layer that does not contain In is formed. The Cu-Sn-based compound is 4 wt% or greater with respect to the total amount of the solder bonding part.SELECTED DRAWING: Figure 2
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Description

[Technical field]

[0001] The present invention relates to a semiconductor device. [Background technology]

[0002] The RoHS (Restriction of Hazardous Substances) Directive and ELV (End-of Life Vehicles Directive) Directive restrict the amount of lead used in electronic control devices installed in automobiles. For this reason, lead-free solder, mainly Sn-3Ag-0.5Cu (mass%), has been used up until now. On the other hand, the trend for power modules used in inverters is to increase the output density in order to reduce size and weight, and there is a demand for soldering both the top and bottom of the power semiconductor to enable heat dissipation from both the top and bottom of the power module, and for raising the guaranteed temperature of the power semiconductor joints to allow a large current to flow.

[0003] In recent years, power semiconductor elements are made of SiC, GaN, etc., which can operate at higher temperatures than Si, and therefore the solder joints of semiconductor elements are often used at higher temperatures, and higher reliability against high temperatures is required than ever before for the solder joints. For example, Patent Document 1 below discloses a technology for improving thermal fatigue resistance by adding Bi and In to solder joints in order to improve joint reliability against high temperatures. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2017-213596 A Summary of the Invention [Problem to be solved by the invention]

[0005] In Patent Document 1, although it is possible to improve thermal fatigue resistance, it does not take into consideration suppressing reactions between members at high temperatures, and there is a problem that the solder joints of the semiconductor element cannot ensure joint reliability at high temperatures. In view of this, the present invention aims to provide a semiconductor device that can ensure high joint reliability even at high temperatures by suppressing the reaction between Sn contained in the solder joints and Ni-based electrodes of the semiconductor element in a semiconductor device at high temperatures. [Means for solving the problem]

[0006] A semiconductor device having a semiconductor element and a conductor plate, the semiconductor element and the conductor plate being soldered together at a solder joint, the solder in the solder joint being a lead-free solder containing Sn as a main component, the Cu content being 4% by weight or more and 6% by weight or less, the sum of the contents of Bi and Sb being 3% by weight or more, and the Bi content being less than 3% by weight, a Cu-Sn-based compound layer not containing In is formed at a joint interface between a Ni-based electrode formed on the semiconductor element and the solder joint, or at a joint interface between a Ni plating layer formed on the conductor plate and the solder joint, and the Cu-Sn compound is 4% by weight or more with respect to the total amount of the solder joint. Effect of the Invention

[0007] According to the present invention, it is possible to provide a semiconductor device that can ensure high bonding reliability even at high temperatures. [Brief description of the drawings]

[0008] [Figure 1] Diagram illustrating fatigue cracks in solder joints [Diagram 2] FIG. 1 is a diagram illustrating a solder joint according to an embodiment of the present invention. [Diagram 3] A diagram explaining the relationship between the ratio of Cu-Sn compounds at the joint interface and the thickness of the Ni-based electrode of the semiconductor element that disappears. [Figure 4]A diagram explaining the bonded interface after holding at 175℃ for 1000h when a Cu-Sn compound is formed and when a Cu-(S,In) compound is formed at the bonded interface. [Diagram 5] A diagram explaining the relationship between the total content of Bi and Sb in the solder joint and the joint ratio after temperature cycle testing. [Figure 6] A diagram explaining the relationship between the Bi content in solder joints and the rate of grain boundary fracture. [Figure 7] Diagram explaining the relationship between the Ag content of solder joints and the 0.2% yield strength [Figure 8] Diagram explaining the relationship between the Ag content of solder joints and tensile strength [Figure 9] FIG. 1 is a diagram for explaining peeling that occurs between a hard resin and a conductive plate in a semiconductor device. [Figure 10] Examples and Experiments According to an Embodiment of the Invention [Figure 11] Comparative Examples and Experimental Examples DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and appropriate omissions and simplifications have been made for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0010] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0011] (One embodiment and overall configuration) (Figure 1) In a semiconductor device in which a solder joint 3 is formed to join a semiconductor element 1 and a conductor plate 2 to each other with solder, a predetermined maximum temperature is set for maintaining the solder joint 3. If this maximum temperature is further increased, the difference between the temperature of the solder joint 3 when it is heated and the temperature of the solder joint 3 when it is cooled becomes large, so that the stress and strain generated in the solder joint 3 becomes large, and a crack 101 occurs from the end of the solder joint 3. Furthermore, if the semiconductor element 1 is made of SiC or GaN instead of Si, these have higher rigidity and are less likely to deform than Si, so that the stress and strain generated in the solder joint 3 becomes even larger, and there is a problem that it becomes more susceptible to fatigue failure.

[0012] (Figure 2) FIG. 2(a) is an overall cross-sectional view of a semiconductor device of the present invention, and FIG. 2(b) is an enlarged view of A in FIG. 2(a).

[0013] In the semiconductor device, Sn-based lead-free solder is applied onto a conductor plate 2 having a layer of Ni plating 7, and a semiconductor element 1 having Ni-based electrodes 6 on both sides is bonded onto the applied solder. Wire bonding (not shown) is applied to the gate electrode of the semiconductor element 1, and the conductor plate 2 having Ni plating 7 is laminated on the Sn-based lead-free solder applied to the upper surface of the semiconductor element 1 and bonded to each other. The semiconductor element 1, conductor plate 2, and solder joints 3 are sealed with hard resin 9 by transfer molding. The surfaces of the conductor plate 2 are exposed from the top and bottom surfaces of the hard resin 9, and these exposed surfaces are bonded to cooling fins (not shown) via insulating resin.

[0014] As shown in FIG. 2(b), the solder joint 3 in which the semiconductor element 1 and the conductor plate 2 are joined will be described. The solder joint 3 uses lead-free solder whose main component is Sn. In the solder joint 3, the Cu content is 4% by weight or more and 6% by weight or less, the total content of Bi and Sb is 3% by weight or more, and the Bi content is less than 3% by weight. In addition, a layer of Cu-Sn-based compound 5 that does not contain In is formed at the joint interface between the Ni-based electrode 6 formed on the semiconductor element 1 and the solder joint 3, or at the joint interface between the Ni plating 7 formed on the conductor plate 2 and the solder joint 3, and this layer of Cu-Sn-based compound 5 accounts for 4% by weight or more of the total amount of the solder joint 3.

[0015] In this manner, the Cu-Sn compound layer 5 is formed adjacent to the Ni-based electrode 6 of the semiconductor element 1 and the Ni plating 7 of the conductor plate 2, and the Cu-Sn compound layer 5 is formed to account for 4 wt % or more of the total amount of the entire solder joint 3, thereby making it possible to suppress the reaction between the Sn contained in the solder joint 3 and the Ni-based electrode 6 of the semiconductor element at high temperatures.

[0016] Furthermore, in the semiconductor device of the present invention, both sides of the semiconductor element 1 are bonded to the conductive plate 2. When the conductive plate 2 is bonded to both sides of the semiconductor element 1, an even larger load is applied to the solder joints 3, but the configuration of the solder joints 3 of the present invention makes it easy to ensure the joint reliability.

[0017] Furthermore, the solder joints 3 are sealed with hard resin 9. In this manner, higher joint reliability can be obtained by sealing with high quality resin such as epoxy resin, compared to soft resin such as gel or silicone resin.

[0018] (Fig. 3, Fig. 4) The relationship between the proportion of Cu-Sn compounds 5 at the interface of the solder joint 3 and the thickness of the Ni-based electrode 6 that disappears when held at 175°C for 1000 hours will be described. The solder joint 3 is formed from the solder parent phase 4 and the joint interface, and as shown in Figure 3, when the proportion of Cu-Sn compounds exceeds about 4% by weight, the disappearance of the thickness of the Ni-based electrode 6 of the semiconductor element 1 is suppressed, and when the proportion of Cu-Sn compounds 5 exceeds 7% by weight, the effect of suppressing the disappearance becomes even greater.

[0019] In soldering, Cu-Sn compounds dissolved in the molten solder are formed on the underside of the joint, and crystallize and precipitate at the joint interface during cooling, so the joining temperature and joining time must be controlled. As shown in Figure 4(b), when Cu-Sn compounds 5 are formed on the Ni-based electrode 6 at the joint interface, if even a small amount of In is substituted to form a Cu-(Sn,In) compound 10, a problem occurs in that the reaction between the components cannot be suppressed when held at high temperatures. Note that Figure 4(b) shows Ni plating 102 that has disappeared due to the reaction caused by the formation of the Cu-(Sn,In) compound 10.

[0020] On the other hand, as shown in FIG. 4(a), when the solder joint 3 is mounted on a printed circuit board, for example, at a temperature of 260° C. or lower, even if a solder of the same composition that does not contain In is used, it is not possible to form more than 4 wt % of Cu-Sn-based compounds at the joint interface.

[0021] Furthermore, when the Cu content in the solder joint 3 is below 4 wt%, it is not possible to obtain a desired joint structure even if the joining process is devised. Furthermore, when the Cu content in the solder exceeds 6 wt%, the amount of Cu-Sn compounds formed outside the joint interface increases, which may actually impair thermal fatigue resistance.

[0022] In light of the above, by setting the Cu content of the solder joint 3 to be between 4% by weight and 6% by weight, it becomes easy to form Cu-Sn compounds with a content of more than 4% by weight in the Ni-based electrode 6 of the semiconductor element 1 and the Ni plating 7 of the conductor plate 2.

[0023] (Figure 5) The relationship between the total Bi and Sb content of the solder joint 3 after a temperature cycle test (-40°C to 150°C, 1000 cycles) and the bonding ratio will be described. As shown in Fig. 5, by making the total Bi and Sb content in the solder equal to or greater than 3 wt%, the bonding ratio increases. In this way, it is easier to suppress the growth of cracks 101 in the solder joint 3, and thermal fatigue resistance can be improved.

[0024] (Figure 6) As shown in FIG. 6, in terms of the relationship between the Bi content in a solder joint and the rate of intergranular fracture, when the Bi content exceeds 3 wt%, the rate of intergranular fracture increases rapidly, making it easier for intergranular fracture to occur suddenly. Therefore, the Bi content in the solder must be less than 3 wt%.

[0025] (Fig. 7, Fig. 8) Fig. 7 shows the relationship between the Ag percentage and the 0.2% yield strength of the solder joint 3, and Fig. 8 shows the relationship between the Ag content and the tensile strength of the solder joint 3. As shown in Fig. 7 and Fig. 8, when the Ag content of the solder joint is between 2% and 4% by weight, the 0.2% yield strength and tensile strength are large, which gives the semiconductor device high mechanical strength and makes it less likely to break even if a large stress is applied to the solder joint 3.

[0026] (Fig. 9) FIG. 9(a) is an overall cross-sectional view of a semiconductor device in which a flat Ni plating 8 is used, and FIG. 9(b) is an enlarged view of FIG. 9(a).

[0027] When a conductor plate 2 having a flat Ni plating 8 is used, peeling 103 is formed between the hard resin 9, which causes large stress and strain to be applied to the solder joints 3, accelerating the breakdown of the solder joints 3. For this reason, the Ni plating 7 formed on the conductor plate 2 must have a surface roughness of 1.15 μm or more to prevent the hard resin 9 from peeling off. In this way, the breakdown of the solder joints 3 can be suppressed. Furthermore, by sealing the solder joints 3 with the hard resin 9, the stress and strain occurring in the solder joints 3 can be suppressed.

[0028] In the semiconductor device of the present invention, the Ni-based electrode 6 formed on the semiconductor element 1 is a Ni, Ni-P, or Ni-V electrode. When the Ni-based electrode 6 of the semiconductor element 1 is Ni, it is easy to obtain the desired junction structure of the present invention. Even when the Ni-based electrode 6 of the semiconductor element 1 is a Ni-P or Ni-V electrode, sufficient high-temperature reliability can be obtained.

[0029] In the semiconductor device of the present invention, the semiconductor element 1 is SiC or GaN. When the semiconductor element 1 is SiC or GaN, it is expected that the temperature of the solder joint 3 will be higher than 150° C., but the reliability of the solder joint 3 can be ensured if the temperature is 200° C. or lower.

[0030] (Figure 10) For 12 examples of different combinations of the composition conditions of the solder joint 3 conforming to the present invention and the ratio of the compound at the joint interface to the solder joint, tests were performed using three methods to evaluate the joint reliability at high temperatures.

[0031] As the first test, a temperature cycle test of 1000 cycles was performed at -40°C to 175°C to verify thermal fatigue failure. In this case, if the bonding ratio after the test was 80% or more, it was evaluated as ◯, and if it was less than 80%, it was evaluated as ×.

[0032] As the second test, to verify grain boundary fracture, a power cycle test was conducted with a junction temperature Tjmax of 175°C, a temperature difference ΔTj of 100°C, and 30,000 cycles. If the heat dissipation performance after the test had decreased by less than 20% compared to the initial state, it was evaluated as ◯, and if it had decreased by 20% or more, it was evaluated as ×.

[0033] As the third test, a test was performed in which the solder joint 3 was held at 175°C for 1000 hours to verify the stability of the joint interface. The case in which no peeling occurred in the solder joint 3 was evaluated as ◯, and the case in which peeling occurred was evaluated as ×.

[0034] As a result of carrying out the above three tests for Examples 1 to 12, all three tests were evaluated as ◯ for each Example, confirming that the bonding reliability of the present invention at high temperatures was obtained.

[0035] (Fig. 11) As comparative examples for the examples of the present invention, 12 combinations of different composition conditions of the solder joint 3 that do not conform to the present invention and the ratio of the compound at the joint interface to the solder joint were evaluated for joint reliability at high temperatures using three test methods. The method of manufacturing the semiconductor device was the same as in the case of FIG.

[0036] Comparative Example 1-5 is an example in which Sb is not contained in the solder joint. In the third test, which was a test in which the solder joint was held at 175°C for 1000 hours, no peeling occurred in the solder joint, but in the first test, the temperature cycle test, cracks progressed and the joint area became less than 80%, so the comparative example was rated as x. In the second test, the power cycle test, the heat dissipation performance was also reduced by 20% or more due to grain boundary fracture near the center of the joint of the semiconductor element, so the comparative example was rated as x.

[0037] Comparative Examples 7 and 8 are examples in which the formation ratio of Cu-Sn-based compounds in the solder joints is less than 4% by weight. These Comparative Examples 7 and 8 were evaluated as ◯ in the first temperature cycle test and the second power cycle test, but were evaluated as × in the third test because peeling occurred at the location where the Ni-based electrode of the semiconductor element reacted with the solder and disappeared when held at 175°C for 1000 hours.

[0038] Comparative Examples 9 and 10 are examples in which the Bi content in the solder joint is 3% by weight or more. These Comparative Examples 9 and 10 were evaluated as ◯ in the first temperature cycle test and the third test in which the temperature was held at 175°C for 1000 hours, but were evaluated as × in the second power cycle test because grain boundary destruction occurred in the solder joint near the center of the joint of the semiconductor element and the heat dissipation performance decreased by 20% or more.

[0039] Comparative Examples 11 and 12 are examples in which the solder joint (Cu-Sn based compound) contains In. These Comparative Examples 11 and 12 were evaluated as ◯ in both the first temperature cycle test and the second power cycle test, but in the third test of holding at 175°C for 1000 hours, peeling occurred where the Ni based electrode of the semiconductor element had disappeared, so they were evaluated as ×.

[0040] As described above, in the present invention, the thermal fatigue resistance of the solder joints 3 is improved not only by the specific solder composition conditions so that the solder joints 3 can withstand high temperatures, but also by the structure of the semiconductor device, thereby suppressing the reaction between the semiconductor element 1 and the solder at high temperatures. Furthermore, when a semiconductor element capable of operating at high temperatures, such as SiC, is used in the semiconductor device, a semiconductor device with high joint reliability can be realized even when used at temperatures exceeding 150°C, at which the solder joints 3 are likely to break down.

[0041] According to the embodiment of the present invention described above, the following advantageous effects are achieved.

[0042] (1) A semiconductor device having a semiconductor element 1 and a conductor plate 2, in which a solder joint 3 is formed that joins the semiconductor element 1 and the conductor plate 2 to each other with solder, the solder in the solder joint 3 is a lead-free solder mainly composed of Sn, the solder joint 3 has a Cu content of 4% by weight or more and 6% by weight or less, the total content of Bi and Sb is 3% by weight or more, and the Bi content is less than 3% by weight, a Cu-Sn-based compound 5 that does not contain In is formed at the joint interface between a Ni-based electrode 6 formed on the semiconductor element 1 and the solder joint 3, or at the joint interface between a Ni plating layer 7 formed on the conductor plate 2 and the solder joint 3, and the Cu-Sn-based compound 5 is 4% by weight or more with respect to the total amount of the solder joint 3. By doing so, a semiconductor device that can ensure high joint reliability even at high temperatures can be provided.

[0043] (2) The Ag content in the solder joint 3 is 2% by weight or more and 4% by weight or less, which can suppress grain boundary fracture.

[0044] (3) The surface roughness of the Ni plating layer 7 is 1.15 μm or more. This makes it possible to prevent the hard resin 9 from peeling off and the solder joints 3 from being damaged.

[0045] (4) The Ni-based electrode 6 is a Ni electrode, Ni-P, or Ni-V electrode. This ensures reliability at high temperatures.

[0046] (5) The semiconductor element 1 is made of SiC or GaN. This ensures reliability even when the temperature of the solder joints 3 is 150° C. to 200° C. or lower.

[0047] (6) Both sides of the semiconductor element 1 are bonded to the conductive plate 2. By doing so, even if a large load is applied to the solder joints 3, the bonding reliability can be ensured as long as the composition conditions of the present invention are met.

[0048] (7) The solder joints 3 are sealed with hard resin 9. This provides higher joint reliability.

[0049] The present invention is not limited to the above-described embodiment, and various modifications and other configurations can be combined without departing from the spirit of the present invention. Furthermore, the present invention is not limited to those having all of the configurations described in the above-described embodiment, and includes those in which some of the configurations are omitted. [Explanation of symbols]

[0050] 1. Semiconductor element 2 Conductor plate 3 Solder joints 4 Solder mother phase 5 Cu-Sn compounds 6 Ni-based electrode 7. Nickel plating 8 Flat Ni plating 9 Hard Resin 10 Cu-(Sn,In) compound 101 Crack 102 Ni plating lost in reaction 103 Peeling

Claims

1. A semiconductor element and a conductive plate, A semiconductor device in which a solder joint is formed by soldering the semiconductor element and the conductor plate to each other, The solder in the solder joint is a lead-free solder containing Sn as a main component, The solder joint has a Cu content of 4 wt % or more and 6 wt % or less, a total content of Bi and Sb of 3 wt % or more, and a Bi content of less than 3 wt %, a layer of a Cu-Sn-based compound not containing In is formed at a bonding interface between a Ni-based electrode formed on the semiconductor element and the solder joint, or at a bonding interface between a Ni-plated layer formed on the conductor plate and the solder joint; The Cu--Sn compound is 4% by weight or more based on the total weight of the solder joint. Semiconductor device.

2. The Ag content in the solder joint is 2% by weight or more and 4% by weight or less. The semiconductor device according to claim 1 .

3. The surface roughness of the Ni plating layer is 1.15 μm or more. The semiconductor device according to claim 1 .

4. The Ni-based electrode is a Ni electrode, a Ni-P electrode, or a Ni-V electrode. The semiconductor device according to claim 3 .

5. The semiconductor element is SiC or GaN. The semiconductor device according to claim 4.

6. The semiconductor element has both sides bonded to the conductive plate. The semiconductor device according to claim 5 .

7. The solder joints are sealed with a hard resin. The semiconductor device according to claim 6.

Citation Information

Patent Citations

  • Solder alloy and mounting structure using the same

    JP2017213596A