Method of manufacturing silicon carbide semiconductor device, and silicon carbide semiconductor device

JP2025026527AActive Publication Date: 2025-02-21FUJI ELECTRIC CO LTD
View PDF 7 Cites 0 Cited by

Patent Information

Application Number
JP2024211869
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-12-04
Publication Date
2025-02-21
Estimated Expiration
2040-01-09

AI Technical Summary

Benefits of technology

【0026】 本発明にかかる炭化珪素半導体装置の製造方法および炭化珪素半導体装置によれば、オーミック電極とオーミック電極上に形成される領域との密着性を向上させ、長期信頼性を有するという効果を奏する。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025026527000001_ABST
    Figure 2025026527000001_ABST
Patent Text Reader

Abstract

To provide a method of manufacturing a silicon carbide semiconductor device which has long-term reliability by improving the adhesion between an ohmic electrode and a region formed on the ohmic electrode, and the silicon carbide semiconductor device.SOLUTION: A method of manufacturing a silicon carbide semiconductor device includes: a first process of forming a semiconductor element 20 on a semiconductor substrate; a second process of polishing the reverse surface of the semiconductor element 20 to a roughness (Ra) of 2 to less than 10 nm; a third process of depositing molybdenum and nickel, or titanium and nickel in this order on the reverse surface of the semiconductor element 20 after the polishing; and a fourth process of performing laser annealing after the deposition to form an ohmic electrode 21 consisting of nickel silicide and titanium carbide, or nickel silicide and molybdenum carbide.SELECTED DRAWING: Figure 2
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to a method for manufacturing a silicon carbide semiconductor device and a silicon carbide semiconductor device. [Background technology]

[0002] Conventionally, silicon (Si) single crystal has been used as a material for power semiconductor elements that control high voltage and large current. There are several types of silicon power semiconductor elements, and they are used according to the purpose. For example, PiN diodes (P-intrinsic-N diodes), bipolar transistors, and IGBTs (Insulated Gate Bipolar Transistors) are so-called bipolar devices. These elements can handle high current density but cannot switch at high speeds, and the usage limit of bipolar transistors is several kHz, and that of IGBTs is about 20 kHz. On the other hand, power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) cannot handle large currents, but can be used at high speeds up to several MHz. However, there is a strong demand in the market for power devices that combine high current and high speed, and efforts have been made to improve silicon IGBTs and power MOSFETs, and development has progressed to the point where it is almost close to the limit of the physical properties of silicon materials.

[0003] Materials have also been examined from the perspective of power semiconductor elements, and silicon carbide (SiC) has been attracting particular attention in recent years as a next-generation power semiconductor element, due to its low on-state voltage and excellent high-speed and high-temperature characteristics. This is because SiC is a chemically very stable material, has a wide band gap of 3 eV, and can be used extremely stably as a semiconductor even at high temperatures. In addition, its maximum electric field strength is more than one order of magnitude greater than that of silicon. Since SiC is likely to exceed the material limits of silicon, it is expected to grow significantly in the future in power semiconductor applications. In particular, expectations are focused on SiC for the use in bipolar devices such as PiN diodes for ultra-high voltage applications, such as power exceeding 10 kV and pulse power.

[0004] A power semiconductor module is a power semiconductor device that incorporates one or more power semiconductor chips to constitute a part or the whole of a power conversion device, and has a structure in which the power semiconductor chip is electrically insulated from the laminated substrate or metal substrate. Power semiconductor modules are used in industrial applications such as control inverters that drive motors for elevators, etc. In recent years, they have also become widely used in control inverters that drive vehicle-mounted motors. Vehicle-mounted inverters are required to be small and lightweight to improve the fuel efficiency of vehicles, and long-term reliability at high temperatures is required because they are placed near the drive motor in the engine room.

[0005] Here, in-vehicle power semiconductor modules are required to be smaller and lighter than industrial power semiconductor modules due to the constraints of installation space. In addition, as the output power density for driving the motor increases, the temperature of the semiconductor chip during operation increases, and the demand for long-term reliability during high-temperature operation is also increasing. For this reason, a power semiconductor module structure that can operate at high temperatures and has long-term reliability is required.

[0006] Here, in a conventional silicon carbide semiconductor device, when a power semiconductor chip is mounted on a silicon carbide semiconductor substrate, when forming electrodes for connecting the power semiconductor chip to an electric circuit or the like, particularly back surface electrodes such as a drain electrode, an ohmic electrode is formed which reduces the contact resistance between the silicon carbide semiconductor substrate and the back surface electrode.

[0007] As a method for forming the above-mentioned ohmic electrode, in order to obtain an ohmic electrode that provides a low resistance (small potential barrier) connection to both n-type SiC and p-type SiC in a semiconductor device formed of a silicon carbide semiconductor substrate, a silicide process is known in which nickel (Ni) is vapor-deposited on the silicon carbide semiconductor substrate and then a heat treatment is performed to form a Ni silicide film on the silicon carbide semiconductor substrate.

[0008] For example, a back electrode is formed by forming a metal thin film that forms silicide on the back surface of a silicon carbide semiconductor substrate, irradiating the metal thin film with a laser, and forming a silicide layer on the metal thin film (see, for example, Patent Document 1 below). The metal thin film is made of a metal containing one or more of Ni, titanium (Ti), molybdenum (Mo), and tungsten (W). To form the silicide layer, the back surface of the semiconductor substrate is polished so that the roughness (Ra) is 10 nm or more and 500 nm or less, and a laser beam with a wavelength of 355 nm is used to adjust the photon energy (eV) and laser output (mJ / cm). 2 ) is 1000(eV mJ / cm 2 ) or more and 8000 (eV mJ / cm 2 ) laser light is emitted in the range below.

[0009] Also, in addition to Mo, which is a metal that produces carbide, Ni, which is a metal that produces silicide, is included in the metal thin film, which is a laminated film of Mo and Ni, and a carbide layer is formed by reacting the metal thin film with carbon in silicon carbide to form an ohmic electrode, and an unnecessary film made of silicon oxide or silicon particles that has formed on the surface of the carbide layer is removed to form a back electrode (for example, see Patent Document 2 below). Here, the carbide layer is formed by reacting the metal thin film with carbon in silicon carbide by laser annealing. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Patent No. 5460975 [Patent Document 2] Patent No. 5369762 Summary of the Invention [Problem to be solved by the invention]

[0011] In the above-mentioned document, a silicide layer is illustrated as being uniformly formed on the rear surface of the silicon carbide semiconductor substrate. However, in reality, the thickness of the silicide layer varies depending on how the rear surface of the silicon carbide semiconductor substrate is polished.

[0012] Furthermore, the above document does not describe conditions regarding unevenness in the thickness of the silicide layer and the roughness of the back surface of the silicon carbide semiconductor substrate after the silicide is formed. Also, in the conventional technology, it was difficult to form an ohmic electrode with improved adhesion to the region formed on the ohmic electrode.

[0013] In order to solve the above-mentioned problems associated with the conventional techniques, an object of the present invention is to provide a method for manufacturing a silicon carbide semiconductor device having long-term reliability by improving adhesion between an ohmic electrode and a region formed on the ohmic electrode. [Means for solving the problem]

[0014] In order to solve the above-mentioned problems and achieve the object of the present invention, the method for manufacturing a silicon carbide semiconductor device according to the present invention has the following features: First, it includes a depositing step of depositing a first film containing nickel on a back surface side of a silicon carbide semiconductor substrate, an electrode forming step of forming, after the depositing step, an electrode on the back surface side, the electrode including a plurality of nickel silicide thickness portions having side surfaces facing each other, and a protective film forming step of forming, after the electrode forming step, a protective film containing titanium or molybdenum on the back surface side.

[0015] In the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, a thin nickel silicide film portion is formed around the thick nickel silicide film portion in the electrode forming step.

[0016] Further, in the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the protective film contacts the side surfaces of the plurality of thick portions.

[0017] Moreover, in the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the depositing step includes a polishing step of polishing a back surface of the silicon carbide semiconductor substrate to a roughness (Ra) of not less than 2 nm and less than 10 nm.

[0018] Further, in the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, the protective film forming step forms an ohmic electrode made of nickel silicide and titanium carbide, or nickel silicide and molybdenum carbide, by laser annealing.

[0019] Furthermore, in the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-described invention, an overlap of laser light in the laser annealing is adjusted to form a thick film portion of the nickel silicide and a thin film portion of the nickel silicide, and the ratio of the area of ​​the thin film portion to the areas of the thick film portion and the thin film portion is formed to be 10% or more and 30% or less.

[0020] Moreover, in the method for manufacturing a silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, after the protective film forming step, a second depositing step of depositing a second film containing nickel on the back surface side.

[0021] The silicon carbide semiconductor device according to the present invention has the following features: It comprises a power semiconductor chip which is a silicon carbide semiconductor element, an electrode provided on a back surface of the power semiconductor chip and including a plurality of nickel silicide thick-film portions whose side surfaces face each other, a protective film containing titanium or molybdenum in contact with the side surfaces of the plurality of thick-film portions, and a film containing nickel provided on the back surface of the protective film.

[0022] Further, in the silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the electrode includes a thin nickel silicide film portion around a thick nickel silicide film portion.

[0023] In the silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, the titanium or molybdenum of the protective film includes titanium carbide or molybdenum carbide.

[0024] In the silicon carbide semiconductor device according to the present invention, in the above-mentioned invention, a ratio of an area of ​​the thin film portion to an area of ​​the thick film portion and an area of ​​the thin film portion is equal to or greater than 10% and equal to or less than 30%.

[0025] According to the above-mentioned invention, the adhesion between the ohmic electrode and the Ti film (protective film) can be improved, and the resistance between the ohmic electrode and the Ti film can be improved. Effect of the Invention

[0026] ADVANTAGEOUS EFFECTS OF THE PRESENT DISCLOSURE The method for manufacturing a silicon carbide semiconductor device and the silicon carbide semiconductor device according to the present invention have the effect of improving adhesion between an ohmic electrode and a region formed on the ohmic electrode, thereby providing long-term reliability. [Brief description of the drawings]

[0027] [Figure 1]1 is a cross-sectional view showing a configuration of a power semiconductor module according to an embodiment; [Diagram 2] 2 is a cross-sectional view showing a configuration of a back electrode portion of the power semiconductor module according to the embodiment; FIG. [Figure 3A] FIG. 2 is a diagram showing an overall cross-section of a MoNi silicide layer. [Figure 3B] FIG. 2 is a diagram showing an overall cross-section of a MoNi silicide layer. [Figure 4A] FIG. 3B is a magnified image of the dotted line portion of the MoNi silicide layer in FIG. 3A. [Figure 4B] FIG. 3C is a diagram showing an enlarged image of the dotted line portion of the MoNi silicide layer in FIG. 3B. [Figure 5A] FIG. 13 is a diagram showing a surface image of a MoNi silicide layer at a laser overlap of 0 / 0. [Figure 5B] FIG. 13 is a diagram showing an enlarged image of the surface of a MoNi silicide layer at a laser overlap of 0 / 0. [Figure 5C] FIG. 13 shows a cross-sectional image of a MoNi silicide layer at a laser overlap of 0 / 0. [Figure 6A] FIG. 13 shows a surface image of a MoNi silicide layer at laser overlap 33 / 33. [Figure 6B] FIG. 13 shows a magnified image of the surface of the MoNi silicide layer at laser overlap 33 / 33. [Figure 6C] FIG. 13 shows a cross-sectional image of a MoNi silicide layer at laser overlap 33 / 33. [Figure 7A] FIG. 13 shows a surface image of a MoNi silicide layer with a laser overlap of 67 / 50. [Figure 7B] FIG. 13 shows a magnified image of the surface of a MoNi silicide layer at a laser overlap of 67 / 50. [Figure 7C] FIG. 13 shows a cross-sectional image of a MoNi silicide layer with laser overlap of 67 / 50. [Figure 8A] FIG. 13 shows a surface image of a MoNi silicide layer at laser overlap 67 / 67. [Figure 8B]FIG. 13 shows a magnified image of the surface of the MoNi silicide layer at laser overlap 67 / 67. [Figure 8C] FIG. 13 shows a cross-sectional image of a MoNi silicide layer at laser overlap 67 / 67. [Figure 9A] FIG. 13 shows a surface image of a MoNi silicide layer with 80 / 80 laser overlap. [Figure 9B] FIG. 13 shows a magnified image of the surface of a MoNi silicide layer with 80 / 80 laser overlap. [Figure 9C] FIG. 13 shows a cross-sectional image of a MoNi silicide layer with 80 / 80 laser overlap. [Figure 10] 13 is a graph showing the relationship between laser overlap and a second region having a thin silicide. [Figure 11] 1 is a cross-sectional view (part 1) showing a state during the manufacture of a back electrode of a power semiconductor module according to an embodiment. FIG. [Figure 12] 6 is a cross-sectional view (part 2) showing a state during the manufacture of a back electrode of the power semiconductor module according to the embodiment. FIG. [Figure 13] FIG. 4 is a cross-sectional view (part 3) showing a state during the manufacture of the back electrode of the power semiconductor module according to the embodiment. [Figure 14A] FIG. 1 shows cross-sectional images of a Mo film and a Ni film before laser irradiation. [Figure 14B] FIG. 14B is a diagram showing cross-sectional images of the dotted line portion of FIG. 14A of the Mo film and the Ni film before laser irradiation. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Preferred embodiments of the method for manufacturing a silicon carbide semiconductor device and the silicon carbide semiconductor device according to the present invention will be described in detail below with reference to the accompanying drawings. Note that in the following description of the embodiments and the accompanying drawings, similar configurations are given the same reference numerals and duplicated explanations will be omitted. Note that in the notation of Miller indices, "-" means a bar attached to the index immediately following it, and adding "-" before an index represents a negative index.

[0029] (Embodiment) Fig. 1 is a cross-sectional view showing the configuration of a power semiconductor module according to an embodiment. As shown in Fig. 1, a power semiconductor module 50 includes a power semiconductor chip 1, an insulating substrate 2, bonding materials 3a, 3b, and 3c, an electrode pattern 4, a metal substrate 5, a lead frame wiring 6, a resin case 7, a sealing resin 8, a metal terminal 9, and a metal wire 10.

[0030] The power semiconductor chip 1 is a semiconductor element such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor), an IGBT (Insulated Gate Bipolar Transistor), or a diode chip. There is no particular limitation on the semiconductor element, and other semiconductor elements may be used. An electrode pattern 4 made of a copper (Cu) plate or the like is provided on the front surface (the power semiconductor chip 1 side) and the back surface (the metal substrate 5 side) of an insulating substrate 2 such as a ceramic substrate that ensures insulation. A substrate on which the electrode pattern 4 is provided on at least one surface of the insulating substrate 2 is referred to as a laminated substrate 12. The power semiconductor chip 1 is bonded onto the electrode pattern 4 on the front surface with a bonding material 3b such as solder. A metal substrate 5 provided with a heat dissipation fin (not shown) is bonded onto the electrode pattern 4 on the back surface with a bonding material 3c such as solder. Moreover, one end of a lead frame wiring 6 serving as wiring for electrical connection is bonded to the top surface of the power semiconductor chip 1 (the surface opposite to the surface in contact with the bonding material 3b) by a bonding material 3a such as solder. The other end of the lead frame wiring 6 is bonded to the electrode pattern 4 by a bonding material 3b.

[0031] The resin case 7 is combined with a laminated assembly in which the power semiconductor chip 1, the laminated substrate 12, and the metal substrate 5 are laminated. For example, the resin case 7 is bonded to the laminated assembly via an adhesive such as a silicone adhesive. The resin case 7 is filled with a sealing resin 8 such as a hard resin such as an epoxy resin in order to insulate and protect the power semiconductor chip 1 on the laminated substrate 12. In the first embodiment, a hard resin such as an epoxy resin is used as the sealing resin 8, and no lid is used. A metal wire 10 connects the power semiconductor chip 1 and the metal terminal 9. The metal terminal 9 penetrates the resin case 7 and protrudes to the outside.

[0032] FIG. 2 is a cross-sectional view showing the configuration of the back electrode part of the power semiconductor module according to the embodiment. FIG. 2 is an enlarged view of the part surrounded by the dotted line in FIG. 1. As shown in FIG. 2, an ohmic electrode 21 that is in ohmic contact with the semiconductor substrate is provided on the back surface of a silicon carbide semiconductor element 20 (corresponding to the power semiconductor chip 1 in FIG. 1) of the semiconductor substrate. The ohmic electrode 21 is a composite film made of nickel silicide and molybdenum carbide, or nickel silicide and titanium carbide. The composite film of nickel silicide and molybdenum carbide is a MoNi silicide layer formed by depositing Mo and Ni in this order on the silicon carbide semiconductor element 20 and then performing laser annealing. The composite film of nickel silicide and titanium carbide is a TiNi silicide layer formed by depositing Ti and Ni in this order on the silicon carbide semiconductor element 20 and then performing laser annealing.

[0033] A Ti film 22 functioning as a protective film is provided on the back surface of the ohmic electrode 21. The Ti film 22 may be a TiN (titanium nitride) film or a Ta (tantalum) film. A Ni / Au film 23 is provided on the back surface of the Ti film 22, in which nickel is deposited to improve adhesion with the Ti film 22 and gold is deposited to prevent oxidation. Solder 24 (corresponding to the bonding material 3b in FIG. 1) is provided on the back surface of the Ni / Au film 23 for bonding the lead frame wiring 6. The solder 24 may be, for example, a tin (Sn)-based low-temperature solder.

[0034] Here, the roughness (Ra) of the back surface of the silicon carbide semiconductor substrate is 0.1 μm or more and 0.15 μm. Here, the roughness (Ra) refers to the arithmetic mean roughness (Ra) of the back surface. As will be described later, during the manufacture of the power semiconductor module, the roughness (Ra) of the back surface of the silicon carbide semiconductor substrate is polished to 2 nm or more and less than 10 nm. This roughness increases due to laser annealing when forming the ohmic electrode 21, so that the roughness (Ra) of the back surface of the silicon carbide semiconductor substrate after manufacture is as described above.

[0035] In addition, the thickness of the silicide layer varies depending on the polishing condition of the back surface of the silicon carbide semiconductor substrate. Figures 3A and 3B are diagrams showing an overall image of a cross section of the MoNi silicide layer. Figure 4A shows an enlarged image of the dotted line part of the MoNi silicide layer in Figure 3A, and Figure 4B shows an enlarged image of the dotted line part of the MoNi silicide layer in Figure 3B. Figures 3A and 3B are images taken with a scanning electron microscope (SEM) at a magnification of 5000 times, and Figures 5A and 5B are images at a magnification of 30000 times. Figures 3A to 4B show cross-sectional images taken after forming the MoNi silicide layer 21 with a laser overlap of 67 / 50, which will be described later, and forming a protective film on the MoNi silicide layer 21.

[0036] 3A and 3B are different cross sections of the same semiconductor chip, where Fig. 3A is a cross section of a portion where there are many thick silicide regions, and Fig. 3B is a cross section of a portion where there are few thick silicide regions. The thick silicide regions in Figs. 3A to 4B are white portions S3.

[0037] 3A to 4B, the ohmic electrode 21 is composed of a first region with a thick silicide and a second region with a thin silicide. When the second region is examined with a transmission electron microscope (TEM), it is found that a layer that makes ohmic contact is also formed in the second region, but about half of this layer is a precipitated carbon (C) layer. Therefore, the adhesion of the second region to the Ti film 22 is poor.

[0038] FIG. 2 shows a schematic diagram of the ohmic electrode 21, which is composed of a first region 30 (hatched region in FIG. 2) where the silicide is thick, and a second region 31 where the silicide containing precipitated carbon is thin.

[0039] Next, in order to investigate the relationship between the ratio of the second region 31 and the adhesion with the Ti film 22, the ohmic electrode 21 was made into a MoNi silicide layer, and the conditions of the laser annealing were changed to test the adhesion between the ohmic electrode 21 and the Ti film 22. In the laser annealing, since the entire surface of the silicon carbide semiconductor substrate cannot be irradiated with laser light in one go, each irradiation of the laser light is shifted little by little. For example, after one irradiation of the laser light, the position of the laser is shifted in the x direction to perform the next irradiation. When the position of the laser reaches the outermost periphery of the silicon carbide semiconductor substrate, the position of the laser is shifted in the y direction to perform the next irradiation. In this way, the silicon carbide semiconductor substrate is scanned to irradiate the laser light. In addition, a solid-state laser such as a YAG (Yttrium Aluminum Garnet) laser is used as the laser.

[0040] In this case, when the next irradiation is performed by shifting in the x and y directions, one irradiation of the laser light can be overlapped. The overlap of the irradiation in the x direction between one irradiation of the laser light and the next one irradiation of the laser light is A%, and the overlap of the irradiation in the y direction is B%, which is indicated by the laser overlap A / B. One irradiation of the laser light is the region (half width) until the intensity of the laser light is halved. The x direction is, for example, the <11-20> direction, and is the direction of the stripes when the silicon carbide semiconductor device has a striped trench structure. The y direction is a direction perpendicular to the x direction on the back surface of the silicon carbide semiconductor substrate.

[0041] For example, a laser overlap of 0 / 0 indicates that one shot of laser light and the next shot of laser light have 0% overlap in the x direction and 0% overlap in the y direction. Similarly, a laser overlap of 67 / 50 indicates that one shot of laser light and the next shot of laser light have 67% overlap in the x direction and 50% overlap in the y direction.

[0042] The following shows test results of adhesion between the ohmic electrode 21 and the Ti film 22 when the laser annealing conditions are laser overlaps of 0 / 0, 33 / 33, 67 / 50, 67 / 67, and 80 / 80.

[0043] FIG. 5A is a diagram showing a surface image of the MoNi silicide layer at a laser overlap of 0 / 0. FIG. 5B is a diagram showing an enlarged image of the surface of the MoNi silicide layer at a laser overlap of 0 / 0. FIG. 5C is a diagram showing a cross-sectional image of the MoNi silicide layer at a laser overlap of 0 / 0. FIGS. 5A to 5C are images taken by a scanning electron microscope after the MoNi silicide layer 21 is formed. FIG. 5A is an image at a magnification of 500 times, FIG. 5B is an image at a magnification of 5000 times, and FIG. 5C is an image at a magnification of 20000 times. In FIG. 5C, an image of the cross section is taken after a protective film is formed on the MoNi silicide layer 21.

[0044] At a laser overlap of 0 / 0, one irradiation of the laser light is circular, so if the overlap of the irradiation in the x and y directions is 0%, there will be a portion on the back surface of the silicon carbide semiconductor substrate where the laser light is insufficiently irradiated. For example, in Fig. 5A, the circular white portion S1 is the first region 30 where the laser light is irradiated and the silicide is thick, and the black portion S2 is a region where the laser light irradiation is insufficient, the heat does not rise sufficiently, and the silicide is not formed. Also, in the cross section of Fig. 5C, the white portion S3 in the center is the first region 30 where the silicide is thick.

[0045] When the laser overlap is 0 / 0, a region where the laser is not irradiated or is not heated sufficiently by the laser irradiation and silicide is not formed occurs. Therefore, the proportion of the second region 31 where the silicide containing precipitated carbon is thin is small, and the area ratio of the second region 31 is about 6%. The area ratio of the second region 31 is the ratio of the area of ​​the region where the silicide containing precipitated carbon is thin to the area of ​​the region where the silicide is thick. For example, in FIG. 2, E2 and E4 are the areas of the second region 31, and the area ratio of the second region 31 is E2+E4 / (E1+E2+E3+E4+E5). For this area ratio, for example, the brightness of the image is set to 256 gradations, and black spots are detected with a brightness of 75 as a threshold value for the enlarged image of the surface of the MoNi silicide layer, and the area ratio is calculated. In this way, it can be measured by setting a threshold value for the brightness of the image and binarizing it.

[0046] In this case, when the laser overlap was 0 / 0, the adhesion between the ohmic electrode 21 and the Ti film 22 was good. However, in the second region 31 where the silicide was thin, carbon was precipitated, so the resistance was low. When the laser overlap was 0 / 0, in addition to the second region 31 where the silicide was thin, there were also areas where the laser was not irradiated or where the area was not heated sufficiently to be silicided and where no ohmic junction was formed, so the resistance between the ohmic electrode 21 and the Ti film 22 was high.

[0047] FIG. 6A is a diagram showing a surface image of the MoNi silicide layer at the laser overlap 33 / 33. FIG. 6B is a diagram showing an enlarged image of the surface of the MoNi silicide layer at the laser overlap 33 / 33. FIG. 6C is a diagram showing a cross-sectional image of the MoNi silicide layer at the laser overlap 33 / 33. The photographing conditions of FIG. 6A to FIG. 6C are the same as those of FIG. 5A to FIG. 5C.

[0048] In the case of the laser overlap 33 / 33, the back surface of the silicon carbide semiconductor substrate is irradiated with the laser light with an overlap of 33% in the x-direction scan, and with an overlap of 33% in the y-direction scan. Therefore, the circular center part irradiated with the laser light is irradiated with the laser light once. In FIG. 6A, the boundary between the first region 30 with thick silicide and the second region 31 with thin silicide is not clear, but in the enlarged view of FIG. 6B, a white part S1 which is the first region 30 with thick silicide and a black part S2 which is the second region 31 with thin silicide are observed. Also, in the cross section of FIG. 6C, a white part S3 in the center which is the first region 31 with thick silicide is observed.

[0049] Thus, in the case of the laser overlap 33 / 33, the ratio of the second region 31 with thin silicide was about 10%, which was higher than that in the case of the laser overlap 0 / 0. In this case, the adhesion between the ohmic electrode 21 and the Ti film 22 was good, and the resistance between the ohmic electrode 21 and the Ti film 22 was also good.

[0050] FIG. 7A is a diagram showing a surface image of the MoNi silicide layer at a laser overlap of 67 / 50. FIG. 7B is a diagram showing an enlarged image of the surface of the MoNi silicide layer at a laser overlap of 67 / 50. FIG. 7C is a diagram showing a cross-sectional image of the MoNi silicide layer at a laser overlap of 67 / 50. The photographing conditions of FIG. 7A to FIG. 7C are the same as those of FIG. 5A to FIG. 5C.

[0051] In the case of 67 / 50 laser overlap, the back surface of the silicon carbide semiconductor substrate is irradiated with laser light with an overlap of 67% in the x-direction scan and with a overlap of 50% in the y-direction scan. Therefore, the laser light is irradiated at least three times in the x-direction. Therefore, as in the cases of FIGS. 6A to 6C, the boundary between the first region with thick silicide and the second region with thin silicide is not clear in FIG. 7A, but in the enlarged view of FIG. 7B, a white portion S1 which is the first region with thick silicide and a black portion S2 which is the second region with thin silicide are observed. Also, in the cross section of FIG. 7C, a central white portion S3 which is the first region with thick silicide is observed.

[0052] Thus, when the laser overlap was 67 / 50, the ratio of the second region 31 with thin silicide was about 14%, which was higher than when the laser overlap was 33 / 33. In this case, the adhesion between the ohmic electrode 21 and the Ti film 22 was good, and the resistance between the ohmic electrode 21 and the Ti film 22 was also good.

[0053] FIG. 8A is a diagram showing a surface image of the MoNi silicide layer at a laser overlap of 67 / 67. FIG. 8B is a diagram showing an enlarged image of the surface of the MoNi silicide layer at a laser overlap of 67 / 67. FIG. 8C is a diagram showing a cross-sectional image of the MoNi silicide layer at a laser overlap of 67 / 67. The photographing conditions of FIG. 8A to FIG. 8C are the same as those of FIG. 5A to FIG. 5C.

[0054] In the case of laser overlap of 67 / 67, the back surface of the silicon carbide semiconductor substrate is irradiated with laser light with an overlap of 67% in the x-direction scan, and with laser light with an overlap of 67% in the y-direction scan. Therefore, the laser light is irradiated at least six times, three times in the x-direction and three times in the y-direction. Therefore, an image similar to that in the cases of Figures 6A to 6C is obtained.

[0055] Thus, in the case of the laser overlap of 67 / 67, the ratio of the second region 31 with thin silicide was about 25%, which was higher than that of the laser overlap of 67 / 50. In this case, the adhesion between the ohmic electrode 21 and the Ti film 22 was good, and the resistance between the ohmic electrode 21 and the Ti film 22 was also good.

[0056] Fig. 9A is a diagram showing a surface image of the MoNi silicide layer with a laser overlap of 80 / 80. Fig. 9B is a diagram showing an enlarged image of the surface of the MoNi silicide layer with a laser overlap of 80 / 80. Fig. 9C is a diagram showing a cross-sectional image of the MoNi silicide layer with a laser overlap of 80 / 80. The photographing conditions of Figs. 9A to 9C are the same as those of Figs. 5A to 5C.

[0057] In the case of 80 / 80 laser overlap, the back surface of the silicon carbide semiconductor substrate is irradiated with laser light with an 80% overlap in the x-direction scan, and with an 80% overlap in the y-direction scan. Therefore, the laser light is irradiated at least four times in the x-direction. Therefore, in FIG. 9A, the boundary between the first region 30 with thick silicide and the second region 31 with thin silicide is not clear, but in the enlarged view of FIG. 9B, the proportion of the black portion S2, which is the second region 31 with thin silicide, is greater than in the cases of FIG. 6B to FIG. 8B. This is because the laser irradiation was excessive. Furthermore, comparing FIG. 9B with FIG. 8B, the second region 31 with thin silicide is larger in FIG. 9B.

[0058] Thus, with a laser overlap of 80 / 80, the proportion of the second region 31 with thin silicide was about 34%, which was higher than with a laser overlap of 67 / 67. In this case, the proportion of the second region 31 was too high, and the second region 31 was large, so the adhesion between the ohmic electrode 21 and the Ti film 22 was poor. In addition, the resistance between the ohmic electrode 21 and the Ti film 22 was also poor. This is thought to be because the adhesion between the second region 31 and the Ti film 22 was insufficient, and the resistance increased due to the formation of voids, etc.

[0059] Furthermore, although not shown, when the laser overlap was 67 / 80, the ratio of the second region 31 with thin silicide was between the laser overlap of 67 / 67 and the laser overlap of 80 / 80, and was about 30%. In this case, the adhesion between the ohmic electrode 21 and the Ti film 22 was good, and the resistance between the ohmic electrode 21 and the Ti film 22 was also good.

[0060] Moreover, although the above-mentioned FIGS. 5A to 9C show the results for the MoNi silicide layer, the same results are obtained for the TiNi silicide layer.

[0061] Fig. 10 is a graph showing the relationship between the laser overlap and the ratio of the second region with thin silicide. In Fig. 10, the horizontal axis shows the laser overlap in the x direction in %, and the vertical axis shows the ratio of the second region 31 with thin silicide in %, also in %. Fig. 10 is a graph of the results of Figs. 5A to 9C above, but also includes the results of 67 / 80, which are not shown in Figs. 5A to 9C.

[0062] In the second region 31 with thin silicide, the adhesion with the Ti film 22 is poor, so when the ratio of the area of ​​the second region 31 with thin silicide is high, the adhesion between the ohmic electrode 21 and the Ti film 22 is poor. Specifically, based on the results of the laser overlap of 67 / 67 and the laser overlap of 80 / 80, when the ratio of the area of ​​the second region 31 with thin silicide exceeds 30%, the adhesion between the ohmic electrode 21 and the Ti film 22 is poor. For this reason, the area ratio of the second region is preferably 0% or more and 30% or less. In addition, in the second region 31 with thin silicide, carbon is precipitated, so the resistance is low. If the second region 31 with thin silicide is too small, the resistance is high, so the area ratio of the second region is preferably 10% or more.

[0063] For this reason, in the embodiment, the ratio of the area of ​​the second region 31 to the area of ​​the ohmic electrode 21 is set to 10% or more and 30% or less. This improves the adhesion between the ohmic electrode 21 and the Ti film 22, and improves the resistance between the ohmic electrode 21 and the Ti film 22.

[0064] (Method of Manufacturing Silicon Carbide Semiconductor Device According to an Embodiment) Next, a method for manufacturing a silicon carbide semiconductor device according to an embodiment will be described. FIGS. 11 to 13 are cross-sectional views showing a state during manufacturing of a back electrode of a power semiconductor module according to an embodiment. First, a silicon carbide semiconductor element 20 is formed on a silicon carbide semiconductor substrate in the same manner as in the conventional method for manufacturing a silicon carbide semiconductor device. For example, when the silicon carbide semiconductor device is a MOSFET, a drift layer is formed on a silicon carbide semiconductor substrate by epitaxial growth, and a base region, a source region, and the like are formed on the front surface by injecting impurities by ion implantation. Next, a gate insulating film is selectively formed on the front surface by thermal oxidation or the like to form a MOS gate structure. Next, an upper electrode is formed. The state up to this point is shown in FIG. 11. In FIG. 11, the element structure and the upper electrode of the silicon carbide semiconductor element 20 are omitted.

[0065] Next, the back surface of the silicon carbide semiconductor element 20 is polished to a roughness (Ra) of 2 nm or more and less than 10 nm. If only rough polishing using relatively coarse abrasive grains is performed, the roughness (Ra) of the back surface will be 10 nm or more. Therefore, after the rough polishing, finish polishing using abrasive grains (#10000) that are about 5 times finer than the abrasive grains (#2000) used in the rough polishing can be performed to make the roughness (Ra) of the back surface 2 nm or more and less than 10 nm. By setting the roughness (Ra) at this level, a damage layer is formed on the back surface of the silicon carbide semiconductor element 20, and silicide is easily formed by laser annealing. Furthermore, if dry polishing is performed, the roughness (Ra) will be 0.5 nm or more and 2 nm or less, and no damage layer is formed on the back surface, making it difficult to form silicide by laser annealing, so dry polishing is not preferable.

[0066] Next, a Mo film 32 is deposited on the back surface of the semiconductor element 20. The Mo film 32 can be formed by, for example, sputtering deposition. Next, a Ni film 33 is deposited on the Mo film 32. The Ni film 33 can be formed by, for example, sputtering deposition. The state up to this point is shown in FIG. 12. When forming a TiNi silicide layer, a Ti film and a Ni film are deposited by the same method.

[0067] Here, FIG. 14A is a diagram showing cross-sectional images of the Mo film and Ni film before laser irradiation. FIG. 14B is a diagram showing cross-sectional images of the dotted line portion of FIG. 14A of the Mo film and Ni film before laser irradiation. FIG. 14A and FIG. 14B are SEM images of a cross section after depositing the Mo film 32 and the Ni film 33 on the back surface of the silicon carbide semiconductor element 20 with a back surface roughness (Ra) of 2 nm or more and less than 10 nm. As shown in FIG. 14B, a damage layer 34 is formed between the back surface of the semiconductor element 20 and the Mo film 32, making it easier for silicide to be formed by laser annealing. In addition, since this damage layer 34 does not exist in the image after laser annealing (for example, FIG. 9A and FIG. 9B), it is considered that it was relaxed during the silicide formation process of laser annealing.

[0068] Next, laser annealing is performed to form an ohmic electrode 21 made of nickel silicide and molybdenum carbide. The laser annealing is performed by using, for example, the third high frequency (355 nm) of a YAG laser as a laser, with a laser energy of 2.0 J / cm. 2 More than 3.0J / cm 2 The following is the same. In addition, the laser annealing is performed so that the same location is irradiated with the laser light two or three times. For example, when irradiating the laser light by scanning the silicon carbide semiconductor substrate, the overlap of the laser can be set to 33 / 33, 67 / 50, 67 / 67, or 67 / 80 so that the laser is irradiated with the same location two or three times. The state up to this point is shown in FIG. 13. Next, a thick film such as a laminated film in which, for example, a Ti film 22 and a Ni / Au film 23 are laminated in this order is formed by electron beam (EB) deposition or the like. In this manner, the power semiconductor chip 1 is formed.

[0069] The manufacturing method of the power semiconductor module of Fig. 1 is the same as that of the power semiconductor module according to the conventional technology. In the manufacturing method of the power semiconductor module, first, the power semiconductor chip 1 is mounted on the laminated substrate 12, and the power semiconductor chip 1 and the electrode pattern 4 provided on the insulating substrate 2 are electrically connected by the lead frame wiring 6 via the solder 24 (bonding material 3b). Next, these are bonded to the metal substrate 5 to assemble a laminated assembly consisting of the power semiconductor chip 1, the laminated substrate 12, and the metal substrate 5. A resin case 7 is bonded to this laminated assembly with an adhesive such as a silicone-based adhesive.

[0070] Next, the power semiconductor chip 1 and the metal terminal 9 are connected with metal wires 10, and the resin case 7 is filled with sealing resin 8, such as hard resin such as epoxy resin. This completes the power semiconductor module according to the embodiment shown in Fig. 1. If the sealing resin 8 is not hard resin such as epoxy resin, a lid is attached to prevent the sealing resin 8 from leaking out.

[0071] As described above, according to the method for manufacturing a silicon carbide semiconductor device of the embodiment, the ratio of the area of ​​the second region where the silicide is thin in the ohmic electrode is 10% or more and 30% or less. This improves the adhesion between the ohmic electrode and the Ti film, and improves the resistance between the ohmic electrode and the Ti film. Furthermore, before forming the ohmic electrode, the rear surface is polished to a roughness (Ra) of the rear surface of 2 nm or more and less than 10 nm. This forms a damaged layer on the rear surface, making it easier for silicide to be formed by laser annealing.

[0072] The present invention can be modified in various ways without departing from the spirit of the present invention, and in each of the above-described embodiments, for example, the dimensions and impurity concentrations of each part are set in various ways according to the required specifications, etc. Furthermore, the embodiments are applicable to silicon carbide semiconductor devices such as MOSFETs and diodes. [Industrial Applicability]

[0073] INDUSTRIAL APPLICABILITY As described above, the silicon carbide semiconductor device and manufacturing method thereof according to the present invention are useful for power semiconductor devices used in power conversion devices such as inverters, power supply devices for various industrial machines, and automobile igniters. [Explanation of symbols]

[0074] 1. Power semiconductor chip 2. Insulating substrate 3a, 3b, 3c Bonding material 4 Electrode Pattern 5 Metal Substrate 6 Lead frame wiring 7 Resin case 8 Sealing resin 9 Metal terminal 10 Metal Wire 12. Laminated substrate 20 Silicon carbide semiconductor element 21 Ohmic electrode 22Ti film 23 Ni / Au film 24 Solder 30 Thick silicide first region 31 Second region with thin silicide 32 Mo film 33 Ni film 34 Damage Layer

Claims

1. A deposition step of depositing a first film containing nickel on a back surface side of the silicon carbide semiconductor substrate; an electrode forming step of forming an electrode including a plurality of nickel silicide thick portions having side surfaces facing each other on the back surface side after the depositing step; a protective film forming step of forming a protective film containing titanium or molybdenum on the back surface side after the electrode forming step;

2. 2 . The method for manufacturing a silicon carbide semiconductor device according to claim 1 , wherein a thin nickel silicide film portion is formed around a thick nickel silicide film portion in the electrode forming step.

3. 3 . The method for manufacturing a silicon carbide semiconductor device according to claim 1 , wherein the protective film is in contact with the side surfaces of a plurality of the thickness portions.

4. 2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, further comprising, prior to said depositing step, a polishing step of polishing a back surface of said silicon carbide semiconductor substrate to a roughness (Ra) of 2 nm or more and less than 10 nm.

5. 2. The method for manufacturing a silicon carbide semiconductor device according to claim 1, wherein the protective film forming step forms an ohmic electrode made of nickel silicide and titanium carbide or nickel silicide and molybdenum carbide by laser annealing.

6. 6. The method for manufacturing a silicon carbide semiconductor device according to claim 5, wherein the nickel silicide thick film portion and the nickel silicide thin film portion are formed by adjusting overlapping of laser light in the laser annealing, and a ratio of an area of ​​the thin film portion to an area of ​​the thickness portion and the thin film portion is formed to be 10% or more and 30% or less.

7. 7. The method for manufacturing a silicon carbide semiconductor device according to claim 1, further comprising, after the protective film forming step, a second deposition step of depositing a second film containing nickel on the back surface side.

8. a power semiconductor chip that is a silicon carbide semiconductor element; an electrode provided on a rear surface of the power semiconductor chip, the electrode including a plurality of nickel silicide thick portions having side surfaces facing each other; a protective film containing titanium or molybdenum and contacting the side surfaces of the plurality of thick film portions; a film containing nickel provided on a rear surface of the protective film; A silicon carbide semiconductor device comprising:

9. 9. The silicon carbide semiconductor device according to claim 8, wherein the electrode includes a thin nickel silicide film portion around a thick nickel silicide film portion.

10. 9. The silicon carbide semiconductor device according to claim 8, wherein the titanium or molybdenum of the protective film includes titanium carbide or molybdenum carbide.

11. 9. The silicon carbide semiconductor device according to claim 8, wherein a ratio of an area of ​​the thin film portion to an area of ​​the thick film portion and an area of ​​the thin film portion is 10% or more and 30% or less.

Citation Information

Patent Citations

  • Silicon carbide semiconductor element and manufacturing method of the same

    JP2013211467A

  • Silicon carbide semiconductor device and manufacturing method of the same

    JP2014204026A

  • Silicon carbide semiconductor device and manufacturing method of the same

    JP2021064672A

  • Silicon carbide semiconductor device and manufacturing method for silicon carbide semiconductor device

    JP2021111686A

  • Method of manufacturing silicon carbide semiconductor device

    JP2023181546A