Light-emitting device

Abstract

To provide a semiconductor device that can detect small current with high accuracy.SOLUTION: A semiconductor device includes a first circuit, a second circuit, a first transistor, and a second transistor. To the first circuit, a first analog signal is input through the first transistor. To the first circuit, a second analog signal is input through the second transistor. The first analog signal includes a first current value. The second analog signal includes a second current value. The first circuit converts the first analog signal into a first digital signal. The second circuit generates a second digital signal in accordance with the first digital signal. The first circuit converts the second analog signal into a third digital signal in accordance with the second digital signal. The first or second transistor includes an oxide semiconductor in a channel.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device, a display device, or an electronic device. The embodiment includes, for example, a circuit using a semiconductor, a processing circuit, a memory circuit, a driving method thereof, or the like. The present invention relates to a method for producing these. [Background technology]

[0002] There are various circuit configurations for the pixels of active matrix display devices that use light-emitting elements. Generally, a pixel includes a light emitting element, a transistor that controls the input of a video signal to the pixel, and a pixel. A transistor that controls the current supplied to the light-emitting element (drive transistor) The drain current flowing through the driving transistor is supplied to the light emitting element. By supplying a current to the light emitting element, the light emitting element emits light at a brightness according to the value of the drain current. The drain current of the transistor is controlled by the voltage of the video signal.

[0003] Therefore, the electrical characteristics (threshold voltage) of the driving transistors between the multiple pixels that make up the screen of the display device If there is variation in the pixel capacitance (value voltage, field effect mobility, etc.), the pixel capacitance may vary even if the same voltage video signal is supplied. This causes variations in the brightness of the optical elements. Electrical characteristics of the driving transistors among multiple pixels The variation in the brightness is one of the causes of deterioration in the display quality of a display device.

[0004] On the other hand, active matrix display devices are being promoted to have more pixels in order to achieve higher resolution. A single display device has hundreds of thousands to tens of millions of pixels. For example, the number of pixels is If the resolution is Full-HD, then 1,366 x 768 x 3 (RGB) = 1,049.0 88, and for 8k4k (Super Hi-Vision), it is 7,680 x 4,320 x 3 (RGB) = 33,177,600. The electrical characteristics of the driving transistors are It is very difficult to completely match the electrical characteristics of the driving transistor. It has been proposed to correct the luminance of a light-emitting element by using the above-mentioned technique (for example, Patent Document 1).

[0005] In order to accommodate the increasing number of gradations and high definition of the display unit, the driver circuit of the display device, especially the source A dedicated IC (driver IC) is used for the switch driver circuit (see, for example, Patent Document 1). See 2.

[0006] The pixel circuits or driver circuits of the display device use transistors (field effect transistors) that use semiconductor thin films. The transistors are called field effect transistors (FETs) or thin film transistors (TFTs). In recent years, oxide semiconductors have been used as semiconductor thin films that can be applied to these transistors. This is attracting attention (Patent Document 3). [Prior art documents] [Patent documents]

[0007] [Patent Document 1] JP 2009-265459 A [Patent Document 2] JP 2007-286525 A [Patent Document 3] JP 2007-123861 A Summary of the Invention [Problem to be solved by the invention]

[0008] The circuit for acquiring the electrical characteristics of the pixel's driving transistor is It handles very small current signals of about 100 nA. Therefore, when verifying the operation of this circuit, It is desirable to verify the above using such a minute current signal.

[0009] In view of the above, one embodiment of the present invention provides a semiconductor device capable of detecting a minute current with high accuracy. Another object of one embodiment of the present invention is to provide a power supply that can supply a small current with low power consumption. Another object of the present invention is to provide a semiconductor device capable of detecting a signal by a signal. An object of one embodiment is to provide a novel semiconductor device or a method for operating the novel semiconductor device. It shall be one of the following.

[0010] In addition, the description of a plurality of problems does not preclude the existence of each problem. The embodiment does not necessarily have to solve all of these problems. Also, problems other than those listed may not be solved by the specification. These problems will become apparent from the description of the present invention, drawings, claims, etc. This could be a form of challenge for the Ming. [Means for solving the problem]

[0011] One embodiment of the present invention is a semiconductor memory device including a first circuit, a second circuit, a first transistor, and a second transistor. The first circuit is a semiconductor device having a first transistor. The first circuit receives an analog signal from the second transistor. A first analog signal is input. The first analog signal includes a value of the first current. A second analog The signal includes a value of the second current. The first circuit converts the first analog signal into a first digital signal. The second circuit generates a second digital signal in response to the first digital signal. The first circuit converts the second analog signal into a third digital signal in response to the second digital signal. The first or second transistor has a channel formation region including an oxide semiconductor. include.

[0012] In the above embodiment, the second current is a current flowing through a pixel of a display device.

[0013] In the above embodiment, the first circuit includes an integrating circuit, a comparator, and a counter. It is preferable.

[0014] In the above aspect, the second circuit preferably includes a successive approximation register.

[0015] In the above embodiment, the oxide semiconductor is selected from the group consisting of indium, zinc, M (wherein M is Al, Ga, Ge, Y , Zr, Sn, La, Ce or Hf).

[0016] One embodiment of the present invention is an electronic device including the semiconductor device described in the above embodiment and a display device. do.

[0017] In this specification, the ordinal numbers "first," "second," and "third" are used to refer to the mixture of elements. In order to avoid confusion, the following items may be added. In such cases, the number of items is not limited, and the order is not specified. It is not limiting.

[0018] In this specification, a semiconductor device is a device that utilizes semiconductor characteristics and is a semiconductor element ( A semiconductor is a circuit that contains a semiconductor element (such as a transistor or diode) or a device that has such a circuit. This refers to any device that can function by utilizing the characteristics of the device. For example, an integrated circuit, The chip is an example of a semiconductor device. In some cases, electronic devices and the like are themselves semiconductor devices or include semiconductor devices.

[0019] A transistor has three terminals called the gate, source, and drain. A source is a node that functions as a control node that controls the conductive state of a transistor. The two input / output nodes, which function as the source or drain, are determined by the type of transistor and each terminal. Depending on the level of the applied potential, one becomes the source and the other becomes the drain. In this specification, the terms source and drain can be used interchangeably. In addition, in this specification and the like, the two terminals other than the gate may be referred to as the first terminal and the second terminal. There is a match.

[0020] A node can be a terminal, a wiring, an electrode, a conductor, or an impurity region depending on the circuit configuration, device structure, etc. In addition, the terminals and the like can be referred to as nodes. .

[0021] A voltage is the voltage between a certain potential and a reference potential (e.g., ground potential (GND) or source potential). In many cases, it refers to the potential difference. Therefore, it is possible to say "voltage" as "electric potential." Therefore, even if it is described as ground potential, it does not necessarily mean 0 It may not mean V.

[0022] In this specification, the words "film" and "layer" may be used interchangeably. These terms can be used interchangeably depending on the situation. For example, the term "conductive layer" is used In some cases, it may be possible to change the term "insulating film" to "conductive film". In some cases, it may be possible to change the term "insulating layer" to the term "insulating layer."

[0023] The arrangement of each circuit block in the drawings is for the purpose of explanation only and may differ from the actual arrangement. Even if a diagram shows that different circuit blocks realize different functions, in the actual circuit or area, In some cases, the same circuit block may be provided to realize different functions. The functions of each circuit block in the drawings are specified for the purpose of explanation, and are not included in a single circuit. Even if shown as a circuit block, in the actual circuit or area, it is performed by one circuit block. In some cases, processing is provided in multiple circuit blocks.

[0024] In addition, when it is explicitly stated in this specification that X and Y are connected, is when X and Y are electrically connected and when X and Y are functionally connected. and the case where X and Y are directly connected are considered to be disclosed in this specification and the like. Therefore, the present invention is not limited to a specific connection relationship, for example, a connection relationship shown in a drawing or a sentence. Any connections other than those shown in the drawings or text shall be deemed to be described in the drawings or text. X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layers, etc.). (etc.).

[0025] In addition, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the scale is not necessarily limited to that shown in the drawings. The above is a formula, and is not limited to the shapes or values ​​shown in the drawings. For example, Variations in signals, voltages, or currents due to timing differences, or variations in signals, voltages, Or, it is possible to include current variation. Effect of the Invention

[0026] According to one embodiment of the present invention, a semiconductor device capable of detecting a minute current with high accuracy is provided. According to one embodiment of the present invention, it is possible to detect a minute current with low power consumption. It is possible to provide a semiconductor device capable of producing a high-quality image. As a result, it is possible to provide a novel semiconductor device or a method for operating the novel semiconductor device. do.

[0027] In addition, the description of a plurality of effects does not preclude the existence of other effects. The embodiment does not necessarily have to have all of the effects exemplified. Problems, advantages, and novel features other than those mentioned above will become apparent from the description and drawings of this specification. The information will become clear from the analysis. [Brief description of the drawings]

[0028] [Figure 1] FIG. 1 is a circuit diagram illustrating a configuration example of a semiconductor device. [Diagram 2] FIG. 1 is a circuit diagram illustrating a configuration example of a semiconductor device. [Diagram 3] 4 is a timing chart showing an example of the operation of the semiconductor device. [Figure 4] FIG. 1 is a circuit diagram illustrating a configuration example of a semiconductor device. [Diagram 5] FIG. 11 is a flow diagram illustrating an example of the operation of a semiconductor device. [Figure 6] FIG. 1 is a circuit diagram illustrating a configuration example of a semiconductor device. [Figure 7] FIG. 1 is a circuit block diagram showing a configuration example of a display device. [Figure 8] FIG. 1 is an exploded perspective view showing a configuration example of a display device. [Figure 9] FIG. 2 is a plan view showing a configuration example of a display panel. [Figure 10] (A) is a circuit diagram showing an example of the configuration of a pixel, (B) is a timing chart showing an example of the operation of the same. [Figure 11] FIG. 4 is a circuit diagram showing a configuration example of a monitor circuit. [Figure 12] FIG. 2 is a cross-sectional view showing a configuration example of a display panel. [Figure 13] 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor. [Figure 14] 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor. [Figure 15] FIG. 1 illustrates an example of the configuration of an electronic device. [Figure 16] FIG. 1 illustrates an example of the configuration of an electronic device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] Hereinafter, an embodiment of the present invention will be described. However, one embodiment of the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various modifications and variations in form and detail may be made without departing from the spirit and scope of the present invention. It will be readily apparent to those skilled in the art that modifications may be made thereto. Accordingly, one aspect of the present invention is The present invention is not to be construed as being limited to the description of the following embodiment.

[0030] The following embodiments can be combined as appropriate. In the case where multiple configuration examples are shown, the configuration examples can be combined with each other as appropriate.

[0031] In the drawings, elements that are the same or have similar functions, elements of the same material, or Elements formed at the same time may be given the same reference numerals, and repeated explanations thereof will be omitted. There may be cases where this occurs.

[0032] In addition, when the same symbols are used, especially when it is necessary to distinguish among them, the symbols should be marked with " When adding identification symbols such as "_1", "_2", "[n]", "[m, n]", etc. There is a match.

[0033] (Embodiment 1) In this embodiment, a semiconductor device which is one embodiment of the present invention will be described with reference to FIGS. Make a statement.

[0034] <<Configuration Example 1 of Semiconductor Device>> FIG. 1 is a circuit diagram showing a configuration example of a semiconductor device 10. The semiconductor device 10 includes a plurality of transistors. A transistor M1 (M1[1] to M1[N], N is a natural number equal to or greater than 1) and a plurality of transistors M2 (M2[1] to M2[N]), an inverter 42, a plurality of ANDs 41, and a plurality of The circuit IF_CONV (IF_CONV[1] to IF_CONV[N]) and the circuit DC CS (Digital Calibration Control System) and A plurality of TRIBUF (tri-state buffer circuits) 43 and a circuit SR (shift register ) and.

[0035] In the following, the transistors M1 and M2 are n-channel transistors. However, one aspect of the present invention is that the transistors M1 and M2 are p-channel The present invention can also be applied to the case of a gate type transistor.

[0036] Signal I shown in Figure 1 MON (I MON [1]~I MON [N]) flows into the pixels of the display device. The semiconductor device 10 includes the value of the current (analog signal) that is being transmitted as information. I MON into a digital signal and output it as the signal CMOUT.

[0037] Also, the signal I shown in Fig. TEST The reference current value (analog signal) is used as information. The semiconductor device 10 includes this signal I TEST Using this, the signal I MON Signal from It has a function to calibrate errors that occur when generating CMOUT.

[0038] Signal I TEST is input to the circuit IF_CONV via the transistor M1. Signal I MON The signal is input to the circuit IF_CONV via the transistor M2. No. I MON , I TEST This is not just the current flowing from the external pixels into the circuit IF_CONV. It is also possible to handle the current flowing from the circuit IF_CONV to an external pixel.

[0039] The signal input to the circuit IF_CONV is switched by turning on (conducting) transistors M1 and M2. This can be done by controlling the on / off state of the transistors M1 and M2. The on / off control of AND41 is performed by the signal TEST. is applied to the gate of transistor M1 via inverter 42, and Given to the gate of M2.

[0040] The circuit IF_CONV converts the input analog signal into a digital signal, OUT (signal OUT_1 to OUT_N) and output the converted signal.

[0041] The circuit SR is a shift register, and one of the signals OUT_1 to OUT_N is The signal SP and the signal SCLK shown in FIG. , which represent the pulse signal and clock signal input to the circuit SR.

[0042] The circuit SR outputs a plurality of signals SEL (SEL[1] to SEL[N]). When one of the signals L[1] to SEL[N] becomes a high level (hereinafter, H level), The remaining N-1 signals go to low level (L level). L puts TRIBUF43 into a conductive state. On the other hand, the signal SEL at the L level RIBUF43 is set to high impedance. In this way, the signal selected for the circuit SR is The signal OUT is output to the outside as a signal CMOUT.

[0043] For example, consider the case where the signal SEL[1] and the signal TEST are at the H level. The gate of the transistor M1[1] is supplied with a high-level potential, and the transistor M1[1 On the other hand, the gates of the transistors M2[1] to M2[N] are supplied with an L level The potential of the signal S is applied to the transistors M2[1] to M2[N], turning them off. EL[2] through SEL[N] are at the L level, and transistors M1[2] through M1[N] As a result, only transistor M1[1] is turned on, and the signal I TEST but , which is input to the circuit IF_CONV[1].

[0044] For example, consider the case where the signal SEL[1] goes to H level and the signal TEST goes to L level. At this time, an L-level potential is applied to the gates of the transistors M1[1] to M1[N]. Therefore, transistors M1[1] to M[N] are turned off. A high-level potential is applied to the gates of transistors M2[1] to M2[N]. 〜M2[N] are turned on. As a result, the signal I MON [1]~I MON [N] is the The signals SEL are all at the L level except for the signal SEL[1]. Therefore, only the signal OUT_1 is output to the outside as the signal CMOUT.

[0045] The circuit DCCS has the function of calibrating the conversion function of the circuit IF_CONV described above. When TEST goes high, the signal I TEST is input to the circuit IF_CONV, The signal OUT is input to the circuit DCCS.

[0046] Also, the circuit DCCS is connected to the signal I TEST is ideally converted to a digital signal. The DCCS circuit compares the signal OUT with the signal X and generates the The amount of calibration of the signal OUT is transmitted to the circuit IF_CONV based on the signal deviation. V is the signal I according to the determined calibration quantity. MON Converts the signal I into the signal OUT. MON is finally output to the outside as a signal CMOUT.

[0047] In addition to the above-mentioned signals, the semiconductor device 10 also receives signals CLK1 and CLK2 from the outside. These signals are input to the circuit IF_CONV and the circuit DCCS, These are used to operate each circuit.

[0048] In this embodiment, an example is shown in which 8-bit data is handled, but the present invention is not limited to this. In addition, one aspect of the present invention is to handle data of any k bits (k is a natural number equal to or greater than 1). It is possible.

[0049] In the semiconductor device 10, the transistor M1 is preferably a transistor with a small off-state current. The off-state current is the leakage current that flows when a transistor is off. Then, in an n-channel transistor, a voltage less than the threshold is applied between the gate and source. When a voltage is applied to the gate and source of a p-channel transistor (or when a threshold voltage is applied to the gate and source of a p-channel transistor) This is the leakage current that flows between the source and drain when a voltage greater than the It represents:

[0050] For example, transistor M1[1] is on, and transistors M1[2] to M1[N] are off. Consider the case where transistors M1[2] to M1[N] are in parallel with transistor M1[1]. Since the transistors M1[2] to M1[N] are connected in a row, the off-state current of the transistors M1[2] to M1[N] is large. For example, signal I TEST The current flows to the outside via transistors M1[2] to M1[N]. It leaks out. Signal I TEST It handles very small currents of 1 nA to several hundred nA. Therefore, even a small leakage current has a large effect. [1] Signal I TEST The current is not conducted correctly and the calibration of the circuit DCCS is not performed correctly. I can't.

[0051] Therefore, by using a transistor with a small off-state current as the transistor M1, The device 10 receives the signal I TEST Therefore, it is possible to detect the current value with high accuracy.

[0052] In addition, by using a transistor with a low off-state current as the transistor M1, 10. Low power consumption for signal I TEST It is therefore possible to detect the current value.

[0053] The transistor M1 has a wider band gap than silicon in the channel formation region and is an intrinsic A semiconductor material having a carrier density smaller than that of silicon may be used. For example, An oxide semiconductor is preferably used as the insulating film. The transistor has an extremely small off-state current.

[0054] In the semiconductor device 10, for example, elements other than the transistor M1 are made of, for example, Si or A semiconductor substrate such as Ge is formed on the substrate, and an oxide semiconductor transistor M1 is formed on the substrate. It may be formed of a transistor.

[0055] In addition to the transistor M1, the transistor M2 is also a transistor with a small off-state current. It is preferable to apply the transistor M2 to the off-state of the transistor M1. By reducing the current, the semiconductor device 10 can more accurately detect the signal I MON and signal I TE ST In addition, the semiconductor device 10 has a smaller power consumption. Signal I by force MON and signal I TEST It is therefore possible to detect the current value.

[0056] In that case, for example, the elements other than the transistors M1 and M2 are made of, for example, Si or The transistor M1 and the transistor M2 are formed on a semiconductor substrate such as SiGe. The transistor M2 may be formed of an oxide semiconductor transistor.

[0057] Note that the oxide semiconductor transistor will be described in detail in Embodiment 3 to be described later. .

[0058] <Example of circuit IF_CONV configuration> Next, a specific example of the configuration of the circuit IF_CONV shown in FIG. To clarify the above, we will first explain the basic operation of the circuit IF_CONV. The case where F_CONV is connected to the circuit DCCS and has a calibration function will be explained later. cormorant.

[0059] FIG. 2 shows an example of a circuit diagram of the circuit IF_CONV. The circuit IF_CONV includes a latch 57 and The integrated circuit 53 includes a counter 58, a comparator 59, and an integrating circuit 53. The circuit 53 includes an operational amplifier 50 , a capacitive element 51 , and a switch 52 .

[0060] The circuit IF_CONV receives the signals CLK1 and CLK2 from the outside. The signals CLK1 and CLK2 have different frequencies, with the signal CLK1 having a higher frequency than the signal CLK2. The signal CLK1 is input to a counter 58, and the signal CLK2 is , are input to switch 52 , counter 58 and latch 57 .

[0061] One electrode of the capacitance element 51 is electrically connected to the inverting input terminal (-) of the operational amplifier 50. The other electrode of the capacitive element 51 is electrically connected to the output terminal of the operational amplifier 50 .

[0062] The switch 52 is provided between one electrode of the capacitor element 51 and the other electrode of the capacitor element 51. The switch 52 has a function of switching on and off in accordance with the signal CLK2. The switch 52 may be made of a transistor.

[0063] The inverting input terminal of the operational amplifier 50 receives the signal I MON or signal I TEST is entered, and A potential VREF1 is input to the non-inverting input terminal (+) of the operational amplifier 50. The output terminal outputs a signal OUT_OP.

[0064] The operational amplifier 50 is an amplifier circuit that amplifies the potential difference between the inverting input terminal and the non-inverting input terminal. It has the function of outputting.

[0065] The inverting input terminal (-) of the comparator 59 is electrically connected to the output terminal of the operational amplifier 50. The signal OUT_OP is input to the inverting input terminal of the comparator 59. The potential VREF2 is input to the non-inverting input terminal (+) of the comparator 59. The output terminal 59 outputs the signal OUT_COMP.

[0066] The comparator 59 has a first potential applied to a non-inverting input terminal and a second potential applied to an inverting input terminal. If the first potential is higher than the second potential, a high-level potential is set. When the first potential is lower than the second potential, the L-level potential is output. do.

[0067] The counter 58 counts the number of times the potential of the signal CLK1 switches from H level to L level (or It has a function to count the number of times the signal switches from L level to H level. The counter 58 has a function of outputting a count (number of counters) as a signal OUT_COUNT. It contains a latch circuit inside, and when the potential of the signal OUT_COMP changes from L level to H level, When the counter 58 receives the signal CLK2, it has a function of holding the previous count. When this is given, the count number of the signal OUT_COUNT is initialized to 0. The number of times the potential of the signal CLK1 switches from H level to L level (or the number of L levels) The number of times that the clock signal switches from low to high is sometimes called the number of pulses of the signal CLK1.

[0068] When the potential of the signal CLK2 changes from the L level to the H level, the latch 57 latches the previous signal O It has the function of storing UT_COUNT and outputting it as a signal OUT.

[0069] Next, an example of the operation of the circuit IF_CONV will be explained using the timing chart shown in Figure 3. Reveal.

[0070] The timing chart shown in FIG. 3 includes signals CLK1, CLK2, OUT_OP, and 13 represents the potential changes of the signals OUT_COMP, OUT_COUNT, and OUT. Times T1 to T5 shown in FIG. 3 are added for the purpose of explaining the timing of the operations.

[0071] As described above, the signals OUT_COUNT and OUT indicate the count number of the signal CLK1. Figure 3 shows an example of these counts expressed as 8-bit hexadecimal numbers.

[0072] First, at time T1, the signal CLK2 changes from L level to H level. Then, the switch 52 is turned on and the capacitive element 51 starts discharging. P is initialized to a potential VREF1.

[0073] Also, at time T1, the counter 58 is reset and the signal OUT_COUNT is 0 At the same time, the latch 57 stores the previous signal OUT_COUNT and the signal O In FIG. 3, the data of the signal OUT_COUNT before time T1 (5E ) is output as a signal OUT after time T1.

[0074] Next, at time T2, the signal CLK2 changes from H level to L level. The switch 52 is turned off, the capacitance element 51 starts to charge, and the integration circuit 53 starts to integrate. Signal I MON or signal I TEST The potential obtained by integrating the voltage over time is output as the signal OUT_OP. The potential of the signal OUT_OP gradually decreases.

[0075] At time T2, the counter 58 detects that the potential of the signal CLK1 has changed from the H level to the L level. Start counting the number of changes (or the number of changes from L level to H level) and is output as the signal OUT_COUNT.

[0076] Next, at time T3, the potential of the signal OUT_OP becomes equal to the potential VREF2, and the signal The potential of OUT_COMP changes from L level to H level. At this time, the counter 58 The latch circuit included in the ) is held as the signal OUT_COUNT.

[0077] Thereafter, the potential of the signal OUT_OP continues to decrease and reaches the potential GND.

[0078] Next, at time T4, similarly to time T1, the potential of the signal CLK2 changes from the L level to the H level. The signal OUT_OP then changes to the potential VRE It is initialized to F1.

[0079] At time T4, the potential of the signal OUT_COMP changes from H level to L level. At the same time, the signal CLK2 causes the signal OU T_COUNT is initialized to 00. The data of the previous signal OUT_COUNT (in Figure 3) 5B) is output as the signal OUT. At this time, the signal OUT is the signal IMON or Signal I TEST That is, the signal I MON or signal I TE ST is converted into a digital signal.

[0080] After that, by repeating the above operation, the signal I MON or signal I TEST to signal OUT can be exchanged.

[0081] <Example of IF_CONV circuit with calibration function> Next, we will explain the configuration example where the circuit DCCS with the calibration function is added to the circuit IF_CONV. The explanation will be given with reference to FIG.

[0082] The circuit IF_CONV shown in FIG. 4 is connected in parallel to the circuit IF_CONV shown in FIG. A plurality of capacitance elements C (C[0] to C[7]) and a plurality of capacitance elements C for controlling electrical connections A number of switches S1 (S1[0] to S1[7]) and switches S2 (S2[0] to S2[7]) [7]) and a latch 64 are added. The circuit IF_CONV shown in Figure 4 is The counter 58 and the latch 57 of the circuit IF_CONV shown in FIG. 2 are combined into one circuit 63. It is stopped.

[0083] The DCCS circuit in FIG. 4 includes a counter 65, a comparator 66, and a SAR (Success The National Instruments has a National Instruments Directive Approximation Register (NRT)67.

[0084] The counter 65 has a function of receiving the signal CLK1 and generating a signal X. The signal X is , signal I TEST is the digital signal ideally converted by the circuit IF_CONV. .

[0085] Comparator 66 compares signal Y with signal X and has a function of outputting the comparison result in a binary value of "1" (H level) or " 0" (L level). For example, it is assumed that when X ≥ Y, "1" is output, and when X < Y, "0" is output.

[0086] SAR 67 is a successive approximation register. SAR 67 has a function of generating signal Z in response to the comparison result in comparator 66.

[0087] Latch 64 has a function of temporarily holding signal Z. When signals TEST and SEL become H level, the latch is released and signal Z is passed to the integration circuit path as signal CA_REG.

[0088] Circuit IF_CONV causes an error in output signal OUT due to variations in the capacitance elements included in the integration circuit. Circuit DCCS has a function of supplying signal Z for calibrating such an error to circuit IF_CONV.

[0089] The procedure for circuits IF_CONV and DCCS to calibrate signals will be described below with reference to FIG. 5. Note that the following description simplifies the actual circuit operation to some extent for clarity, and one aspect of the present invention is not limited thereto. For example, FIG. 5 shows the procedure for processing a 6-bit signal, but one aspect of the present invention can be applied to the case of handling data of any k bits (k is a natural number of 1 or more). First, when signal TEST becomes H level, signal I is converted to signal OUT via circuit IF_CONV.

[0090] TEST ​​​​​​​​​​​

[0091] The signal OUT is input into the circuit DCCS as the signal Y via the TRIBUF43.

[0092] The comparator 66 compares the signal X and the signal Y, and passes the comparison result to the SAR67. For example when X = 45 and Y = 32, X ≥ Y, and it outputs "1" (Figure 5 Step1).

[0093] Next, the SAR67 receives the comparison result of the comparator 66 and determines the signal Z. For example, let Z = 16.

[0094] The latch 64 receives the signal Z and passes it to the integrating circuit as the signal CA_REG.

[0095] The integrating circuit determines the conduction / non-conduction of the switches S1 and S2 according to the signal CA_REG, and changes the value of the added capacitance. As a result, the circuit IF_CONV is updated.

[0096] Through the updated circuit IF_CONV, again, the signal I TEST is converted into a digital signal and input into the comparator 66 as the signal Y. At this time, the signal Y is 32 + 16 = 4 8.

[0097] X = 45, Y = 48, X < Y, and the comparator 66 outputs "0" (Figure 5 Step2).

[0098] The SAR67 receives the comparison result of the comparator and rejects the previously given Z = 16. Next, for example, let Z = 8.

[0099] Through the same procedure as above, the signal Y is input into the comparator 66 again. At this time, Y = 3 2 + 8 = 40.

[0100] X = 45, Y = 40, X ≥ Y, and the comparator 66 outputs "1" (Figure 5 Step3).

[0101] SAR67 receives the comparison result of the comparator 66 and adopts the previous Z = 8. Next let's say Z = 8 + 4 = 12, for example.

[0102] Through the same procedure as above, the signal Y is input to the comparator 66 again. At this time, Y = 3 2 + 8 + 4 = 44.

[0103] X = 45, Y = 44, X ≥ Y, and the comparator 66 outputs "1" (Figure 5 Step4).

[0104] SAR67 receives the comparison result of the comparator 66 and adopts the previous Z = 8 + 4 . Next, let's say Z = 8 + 4 + 2 = 14, for example.

[0105] Through the same procedure as above, the signal Y is input to the comparator 66 again. At this time, Y = 3 2 + 8 + 4 + 2 = 46.

[0106] X = 45, Y = 46, X < Y, and the comparator 66 outputs "0" (Figure 5 Step5).

[0107] SAR67 receives the comparison result of the comparator 66 and rejects the previous Z = 8 + 4 + 2 . Next, let's say Z = 8 + 4 + 1 = 13, for example.

[0108] Through the same procedure as above, the signal Y is input to the comparator 66 again. At this time, Y = 3 2 + 8 + 4 + 1 = 45.

[0109] X = 45, Y = 45, X ≥ Y, and the comparator 66 outputs "1" (Figure 5 Step 6).

[0110] SAR67 uses the result of the comparison by comparator 66 and adopts Z=8+4+1. do.

[0111] By the above procedure, the circuit DCCS generates a signal Z (Z=8+4 +1=13).

[0112] After signal Z is determined, signal TEST goes to L level and signal I MON The circuit IF_CO At this time, the latch 64 is in a state where it holds the signal CA_REG. , the circuit IF_CONV remains in a calibrated state.

[0113] Finally, the calibrated signal OUT is output to the outside as a signal CMOUT.

[0114] As described above, by adopting the above-mentioned configuration, the semiconductor device 10 can detect a minute current with high accuracy. In addition, the semiconductor device 10 can detect a minute current with little power consumption. It becomes Noh.

[0115] <<Configuration Example 2 of Semiconductor Device>> FIG. 6 shows an example of the configuration of a semiconductor device 20 according to an embodiment of the present invention.

[0116] In the semiconductor device 10 of FIG. 1, there are a plurality of circuits IF_CONV. MON [1] ~I MON [N] is input to the corresponding circuit IF_CONV. In the semiconductor device 20 of FIG. MON [1]~I MON [N] is one circuit This is input into IF_CONV.

[0117] By adopting the configuration shown in FIG. 6, the semiconductor device 20 can reduce the area occupied by the circuit. This makes it possible to make chairs smaller.

[0118] In addition, by adopting the configuration as shown in FIG. 6, the semiconductor device 20 can It is possible to reduce the influence of fluctuations.

[0119] In the semiconductor device 20, the transistor M2 is preferably a transistor with a small off-state current. For example, transistor M2[1] is on, transistors M2[2] to M2[N] are off. Consider the case where transistors M2[2] to M2[N] are the same as transistor M2[1]. Since the transistors M2[2] to M2[N] are connected in parallel, the off-state current of the transistors M2[2] to M2[N] is large. If so, signal I MON The current of [1] passes through transistors M2[2] to M2[N] It leaks out to the outside. Signal I MON The current is very small, ranging from 1 nA to several hundred nA. As a result, the semiconductor device 20 is highly reliable. No. I MON Therefore, the current value cannot be detected correctly.

[0120] Therefore, by using a transistor with a small off-state current as the transistor M2, The device 20 receives the signal I MON Therefore, it is possible to detect the current value with high accuracy.

[0121] In addition, by using a transistor with a low off-state current as the transistor M2, 20 is a low power consumption signal I MON It is therefore possible to detect the current value.

[0122] The transistor M2 has a wider band gap than silicon in the channel formation region and is an intrinsic A semiconductor material having a carrier density lower than that of silicon may be used. For example, An oxide semiconductor is preferably used as the channel formation region. The off-state current of the transistor is extremely small.

[0123] In the semiconductor device 20, for example, elements other than the transistor M2 are made of, for example, Si or A semiconductor substrate such as Ge is formed on the substrate, and an oxide semiconductor transistor M2 is formed on the substrate. It may be formed of a transistor.

[0124] In addition to the transistor M2, the transistor M1 also has a transistor with a small off-state current. It is preferable to use transistors M1 and M2. By reducing the off-current of the signal I MON and signals I TEST In addition, the semiconductor device 20 can detect a current value of less than 1000 V. Power consumption in signal I MON and signal I TEST It is therefore possible to detect the current value.

[0125] In that case, for example, the elements other than the transistors M1 and M2 are made of, for example, Si or The transistor M1 and the transistor M2 are formed on a semiconductor substrate such as SiGe. The transistor M2 may be formed of an oxide semiconductor transistor.

[0126] As described above, by adopting the above-mentioned configuration, the semiconductor device 20 can detect a minute current with high accuracy. In addition, the semiconductor device 20 can detect a minute current with low power consumption. It becomes Noh.

[0127] (Embodiment 2) In this embodiment, a display device having the semiconductor device 10 or the semiconductor device 20 shown in the first embodiment is provided. An example of a display device will be described.

[0128] <<Display device>> 7 is a block diagram showing a configuration example of a display device. The display device 200 includes a pixel section 210, a peripheral A side circuit 220, a CPU 230, a control circuit 231, a power supply circuit 232, an image processing circuit 233, and memory 234.

[0129] The CPU 230 is a circuit for executing instructions and controlling the display device 200 in an overall manner. The instructions executed by the CPU 230 are input from the outside and are stored in the internal memory. The CPU 230 outputs signals for controlling the control circuit 231 and the image processing circuit 233. Based on the control signal from the CPU 230, the control circuit 231 controls the operation of the display device 200. The control circuit 231 controls the peripherals so that the processing determined by the CPU 230 is executed. The control circuit 220, the power supply circuit 232, the image processing circuit 233, and the memory 234. The circuit 231 receives, for example, various synchronization signals that determine the timing of rewriting the screen. The synchronous signals include, for example, a horizontal synchronous signal, a vertical synchronous signal, and a reference clock signal. The control circuit 231 generates control signals for the peripheral circuit 220 from these signals. The power supply circuit 232 has a function of supplying a power supply voltage to the pixel section 210 and the peripheral circuit 220. .

[0130] The pixel section 210 includes a plurality of pixels 211, a plurality of wirings GL, a plurality of wirings SL, and a plurality of wirings GL, A plurality of pixels 211 are arranged in an array. A plurality of wirings GL, SL , ML are provided according to the arrangement of the multiple pixels 211. The wiring GL is arranged in the vertical direction. The lines SL and ML are arranged in the horizontal direction. The lines GL are gate lines and scanning lines. The wiring SL may be called a source line, a data line, etc. The wiring ML is a wiring provided for monitoring the pixel 211, and is, for example, This can be called monitor wiring.

[0131] The peripheral circuit 220 includes a gate driver circuit 221, a source driver circuit 222, a monitor The digital signal processing circuit 222 includes a digital signal processing circuit 223 and an analog-to-digital conversion circuit (ADC) 224.

[0132] The gate driver circuit 221 is a circuit for driving the wiring GL and supplies The source driver circuit 222 has a function of generating a signal. The monitor circuit 223 is a line that generates a signal to be supplied to the wiring SL. The ADC224 has the function of detecting the analog signal flowing through the monitor circuit. This is a circuit for converting an analog signal output from the line 223 into a digital signal. C224 outputs a signal CMOUT to the image processing circuit 233.

[0133] The display device 200 includes the semiconductor device 10 or the semiconductor device 20 according to the first embodiment in the ADC 224. It has been applied.

[0134] The image processing circuit 233 processes an externally input video signal to generate a data signal VDATA. The data signal VDATA is a digital signal that represents a gray scale. The image processing circuit 233 has a function of correcting the data signal VDATA using the signal CMOUT. The source driver circuit 222 processes the data signal VDATA and supplies the data to each line SL The memory 234 has a function of generating a data signal to be supplied to the image processing circuit 233. The memory 234 is provided to store data necessary for processing. For example, the signal CMOUT, the data signal VDATA, or the externally input video signal is It will be delivered.

[0135] 8 is an exploded perspective view of the display device 200. The display device 200 includes an upper cover 258-1 Between the touch panel unit and the lower cover 258-2, FPC256 is connected. 252, a display panel 250 to which an FPC 255 is connected, a frame 259, a printed circuit board The touch panel unit 251 includes a battery 253. In some cases, the light source 252 and the like may not be provided. A backlight unit may also be provided.

[0136] The upper cover 258-1 and the lower cover 258-2 are The shape and dimensions can be changed as appropriate according to the size of the frame and the display panel 250. The function of the frame 259 is to protect the display panel 250 and also to prevent damage caused by the operation of the printed circuit board 251. The frame 259 also functions as an electromagnetic shield to block electromagnetic waves. , may also have a function as a heat sink.

[0137] The printed circuit board 251 includes a CPU 230, a power supply circuit 232, an image processing circuit 233, a memory 2 The power supply circuit 232 is supplied with power from an external commercial power source. Alternatively, the power source may be a battery 253 provided separately. In the case where a power supply for a liquid crystal display is used, the display device 200 may be omitted. Additional members such as plates and prism sheets may be provided.

[0138] The touch panel unit 252 is a resistive or capacitive touch panel. The display panel 250 may be overlapped with the opposing substrate (sealing substrate). It is also possible to provide a touch panel function to the display panel. It is also possible to provide an optical sensor in each pixel of the 250 to make it an optical touch panel. Alternatively, a touch sensor electrode is provided in each pixel of the display panel 250, and a capacitive touch sensor is provided. It may also be a panel.

[0139] The display panel 250 shown in FIG. 8 has a substrate 260 and a substrate (opposing substrate) 261. The display 60 includes a pixel section 210 and a peripheral circuit 220. The substrate 260 on which the circuit is formed may be called the element substrate (backplane). A part or the whole of the path 220 may be provided on the substrate 260 in the same manufacturing process as the pixel section 210. In the example of FIG. 8, a part of the peripheral circuit 220 is provided in the IC 270. 270 is mounted on the substrate 260 using the COG (Chip on Glass) method.

[0140] <<Display Panel>> FIG. 9 is a plan view showing a configuration example of an element substrate of the display panel 250. Here, based on FIG. In the same manner, terms that indicate the positional relationship such as left, right, up, down, etc. will be used.

[0141] The display panel 250 includes a pixel section 210 and a peripheral circuit 220 (circuits 221-224). Among the peripheral circuits, the gate driver circuit 221 and the monitor circuit 223 are This is a circuit formed on the substrate 260 in the same manufacturing process as the element portion 210. 221 is divided into two circuits (GDL, GDR) and is provided on the left and right of the pixel section 210. For example, the odd-numbered wiring GL is electrically connected to the GDR, and the even-numbered wiring GL is electrically connected to the GDL. GL is electrically connected. In this case, GDL and GDR alternately drive the wiring GL. do.

[0142] The area 262 includes a source driver circuit 222 and an ADC 224. In this example, the source driver circuit 222 and the ADC 224 are six driver ICs 30. The number of driver ICs 30 is not limited to this. A plurality of terminals (not shown) are formed on the driver IC 30, which are electrically connected to the driver IC 30. It has been done.

[0143] Hereinafter, the horizontal (H) resolution of the pixel unit 210 is n×RGB, and the vertical (V) resolution is The display device 200 will be described assuming that the image resolution is m. n and m are integers of 2 or more. RGB (Red, Green, Blue) represents the color that the pixel 211 displays. ) constitute one unit pixel.

[0144] The configuration of the unit pixel is not limited to this. The number of sub-pixels, the emission color of the sub-pixels, and The arrangement of the sub-pixels in the unit pixel can be set appropriately. When a unit pixel is made up of four sub-pixels, the combination of colors to be displayed is [red (R), green ( [Red (R), Green (G), Blue (B), Yellow (Y)] or [Red (R), Green (G), Blue (B), White (W)], etc. In this specification, when the components are distinguished by the color displayed by the pixel, For example, pixel 211_R is red. The line SL_G[2] is electrically connected to the pixel 211_G. It represents the second row of wiring SL.

[0145] <<Pixels>> FIG. 10A is a circuit diagram showing an example of a pixel 211, and FIG. 10B is a circuit diagram showing the pixel 211 shown in FIG. 4 is a timing chart showing an example of the operation of the pixel 211.

[0146] FIG. 10(A) shows the kth row and jth column (k is an integer between 2 and m, and j is an integer between 2 and n). The pixel 211 is connected to the lines GL, SL, ML, and A. NL. The pixel 211 includes transistors M5-M7 and a capacitance element C1. , and a light-emitting element EL1.

[0147] The light-emitting element EL1 has a pair of terminals (anode and cathode). For this purpose, an element capable of controlling the luminance by a current or a voltage can be used. The light emitting element EL1 is an LED (Light Emitting Diode) or an OL ED (Organic Light Emitting Diode) is a typical example. For example, in the case of an OLED, the light-emitting element EL1 has an EL (electroluminescence) layer. The EL layer is provided between the anode and the cathode, and is composed of a single layer or multiple layers. The EL layer includes at least a layer containing a light-emitting substance (light-emitting layer). The EL layer is used for light emission. A light-emitting element may be called an EL element. A display device that uses EL elements as pixels is called an EL display device. In particular, a light-emitting element having an organic EL layer is called an organic EL element, and an organic E Display devices using LED elements are sometimes called organic light-emitting diode (OLED) displays. The light-emitting element EL1 can be an organic EL element.

[0148] In FIG. 10A, transistors M5-M7 are n-type transistors. Alternatively, all of the transistors M5-M7 may be p-type transistors. The back gate is electrically connected to the transistor. The current driving capability of the transistors M5-M7 can be improved. A part or all of the transistors 7 may be transistors without a back gate.

[0149] The transistor M5 connects the gate (node ​​N2) of the transistor M6 to the line SL. The transistor M7 is a pass transistor that is connected between the wiring ML and the anode of the light-emitting element EL1. (node ​​N1). Transistor M6 is a pass transistor that connects Transistor M6 functions as a current source supplied to the light-emitting element EL1. The luminance of the light-emitting element EL1 is adjusted according to the magnitude of the drain current of the capacitance element C1. , which is a storage capacitance that holds the voltage between the node N1 and the node N2.

[0150] <Example of operation> A data signal Vda is input to the line SL. The voltage of the data signal Vda corresponds to the grayscale of the video signal. In Fig. 10(B), [k] and [k+1] correspond to the kth row and the kth+ This indicates that the data signal Vda is input to the pixels 211 in one row.

[0151] The period P1 is a writing operation period, during which the light-emitting element EL1 does not emit light. A voltage Vano is applied to the cathode of the light-emitting element EL1, and a voltage Vcat is applied to the cathode of the light-emitting element EL1. The line ML is electrically connected to a power supply line that supplies a voltage V0. When the line GL is set to a high level, The transistors M5 and M6 are turned on. The voltage Vda of the line SL is applied to the node N2. A drain current having a magnitude corresponding to the voltage Vda flows through the transistor M6.

[0152] The voltages Vano, V0, and Vcat satisfy the following formulas (b1) to (b3). In the following formula, the voltage V thE is the light-emitting element EL1 is the threshold voltage, and the voltage V th2 is the threshold voltage of transistor M6. V0 <Vcat+V thE (b1) Vano>V0+V thE (b2) Vano>Vcat+V thE +V th2 (b3)

[0153] Because (b1) and (b2) are true, during the period P1 (write period), the transistor M7 Even when the transistor M6 is on, the drain current of the transistor M6 is prioritized over the wiring ML rather than the light emitting element EL1. By satisfying (b3), the wiring AN A potential difference occurs between L and the cathode of the light-emitting element EL1, so that the drain of the transistor M6 A turn-on current is supplied to the light-emitting element EL1, causing the light-emitting element EL1 to emit light. At 2, transistor M5 and transistor M7 are turned off.

[0154] The period P3 is a monitor period for acquiring the drain current of the transistor M6. The power supply that supplies the line ML and the voltage V0 is turned on. The electrical connection between the line and the node N2 is cut off. th2 twist A voltage Vano is applied to the wiring ANL, and the A voltage Vcat is applied to the cathode. By driving the wiring SL in this way, This allows the drain current of the photodiode M6 to flow preferentially to the wiring ML rather than to the light-emitting element EL1. Cut.

[0155] In the period P3, the signal I is output from the pixel 211 to the line ML. MON During the light emission period, the transistor This includes the drain current flowing through the transistor M6. MON Based on the analysis results, By correcting the voltage Vda of the signal, the deviation in luminance of the pixel 211 can be corrected.

[0156] The monitor operation does not always have to be performed after the light emission operation. For example, in pixel 211, After repeating the cycle of writing and emitting the data several times, the monitor operation is performed. After the monitor operation, the data signal corresponding to the minimum gray level 0 can be By writing to pixel 211, light emitting element EL1 may be put into a non-emitting state.

[0157] Here, an example in which a light-emitting element is used as a display element is shown, but the embodiment of the present invention is not limited to this. For example, in this specification, a display device that is a device having a display element A light-emitting element and a light-emitting device having a light-emitting element can be used in various forms. A display element, a display device, a light-emitting element, or a light-emitting device can have various elements. For example, EL (electroluminescence) elements (EL elements containing organic and inorganic materials, organic EL elements, inorganic EL elements), LEDs (white LEDs, red LEDs, green LEDs, blue LEDs) etc.), transistors (transistors that emit light according to electric current), electron-emitting devices, liquid crystal devices , electronic ink, electrophoretic element, grating light valve (GLV), plasma display Using MEMS (Micro-Electro-Mechanical Systems) Display element, Digital Micromirror Device (DMD), DMS (Digital Micromirror Device) Shutter), MIRASOL (registered trademark), IMOD (Interference Module duction element, shutter type MEMS display element, optical interference type MEMS display element , electrowetting element, piezoelectric ceramic display, carbon nanotube In addition to these, there are at least one electric or magnetic display element. The display medium has contrast, brightness, reflectance, transmittance, etc. that change due to electrochemical effects. An example of a display device using an EL element is an EL display. An example of a display device using electron-emitting elements is a field emission display ( FED) or SED type flat panel display (SED: Surface-conduct ion electron-emitter display). An example of the display device used is a liquid crystal display (transmissive liquid crystal display, semi-transmissive LCD display, reflective LCD display, direct-view LCD display, projection LCD display Spray) and other types of ink are used. Electronic ink, electronic powder, or electrophoretic elements are used. An example of such a display device is electronic paper. In order to realize a reflective liquid crystal display, a part or the whole of the pixel electrodes must be reflective. For example, a part or the whole of the pixel electrode may be , aluminum, silver, etc. In this case, the reflective electrode may be It is also possible to provide a memory circuit such as an SRAM in the memory. This further reduces power consumption. When using LEDs, the LED electrodes and the nitride semiconductor Graphene or graphite may be arranged on the surface of the substrate. The layers may be stacked to form a multilayer film. Therefore, it is easy to form a nitride semiconductor, for example, an n-type GaN semiconductor layer having a crystal, on the substrate. Furthermore, a p-type GaN semiconductor layer having crystals can be formed on top of it. By using these materials, LEDs can be constructed. An AlN layer may be provided between the n-type GaN semiconductor layer and the GaN LED. The semiconductor layer may be formed by MOCVD. However, by providing graphene, L The GaN semiconductor layer of the ED can also be formed by sputtering.

[0158] Monitor circuit Signal I MON is input to the monitor circuit 223. The monitor circuit 223 receives the signal I MON A The monitor circuit 2 has a function of controlling the output to the DC 224. The monitor circuit 223 is controlled by the signal V0_SW and the signal MSEL[3:1]. The MONI circuit is controlled by the MOS transistor and has m stages of MONI circuits. Figure 11(B) shows an example of the configuration of the MONI circuit. For example, when the resolution of the display panel 250 is 8k4K, The circuit 223 has 4320 circuits MONI.

[0159] The circuit MONI[j] is a 3-input, 1-output circuit. The input terminal of the circuit MONI is wire 3. (ML_R, ML_G, ML_B) are electrically connected, and the output terminal MOUT is ADC2 24. The circuit MONI[j] includes six transistors (Msw1-Ms The gates of the transistors Msw1-Msw3 are connected to a signal V The transistors Msw1, Msw2, and Msw3 are connected to the power supply line 215. It has the function of a switch that controls the conduction state with the wiring ML_R, ML_G, and ML_B. Transistors MS1, MS2, and MS3 are connected to the output terminal MOUT and the wiring ML_R, ML_G, and M The power supply line 215 supplies the voltage V0. This is wiring for use.

[0160] A signal V0_SW is input to the gates of the transistors Msw1 to Msw3. The gates of the data buses MS1, MS2, and MS3 are connected to the signals MSEL[1], MSEL[2], and MSEL [3] is input. Writing period and light emission period (periods P1 and P2 in FIG. 10(B)) Now, turn on the transistors Msw1-Msw3 and turn off the transistors MS1-MS3. During the monitor period (period P3 in FIG. 10B), the transistors Msw1 to Msw3 The transistors MS1-MS3 are controlled so that only one of them is turned on. During the monitoring period, the current signal I MON _R[j], I MON _G[j], IMON _B[j] sequentially connects to the terminal MOUT[ j] is output.

[0161] Here, the transistors Msw1-Msw3 and MS1-MS3 are n-type transistors. However, some or all of these may be p-type transistors. Msw1-Msw3 and MS1-MS3 have back gates, but some of them may all be transistors without a back gate.

[0162] <<Display Panel>> FIG. 12 shows an example of a device structure of the display panel 250. FIG. 12 shows the stacked structure of the pixel section 210 and the The device structure of the peripheral circuit 220a (GDR, GDL, and monitor circuit 223 in the example of FIG. 9) 12 is a diagram for explaining the above and is not a cross-sectional view of a specific portion of the display panel 250. The display panel 250 receives light 555 from the light emitting element EL1 through the substrate 261. Figure 1 shows an example of a top emission structure that emits

[0163] There are no particular restrictions on the device structures such as transistors and capacitors provided on the substrate 260. Select a device structure suitable for each function of the pixel section 210 and the peripheral circuit 220a. For example, the device structure of a transistor can be a top gate type, a bottom gate type, or front gate and dual gate type with both gate (front gate) and bottom gate A typical example is a multi-gate type having multiple gate electrodes for one semiconductor layer. There are no particular restrictions on the semiconductor layer in which the transistor channel is formed. In terms of structure, semiconductors can be broadly classified into single crystal and non-single crystal semiconductors. Semiconductor materials include conductors, microcrystalline semiconductors, and amorphous semiconductors. Semiconductor materials include Si, Ge, C Semiconductors containing one or more of the above (e.g., silicon, silicon germanium, silicon carbide, etc.) semiconductors (e.g., In-Ga-Zn oxide, In-Sn-Zn oxide, etc.) ), compound semiconductors, etc.

[0164] Here, as an example of the display panel 250, an element substrate is configured with transistors of the same conductivity type. An example in which a transistor on an element substrate has a channel formed in an oxide semiconductor layer will be described. FIG. 1 shows an example of a transistor that can be used in a semiconductor device according to the present invention. 12 includes a transistor M7, a capacitance element C1, a light-emitting element EL1, and a peripheral circuit 220a The transistors M7 and M10 have a dual gate structure. It has a gate electrode on the substrate 260 side.

[0165] <Element substrate> The element substrate of the display panel 250 is a substrate 260 having an oxide semiconductor (OS) layer, a plurality of insulating layers, The electrode is formed by laminating a plurality of conductive layers.

[0166] The conductive layer of the display panel 250 may be formed of a single layer conductive film or two or more layers of conductive films. Such conductive films include aluminum, chromium, copper, silver, gold, platinum, and titanium. Ta, Nickel, Titanium, Molybdenum, Tungsten, Hafnium, Vanadium, Niobium Metal films of manganese, magnesium, zirconium, beryllium, etc. can be used. In addition, alloy films and compound films containing these metals, and films containing impurity elements such as phosphorus, A polycrystalline silicon film, a silicide film, or the like can be used. The conductive film may be a light-transmitting conductive film. Tungsten-containing indium oxide, tungsten oxide-containing indium zinc oxide, Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Indium tin oxide (called ITO), indium zinc oxide, and indium with silicon oxide Examples of the film include a film containing a metal oxide such as aluminum tin oxide.

[0167] The insulating layer of the display panel 250 may be formed of a single insulating layer or two or more insulating layers. Inorganic insulating films include aluminum oxide, magnesium oxide, silicon oxide, Silicon oxynitride, silicon nitride oxide, silicon nitride, gallium oxide, germanium oxide , yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide Examples of the resin film include acrylic resin, polycarbonate, and tantalum oxide. imide resin, benzocyclobutene resin, siloxane resin, polyamide resin, epoxy resin In this specification, the term "oxynitride" refers to a film that contains more oxygen than nitrogen. Nitrogen oxide refers to a compound that contains more nitrogen than oxygen. This refers to.

[0168] The element substrate of the display panel shown in FIG. 12 includes oxide semiconductor (OS) layers 501 and 502, a first conductive layer, and a Conductive layers 511-513 provided on the first conductive layer, and conductive layers 521-524 provided on the second conductive layer. , conductive layers 531-533 provided in the third conductive layer, conductive layer 541 provided in the fourth conductive layer -544, a conductive layer 550 provided on the fifth conductive layer, and a conductive layer 551 provided on the sixth conductive layer , a conductive layer 552 provided on the seventh conductive layer, an EL layer 553, and insulating layers 571-576. The insulating layer 571 is a gate insulating layer for the transistor M7 and the transistor M10, and a capacitor The insulating layer 572 constitutes the dielectric of the capacitive element C1. Layer 576 acts as a spacer to maintain the space between substrate 260 and substrate 261. do.

[0169] <GDR、GDL> The transistor M10 includes an OS layer 501 and conductive layers 511, 521, 522, and 531. The conductive layer 531 functions as a back gate and is electrically connected to the conductive layer 511. The conductive layer 541 is an electrode or wiring for wiring elements provided on the GDR and GDL. It is a line.

[0170] <Pixel section> Transistor M7 includes an OS layer 502 and conductive layers 512, 523, 524, and 532. The conductive layer 532 functions as a back gate and is electrically connected to the conductive layer 512. The conductive layer 512 constitutes the wiring GL, and the conductive layer 523 constitutes the wiring ML. 24 is shared with the capacitance element C1. In the example of FIG. The entire lower surface of the OS layer 502 is covered with an insulating layer 571. The capacitor C1 is an MIM type capacitor having a conductive layer 513 and an insulating layer 512. The conductive layer 54 is a laminate of a layer 571, a conductive layer 524, an insulating layer 572, and a conductive layer 533. 2 is a wiring ANL, the conductive layer 543 is a wiring SL, and the conductive layer 544 is a light-emitting element EL1 to the transistor M7 and the capacitance element C1.

[0171] Light-emitting element EL1 is provided on insulating layer 574. Conductive layers 550-552 and EL layer The portion where the conductive layers 550 and 551 are laminated functions as the light-emitting element EL1. The conductive layers 550 and 551 function as the anode and cathode electrodes of the light element EL1. The conductive layer 552 and the EL layer 553 are provided for each pixel 211. One or more of the following are provided:

[0172] The EL layer 553 contains a light-emitting material capable of emitting light by recombining holes and electrons. The EL layer 553 includes a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, etc. Any functional layer may be formed as necessary. In this example, an EL layer 553 that emits white light is provided. The conductive layer 551 is provided to make the light-emitting element EL1 have a microcavity structure. For example, the conductive layer 551 is formed of an indium tin oxide film containing silicon oxide. The conductive layer 551 can reduce the optical path length between the conductive layer 550 and the conductive layer 552. The thickness of the conductive layer 551 is adjusted according to the wavelength of the light to be extracted from the pixel 211. For example, the thickness of the conductive layer 551 is adjusted in the range of 5 nm to 100 nm. The conductive layer 551 is made thicker as the wavelength of the light 555 becomes longer. The thickness is pixel 211_R>pixel 211_G>pixel 211_B.

[0173] <Example of the configuration of the opposing substrate> The opposing substrate is fixed to face the substrate 260 by a sealing member (not shown). The counter substrate of the display panel 250 shown in FIG. 12 includes a substrate 261, a light-shielding layer 580, a color filter The color filter layer 581 corresponds to the pixel 211. The color filter layer 581 may be provided on the element substrate or may be provided on a The peripheral circuit 220a is shielded from light by a light shielding layer 580. A light-shielding layer 580 is provided on the overcoat 510 so as to shield areas that do not contribute to display. The overcoat layer 582 serves to flatten the surface of the opposing substrate and to remove impurities (typically water and / or oxygen). The overcoat layer 582 is made of, for example, polyimide resin, ethylene glycol, It can be formed from epoxy resin, acrylic resin, or the like.

[0174] <substrate> Substrates applicable to the substrates 260 and 261 include, for example, glass substrates, quartz substrates, and plastic substrates. Includes tungsten substrate, metal substrate, stainless steel substrate, stainless steel foil Substrate, tungsten substrate, substrate with tungsten foil, flexible substrate, lamination Examples of the substrate include a film, a paper containing a fibrous material, and a base film. Examples include barium borosilicate glass, aluminoborosilicate glass, or soda lime glass. An example of a flexible substrate is polyethylene terephthalate (PET). , polyethylene naphthalate (PEN), and polyethersulfone (PES). Plastics that can be used for bonding, or synthetic resins that have flexibility, such as acrylic. The film is made of polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, etc. Alternatively, a film made of a material such as a cellulose acylate film or an inorganic vapor deposition film may be used. Examples include polyester, polyamide, polyimide, aramid, epoxy, and inorganic deposition film. In the example of FIG. 12, the substrate 261 transmits light 555 (visible light). Pass.

[0175] The substrate 260 is a support substrate (glass) used for fabricating the pixel section 210 and the peripheral circuit 220a. After the pixel section 210 and the peripheral circuit 220a are completed, or after the manufacturing process, During the process, the support substrate may be peeled off and a flexible substrate may be attached by an adhesive layer. Similarly, the substrate 261 is a support substrate (glass substrate) used for producing the color filter layer 581, etc. After the overcoat layer 582 is formed, the support substrate is peeled off and the adhesive layer is applied. A more flexible substrate may also be attached.

[0176] By using flexible substrates for the substrates 260 and 261, a flexible display device can be obtained. In addition, by incorporating a flexible display device, a flexible semiconductor device can be provided. be.

[0177] (Embodiment 3) In this embodiment, the transistor M1 or the transistor M2 shown in the first embodiment is A structure example of an oxide semiconductor transistor that can be used in the present invention will be described with reference to FIGS. 13 and 14. explain.

[0178] <<Configuration Example 1 of Oxide Semiconductor Transistor>> 13A to 13C show top views and cross-sectional views of the transistor 150. 13(A) is a top view of transistor 150, and FIG. 13(B) is a dot-dash diagram of FIG. 13(A). FIG. 13(C) corresponds to a cross-sectional view of the cut surface between the lines AB, and FIG. 13(C) corresponds to a cross-sectional view of the cut surface between the lines CD and CD in FIG. 13(A). In FIG. 13(A), for clarity, only one of the components is shown. In the figure, some parts are omitted.

[0179] The transistor 150 includes a conductive film 104 provided over a substrate 102 and a conductive film 105 provided between the substrate 102 and the conductive film 105. A first insulating film 108 including an insulating film 106 and an insulating film 107 formed on the film 104; The oxide semiconductor film 110 overlaps with the conductive film 104 with the insulating film 108 interposed therebetween. The conductive film 112a and the conductive film 112b are in contact with the body film 110.

[0180] In addition, the first insulating film 108, the oxide semiconductor film 110, the conductive film 112a, and the conductive film 112b A second insulating film 120 including insulating films 114, 116, and 118 is provided on the first insulating film 120. and a conductive film 122 formed thereon.

[0181] The conductive film 122 is formed through an opening 142e provided in the first insulating film 108 and the second insulating film 120. 1, it is connected to the conductive film 104.

[0182] In the transistor 150, the conductive film 104 functions as a first gate electrode. The conductive film 122 functions as a second gate electrode. 1, has a function as a first gate insulating film, and the second insulating film 120 has a function as a second gate insulating film. It has the function as follows.

[0183] In the transistor 150, the conductive film 112a serves as one of a source electrode and a drain electrode. The conductive film 112b functions as the other of the source electrode and the drain electrode. do.

[0184] In the transistor 150 described in this embodiment, the conductive film 104 and the Between the conductive films 122, an oxide semiconductor is provided via the first insulating film 108 and the second insulating film 120. The conductive film 104 has a top surface shape as shown in FIG. 10, the first insulating film 108 overlaps with the side surface of the oxide semiconductor film 110 with the first insulating film 108 interposed therebetween.

[0185] In the opening 142e, the conductive film 104 and the conductive film 122 are connected to each other. By making the conductive film 122 have the same potential, carriers flow in a wide range of the oxide semiconductor film 110. This increases the amount of carriers moving through transistor 150.

[0186] As a result, the on-state current of the transistor 150 increases and the field effect mobility increases. , typically with a field effect mobility of 10 cm 2 / V·s or more, even 20 cm 2 / V·s or later Note that the field effect mobility here is the mobility as a physical property value of the oxide semiconductor film. This is not an approximation but an index of the current driving force in the saturation region of a transistor. This is the field effect mobility.

[0187] The channel length (also referred to as L length) of the transistor is set to 0.5 μm or more and 6.5 μm or less. Preferably, it is greater than 1 μm and less than 6 μm, more preferably greater than 1 μm and less than 4 μm. More preferably, it is greater than 1 μm and less than 3.5 μm, and more preferably, it is greater than 1 μm and less than 2. By making the channel length 0.5μm or less, the increase in field effect mobility is remarkable. By making the size smaller, between 5μm and 6.5μm, the channel width can also be made smaller. be.

[0188] In addition, the conductive film 104 and the conductive film 122 each serve to block an electric field from the outside. In order to achieve this function, a conductive film 122 is provided between the substrate 102 and the conductive film 104 or on the conductive film 122. The fixed charges generated by the oxide semiconductor film 110 do not affect the oxide semiconductor film 110. Apply a negative potential to the gate electrode - GBT (Gate Bias Temperature The degradation of the drain current at different drain voltages is suppressed. This makes it possible to suppress fluctuations in the start-up voltage of the on-state current.

[0189] The BT stress test is a type of accelerated test that measures the transistor damage caused by long-term use. The change in the characteristics of the BT struts (i.e., aging) can be evaluated in a short time. The amount of change in the threshold voltage of a transistor before and after the load test is an important factor for investigating reliability. The smaller the change in threshold voltage before and after the BT stress test, the better the performance. It can be said that this is a highly reliable transistor.

[0190] Note that in the transistor 150, the conductive film 104 and the conductive film 122 are not connected to each other, but are different from each other. In this way, the threshold voltage of the transistor 150 can be controlled. It can be controlled.

[0191] In some cases, the transistor 150 may omit the conductive film 122.

[0192] The individual elements that make up substrate 102 and transistor 150 are described below.

[0193] <Substrate 102> Examples of substrates that can be used as the substrate 102 include glass substrates, quartz substrates, and plastic substrates. Plate, metal substrate, stainless steel substrate, substrate with stainless steel foil, Tungsten substrate, substrate with tungsten foil, flexible substrate, laminated film , paper containing a fibrous material, or a base film. The glass is made of barium borosilicate glass, aluminoborosilicate glass, or soda lime glass. Examples of flexible substrates include polyethylene terephthalate (PET), Polyethylene naphthalate (PEN) and polyethersulfone (PES) are typical examples of The laminated film is made of a flexible synthetic resin such as acrylic. , polypropylene, polyester, polyvinyl fluoride, polyvinyl chloride, etc. Alternatively, a base film such as an inorganic vapor deposition film may be used. Polyester, polyamide, polyimide, aramid, epoxy, inorganic vapor deposition film, or Paper and other items.

[0194] In addition, the substrate 102 is not limited to being a simple support, but may also be used to mount other elements such as transistors and capacitors. The substrate may be a substrate on which a

[0195] <Gate electrode> The conductive film 104 and the conductive film 122 may be made of a material such as aluminum, chromium, copper, or titanium. A metal element selected from the group consisting of tungsten, titanium, molybdenum, and tungsten, or the above-mentioned metal elements. The alloy may be made of an alloy containing the above-mentioned metal elements or a combination of the above-mentioned metal elements. The conductive film 104 and the conductive film 122 may have a single-layer structure or a two-layer structure or more. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, or a nitride film may be laminated on an aluminum film. A two-layer structure in which a titanium film is laminated on a titanium nitride film, and a tungsten film is laminated on a titanium nitride film a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film; Layer structure: titanium film, aluminum film laminated on titanium film, titanium on top of aluminum film There are also three-layer structures that form a film. A combination of one or more selected from the group consisting of chromium, molybdenum, chromium, neodymium, and scandium. Alternatively, an alloy film or a nitride film may be used for the conductive film 104 and the conductive film 122. The material can be formed by using a sputtering method, for example.

[0196] In addition, examples of a conductive film that can be used for the conductive film 104 and the conductive film 122 include indium For example, an oxide containing tungsten oxide, indium oxide, Indium zinc oxide containing tungsten, indium oxide containing titanium oxide, titanium oxide Indium tin oxide (ITO) containing tin, in ... Conductive materials with light-transmitting properties such as indium zinc oxide and indium tin oxide doped with silicon oxide Materials can be used.

[0197] <Gate insulating film> The first insulating film 108 has a laminated structure of two layers, an insulating film 106 and an insulating film 107, as an example. The structure of the first insulating film 108 is not limited to this, and may be, for example, a single-layer structure or a three-layer structure or more. A laminated structure of the above may also be used.

[0198] The insulating film 106 may be, for example, a silicon oxynitride film, a silicon nitride film, an aluminum oxide film, or the like. A film such as a silicon film can be used, and it can be formed in a multilayer or single layer using a PE-CVD device. When the insulating film 106 has a laminated structure, a silicon nitride film having few defects is used as the first silicon nitride film. A silicon nitride film was formed on the first silicon nitride film, and a second silicon nitride film was formed on the first silicon nitride film. It is preferable to provide a silicon nitride film that emits less ammonia. Hydrogen and nitrogen contained in the oxide semiconductor film 110 are transferred or diffused into the oxide semiconductor film 110 to be formed later. This can prevent the above from happening.

[0199] The insulating film 107 may be a silicon oxide film, a silicon oxynitride film, or the like. -The film is formed in a multilayer or single layer using a CVD apparatus.

[0200] As the insulating film 106, for example, a silicon nitride film having a thickness of 400 nm is formed, and then As the insulating film 107, a laminated structure is used in which a silicon oxynitride film having a thickness of 50 nm is formed. The silicon nitride film and the silicon oxynitride film can be formed successively in a vacuum. It is preferable to use silicon nitride oxide because the inclusion of impurities is suppressed. Silicon oxynitride is an insulating material with a higher oxygen content than silicon nitride. This refers to insulating materials with a greater content of elemental elements.

[0201] <Oxide Semiconductor Film> The oxide semiconductor film 110 contains at least indium (In), zinc (Zn) and M (Al, In-M-Zn oxide containing metals such as Ga, Ge, Y, Zr, Sn, La, Ce or Hf It is preferable that the film contains a film represented by In and Zn. Alternatively, it is preferable that the film contains both In and Zn. In addition, in order to reduce the variation in the electrical characteristics of the transistors, It is preferred to include a stabilizer.

[0202] The stabilizers are gallium (Ga), tin (Sn), hafnium (Hf), and aluminum. Aluminum (Al) or zirconium (Zr). Also, with other stabilizers The lanthanides lanthanum (La), cerium (Ce), and praseodymium (P r), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium ( Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium Er, Thulium, Ytterbium, Lutetium, etc. .

[0203] The oxide semiconductor constituting the oxide semiconductor film 110 is, for example, an In-Ga-Zn oxide. In-Al-Zn oxides, In-Sn-Zn oxides, In-Hf-Zn oxides , In-La-Zn oxide, In-Ce-Zn oxide, In-Pr-Zn oxide, In-Nd-Zn oxide, In-Sm-Zn oxide, In-Eu-Zn oxide, I n-Gd-Zn oxide, In-Tb-Zn oxide, In-Dy-Zn oxide, In -Ho-Zn oxide, In-Er-Zn oxide, In-Tm-Zn oxide, In- Yb-Zn oxide, In-Lu-Zn ​​oxide, In-Sn-Ga-Zn oxide, I n-Hf-Ga-Zn oxide, In-Al-Ga-Zn oxide, In-Sn-Al- Zn-based oxide, In-Sn-Hf-Zn-based oxide, In-Hf-Al-Zn-based oxide are used. There can be.

[0204] In this case, the In-Ga-Zn oxide is an oxide having In, Ga, and Zn as main components. It means oxide, and the ratio of In, Ga, and Zn does not matter. Also, In, Ga, and Zn Metal elements other than those may be included.

[0205] The oxide semiconductor film 110 is formed by a sputtering method, an MBE (Molecular Beam Epitaxy) method, or the like. Beam Epitaxy, CVD, Pulsed Laser Deposition, ALD (Atomic In particular, the oxide When the semiconductor film 110 is formed by a sputtering method, a dense film is formed. This is preferable.

[0206] When the oxide semiconductor film 110 is formed, the hydrogen concentration in the film is reduced as much as possible. In order to reduce the hydrogen concentration, for example, a sputtering method is used for film formation. In this case, it is necessary not only to evacuate the deposition chamber to a high vacuum, but also to highly purify the sputtering gas. The oxygen gas and argon gas used as the sputtering gas have a dew point of -40°C or less, preferably -80℃ or less, more preferably -100℃ or less, more preferably -120℃ or less By using a highly purified gas, moisture or the like is prevented from being taken into the oxide semiconductor film as much as possible. This can be prevented.

[0207] In order to remove residual moisture in the deposition chamber, an adsorption type vacuum pump, for example, a cryostat It is preferable to use a pump, an ion pump, or a titanium sublimation pump. A turbomolecular pump with a cold trap may be used. For example, compounds containing hydrogen atoms such as water (HO) (more preferably compounds containing carbon atoms) The high pumping capacity of the cryopumps allows the deposition of oxide films in deposition chambers evacuated using cryopumps. The concentration of impurities contained in the compound semiconductor film can be reduced.

[0208] In addition, when the oxide semiconductor film 110 is formed by a sputtering method, The relative density (filling rate) of the metal oxide target used for film formation is 90% or more and 100% or less. The preferred range is 95% to 100%. A metal oxide target with a high relative density is used. This allows the formed film to be dense.

[0209] Note that the oxide semiconductor film 110 was formed while the substrate 102 was kept at a high temperature. In order to reduce the concentration of impurities that may be contained in the oxide semiconductor film, forming a The temperature to which the substrate 102 is heated may be preferably 150° C. or higher and 450° C. or lower. For example, the substrate temperature may be set to 200° C. or higher and 350° C. or lower.

[0210] Next, a first heat treatment is preferably performed. The first heat treatment is performed at a temperature of 250° C. to 650° C. The temperature is preferably 300°C or higher and 500°C or lower, and the inert gas atmosphere and the oxidizing gas atmosphere are The first heat treatment may be performed in an atmosphere containing 10 ppm or more or under reduced pressure. The gas is heated in an inert gas atmosphere, and then an oxidizing gas is pumped in to replace the oxygen that has been removed. The first heat treatment may be performed in an atmosphere containing 0 ppm or more of fluorine. The crystallinity of the oxide semiconductor used in the first insulating film 108 and the oxide semiconductor film 109 is improved. Impurities such as hydrogen and water can be removed from the oxide semiconductor film 110. A first heating step may be carried out before processing the particles into islands.

[0211] Charges trapped in the trap states of the oxide semiconductor film take a long time to disappear. Therefore, oxides with high trap state density can be used. Transistors in which the channel region is formed in a semiconductor film may have unstable electrical characteristics. The impurities include hydrogen, nitrogen, alkali metals, and alkaline earth metals.

[0212] The oxide semiconductor film 110 is an oxide semiconductor film having a low impurity concentration and a low density of defect states. By using this, a transistor having excellent electrical characteristics can be manufactured. Here, the low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or substantially high purity intrinsic. Since the conductive film has a small number of carrier generation sources, the carrier density can be reduced. The transistor in which the channel region is formed in the oxide semiconductor film has a negative threshold voltage. In addition, the high purity intrinsic Alternatively, a substantially highly pure intrinsic oxide semiconductor film has a low density of defect states, and therefore, trap The level density may also be lower. The semiconductor film has a remarkably small off-state current and a channel width of 1×10 6 The channel length L in μm Even with a 10 μm element, the voltage between the source and drain electrodes (drain voltage) is 1 V. In the range of 10 V to 10 V, the off-state current is below the measurement limit of the semiconductor parameter analyzer. That is, 1 × 10 -13 It is possible to obtain a characteristic of A or less.

[0213] Therefore, the high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor film has a channel region. The transistors in which this region is formed have small fluctuations in electrical characteristics and are highly reliable. It is possible.

[0214] <Source Electrode and Drain Electrode> Materials that can be used for the conductive film 112a and the conductive film 112b include aluminum. , titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tin A single layer of metal such as tungsten or tungsten, or an alloy mainly composed of these, is used. It can be used as a laminated structure. In particular, aluminum, chromium, copper, tantalum, titanium It is preferable that the alloy contains one or more elements selected from the group consisting of titanium, molybdenum, and tungsten. For example, a two-layer structure in which a titanium film is laminated on an aluminum film, a titanium film on a tungsten film, A two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film. A titanium film or a titanium nitride film is laminated on the titanium film or the titanium nitride film by an aluminum film. A three-layer structure in which an aluminum or copper film is laminated and a titanium or titanium nitride film is formed on top of it. Structure, molybdenum film or molybdenum nitride film, and the molybdenum film or molybdenum nitride film An aluminum film or a copper film is laminated on the film, and a molybdenum film or a nitrogen film is further laminated on the aluminum film or a copper film. In addition, there are three-layer structures in which indium oxide, tin oxide or molybdenum oxide are formed. A transparent conductive material containing zinc may be used. The conductive film may be formed by, for example, a sputtering method. It can be formed using.

[0215] <Protective insulating film> The second insulating film 120 is exemplified by a laminated structure of three insulating films 114, 116, and 118. The structure of the second insulating film 120 is not limited to this, and may be, for example, a single-layer structure or a two-layer laminate structure. Alternatively, it may have a laminated structure of four or more layers.

[0216] The insulating films 114 and 116 are formed by forming a layer on the interface with the oxide semiconductor film 110. In order to improve the surface characteristics, inorganic insulating materials containing oxygen can be used. Examples of the mechanical insulating material include a silicon oxide film and a silicon oxynitride film. The insulating films 114 and 116 are formed by using, for example, a PE-CVD method. can be done.

[0217] The thickness of the insulating film 114 is 5 nm or more and 150 nm or less, preferably 5 nm or more and 50 nm or less. The thickness of the insulating film 116 is preferably 30 nm or more and more preferably 10 nm or more and 30 nm or less. The thickness can be 0 nm or more and 500 nm or less, preferably 150 nm or more and 400 nm or less. do.

[0218] In addition, the insulating films 114 and 116 can be made of the same material. In some cases, the interface between the insulating film 114 and the insulating film 116 cannot be clearly seen. In this embodiment, the interface between the insulating film 114 and the insulating film 116 is shown by a dashed line. In the embodiment, the two-layer structure of the insulating film 114 and the insulating film 116 has been described. For example, the insulating film 114 may have a single layer structure, the insulating film 116 may have a single layer structure, or the insulating film 116 may have a three-layer structure. A laminated structure of more than one layer may also be used.

[0219] The insulating film 118 is formed by removing impurities from the outside, such as water, alkali metals, and alkaline earth metals. The film is formed of a material that prevents diffusion of the oxide semiconductor film 110 and further contains hydrogen. nothing.

[0220] An example of the insulating film 118 is a silicon nitride film having a thickness of 150 nm or more and 400 nm or less. In the present embodiment, the insulating film 118 may be a silicon oxide film. A silicon nitride film having a thickness of 150 nm is used.

[0221] The silicon nitride film is formed at a high temperature to improve its ability to block impurities. For example, the substrate temperature is preferably 100° C. or higher and lower than the distortion point of the substrate, and more preferably 3 It is preferable to form the film by heating at a temperature of 00°C or more and 400°C or less. In this case, oxygen is released from the oxide semiconductor used as the oxide semiconductor film 110, and the carrier concentration Since a phenomenon in which the temperature rises can occur, the temperature should be set at a level at which such a phenomenon does not occur.

[0222] <<Configuration Example 2 of Oxide Semiconductor Transistor>> FIG. 14 shows a configuration example of an oxide semiconductor transistor different from the transistor 150 in FIG. vinegar.

[0223] FIG. 14A is a top view of a transistor 300, and FIG. 14B is a top view of a transistor 300 in FIG. 14(C) is a cross-sectional view taken along dashed line Y1-Y in FIG. 14(A). 14B is a cross-sectional view of the transistor 300 in the channel length direction. 14(C) is a cross-sectional view of the transistor 300 in the channel width direction. In FIG. 14(A), for the sake of clarity, some of the components are omitted.

[0224] The transistor 300 includes a conductive film 361 formed on a substrate 362 and a conductive film 362 and a An insulating film 364 on the film 361, an oxide semiconductor film 366 on the insulating film 364, and an oxide semiconductor The conductive film 370a, the conductive film 370b, and the insulating film 372 in contact with the film 366, The conductive film 374 overlaps with the oxide semiconductor film 366 through an intermediate film. An insulating film 376 is provided on the semiconductor device 300.

[0225] In the transistor 300, the conductive film 374 functions as a first gate electrode. The conductive film 361 functions as a second gate electrode. The insulating film 372 functions as a first gate electrode. The insulating film 364 functions as a first gate insulating film. .

[0226] In the transistor 300, the conductive film 370a serves as one of a source electrode and a drain electrode. The conductive film 370b functions as the other of the source electrode and the drain electrode. do.

[0227] As shown in FIG. 14C, a conductive film 374 is provided on the insulating film 372 and the insulating film 364. The transistor 300 is connected to the conductive film 361 through an opening 389. As in the transistor 150, the same potential is applied to the first gate electrode and the second gate electrode. Therefore, the on-current is increased, the initial characteristic variation is reduced, and deterioration during the -GBT stress test is suppressed. It is also possible to suppress the fluctuation in the on-current rise voltage at different drain voltages.

[0228] In addition, in the transistor 300, the conductive film 374 and the conductive film 361 are not connected to each other, but are different from each other. In this way, the threshold voltage of the transistor 300 can be set to Can be controlled.

[0229] Depending on the circumstances, the conductive film 361 may be omitted.

[0230] In the oxide semiconductor film 366, the conductive film 370a, the conductive film 370b, and the conductive film 374 overlap. In the following, the elements that form oxygen vacancies are referred to as Representative examples of impurity elements include hydrogen and rare gas elements. Representative examples of rare gas elements are helium, neon, argon, krypton and xenon. In addition, impurity elements include boron, carbon, nitrogen, fluorine, aluminum, and silicon. The oxide semiconductor film 366 may contain elements such as phosphorus and chlorine.

[0231] The insulating film 376 is a film containing hydrogen, and is typically a nitride insulating film. When the insulating film 376 is in contact with the oxide semiconductor film 366, hydrogen contained in the insulating film 376 is absorbed by the oxide semiconductor film 366. As a result, in a region where the oxide semiconductor film 366 is in contact with the insulating film 376, It contains a lot of hydrogen.

[0232] When a rare gas element is added to an oxide semiconductor film as an impurity element, the gold in the oxide semiconductor film is The bond between the metal element and oxygen is broken, and oxygen vacancies are formed. The electrical conductivity of the oxide semiconductor film is increased by the interaction between the electron vacancy and hydrogen. When hydrogen enters the oxygen vacancies in the semiconductor film, carriers (electrons) are generated. As a result, the conductivity is high.

[0233] For details of the substrate 362, refer to the description of the substrate 102 in FIG.

[0234] The details of the conductive film 361 and the conductive film 374 are the same as those of the conductive film 104 and the conductive film 122 in FIG. Please refer to the following.

[0235] The details of the conductive film 370a and the conductive film 370b are the same as those of the conductive film 112a and the conductive film 112b in FIG. Please refer to the description in b.

[0236] For details of the oxide semiconductor film 366, the description of the oxide semiconductor film 110 in FIG. 13 can be referred to. .

[0237] The insulating film 364 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve interface characteristics with the oxide semiconductor film 366, At least a region in contact with the oxide semiconductor film 366 is preferably formed using an oxide insulating film. In addition, by using an oxide insulating film that releases oxygen by heating as the insulating film 364, By the heat treatment, oxygen contained in the insulating film 364 can be moved to the oxide semiconductor film 366. It is possible.

[0238] The thickness of the insulating film 364 is 50 nm or more, or 100 nm or more and 3000 nm or less, or 20 By making the insulating film 364 thick, the insulating The amount of oxygen released from the insulating film 364 can be increased, and the insulating film 364 and the oxide semiconductor film The interface state at the interface with the oxide semiconductor film 366 and the channel region of the oxide semiconductor film 366 are It is possible to reduce oxygen vacancies that occur during the growth of the alloy.

[0239] The insulating film 364 may be, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, or nitride. Silicon, aluminum oxide, hafnium oxide, gallium oxide, etc. may be used. It may be provided in layers or laminates.

[0240] The insulating film 372 can be formed as a single layer or a stack of an oxide insulating film or a nitride insulating film. Note that in order to improve interface characteristics with the oxide semiconductor film 366, At least a region in contact with the oxide semiconductor film 366 is preferably formed using an oxide insulating film. The insulating film 372 is preferably made of, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. If silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, etc. are used, Preferably, it can be provided as a single layer or a multilayer.

[0241] In addition, an insulating film having a blocking effect against oxygen, hydrogen, water, etc. is provided as the insulating film 372. This allows oxygen to diffuse from the oxide semiconductor film 366 to the outside and oxygen to be absorbed from the outside to the oxide semiconductor film 366. It can prevent hydrogen, water, etc. from entering 366. Blocking effect of oxygen, hydrogen, water, etc. Examples of insulating films having such a structure include aluminum oxide, aluminum oxynitride, gallium oxide, and oxide. Gallium oxide, yttrium oxide, yttrium oxynitride, hafnium oxide, oxynitride Hafnium, etc.

[0242] The insulating film 372 is made of hafnium silicate (HfSiO x ), nitrogen added Hafnium Silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By using this, the gate leakage of the transistor can be reduced.

[0243] In addition, by using an oxide insulating film which releases oxygen by heating as the insulating film 372, By the heat treatment, oxygen contained in the insulating film 372 can be moved to the oxide semiconductor film 366. It is possible.

[0244] The thickness of the insulating film 372 is 5 nm or more and 400 nm or less, or 5 nm or more and 300 nm or less, or can be 10 nm or more and 250 nm or less.

[0245] (Embodiment 4) In this embodiment mode, a display device and a semiconductor device including the display device will be described.

[0246] By incorporating a flexible display device, electronic devices can be made more reliable and resistant to repeated bending. Equipment and lighting can be provided.

[0247] The electronic device may be, for example, a television device (also called a television or television receiver). (c), computer monitors, digital cameras, digital video cameras, digital Photo frames, mobile phones (also called mobile phones or mobile phone devices), portable game machines, Examples of such devices include portable information terminals, audio playback devices, and large game machines such as pachinko machines. Electronic equipment may be mounted on the interior or exterior walls of a house or building, or on the curved interior or exterior surfaces of a vehicle. It is also possible to incorporate the electronic device in accordance with the above. For example, the display device according to the second embodiment can be incorporated into the display unit of the device.

[0248] A mobile phone 7400 shown in FIG. 15A includes a display portion 7402 incorporated in a housing 7401. In addition, there are an operation button 7403, an external connection port 7404, a speaker 7405, a microphone Note that the mobile phone 7400 includes an input / output The display device is used for the display portion 7402. It is possible to provide a highly reliable mobile phone with a high yield rate. The user can input information by touching the display portion 7402 with a finger or the like. Any operation such as making a call or inputting characters can be performed by touching the display unit 7402 with a finger or the like. Also, by operating the operation button 7403, the power can be turned on or off. It is possible to switch between ON and OFF operations and the type of image displayed on the display portion 7402 . For example, you can switch from an email composition screen to a main menu screen.

[0249] FIG. 15(B) shows an example of a wristwatch-type portable information terminal. The information terminal 7100 includes a housing 7101, a display unit 7102, a band 7103, and a buckle 710. 4, operation buttons 7105, and an input / output terminal 7106. Mobile phone, e-mail, text browsing and writing, music playback, internet communication, computers The display unit 7102 can execute various applications such as games. The display surface is curved, and the display can be performed along the curved display surface. The display unit 7102 is equipped with a touch sensor and can be operated by touching the screen with a finger or a stylus. For example, by touching an icon 7107 displayed on the display unit 7102, The application can be launched.

[0250] The operation button 7105 is used to set the time, turn the power on and off, and turn wireless communication on and off. It has various functions such as operation, silent mode activation and deactivation, power saving mode activation and deactivation, etc. For example, an operating system installed in the portable information terminal 7100 can The functions of the operation buttons 7105 can be freely set by the system. The 7100 is capable of performing short-range wireless communication according to a communication standard. You can also talk hands-free by connecting to a compatible headset. The portable information terminal 7100 also includes an input / output terminal 7106, and is connected to other information terminals via a connector. Data can be exchanged directly through the input / output terminal 7106. It is also possible to charge the battery. Note that the charging operation is performed by wireless power supply without going through the input / output terminal 7106. It is also acceptable to

[0251] The display panel of the second embodiment can function as a flat light source. The display panel is appropriately called a light-emitting panel or a light source panel. An example of an electronic device equipped with a light source is shown in FIG. The device has a base 7201 equipped with an operating switch 7203 and a light emitting unit supported by the base 7201. The display panel is built into the light-emitting part. The light-emitting part is made of plastic material, a movable frame, etc. The light emitting surface of the light emitting portion may be freely curved depending on the application. FIG. 15C illustrates an example of a lighting device in which a light-emitting unit is supported by a base. The housing including the unit may be fixed to a ceiling or hung from the ceiling. The light-emitting surface can be curved, so a specific area can be illuminated by curving the light-emitting surface in a concave shape. It can illuminate a small area, or the light-emitting surface can be curved convexly to illuminate an entire room.

[0252] The electronic devices and lighting devices to which one embodiment of the present invention is applied are not limited to flexible products. FIG. 15(D) shows an example of such an electronic device. The display device 700 shown in FIG. The display device 7000 includes a housing 7001, a display unit 7002, a support stand 7003, and the like.

[0253] 15(E) and (F) show an example of a portable touch panel. Touch panel 7300 7301, a display unit 7302, an operation button 7303, a drawer member 7304, a control The touch panel 7300 is wound in a roll shape in a cylindrical housing 7301. The touch panel 7300 is connected to a control unit 7305. Therefore, a video signal can be received, and the received video can be displayed on the display portion 7302 . The control unit 7305 is equipped with a battery. A connector is connected to the control unit 7305. The device may be configured to have a terminal section for connecting the device to the external device, and to supply video signals and power directly from the outside via wires. In addition, the operation button 7303 can be used to turn the power on and off and to change the image to be displayed. Replacement etc. can be done.

[0254] FIG. 15(F) shows a touch panel in a state where the display unit 7302 is pulled out by the pull-out member 7304. In this state, an image can be displayed on the display unit 7302. In addition, the operation button 7303 arranged on the surface of the housing 7301 allows easy operation with one hand. In addition, as shown in FIG. 15E, the operation button 7303 can be provided in the center of the housing 7301. By arranging the display unit 730 to one side, it can be easily operated with one hand. When the display unit 7302 is pulled out, the display surface of the display unit 7302 is fixed to be flat. A frame for reinforcement may be provided on the side of the housing 7302. It can also be used as a configuration in which a microphone is built in and audio is output based on the audio signal received along with the video signal. good.

[0255] 16(A)-C show a configuration example of a foldable mobile information terminal 810. 16(B) shows the portable information terminal 810 in an unfolded or folded state. The mobile information terminal 810 is in the process of changing from one folded state to the other. FIG. 8C) shows the portable information terminal 810 in a folded state. When folded, it is highly portable, and when unfolded, it has a seamless, large display area that allows you to see the display clearly. Excellent overview.

[0256] The display panel 816 is supported by three housings 815 connected by hinges 818. The two housings 815 are bent via the hinge 818, so that the portable information terminal 81 0 can be reversibly transformed from an unfolded state to a folded state. For example, A display panel with a touch panel that can be bent with a bending radius of 1 mm to 150 mm is suitable. It can be used to detect whether the display panel is folded or unfolded. The display panel may be configured to include a sensor that supplies detection information. The folded part (or the folded part that is not visible to the user) is obtained. The control may be performed so as to stop the operation of the part that is no longer visible. The display of the display panel may be stopped. Also, the detection by the touch sensor may be stopped. The information indicating that the window is in the expanded state is acquired, and the display and touch sensor are used to detect the state. The control may be such that the operation is restarted.

[0257] 16(D) and 16(E) show a foldable mobile information terminal 820. 16(E) shows the portable information terminal 820 in a folded state with the cover 822 facing outward. ) shows the portable information terminal 820 in a folded state with the display unit 822 facing inward. When the mobile information terminal 820 is not in use, the non-display section 825 is folded outward to hide the display. When the input / output device of one embodiment of the present invention is used for the display portion 822, the display portion 822 can be prevented from being dirty or scratched. There can be.

[0258] FIG. 16(F) is a perspective view illustrating the external shape of the portable information terminal 880. 16(H) is a top view of the portable information terminal 880. FIG.

[0259] The portable information terminals 880 and 840 are, for example, a telephone, a notebook, an information viewing device, or the like. Specifically, each of these devices can be used as a smartphone. The mobile information terminals 880 and 840 can display text and image information on multiple surfaces. For example, three operation buttons 889 can be displayed on one side (FIG. 16(F) ), H). Also, information 887 shown in a dashed rectangle can be displayed on another surface (see FIG. 16). (G), H). An example of information 887 is SNS (social networking) Notifications of services, notifications of incoming e-mails and phone calls, titles of e-mails, etc. Name, sender name (e.g. email), date, time, battery level, antenna reception strength, etc. Or, instead of the information 887, an operation button is displayed at the location where the information 887 is displayed. The button 889, icon, etc. may be displayed.

[0260] 16(F) and (G) show an example in which information 887 is displayed on the upper side, but the present invention is not limited to this. For example, even if the mobile information terminal 840 shown in FIG. 16(H) is displayed sideways, For example, the user of the mobile information terminal 880 may carry the mobile information terminal 880 in the breast pocket of the clothes. When the item is stored, you can check the display (information 887 in this case). The telephone number or name of the caller of the incoming call is observed from above the mobile information terminal 880. The user can display the mobile information terminal 880 in a convenient position without taking it out of his / her pocket. You can check the display and decide whether or not to answer the call. Also, like the portable information terminal 845 shown in FIG. 16(I), information may be displayed on three or more screens. Here, information 855, information 856, and information 857 are displayed on different sides. Here is an example.

[0261] (Embodiment 5) In this embodiment, a crystal structure of an oxide semiconductor film that can be used in one embodiment of the present invention will be described. Explanations will be given.

[0262] In this specification, "parallel" means that the angle between two straight lines is between -10° and 10°. Therefore, it includes the case where the angle is between -5° and 5°. "Approximately parallel" refers to a state in which two straight lines are arranged at an angle of -30° or more and 30° or less. "Perpendicular" means that two straight lines are arranged at an angle of 80° to 100°. Therefore, it includes the case where the angle is between 85° and 95°. refers to a state in which two straight lines are arranged at an angle of 60° or more and 120° or less.

[0263] In addition, in this specification, when the crystal is a trigonal or rhombohedral crystal, it is represented as a hexagonal crystal system. .

[0264] The structure of the oxide semiconductor film will be described below.

[0265] Oxide semiconductor films are classified into non-single-crystal oxide semiconductor films and single-crystal oxide semiconductor films. Alternatively, oxide semiconductors are divided into, for example, crystalline oxide semiconductors and amorphous oxide semiconductors. do.

[0266] As the non-single-crystal oxide semiconductor, CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor, polycrystalline oxide Semiconductors made of crystalline oxides include semiconductors made of microcrystalline oxides and amorphous oxides. The materials include single-crystal oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, and microcrystalline oxides. Semiconductors, etc.

[0267] First, we will explain the CAAC-OS film.

[0268] The CAAC-OS film is one of oxide semiconductor films having a plurality of crystal parts aligned along the c-axis.

[0269] Transmission Electron Microscope (TEM) A bright-field image and a combined diffraction pattern of the CAAC-OS film were obtained by using a microscope. By observing the TEM image, multiple crystalline regions can be confirmed. On the other hand, the high-resolution TEM image also shows clear boundaries between crystals, i.e., grain boundaries. Therefore, the CAAC-OS film is It can be said that the decrease in electron mobility caused by grain boundaries is unlikely to occur.

[0270] When a high-resolution TEM image of the cross section of the CAAC-OS film was observed from a direction approximately parallel to the sample surface, It can be seen that the metal atoms are arranged in layers in the crystal part. Each layer of metal atoms is The CAAC-OS film is formed on the surface (also called the surface on which the film is formed) or on the upper surface. The CAAC-OS film has a shape similar to that of the crystalline silicon film, and is aligned parallel to the surface on which the CAAC-OS film is formed or the upper surface.

[0271] On the other hand, a high-resolution TEM image of the plane of the CAAC-OS film was observed from a direction approximately perpendicular to the sample surface. It was confirmed that the metal atoms in the crystals were arranged in triangular or hexagonal shapes. However, there is no regularity in the arrangement of metal atoms between different crystal parts.

[0272] X-ray diffraction (XRD) was performed on the CAAC-OS film. For example, a CAAC-OS film with InGaZnO4 crystals was In the out-of-plane analysis, a peak was observed at a diffraction angle (2θ) of approximately 31°. This peak is attributed to the (009) plane of the InGaZnO4 crystal. From this, it can be seen that the crystals of the CAAC-OS film have a c-axis orientation, and the c-axis is approximately aligned on the surface on which the film is formed or on the upper surface. You can see that it is oriented vertically.

[0273] In addition, the out-of-plane method of CAAC-OS film with InGaZnO4 crystals In the analysis by , in addition to the peak at 2θ near 31°, a peak also appeared at 2θ near 36°. The peak at 2θ of around 36° may be due to the c-axis orientation in some parts of the CAAC-OS film. The CAAC-OS film contains crystals that do not have a 2θ of around 31°. It is preferred that the spectrum exhibits a peak and does not exhibit a peak at 2θ of around 36°.

[0274] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The impurities include hydrogen, carbon, and The elements are other than the main components of the oxide semiconductor film, such as silicon and transition metal elements. The elements that bond to oxygen more strongly than the metal elements that form the oxide semiconductor film, such as arsenic, are oxidized. By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disrupted, reducing its crystallinity. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide have an atomic radius of Since the molecular radius is large, when the cation is contained in the oxide semiconductor film, the The impurities in the oxide semiconductor film may cause the atomic arrangement to be disturbed, which may result in a decrease in crystallinity. Objects can act as carrier traps or carrier generation sources.

[0275] The CAAC-OS film is an oxide semiconductor film having a low density of defect states. Oxygen vacancies in the semiconductor film can become carrier traps or trap hydrogen, It can be a carrier source.

[0276] A material with a low impurity concentration and a low defect level density (few oxygen vacancies) is called a high-purity intrinsic or The term "substantially high-purity intrinsic" refers to a highly-purified intrinsic oxide semiconductor film. Since there are fewer carrier generation sources, the carrier density can be reduced. The transistor including the oxide semiconductor film has electrical characteristics in which the threshold voltage is negative ( It is also rare for the crystal to be normally on. It is also rare for the crystal to be high purity intrinsic or substantially high purity. The highly intrinsic oxide semiconductor film has few carrier traps. The transistors using the thin film have small fluctuations in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time when the charge is released is long, and it may behave as if it is a fixed charge. A transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. This may be the case.

[0277] In addition, the electrical characteristics of transistors using CAAC-OS films were improved by irradiation with visible light or ultraviolet light. The fluctuation is small.

[0278] Next, a microcrystalline oxide semiconductor film will be described.

[0279] The microcrystalline oxide semiconductor film has a region where crystals can be confirmed in a high-resolution TEM image. The microcrystalline oxide semiconductor film has a crystal structure including a region where a crystal part is not clearly observed and a region where a crystal part is not clearly observed. The crystal part contained in the crystal has a size of 1 nm to 100 nm or 1 nm to 10 nm. In particular, the fineness is often between 1 nm and 10 nm, or between 1 nm and 3 nm. The oxide semiconductor film having nanocrystals (nc) is called nc -OS(nanocrystalline oxide semiconductor) In the nc-OS film, for example, the grain boundaries are clearly identified in high-resolution TEM images. It may not be possible to recognize

[0280] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or more). The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts. Therefore, no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, X-ray diffraction (XR) is used to measure the nc-OS film using X-rays with a diameter larger than that of the crystals. When structural analysis was performed using the D instrument, the crystal plane In addition, the peaks indicating the probe size were not detected in the nc-OS film. Electron diffraction (also called selected area electron diffraction) using an electron beam with a diameter (for example, 50 nm or more) When the diffraction pattern is changed to 0.05μm, a halo-like diffraction pattern is observed. Nano-beam electrons are used, which use an electron beam with a probe diameter close to or smaller than the size of the crystal part. When diffraction is performed, spots are observed. When this is done, a circular (ring-shaped) area of ​​high brightness may be observed. Nanobeam electron diffraction of the nc-OS film revealed multiple spots within the ring-shaped region. It may be observed.

[0281] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, there is no regularity in the crystal orientation between different crystal parts. The S film has a higher density of defect states than the CAAC-OS film.

[0282] Next, the amorphous oxide semiconductor film will be described.

[0283] The amorphous oxide semiconductor film is an oxide semiconductor film in which the atomic arrangement in the film is irregular and does not have a crystal part. An example is an oxide semiconductor film that has an amorphous state, such as quartz.

[0284] In the amorphous oxide semiconductor film, no crystalline parts can be confirmed in a high-resolution TEM image.

[0285] When the structure of the amorphous oxide semiconductor film is analyzed using an XRD device, out-of-p In the lane analysis, no peaks indicating crystal planes were detected. When electron diffraction is performed on a conductive film, a halo pattern is observed. When nanobeam electron diffraction is performed on a conductive film, no spots are observed, and a halo pattern is observed. Observed.

[0286] Note that the oxide semiconductor film has a structure that exhibits physical properties between the nc-OS film and the amorphous oxide semiconductor film. An oxide semiconductor film having such a structure may have a structure such as the following. Amorphous-like Oxide Semiconductor (a-like OS) The conductor membrane is called the endothelium.

[0287] In the a-like OS film, voids are observed in the high-resolution TEM image. In addition, crystals may be clearly visible in high-resolution TEM images. The a-like OS film has a region in which a crystal part is not observed and a region in which a crystal part is not observed. Crystallization occurs due to the small amount of electron irradiation, which is the level observed in TEM observations, and the growth of the crystals can be seen. On the other hand, if the nc-OS film is of good quality, the small amount of charge observed by TEM can be observed. Almost no crystallization due to electron irradiation was observed.

[0288] The size of the crystals in the a-like OS film and the nc-OS film was measured using a high-resolution T This can be done using EM images. For example, InGaZnO4 crystals have a layered structure, There are two Ga-Zn-O layers between the In-O layers. Unit cell of the InGaZnO4 crystal The layer has three In-O layers and six Ga-Zn-O layers, for a total of nine layers aligned in the c-axis direction. The spacing between adjacent layers is therefore the (009) plane. This is approximately the same as the lattice spacing (also called the d value), and crystal structure analysis has determined that this value is 0.29 nm Therefore, we focused on the lattice fringes in high-resolution TEM images and In the region where the distance is between 0.28 nm and 0.30 nm, the lattice fringes are InG aIt corresponds to the ab plane of the ZnO4 crystal.

[0289] In addition, the density of an oxide semiconductor film may differ depending on the structure. If the composition of the semiconductor film is known, the density can be compared with that of a single crystal oxide semiconductor film having the same composition. By this method, the structure of the oxide semiconductor film can be estimated. The density of a-like OS film is 78.6% or more and less than 92.3% of the density of semiconductor film. For example, the density of the nc-OS film and the density of the single-crystal oxide semiconductor film are The density of the CAAC-OS film is 92.3% or more and less than 100%. It is difficult to form an oxide semiconductor film whose density is less than 78% of the density of the semiconductor film. be.

[0290] The above will be explained using a specific example. For example, In:Ga:Zn=1:1:1 [atomic In the oxide semiconductor film that satisfies the ratio of the number of ZnO atoms to the number of ZnO atoms, single crystal InGaZnO4 with a rhombohedral crystal structure is The density of is 6.357g / cm 3 Therefore, for example, In:Ga:Zn=1:1:1 In the oxide semiconductor film that satisfies the atomic ratio, the density of the a-like OS film is 5.0 g / cm 3 More than 5.9g / cm 3 For example, In:Ga:Zn=1:1: In the oxide semiconductor film that satisfies the atomic ratio of 1, the density of the nc-OS film and the CAAC- The density of the OS film is 5.9 g / cm 3 More than 6.3g / cm 3 It will be less than.

[0291] In addition, there are cases where single crystals with the same composition do not exist. In such cases, the composition may differ in any ratio. By combining single crystals, it is possible to calculate the density equivalent to a single crystal of the desired composition. The density of a single crystal of a desired composition can be determined by the ratio of the single crystals of different compositions. However, the density should be calculated using as few types of single crystals as possible. It is preferable to perform the calculation in combination.

[0292] Note that the oxide semiconductor film may be, for example, an amorphous oxide semiconductor film, an a-like OS film, or a microcrystalline oxide semiconductor film. The semiconductor layer may be a stacked film including two or more of a crystalline oxide semiconductor film and a CAAC-OS film. [Explanation of symbols]

[0293] 10 Semiconductor device 20 Semiconductor Devices 30 Driver IC 41 AND 42 Inverter 43 TRIBUF 50 Operational Amplifiers 51 Capacitive element 52 Switch 53 Integral circuit 57 Latch 58 Counter 59 Comparator 63 Circuit 64 Latch 65 Counter 66 Comparator 102 Substrate 104 Conductive film 106 Insulating film 107 Insulating film 108 Insulating film 110 Oxide semiconductor film 112a Conductive film 112b Conductive film 114 Insulating film 116 Insulating film 118 Insulating film 120 Insulating film 122 Conductive Film 142e aperture 150 Transistors 200 Display device 210 Pixel section 211 pixels 211_B pixels 211_G pixels 211_R pixels 215 Power line 220 Peripheral Circuits 220a Peripheral circuit 221 Gate driver circuit 222 Source driver circuit 223 Monitor circuit 224 ADC 230 CPU 231 Control circuit 232 Power supply circuit 233 Image Processing Circuit 234 Memory 250 Display Panel 251 Printed Circuit Board 252 Touch panel unit 253 Battery 255 FPC 256 FPC 258-1 Top cover 258-2 Lower cover 259 frames 260 Substrate 261 Substrate 262 areas 270 IC 300 Transistors 361 Conductive Film 362 Substrate 364 Insulating Film 366 Oxide Semiconductor Film 370a Conductive film 370b Conductive film 372 Insulating Film 374 Conductive Film 376 Insulating Film 389 Aperture 501 OS Layer 502 OS layer 511 Conductive layer 512 Conductive layer 513 Conductive Layer 521 Conductive Layer 522 Conductive layer 523 Conductive Layer 524 Conductive Layer 531 Conductive Layer 532 Conductive layer 533 Conductive Layer 541 Conductive Layer 542 Conductive layer 543 Conductive Layer 544 Conductive Layer 550 Conductive layer 551 Conductive layer 552 Conductive layer 553 EL layer 555 light 571 Insulating Layer 572 Insulating layer 574 Insulating Layer 576 Insulating Layer 580 Light blocking layer 581 Color filter layer 582 Overcoat layer 810 Mobile Information Terminal 815 Case 816 Display Panel 818 Hinge 820 Mobile Information Terminal 822 Display section 825 Hidden part 840 Mobile Information Terminals 845 Mobile Information Terminal 855 Information 856 Information 857 Information 880 Mobile Information Terminal 887 Information 889 Operation button 7000 display device 7001 Case 7002 Display section 7003 Support stand 7100 Portable Information Terminal 7101 Case 7102 Display section 7103 Band 7104 Buckle 7105 Operation button 7106 Input / output terminal 7107 Icon 7201 Daibu 7203 Operation switch 7210 Lighting equipment 7300 Touch Panel 7301 Case 7302 Display section 7303 Operation button 7304 Materials 7305 Control Unit 7400 Mobile Phone 7401 Case 7402 Display section 7403 Operation button 7404 External connection port 7405 Speaker 7406 Microphone

Claims

1. A pixel includes a light-emitting element, a first transistor, a third transistor, a capacitor, and a first wiring, a second wiring, and a third wiring. One of a source and a drain of the first transistor is electrically connected to the first wiring to which a video signal is input, the other of the source and the drain of the first transistor is electrically connected to the gate of the second transistor; one of a source and a drain of the second transistor is electrically connected to an anode of the light-emitting element; the other of the source and the drain of the second transistor is electrically connected to the second wiring; one of a source and a drain of the third transistor is electrically connected to the third wiring; the other of the source and the drain of the third transistor is electrically connected to the anode of the light-emitting element; one electrode of the capacitance element is electrically connected to the gate of the second transistor; a light-emitting device in which the other electrode of the capacitive element is electrically connected to an anode of the light-emitting element, a first conductive layer serving as a first gate of the third transistor; an oxide semiconductor layer having a region located above the first conductive layer and including a channel formation region of the third transistor; a second conductive layer having a region disposed above the oxide semiconductor layer, electrically connected to the oxide semiconductor layer, and functioning as the third wiring; a third conductive layer having a region located above the oxide semiconductor layer, electrically connected to the oxide semiconductor layer, and functioning as the other electrode of the capacitor; a fourth conductive layer having a region located above the oxide semiconductor layer and functioning as a second gate of the third transistor; a fifth conductive layer overlapping the third conductive layer with a first insulating layer interposed therebetween and functioning as one electrode of the capacitor; a second insulating layer having a region disposed above the second conductive layer, a region disposed above the third conductive layer, a region disposed above the fourth conductive layer, and a region disposed above the fifth conductive layer; a sixth conductive layer having a region disposed above the second insulating layer and functioning as the first wiring; a seventh conductive layer having a region disposed above the second insulating layer and functioning as the second wiring; an eighth conductive layer having a region disposed above the second insulating layer and electrically connected to the third conductive layer; a third insulating layer having a region disposed above the sixth conductive layer, a region disposed above the seventh conductive layer, and a region disposed above the eighth conductive layer; a ninth conductive layer having a region disposed above the third insulating layer, electrically connected to the eighth conductive layer, and functioning as an anode of the light-emitting element; having each of the fourth conductive layer and the fifth conductive layer has a region in contact with the first insulating layer; each of the sixth conductive layer, the seventh conductive layer, and the eighth conductive layer has a region in contact with the second insulating layer; Light emitting device.

2. A pixel includes a light-emitting element, a first transistor, a third transistor, a capacitor, and a first wiring, a second wiring, and a third wiring. One of a source and a drain of the first transistor is electrically connected to the first wiring to which a video signal is input, the other of the source and the drain of the first transistor is electrically connected to the gate of the second transistor; one of a source and a drain of the second transistor is electrically connected to an anode of the light-emitting element; the other of the source and the drain of the second transistor is electrically connected to the second wiring; one of a source and a drain of the third transistor is electrically connected to the third wiring; the other of the source and the drain of the third transistor is electrically connected to the anode of the light-emitting element; one electrode of the capacitance element is electrically connected to the gate of the second transistor; a light-emitting device in which the other electrode of the capacitive element is electrically connected to an anode of the light-emitting element, a first conductive layer serving as a first gate of the third transistor; an oxide semiconductor layer having a region located above the first conductive layer and including a channel formation region of the third transistor; a second conductive layer having a region disposed above the oxide semiconductor layer, electrically connected to the oxide semiconductor layer, and functioning as the third wiring; a third conductive layer having a region located above the oxide semiconductor layer, electrically connected to the oxide semiconductor layer, and functioning as the other electrode of the capacitor; a fourth conductive layer having a region located above the oxide semiconductor layer and functioning as a second gate of the third transistor; a fifth conductive layer overlapping the third conductive layer with a first insulating layer interposed therebetween and functioning as one electrode of the capacitor; a second insulating layer having a region disposed above the second conductive layer, a region disposed above the third conductive layer, a region disposed above the fourth conductive layer, and a region disposed above the fifth conductive layer; a sixth conductive layer having a region disposed above the second insulating layer and functioning as the first wiring; a seventh conductive layer having a region disposed above the second insulating layer and functioning as the second wiring; an eighth conductive layer having a region disposed above the second insulating layer and electrically connected to the third conductive layer; a third insulating layer having a region disposed above the sixth conductive layer, a region disposed above the seventh conductive layer, and a region disposed above the eighth conductive layer; a ninth conductive layer having a region disposed above the third insulating layer, electrically connected to the eighth conductive layer, and functioning as an anode of the light-emitting element; having each of the fourth conductive layer and the fifth conductive layer has a region in contact with the first insulating layer; each of the sixth conductive layer, the seventh conductive layer, and the eighth conductive layer has a region in contact with the second insulating layer; the second transistor has a back gate electrically connected to a gate of the second transistor; Light emitting device.

3. In claim 1 or 2, the oxide semiconductor layer contains In, Ga, and Zn; Light emitting device.

4. In any one of claims 1 to 3, It has a top emission structure. Light emitting device.

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