Semiconductor device and method for manufacturing semiconductor device

Abstract

To prevent a decrease in the lifetime of a terminal bonding to a conductive part.SOLUTION: A semiconductor device has a wiring board 11b3 and a second connection terminal. The second connection terminal has a flat second joint 23e with the back surface bonded to the wiring board 11b3 and an indentation 28 formed on the front surface 23e1. The indentation tip edge 28a3 of one end of the indentation 28 is flush with the joint tip edge 23e3 of one end of the second joint 23e, and the length of the rear edge of the indentation 28a5 at the other end opposite the indentation tip edge 28a3 of the indentation 28 is shorter than the length of the rear edge after joint 23e5 at the other end opposite the joint tip edge 23e3 of the second joint 23e.SELECTED DRAWING: Figure 18

Description

[Technical field]

[0001] The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device. [Background technology]

[0002] In semiconductor devices, a bonding material is bonded to a workpiece by ultrasonic bonding (see, for example, Patent Documents 1 and 2). Also, a wire is bonded to a workpiece by ultrasonic bonding (see, for example, Patent Document 3). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2010-212645 A [Patent Document 2] JP 2013-226580 A [Patent Document 3] JP 2000-299347 A Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a semiconductor device and a method for manufacturing the semiconductor device in which a decrease in the bonding life of a terminal to a conductive portion is prevented. [Means for solving the problem]

[0005] According to one aspect of the present invention, there is provided a semiconductor device having a conductive portion and a terminal, the terminal having a flat joint portion whose back surface is joined to the conductive portion and whose front surface has an indentation formed thereon, an indentation tip edge of one end of the indentation is flush with a joint tip edge of one end of the joint portion, and a length of an indentation rear end edge of the other end opposite the indentation tip edge is shorter than a length of a joint rear end edge of the other end opposite the joint tip edge of the joint portion.

[0006] Moreover, the indentation may further include a pair of indentation side edges connecting the indentation leading edge and the indentation trailing edge. Further, a length of the indentation tip side of the indentation may be shorter than a length of the joint tip side of the joint portion.

[0007] Moreover, the indentation may have a rectangular shape in a plan view, and a length of a leading edge of the indentation may be equal to a length of a trailing edge of the indentation. The joint may further include a pair of joint side edges perpendicular to the joint leading edge and the joint trailing edge, and the pair of joint side edges may be located outside the pair of impression side edges of the impression.

[0008] Further, the distance from each of the pair of indentation sides of the indentation to each of the pair of joining sides of the joining portion may be 1 mm or more. The combined length of the indentation rear end side and the pair of indentation side sides of the indentation may be longer than the length of the joint tip side of the joint portion.

[0009] The rear end edge of the indentation may protrude in a direction opposite to the front end edge of the indentation. In addition, the rear end edge of the impression may include a central portion and a pair of connecting portions provided on both sides of the central portion, the length of the central portion of the rear end edge of the impression may be narrower than the length of the rear end edge of the joint of the joint, and the central portion may protrude most at the rear end edge of the impression.

[0010] Furthermore, the central portion of the impression rear end edge may be parallel to the joining rear end edge, and a connection angle of the pair of connection portions with respect to the central portion may be less than 90°. The bottom surface of the impression of the joint may be flat.

[0011] The indentation of the joint may be constituted by a collection of projections and recesses, and the tops of a plurality of projections included in the collection may be substantially flush with each other. In addition, the terminal may have a linking portion that is integrally connected to the rear joining end edge of the front surface of the joint and rises upward from the front surface, and a wiring portion that is connected to an end of the linking portion and extends outward beyond the conductive portion in a planar view, and may further have a case that houses the conductive portion and fixes the wiring portion of the terminal.

[0012] According to one aspect of the present invention, there is provided a semiconductor device having a conductive portion and a terminal, the terminal having a flat joint portion whose back surface is joined to the conductive portion and whose front surface has an indentation formed thereon, an indentation tip edge of one end of the indentation is flush with a joint tip edge of one end of the joint portion, and an indentation rear end edge of the other end of the indentation opposite to the indentation tip edge forms an arc shape protruding in the opposite direction from the indentation tip edge.

[0013] According to one aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: a preparation step of preparing a conductive portion and a terminal having a flat joint portion; and a joining step of placing a back surface of the joint portion on the conductive portion and pressing a front surface of the joint portion while vibrating with a pressing surface included in a tip of a tool, thereby joining the back surface of the joint portion to the conductive portion, wherein a pressing tip edge of one end included in the pressing surface of the tool is positioned outside a joining tip edge of one end of the joint portion, and a length of a pressing rear end edge of the other end opposite the pressing tip edge of the pressing surface is shorter than a length of a joining rear end edge of the other end opposite the joining tip edge of the joining edge.

[0014] The pressing surface of the tool may further include a pair of pressing side edges connecting the pressing leading edge and the pressing trailing edge. The length of the pressing tip edge of the pressing surface of the tool may be shorter than the length of the joining tip edge of the joint.

[0015] The pressing surface of the tool may be rectangular in plan view, and the length of the pressing tip side and the length of the pressing rear side may be equal. In addition, the joint portion may further include a pair of joint side edges perpendicular to the joint tip edge and the joint rear edge, and the pair of joint side edges may be located outer than the pair of pressing side portions of the pressing surface of the tool.

[0016] Furthermore, the distances from the pair of pressing sides of the pressing surface of the tool to the pair of joining sides of the joint portion may be 1 mm or more. The pressing rear end edge of the pressing surface of the tool may protrude in a direction opposite to the pressing front end edge.

[0017] In addition, the pressing rear end edge of the pressing surface of the tool includes a pressing central portion and a pair of pressing connection portions respectively provided on both sides of the pressing central portion, and the length of the pressing central portion of the pressing rear end edge is shorter than the length of the joining rear end edge of the joining portion, and the pressing central portion may protrude most at the pressing rear end edge.

[0018] Additionally, the pressing surface of the tool may be flat. The pressing surface of the tool may include a collection of projections and recesses, and the tops of a plurality of projections included in the collection may be substantially flush with each other.

[0019] In addition, the terminal may have a linking portion that is integrally connected to the rear joining end edge of the front surface of the joint and rises upward from the front surface, and a wiring portion that is connected to an end of the linking portion and extends outward beyond the conductive portion in a planar view, and may further have a case that houses the conductive portion and fixes the wiring portion of the terminal.

[0020] According to one aspect of the present invention, there is provided a method for manufacturing a semiconductor device, comprising: a preparation step of preparing a conductive portion and a terminal having a flat joint; and a joining step of placing a back surface of the joint on the conductive portion and pressing the front surface of the joint while vibrating with a pressing surface included in a tip of a tool, thereby joining the back surface of the joint to the conductive portion, wherein a pressing tip edge of one end included in the pressing surface of the tool is located outside the joining tip edge of one end of the joint, and a pressing rear end edge of the other end opposite to the pressing tip edge of the pressing surface protrudes to the opposite side of the pressing tip edge and forms an arc shape.

[0021] The above summary of the invention does not list all of the necessary features of the present invention. Also, subcombinations of these features may also be inventions. Effect of the Invention

[0022] According to the disclosed technique, it is possible to prevent a decrease in the bonding life of the terminal to the conductive portion, and suppress a decrease in long-term reliability. [Brief description of the drawings]

[0023] [Figure 1] 1 is a plan view of a semiconductor device according to a first embodiment. [Diagram 2] 1 is a side view of a semiconductor device according to a first embodiment. [Diagram 3] 1 is a plan view of a semiconductor unit included in a semiconductor device according to a first embodiment. [Figure 4] 1 is a first cross-sectional view of a semiconductor unit included in a semiconductor device according to a first embodiment. [Diagram 5] 4 is a second cross-sectional view of the semiconductor unit included in the semiconductor device of the first embodiment. FIG. [Figure 6] 4 is a flowchart of a method for manufacturing the semiconductor device according to the first embodiment. [Figure 7] 2A to 2C are diagrams illustrating an assembly process included in the manufacturing method of the semiconductor device according to the first embodiment. [Figure 8]4 is an enlarged plan view of a bonding portion after an assembly process included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 9] 4 is an enlarged cross-sectional view of a bonding portion after an assembly process included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 10] 2 is a side view of a bonding tool used in a wiring step included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 11] 2 is a plan view of a bonding tip portion of a bonding tool used in a wiring step included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 12] 3 is a first cross-sectional view of a bonding tip portion of a bonding tool used in a wiring step included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 13] 4 is a second cross-sectional view of the bonding tip of the bonding tool used in the wiring step included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 14] 3 is a plan view showing a wiring step (at the time of bonding) included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 15] 4 is a cross-sectional view (at the time of bonding) showing a wiring step included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 16] 4 is a plan view of a main part (at the time of bonding) showing a wiring process included in the manufacturing method of the semiconductor device according to the first embodiment; FIG. [Figure 17] 4 is a cross-sectional view of a main part (at the time of bonding) showing a wiring step included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 18] 4 is a plan view of a main part (after bonding) showing a wiring step included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 19] 4 is a cross-sectional view of a main part (after bonding) showing a wiring step included in the manufacturing method of the semiconductor device according to the first embodiment. FIG. [Figure 20] 11 is a plan view of a main part (at the time of bonding) showing a wiring step included in a manufacturing method of a semiconductor device according to a reference example. FIG. [Figure 21] 11 is a cross-sectional view of a main part (at the time of bonding) showing a wiring step included in the manufacturing method of the semiconductor device of the reference example. [Figure 22] 11 is a side view of a main part (after bonding) showing a wiring step included in the manufacturing method of the semiconductor device of the reference example. FIG. [Figure 23] 13 is a plan view of a main part (at the time of bonding) showing a wiring process included in the manufacturing method of the semiconductor device according to the second embodiment. FIG. [Figure 24] 13 is a plan view of a main part (after bonding) showing a wiring step included in the manufacturing method of the semiconductor device according to the second embodiment. FIG. [Diagram 25] 13 is a plan view (at the time of bonding) showing a wiring step included in the manufacturing method of the semiconductor device according to the third embodiment. FIG. [Figure 26] 13 is a plan view of a main part (after bonding) showing a wiring step included in the manufacturing method of the semiconductor device according to the third embodiment. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0024] Hereinafter, the embodiment will be described with reference to the drawings. In the following description, the terms "front surface" and "upper surface" refer to the XY surface facing upward (+Z direction) in the semiconductor device 1 of the drawing. Similarly, "upper" refers to the upward (+Z direction) direction in the semiconductor device 1 of the drawing. The terms "rear surface" and "lower surface" refer to the XY surface facing downward (-Z direction) in the semiconductor device 1 of the drawing. Similarly, "lower" refers to the downward (-Z direction) direction in the semiconductor device 1 of the drawing. The same directionality as above will be used in other drawings as necessary. The terms "higher" and "upper" refer to the upper (+Z direction) position in the semiconductor device 1 of the drawing. Similarly, the terms "lower" and "lower" refer to the lower (-Z direction) position in the semiconductor device 1 of the drawing. The terms "front surface", "upper surface", "upper" and "rear surface", "lower surface", "lower" and "side surface" are merely convenient expressions for specifying relative positional relationships, and do not limit the technical idea of ​​the present invention. For example, "up" and "down" do not necessarily mean the vertical direction relative to the ground. In other words, the directions of "up" and "down" are not limited to the direction of gravity. In the following explanation, "main component" refers to a component containing 80 vol% or more. "Approximately the same" means within a range of ±10%. "Vertical", "orthogonal", and "parallel" mean within a range of ±10°.

[0025] [First embodiment] A semiconductor device 1 according to a first embodiment will be described with reference to Fig. 1 and Fig. 2. Fig. 1 is a plan view of the semiconductor device according to the first embodiment, and Fig. 2 is a side view of the semiconductor device according to the first embodiment. Fig. 2 is a side view of the side of the semiconductor device 1 in Fig. 1 parallel to the XZ plane, as viewed in the +Y direction.

[0026] The semiconductor device 1 includes a semiconductor module 2 and a heat sink 3. The semiconductor module 2 also includes semiconductor units 10a, 10b, and 10c, and a case 20 that houses the semiconductor units 10a, 10b, and 10c. The semiconductor units 10a, 10b, and 10c housed in the case 20 are each sealed with a sealing member (not shown). The semiconductor units 10a, 10b, and 10c all have the same configuration. When the semiconductor units 10a, 10b, and 10c are not to be distinguished from one another, they will be described as the semiconductor unit 10. Details of the semiconductor unit 10 will be described later.

[0027] The semiconductor module 2 includes a case 20 which includes an outer frame 21, first connection terminals 22a, 22b, 22c, second connection terminals 23a, 23b, 23c, a U-phase output terminal 24a, a V-phase output terminal 24b, a W-phase output terminal 24c, and control terminals 25a, 25b, 25c.

[0028] The outer frame 21 has a substantially rectangular shape in a plan view, and is surrounded on all four sides by outer walls 21a, 21b, 21c, and 21d. The outer walls 21a and 21c correspond to the long sides of the outer frame 21, and the outer walls 21b and 21d correspond to the short sides of the outer frame 21. The corners where the outer walls 21a, 21b, 21c, and 21d are connected do not necessarily have to be right angles, and may be rounded as shown in FIG. 1. Fastening holes 21i penetrating the outer frame 21 are formed at the corners of the front surface of the outer frame 21. The fastening holes 21i formed at such corners of the outer frame 21 may be formed lower than the front surface of the outer frame 21.

[0029] The outer frame 21 has unit storage sections 21e, 21f, and 21g defined along the outer walls 21a and 21c on the front surface thereof. The unit storage sections 21e, 21f, and 21g are rectangular in plan view. The unit storage sections 21e, 21f, and 21g store the semiconductor units 10a, 10b, and 10c, respectively. The outer frame 21 is attached to the front surface of the heat sink 3 on which the semiconductor units 10a, 10b, and 10c are arranged along the X direction. When the outer frame 21 is attached to the heat sink 3, the unit storage sections 21e, 21f, and 21g of the outer frame 21 surround (store) the semiconductor units 10a, 10b, and 10c arranged on the heat sink 3, respectively.

[0030] The outer frame 21 has first connection terminals 22a, 22b, 22c and second connection terminals 23a, 23b, 23c on the front surface on the outer wall 21a side in a plan view. The first connection terminals 22a, 22b, 22c and second connection terminals 23a, 23b, 23c are provided in the unit storage sections 21e, 21f, 21g, respectively. One end of the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c is exposed on the front surface on the outer wall 21a side. The other end is exposed in the unit storage sections 21e, 21f, 21g and is electrically connected to the semiconductor units 10a, 10b, 10c.

[0031] Furthermore, a U-phase output terminal 24a, a V-phase output terminal 24b, and a W-phase output terminal 24c are provided on the front surface on the outer wall 21c side. The U-phase output terminal 24a, the V-phase output terminal 24b, and the W-phase output terminal 24c are provided in the unit storage sections 21e, 21f, and 21g, respectively. One end of the U-phase output terminal 24a, the V-phase output terminal 24b, and the W-phase output terminal 24c is exposed on the front surface on the outer wall 21c side. The other end is exposed inside the unit storage sections 21e, 21f, and 21g and is electrically connected to the semiconductor units 10a, 10b, and 10c.

[0032] Further, nuts facing the openings of the first connection terminals 22a, 22b, 22c and the second connection terminals 23a, 23b, 23c are housed in the lower portions of the openings of the outer frame 21. Similarly, nuts facing the openings of the U-phase output terminal 24a, the V-phase output terminal 24b, and the W-phase output terminal 24c are housed in the lower portions of the openings of the outer frame 21.

[0033] Furthermore, the outer frame 21 is provided with control terminals 25a, 25b, and 25c along the front surfaces of the sides (outer wall 21c side) of the unit storage sections 21e, 21f, and 21g in the +Y direction in plan view. The control terminals 25a, 25b, and 25c are each provided in two parts. The control terminals 25a, 25b, and 25c are J-shaped (or U-shaped), and one end extends vertically upward (in the +Z direction) from the front surface of the outer frame 21 on the outer wall 21c side. The other end faces in the -Y direction from the outer wall 21c side of the unit storage sections 21e, 21f, and 21g and is exposed inside the unit storage sections 21e, 21f, and 21g.

[0034] The outer frame 21 includes the first connection terminals 22a, 22b, and 22c, the second connection terminals 23a, 23b, and 23c, the U-phase output terminal 24a, the V-phase output terminal 24b, the W-phase output terminal 24c, and the control terminals 25a, 25b, and 25c, and is integrally molded by injection molding using a thermoplastic resin. This forms the case 20. The thermoplastic resin is, for example, polyphenylene sulfide resin, polybutylene terephthalate resin, polybutylene succinate resin, polyamide resin, or acrylonitrile butadiene styrene resin.

[0035] The first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23b, 23c, the U-phase output terminal 24a, the V-phase output terminal 24b, the W-phase output terminal 24c, and the control terminals 25a, 25b, 25c are made of a metal with excellent electrical conductivity. Such metals are, for example, copper, aluminum, or an alloy containing at least one of these as a main component. The surfaces of the first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23b, 23c, the U-phase output terminal 24a, the V-phase output terminal 24b, the W-phase output terminal 24c, and the control terminals 25a, 25b, 25c may be plated. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy. The configuration of the end of the second connection terminal 23b will be described in detail later. The ends of the first connection terminals 22a, 22b, 22c, the second connection terminals 23a, 23c, the U-phase output terminal 24a, the V-phase output terminal 24b, the W-phase output terminal 24c, and the control terminals 25a, 25b, 25c have the same configuration as the end of the second connection terminal 23b.

[0036] The sealing member is filled in each of the unit storage sections 21e, 21f, and 21g of the outer frame 21 to seal the semiconductor units 10 in the unit storage sections 21e, 21f, and 21g. At this time, the sealing member seals the other ends of the first connection terminals 22a, 22b, and 22c, the second connection terminals 23a, 23b, and 23c, the U-phase output terminal 24a, the V-phase output terminal 24b, the W-phase output terminal 24c, and the control terminals 25a, 25b, and 25c in the unit storage sections 21e, 21f, and 21g. Such a sealing member may be a thermosetting resin. The thermosetting resin is, for example, an epoxy resin, a phenol resin, a maleimide resin, or a polyester resin. Preferably, it is an epoxy resin. Furthermore, a filler may be added to the sealing member. The filler is a ceramic having insulating properties and high thermal conductivity.

[0037] The heat sink 3 is rectangular and flat in plan view. The corners of the heat sink 3 may be rounded in plan view. The heat sink 3 has insertion holes formed in the heat sink 3 corresponding to the fastening holes 21i in plan view. The semiconductor module 2 is disposed on the front surface of the heat sink 3 via an adhesive, which will be described later. A cooling device may be configured on the rear surface of the heat sink 3 in a range corresponding to the arrangement area of ​​the semiconductor module 2. A pump is connected to the cooling device, and the coolant is circulated by the pump. The coolant is caused to flow into the cooling device by the pump, and the flowed coolant flows through the cooling device. At this time, the coolant receives heat from the semiconductor module 2, and the semiconductor module 2 is cooled. The heat-receiving coolant is discharged outside the cooling device. In this way, the coolant is circulated to the cooling device by the pump. Alternatively, only a plurality of heat dissipation fins may be formed on the rear surface of the heat sink 3. In this case, cooling is performed by air cooling.

[0038] Next, the semiconductor units 10a, 10b, and 10c (semiconductor unit 10) will be described with reference to FIGS. 3 to 5. FIG. 3 is a plan view of a semiconductor unit included in the semiconductor device of the first embodiment. FIG. 4 is a first cross-sectional view of the semiconductor unit included in the semiconductor device of the first embodiment, and FIG. 5 is a second cross-sectional view of the semiconductor unit included in the semiconductor device of the first embodiment. Note that FIG. 4 is a cross-sectional view taken along dashed line XX in FIG. 3, and FIG. 5 is a cross-sectional view taken along dashed line YY in FIG. 3.

[0039] The semiconductor unit 10 includes an insulating circuit board 11, two semiconductor chips 12, and lead frames 13a and 13b. The semiconductor chip 12 is joined to the insulating circuit board 11 by a joining member 14a. The lead frames 13a and 13b are joined to main electrodes 12b on the front surface of the semiconductor chip 12 by a joining member 14b. The lead frames 13a and 13b may be joined to the insulating circuit board 11 by ultrasonic bonding instead of using the joining member 14b.

[0040] The insulating circuit board 11 includes an insulating plate 11a, wiring plates 11b1, 11b2, and 11b3, and a metal plate 11c. The insulating plate 11a and the metal plate 11c are rectangular in plan view. The corners of the insulating plate 11a and the metal plate 11c may be round-chamfered or C-chamfered. The size of the metal plate 11c is smaller than the size of the insulating plate 11a in plan view, and the metal plate 11c is formed inside the insulating plate 11a.

[0041] The insulating plate 11a is made of a material having insulating properties and excellent thermal conductivity. The insulating plate 11a is made of ceramics. Examples of the ceramics include aluminum oxide, aluminum nitride, and silicon nitride.

[0042] The wiring boards 11b1, 11b2, and 11b3 are formed on the front surface of the insulating plate 11a. The wiring boards 11b1, 11b2, and 11b3 are made of a metal having excellent electrical conductivity. Such metals are, for example, copper, aluminum, or an alloy containing at least one of these as a main component. The thickness of the wiring boards 11b1, 11b2, and 11b3 is, for example, 0.1 mm or more and 2.0 mm or less. The surfaces of the wiring boards 11b1, 11b2, and 11b3 may be plated to improve corrosion resistance. In this case, the plating material used is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0043] Wiring board 11b1 occupies half the area of ​​the +X side of the front surface of insulating plate 11a, and occupies the entire area from the -Y side to the +Y side. Ends of first connection terminals 22a, 22b, and 22c are bonded to the area surrounded by the dashed line on wiring board 11b1. Ultrasonic bonding is used for this bonding.

[0044] Wiring board 11b2 occupies half of the -X direction side of the front surface of insulating board 11a. Furthermore, wiring board 11b2 occupies from the +Y direction edge to just before the -Y direction edge of the front surface of insulating board 11a. In the area surrounded by the dashed line shown on wiring board 11b2, the ends of U-phase output terminal 24a, V-phase output terminal 24b, and W-phase output terminal 24c are bonded. The bonding at this time is performed by ultrasonic bonding.

[0045] Wiring board 11b3 occupies an area surrounded by wiring boards 11b1 and 11b2 on the front surface of insulating board 11a. Ends of second connection terminals 23a, 23b, and 23c are bonded to the area surrounded by the dashed line shown on wiring board 11b3. Ultrasonic bonding is used for bonding.

[0046] Such wiring boards 11b1, 11b2, and 11b3 are formed on the front surface of insulating plate 11a as follows. A metal layer is formed on the front surface of insulating plate 11a, and the metal layer is etched or otherwise processed to obtain wiring boards 11b1, 11b2, and 11b3 of a predetermined shape. Alternatively, wiring boards 11b1, 11b2, and 11b3 cut out in advance from a metal layer may be joined to the front surface of insulating plate 11a with a brazing material such as silver. Note that wiring boards 11b1, 11b2, and 11b3 are merely examples. The number, shape, size, and position of wiring boards 11b1, 11b2, and 11b3 may be appropriately selected as necessary.

[0047] The metal plate 11c is formed on the back surface of the insulating plate 11a. The metal plate 11c is rectangular. The area of ​​the metal plate 11c in a plan view is smaller than that of the insulating plate 11a and is larger than the area of ​​the region in which the wiring plates 11b1, 11b2, and 11b3 are formed. The corners of the metal plate 11c may be round-chamfered or C-chamfered. The metal plate 11c is formed on the entire surface of the insulating plate 11a except for the edges. The metal plate 11c is mainly composed of a metal with excellent thermal conductivity. The metal is, for example, copper, aluminum, or an alloy containing at least one of these.

[0048] For example, a DCB (Direct Copper Bonding) board or an AMB (Active Metal Brazed) board may be used as the insulating circuit board 11 having such a configuration. The insulating circuit board 11 may be attached to the front surface of the heat sink 3 via a bonding member (not shown). Heat generated in the semiconductor chip 12 can be dissipated by being conducted to the heat sink 3 via the wiring boards 11b1 and 11b2, the insulating plate 11a, and the metal plate 11c.

[0049] The joining members 14a and 14b are solder. Lead-free solder is used as the solder. Lead-free solder is mainly composed of an alloy containing at least two of tin, silver, copper, zinc, antimony, indium, and bismuth. Furthermore, the solder may contain additives. The additives are, for example, nickel, germanium, cobalt, or silicon. By containing additives, the solder can have improved wettability, gloss, and bonding strength, thereby improving reliability.

[0050] Moreover, the joining member (not shown) that joins the semiconductor unit 10 and the heat sink 3 may be a brazing material or a thermal interface material. The brazing material is, for example, a tin alloy, an aluminum alloy, a titanium alloy, a magnesium alloy, a zirconium alloy, or a silicon alloy as a main component. The thermal interface material is, for example, an elastomer sheet, an RTV (Room Temperature Vulcanization) rubber, a gel, an adhesive material including a phase change material, or a silicone mixed with ceramics. By attaching the semiconductor unit 10 to the heat sink 3 via such a brazing material or thermal interface material, the heat dissipation performance of the semiconductor unit 10 can be improved.

[0051] The semiconductor chip 12 includes a power device element made of silicon. The power device element is an RC (Reverse-Conducting)-IGBT (Insulated Gate Bipolar Transistor). The RC-IGBT is a semiconductor element in which an IGBT, which is a switching element, and an FWD (Free Wheeling Diode), which is a diode element, are arranged in inverse parallel within one chip. The front surface of such a semiconductor chip 12 is provided with a control electrode 12a (gate electrode) and an output electrode (emitter electrode) which is a main electrode 12b. The back surface of such a semiconductor chip 12 is provided with an input electrode (collector electrode) which is a main electrode. The control electrode 12a is provided on one side of the front surface of the semiconductor chip 12. The output electrode is provided in the center of the front surface of the semiconductor chip 12.

[0052] Alternatively, the semiconductor chip 12 may be a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor) made of silicon carbide. In the power MOSFET, a body diode may function as the FWD. Such a semiconductor chip 12 has, for example, an input electrode (drain electrode) as a main electrode on the back surface, and an output electrode (source electrode) as a main electrode 12b and a control electrode 12a (gate electrode) on the front surface.

[0053] Also, the semiconductor chip 12 may use a pair of switching elements and diode elements each made of silicon, instead of the RC-IGBT and power MOSFET. The switching elements are, for example, IGBT and power MOSFET. Such a semiconductor chip has, for example, an input electrode (drain electrode or collector electrode) as a main electrode on the back surface, and a control electrode 12a (gate electrode) and an output electrode (source electrode or emitter electrode) as the main electrode 12b on the front surface. For example, an SBD (Schottky Barrier Diode) or a PiN (P-intrinsic-N) diode is used as the FWD for the diode element. Such a semiconductor chip has, for example, an output electrode (cathode electrode) as a main electrode on the back surface, and an input electrode (anode electrode) as a main electrode on the front surface.

[0054] Lead frames 13a and 13b electrically connect and wire semiconductor chip 12 and wiring boards 11b1, 11b2, and 11b3. Semiconductor unit 10 may be a device that configures a one-phase inverter circuit. Lead frame 13a directly connects main electrode 12b of semiconductor chip 12 (on wiring board 11b2) to wiring board 11b3. Lead frame 13b directly connects main electrode 12b of semiconductor chip 12 (on wiring board 11b1) to wiring board 11b2.

[0055] As shown in FIG. 3 to FIG. 5, the lead frames 13a and 13b integrally include main electrode joints 13a1 and 13b1, first vertical linkages 13a2 and 13b2, horizontal linkages 13a3 and 13b3, second vertical linkages 13a4 and 13b4, and wiring joints 13a5 and 13b5. The lead frames 13a and 13b have the same thickness overall and are flat. The lead frames 13a and 13b may be formed by bending each of these parts. The lead frames 13a and 13b are made of a metal with excellent electrical conductivity. Such a metal is, for example, copper, aluminum, or an alloy containing at least one of these as a main component. The surfaces of the lead frames 13a and 13b may be plated to improve corrosion resistance. The plating material used in this case is, for example, nickel, a nickel-phosphorus alloy, or a nickel-boron alloy.

[0056] The main electrode joints 13a1 and 13b1 are flat. The main electrode joints 13a1 and 13b1 are joined to the main electrodes 12b of the semiconductor chips 12 (on the wiring boards 11b2 and 11b1) by a joining member 14b. The joining of the wiring joints 13a5 and 13b5 to the wiring boards 11b3 and 11b2 may be done by the joining member described above or by ultrasonic joining.

[0057] The first vertical linkage 13a2, the horizontal linkage 13a3, the second vertical linkage 13a4, and the wiring joint 13a5 of the lead frame 13a have the same width. This width is the length in a direction (±X direction) perpendicular to the wiring direction (±Y direction) of the lead frame 13a. The first vertical linkage 13b2, the horizontal linkage 13b3, and the second vertical linkage 13b4 of the lead frame 13b have the same width. This width is the length in a direction (±Y direction) perpendicular to the wiring direction (±X direction) of the lead frame 13b.

[0058] The control electrodes 12a of the semiconductor chips 12 of the semiconductor units 10a, 10b, and 10c housed in the unit housing sections 21e, 21f, and 21g of the case 20 are mechanically and electrically connected to the other ends of the control terminals 25a, 25b, and 25c by wires 26. The wires 26 are mainly made of a material with excellent electrical conductivity. Such materials are, for example, gold, copper, aluminum, or an alloy containing at least one of these. Preferably, the wires 26 may be an aluminum alloy containing a trace amount of silicon. The diameter of the wires 26 is, for example, 100 μm or more and 400 μm or less.

[0059] Next, a method for manufacturing such a semiconductor device 1 will be described with reference to FIG. 6. FIG. 6 is a flow chart of the method for manufacturing a semiconductor device according to the first embodiment. First, a preparation step is performed to prepare components constituting the semiconductor device 1 and manufacturing equipment for manufacturing the semiconductor device 1 (step S1 in FIG. 6). Components of the semiconductor device 1, such as the semiconductor chip 12, the insulating circuit board 11, the heat sink 3, the case 20, the sealing member, and the lead frames 13a and 13b, are prepared. The semiconductor chip 12 is bonded to the insulating circuit board 11, and the lead frames 13a and 13b are bonded to assemble the semiconductor unit 10. Not only the components, but also the equipment used in the manufacturing method of the semiconductor device 1 is prepared. Examples of such equipment include an ultrasonic bonding equipment, a wire bonding equipment, and a dispenser equipment for resin sealing. Necessary equipment other than the components and equipment listed here may be prepared.

[0060] Next, an assembly process is performed in which the semiconductor unit 10 is joined to the heat sink 3 and the case 20 is disposed on the heat sink 3 (step S2 in FIG. 6). The semiconductor unit 10 is joined to the heat sink 3 via the above-mentioned joining member. The case 20 is attached onto the heat sink 3 with an adhesive. As a result, the semiconductor units 10 are stored in the unit storage portions 21e, 21f, and 21g of the case 20, respectively.

[0061] The semiconductor unit 10 thus stored in the case 20 will be described with reference to Fig. 7. Fig. 7 is a diagram showing an assembly process included in the manufacturing method of the semiconductor device according to the first embodiment. Fig. 7 shows the semiconductor unit 10b stored in the unit storage section 21f of the case 20. The semiconductor units 10a and 10c stored in the unit storage sections 21e and 21g are stored in the same manner.

[0062] After step S2 in Fig. 6, in unit storage section 21f, as shown in Fig. 7, first joint portion 22b1 included in first connection terminal 22b is arranged on wiring board 11b1. Third joint portion 24b1 of V-phase output terminal 24b is arranged on wiring board 11b2. Second joint portion 23e included in second connection terminal 23b is arranged on wiring board 11b3.

[0063] Here, as an example, the details of the second connection terminal 23b arranged on the semiconductor unit 10 will be described with reference to Figs. 8 and 9. Fig. 8 is an enlarged plan view of the joint portion after the assembly process included in the manufacturing method of the semiconductor device of the first embodiment. Fig. 9 is an enlarged cross-sectional view of the joint portion after the assembly process included in the manufacturing method of the semiconductor device of the first embodiment. Fig. 8 shows an enlarged view of the periphery of the second joint portion 23e included in the second connection terminal 23b of Fig. 7. Fig. 9 is a cross-sectional view taken along dashed line XX in Fig. 8.

[0064] The second connection terminal 23b has the same overall thickness (in the ±Z direction) and integrally includes the second joint portion 23e, the second linking portion 23f, and the second wiring portion 23g. The thickness may be 1.2 mm or more and 1.5 mm or less.

[0065] The second bonding portion 23e has a flat plate shape. The second bonding portion 23e includes a rectangular front surface 23e1 and a back surface 23e2 in a plan view. After the assembly process in step S2 of FIG. 6, the back surface 23e2 of the second bonding portion 23e faces the wiring board 11b3. At this time, the back surface 23e2 of the second bonding portion 23e may be in contact with the wiring board 11b3, or there may be a small gap therebetween.

[0066] Furthermore, the second joint portion 23e includes side surfaces which surround the front surface 23e1 and the back surface 23e2 in order on all four sides. The four sides to which the side surfaces of the front surface 23e1 are connected are a joint leading edge 23e3, a joint side 23e4, a joint trailing edge 23e5, and a joint side 23e6.

[0067] The joint tip edge 23e3 is one end side of the second joint portion 23e, and faces the inside of the unit storage portion 21f (+Y direction) when the second joint portion 23e is arranged on the wiring board 11b3. The joint rear end edge 23e5 is the other end side of the second joint portion 23e, and faces the inner wall of the unit storage portion 21f (-Y direction) when the second joint portion 23e is arranged on the wiring board 11b3. The joint rear end edge 23e5 faces the joint tip edge 23e3. The lengths (±X directions) of the joint tip edge 23e3 and the joint rear end edge 23e5 may be the same.

[0068] The joint side edges 23e4 and 23e6 are perpendicular to the joint leading edge 23e3 and the joint trailing edge 23e5, and connect the joint leading edge 23e3 and the joint trailing edge 23e5. The connection points of the joint leading edge 23e3, the joint side edges 23e4, the joint trailing edge 23e5, and the joint side edges 23e6 do not necessarily have to be at right angles, and may be rounded.

[0069] The second linking portion 23f links the second joint portion 23e and the second wiring portion 23g. The second linking portion 23f is integrally connected to a side surface of the second joint portion 23e on the joining rear end side 23e5 side, and rises in the +Z direction from the front surface 23e1 of the second joint portion 23e.

[0070] The second wiring portion 23g is connected to an end of the second linking portion 23f and extends outward from the unit housing portion 21f in a plan view. The second wiring portion 23g extends within the outer frame 21 and is exposed from the front surface of the outer frame 21.

[0071] The second connection terminal 23b is disposed on the wiring portion 11b3 in this manner. Although not shown in the figures, the second connection terminals 23a and 23c, the first connection terminals 22a, 22b and 22c, the U-phase output terminal 24a, the V-phase output terminal 24b and the W-phase output terminal 24c are configured in a similar manner.

[0072] Next, a wiring step is performed to wire the semiconductor unit 10 (step S3 in FIG. 6). In this wiring step, electrical wiring is performed between each terminal and the semiconductor unit 10 using wiring members.

[0073] First, the control electrode 12a of the semiconductor chip 12 included in the semiconductor unit 10 housed in the case 20 is bonded to the control terminals 25a, 25b, and 25c by wires 26 using a bonding device. The bonded wires 26 can be seen in FIG.

[0074] Furthermore, each joint portion of each terminal arranged on wiring boards 11b1, 11b2, and 11b3 of semiconductor unit 10 is ultrasonically bonded to wiring boards 11b1, 11b2, and 11b3 by an ultrasonic bonding device. Here, a bonding tool included in the ultrasonic bonding device will be described with reference to FIGS. 10 to 13.

[0075] FIG. 10 is a side view of a bonding tool used in a wiring process included in the manufacturing method of a semiconductor device according to the first embodiment. FIG. 11 is a plan view of a bonding tip of a bonding tool used in a wiring process included in the manufacturing method of a semiconductor device according to the first embodiment. FIG. 12 is a first cross-sectional view of a bonding tip of a bonding tool used in a wiring process included in the manufacturing method of a semiconductor device according to the first embodiment, and FIG. 13 is a second cross-sectional view of a bonding tip of a bonding tool used in a wiring process included in the manufacturing method of a semiconductor device according to the first embodiment. Note that FIG. 10 is a side view of the vicinity of the tip of the bonding tool 4 as seen in the +Y direction. FIG. 11 is a plan view (rear view) of the bonding tool 4 as seen in the +Z direction. FIGS. 12(A) and (B) are cross-sectional views along dashed lines Y1-Y1 and Y2-Y2 in FIG. 11, respectively. FIG. 13 is a cross-sectional view along dashed lines X1-X1 and X2-X2 in FIG. 11, respectively.

[0076] The bonding tool 4 shown in Fig. 10 is included in an ultrasonic bonding device. The bonding tool 4 is columnar, and is vibrated in a predetermined direction by a vibration generator also included in the ultrasonic bonding device. The columnar shape may be either a cylindrical shape or a polygonal cylindrical shape. The predetermined direction may be one direction parallel to the XY plane.

[0077] The bonding tool 4 includes a bonding tip 50 at its tip (-Z direction in FIG. 10). The bonding tip 50 is capable of pressing and bonding the objects to be bonded while being in contact with the objects to be bonded and vibrating in a specified direction.

[0078] As shown in Figures 11 and 12, the joint tip portion 50 includes a joint base 51 and a plurality of protrusions 52. The joint base 51 and the plurality of protrusions 52 included in the joint tip portion 50 may be made of the same material. An example of such a material is a cemented carbide material. The cemented carbide material is, for example, tungsten, tungsten carbide, or an alloy containing at least one of these.

[0079] The joining base 51 is located at the tip of the joining tip portion 50 that contacts the joining target. The joining base 51 has a rectangular shape in a plan view, and includes a flat tip surface 51e that is approximately parallel to the XY plane, and side surfaces that surround the tip surface 51e on all four sides. The locations where the side surfaces are connected to the tip surface 51e include the pressing side edge 51a, the pressing tip edge 51b, the pressing side edge 51c, and the pressing rear end edge 51d. The pressing tip edge 51b and the pressing rear end edge 51d have the same length, and are shorter than the length in the same direction of the second joining portion 23e of the second connection terminal 23b described above.

[0080] The plurality of protrusions 52 may be integrally formed on the tip surface 51e. That is, the tip surface 51e of the bonding base 51 includes a collection of projections and recesses due to the plurality of protrusions 52. The protrusions 52 are pyramidal and include side surfaces 52a to 52d. In this case, the protrusions 52 include a flat pressing surface 52e at the top. Among the plurality of protrusions 52, the protrusions 52 arranged along the periphery of the tip surface 51e are shaped like half a pyramid. The protrusions 52 provided on the pressing side 51a of the tip surface 51e include side surfaces 52c and 52d. The protrusions 52 provided on the pressing tip side 51b of the tip surface 51e include side surfaces 52a and 52d. The protrusions 52 provided on the pressing side 51c of the tip surface 51e include side surfaces 52a and 52b. The projection 52 on the pushing rear end side 51d side of the tip surface 51e includes side surfaces 52b and 52c.

[0081] The multiple protrusions 52 may be formed in a staggered or lattice pattern. The arrangement of the multiple protrusions 52 is one example. The quadrangular pyramid shape of the protrusions 52 is also one example, and the protrusions 52 may be polygonal pyramid or conical. Such multiple protrusions 52 are provided with gaps 53 on the tip surface 51e. The multiple protrusions 52 have approximately the same height. This height refers to the height from the tip surface 51e to the pressing surface 52e of the protrusions 52. The pressing surfaces 52e of the multiple protrusions 52 form the same plane.

[0082] Moreover, the height of the plurality of protrusions 52 from the tip surface 51e is 15% or more and 90% or less of the thickness of the objects to be joined. If the height of the plurality of protrusions 52 from the tip surface 51e is less than 15% of the thickness of the objects to be joined, the objects to be joined will be ground and damaged when joined with the joining tip portion 50 including such a plurality of protrusions 52. Moreover, if the height of the plurality of protrusions 52 from the tip surface 51e exceeds 90% of the thickness of the objects to be joined, the objects to be joined may break. In this embodiment, the height of the plurality of protrusions 52 from the tip surface 51e is, for example, 0.15 mm or more.

[0083] Such bonding in the wiring process by the bonding tool 4 will be described with reference to Figs. 14 to 17. Fig. 14 is a plan view showing the wiring process (at bonding) included in the manufacturing method of the semiconductor device of the first embodiment. Fig. 15 is a cross-sectional view (at bonding) showing the wiring process included in the manufacturing method of the semiconductor device of the first embodiment. Fig. 16 is a plan view (at bonding) of a main part showing the wiring process included in the manufacturing method of the semiconductor device of the first embodiment. Fig. 17 is a cross-sectional view (at bonding) of a main part showing the wiring process included in the manufacturing method of the semiconductor device of the first embodiment. Here, bonding of the second bonding portion 23e of the second connection terminal 23b to the wiring board 11b3 will be described. Bonding of the other bonding portions to the wiring boards 11b1 and 11b2 is performed in a similar manner.

[0084] In FIG. 14, the dashed square on the front surface of the second joint 23e of the second connection terminal 23b indicates the position of the joint base 51 of the bonding tool 4 set on the front surface of the second joint 23e. FIG. 15 is a cross-sectional view taken along dashed line XX at a location corresponding to FIG. 8 in FIG. 14. FIG. 16 is an enlarged view of the second joint 23e in the dashed circle in FIG. 14. FIG. 16 also indicates the position of the joint tip 50 (and the multiple protrusions 52) with dashed lines. FIG. 17 is a cross-sectional view taken along dashed line YY in FIG. 16. However, FIG. 17 shows only the joint tip 50 of the bonding tool 4 that presses the second joint 23e.

[0085] In order to bond the second joint portion 23e of the second connection terminal 23b to the wiring board 11b3 of the insulating circuit board 11, the joint tip portion 50 of the bonding tool 4 is set on the front surface 23e1 of the second joint portion 23e. At this time, as shown in Figures 14 and 15, the pressing tip edge 51b of the joint tip portion 50 (joining base 51) is located outside the joining tip edge 23e3 of the second joint portion 23e (+Y direction: toward the center of the unit storage portion 21f). Also, at this time, the pressing side edges 51a and 51c of the joint tip portion 50 (joining base 51) are located inside (±X direction) the joining side edges 23e4 and 23e6 of the second joint portion 23e.

[0086] In this state, second joint portion 23e of second connection terminal 23b is pressed toward wiring board 11b3 of insulating circuit board 11 by joint tip portion 50 of bonding tool 4 while being vibrated at a predetermined vibration frequency.

[0087] Then, as shown in Figures 16 and 17, the bonding tip 50 of the bonding tool 4 penetrates into the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b, and burrs B are generated from the pressing sides 51a, 51c of the bonding tip 50 (bonding base 51).

[0088] In this manner, the second joint portion 23e of the second connection terminal 23b can be joined to the wiring board 11b3 of the insulating circuit board 11. The state after the joining in this manner will be described with reference to Figs. 18 and 19. Fig. 18 is a plan view of the main part (after joining) showing the wiring process included in the manufacturing method of the semiconductor device of the first embodiment. Fig. 19 is a cross-sectional view of the main part (after joining) showing the wiring process included in the manufacturing method of the semiconductor device of the first embodiment. Figs. 18 and 19 correspond to the case in Figs. 16 and 17 where the bonding tool 4 is removed after joining. Fig. 19 corresponds to the cross-sectional view taken along the dashed line YY in Fig. 18.

[0089] 16 and 17, the second joint portion 23e of the second connection terminal 23b is joined to the wiring board 11b3 of the insulating circuit board 11 using the bonding tool 4, and then the bonding tool 4 is removed. Then, as shown in FIGS. 18 and 19, an indentation 28 is generated on the front surface 23e1 of the second joint portion 23e of the second connection terminal 23b.

[0090] As shown in FIG. 18, the indentation 28 is formed by transferring an assembly of projections and recesses of a plurality of protrusions 52 included in the bonding tip 50 of the bonding tool 4 to the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b. Also, the indentation portion 23e7 where the indentation 28 is transferred to the second bonding portion 23e is recessed with respect to the front surface 23e1 of the second bonding portion 23e of the second connecting terminal 23b and is located lower than the front surface 23e1 as shown in FIG. 19. The depth of the indentation portion 23e7 with respect to the front surface 23e1 of the second bonding portion 23e is, for example, 250 μm or more and 700 μm or less. Such an indentation 28 includes an indentation front edge 28a3, an indentation side edge 28a4, an indentation rear end edge 28a5, and an indentation side edge 28a6 in a plan view.

[0091] The indentation tip edge 28a3 is on one end side of the indentation 28 (the +Y direction side, the center side of the unit storage section 21f) and is flush with the joint tip edge 23e3 of the second joint portion 23e of the second connection terminal 23b. The indentation rear end edge 28a5 has a length L5 in the ±X directions.

[0092] The indentation rear end side 28a5 faces the indentation front end side 28a3 and is on the other end side (-Y direction side) of the indentation 28. The length in the ±X directions of the indentation rear end side 28a5 is the same length as the indentation front end side 28a3, that is, length L5. The length L5 of the indentation rear end side 28a5 is shorter than the length L0 of the joint rear end side 23e5 of the second joint portion 23e of the second connection terminal 23b.

[0093] The indentation sides 28a4, 28a6 are perpendicular to the indentation leading edge 28a3 and the indentation trailing edge 28a5, and connect the indentation leading edge 28a3 and the indentation trailing edge 28a5, respectively. The indentation sides 28a4, 28a6 have the same length L4, L6 (±Y direction). The indentation sides 28a4, 28a6 are located inward in the ±X direction from the joining sides 23e4, 23e6 of the second joining portion 23e of the second connection terminal 23b. There is a distance W between the indentation sides 28a4, 28a6 and the joining sides 23e4, 23e6 of the second joining portion 23e of the second connection terminal 23b. The distance W may be, for example, 1 mm or more, and more preferably 1.5 mm or more. In addition, a burr B may be generated on the indentation sides 28a4, 28a6. 18 and 19 show a case where the burr B extends continuously outward (toward the joining sides 23e4, 23e6 of the second joining portion 23e) along the entire indentation side edges 28a4, 28a6. The shape, size, length in the ±X direction and ±Y direction, and thickness in the ±Z direction of the burr B are merely examples. The burr B may be generated discontinuously along the entire indentation side edges 28a4, 28a6. Furthermore, the length of the burr B extending outward from the indentation side edges 28a4, 28a6 may differ depending on the position (in the ±Y direction) of the indentation side edges 28a4, 28a6. The burr B extending from the indentation side edges 28a4, 28a6 does not necessarily have to be symmetrical.

[0094] Next, a sealing process is performed in which a sealing material is filled into the unit storage portions 21e, 21f, and 21g in which the semiconductor units 10 of the case 20 are stored, and the sealing material is sealed (step S4 in FIG. 6). After the sealing material is filled into the unit storage portions 21e, 21f, and 21g, the sealing material is hardened to seal the semiconductor units 10 and the like, and the semiconductor device 1 is obtained.

[0095] Here, a method for manufacturing the semiconductor device 1 of the reference example will be described. The semiconductor device 1 of the reference example can also be manufactured according to the flowchart of FIG. 6. However, in the reference example, the length in the ±X direction of the bonding base 51 of the bonding tip 50 of the bonding tool 4 is longer than the length in the same direction of the bonding portions of each terminal. Therefore, the multiple protrusions 52 are also formed uniformly on the expanded bonding base 51. Other than this, the semiconductor device 1 and the manufacturing method of the semiconductor device 1 are the same as those of the first embodiment.

[0096] As in the first embodiment, a preparation step S1 and an assembly step S2 are performed. Then, a wiring step is performed to wire the semiconductor unit 10 (step S3 in FIG. 6). The bonding between the second bonding portion 23e of the second bonding terminal 23b and the wiring board 11b3 by the bonding tool 4, which is included in the wiring step, will be described with reference to FIGS. 20 and 21.

[0097] Fig. 20 is a plan view of a main part (at the time of bonding) showing a wiring step included in the manufacturing method of a semiconductor device of the reference example. Fig. 21 is a cross-sectional view of a main part (at the time of bonding) showing a wiring step included in the manufacturing method of a semiconductor device of the reference example. Figs. 20 and 21 correspond to Figs. 16 and 17, respectively. Fig. 20 also shows the position of the bonding tip 50 (and the multiple protrusions 52) with a dashed line. Fig. 21 is a cross-sectional view taken along dashed line YY in Fig. 20.

[0098] As in the first embodiment, the bonding tip 50 of the bonding tool 4 is set on the front surface 23e1 of the second bonding portion 23e. Then, the second bonding portion 23e of the second connection terminal 23b is pressed against the wiring board 11b3 of the insulating circuit board 11 while being vibrated by the bonding tip 50 of the bonding tool 4 at a predetermined vibration frequency.

[0099] Then, as shown in Figures 20 and 21, the bonding tip 50 of the bonding tool 4 penetrates into the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b, and burrs B are generated from the bonding sides 23e4, 23e6 of the second bonding portion 23e and extend outward (in the ±X direction).

[0100] The state after the bonding tool 4 is removed after bonding in this manner will be described with reference to FIG. 22. FIG. 22 is a side view of the main part (after bonding) showing the wiring process included in the manufacturing method of the semiconductor device of the reference example. FIG. 22 is a side view of the second bonding portion 23e of the second connection terminal 23b bonded to the wiring board 11b3 as viewed in the +X direction. Although a plan view of the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b in this case is omitted, in FIG. 18, the indentation side edges 28a4, 28a6 of the indentation 28 and the bonding side edges 23e4, 23e6 of the second bonding portion 23e of the second connection terminal 23b are aligned.

[0101] After the bonding in step S3, an indentation 28 is generated on the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b, as shown in Fig. 22. Then, the sealing process in step S4 is performed, and the semiconductor device 1 is manufactured.

[0102] When such semiconductor device 1 is subjected to a heat cycle test, stress is generated inside due to differences in the linear expansion coefficients of the components of semiconductor device 1. Such stress also affects the joints of the terminals joined to wiring boards 11b1, 11b2, and 11b3.

[0103] For example, in the manufacturing method of the reference example semiconductor device 1, as shown in FIG. 20, when the bonding tip 50 of the bonding tool 4 presses the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b, cracks are generated at the corners C1, C2 of the front surface 23e1 of the second bonding portion 23e by the bonding tip 50, and the cracks propagate from the corners C1, C2 along the arrows.

[0104] A heat cycle test is performed on the semiconductor device 1 including the second bonding terminal 23b in which such a crack has occurred. The second bonding portion 23e of the second bonding terminal 23b is fixed to the wiring board 11b3, and the second wiring portion 23g is fixed to the outer frame 21. When the semiconductor device 1 is warped, stress is generated in the second bonding terminal 23b. Then, a crack develops in the second bonding terminal 23b along the arrow F shown in FIG. 22, and the second bonding portion 23e breaks, leaving an indentation portion 23e7 in which the indentation 28 of the second bonding portion 23e is transferred on the wiring board 11b3. Therefore, in the case of the reference example, the useful life of the semiconductor device 1 is likely to decrease, and the long-term reliability is reduced.

[0105] On the other hand, in the bonding tip portion 50 (bonding base 51) of the bonding tool 4 used in the manufacturing method of the semiconductor device 1 of the first embodiment, the pressing tip edge 51b is located outside the bonding tip edge 23e3 at one end of the second bonding portion 23e, and the length of the pressing rear end edge 51d opposite the pressing tip edge 51b is narrower than the length of the bonding rear end edge 23e5 at the other end of the second bonding portion 23e.

[0106] When the front surface 23e1 of the second joint portion 23e of the second connection terminal 23b is pressed with the joint tip portion 50 of the bonding tool 4, cracks are generated at the corners C1 and C2 of the front surface 23e1 of the second joint portion 23e, and the cracks progress from the corners C1 and C2 along the arrows, as in the reference example (see FIG. 16). However, in this case, the length of the pressing rear end side 51d facing the pressing tip side 51b is shorter than the length of the joining rear end side 23e5 at the other end of the second joint portion 23e, so that the stress related to the corners C1 and C2 is dispersed in two directions (arrows F1 and F2 in FIG. 16). Therefore, it is possible to delay the propagation of the cracks in each direction. Therefore, even if a heat cycle test is performed on the semiconductor device 1 of the first embodiment, the propagation of the cracks can be delayed, and the breakage of the second joint terminal 23b (second joint portion 23e) can be delayed. As a result, it is possible to prevent a decrease in the service life of the semiconductor device 1 of the first embodiment and improve the long-term reliability.

[0107] Moreover, the pressing area of ​​the bonding tip 50 of the bonding tool 4 is smaller than that of the reference example. Therefore, the volume of the pressing of the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b is also reduced. As a result, the amount of burrs B generated on the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b is also reduced. Depending on the extent of extension, the burrs B may come into contact with other current-carrying structures. Furthermore, the burrs B may become a cause of noise generation. In the manufacturing method of the semiconductor device 1 according to the first embodiment, the amount of burrs B generated is suppressed, so that the possibility of contacting other current-carrying structures is reduced, and the generation of noise is also suppressed.

[0108] The semiconductor device 1 manufactured by the above manufacturing method includes the wiring board 11b3 and the second connection terminal 23b. The second connection terminal 23b has a flat second joint 23e with a back surface 23e2 bonded to the wiring board 11b3 and an indentation 28 formed on a front surface 23e1. An indentation tip edge 28a3 at one end of the indentation 28 is flush with a joint tip edge 23e3 at one end of the second joint 23e, and the length of an indentation rear end edge 28a5 at the other end facing the indentation tip edge 28a3 of the indentation 28 is shorter than the length of a joint rear end edge 23e5 at the other end facing the joint tip edge 23e3 of the second joint 23e. This makes it possible to delay the extension of a crack occurring at the joint rear end edge 23e5 of the second joint 23e. As a result, it is possible to prevent a decrease in the service life of the semiconductor device 1 of the first embodiment and improve long-term reliability.

[0109] In addition, the combined length L5 of the indentation rear end side 28a5 of the indentation 28 and the lengths L4 and L6 of the indentation side sides 28a4 and 28a6 (L4+L5+L6) is preferably longer than the length L0 of the joint tip side 23e3 of the second joint portion 23e of the second connection terminal 23b. This can further delay the propagation of the crack.

[0110] As described above, the distance W between the indentation side 28a4, 28a6 and the joining side 23e4, 23e6 of the second joint 23e of the second connection terminal 23b may be, for example, 1 mm or more, more preferably 1.5 mm or more. For example, if the distance W is greater than 0 mm and less than 0.5 mm, the portion adjacent to the indentation portion 23e7 of the second joint 23e in the ±X direction is likely to break in a heat cycle test. This is considered to be due to a decrease in strength caused by a decrease in the volume of the portion adjacent to the indentation portion 23e7 of the second joint 23e in the ±X direction (see FIG. 19). For this reason, the distance W between the indentation side 28a4, 28a6 and the joining side 23e4, 23e6 of the second joint 23e of the second connection terminal 23b is 1 mm or more, preferably 1.5 mm or more.

[0111] [Second embodiment] In the second embodiment, a method for manufacturing a semiconductor device 1 using a bonding tip 50 of a bonding tool 4 having a shape different from that of the first embodiment will be described with reference to Fig. 23. Fig. 23 is a plan view of a main part (at the time of bonding) showing a wiring step included in the method for manufacturing a semiconductor device of the second embodiment.

[0112] The semiconductor device of the second embodiment can also be manufactured according to the flowchart of Fig. 6. However, in the second embodiment, the shape of the bonding base 51 of the bonding tip portion 50 of the bonding tool 4 in a plan view is different from that in the first embodiment.

[0113] The bonding base 51 of the second embodiment has a hexagonal shape in a plan view, and the side of the bonding base 51 facing the bonding rear end side 23e5 of the second connection terminal 23b protrudes toward the bonding rear end side 23e5. That is, the bonding base 51 of the second embodiment includes a flat tip surface 51e that is approximately parallel to the XY plane and side surfaces surrounding the tip surface 51e on all four sides. The portion where the side surface and the tip surface 51e are connected includes the pressing side edge 51a, the pressing tip edge 51b, the pressing side edge 51c, and the pressing rear end edge 51d, as shown in FIG.

[0114] The pressing tip edge 51b is located outside (in the +Y direction) of the joint tip edge 23e3 of the second joint portion 23e of the second connection terminal 23b. The length in the ±X direction of the pressing tip edge 51b is greater than the length in the same direction of the joint tip edge 23e3 of the second joint portion 23e of the second connection terminal 23b.

[0115] The pressing sides 51a, 51c are connected to the ±X direction ends of the pressing tip side 51b and are perpendicular to the pressing tip side 51b. The pressing sides 51a, 51c have the same length (±Y direction), and may have any length such that the connection angle of the pressing side portions 51d2, 51d3 to the pressing central portion 51d1, which will be described later, is less than 90°.

[0116] The pressing rear end side 51d has both ends connected to the pressing side sides 51a and 51c. The pressing rear end side 51d further includes a pressing central portion 51d1 and pressing side portions 51d2 and 51d3. The pressing central portion 51d1 is the central portion of the pressing rear end side 51d and is parallel to the pressing front end side 51b. The length of the pressing central portion 51d1 in the ±X direction is shorter than the length of the joining rear end side 23e5 of the second joint portion 23e of the second connection terminal 23b in the same direction. In addition, the pressing central portion 51d1 is closer to the joining rear end side 23e5 of the second joint portion 23e than the ends of the pressing side sides 51a and 51c in the -Y direction. That is, the pressing rear end side 51d has the pressing central portion 51d1 protruding to the opposite side to the pressing front end side 51b.

[0117] The pressing side portions 51d2 and 51d3 connect both ends of the pressing central portion 51d1 in the ±X direction to the ends of the pressing sides 51a and 51c in the -Y direction. The lengths of the pressing side portions 51d2 and 51d3 are equal, depending on the degree of protrusion of the pressing central portion 51d1. The connection angles of the pressing side portions 51d2 and 51d3 to the pressing central portion 51d1 are each less than 90°.

[0118] In the pressing rear end side 51d, the corners C1 and C2 are formed by the connection parts between the pressing central part 51d1 and the pressing side parts 51d2 and 51d3. The angles of the corners C1 and C2 are both larger than the angles of the corners C1 and C2 in the first embodiment, and are larger than 90°.

[0119] A plurality of protrusions 52 are uniformly formed over the entire tip surface 51e of the bonded base 51. Also in the second embodiment, the heights of the plurality of protrusions 52 are approximately equal. This height is the height from the tip surface 51e to the pressing surface 52e of the protrusions 52. The pressing surfaces 52e of the plurality of protrusions 52 form the same plane.

[0120] Such bonding tool 4 is used for bonding in the wiring process of step S3 in Fig. 6. Bonding tip portion 50 of bonding tool 4 of the second embodiment is set on front surface 23e1 of second bonding portion 23e (see Fig. 23).

[0121] In this state, second joint portion 23e of second connection terminal 23b is pressed toward wiring board 11b3 of insulating circuit board 11 by joint tip portion 50 of bonding tool 4 while being vibrated at a predetermined vibration frequency.

[0122] 23, the bonding tip 50 of the bonding tool 4 penetrates into the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b. Note that, in this case as well, although not shown, burrs B are generated from the portions of the bonding sides 23e4, 23e6 of the second connection terminal 23b (second bonding portion 23e) that contact the bonding tip 50 (bonding base 51).

[0123] In this manner, the second joint portion 23e of the second connection terminal 23b can be joined to the wiring board 11b3 of the insulating circuit board 11. The state after joining in this manner will be described with reference to FIG. 24. FIG. 24 is a plan view of the essential parts (after joining) showing a wiring step included in the manufacturing method of the semiconductor device according to the second embodiment. Note that FIG. 24 shows the front surface 23e1 of the second joint portion 23e of the second connection terminal 23b with the bonding tool 4 removed in FIG. 23. Also, burrs B are omitted.

[0124] 23, second joint portion 23e of second connection terminal 23b is joined to wiring board 11b3 of insulating circuit board 11 using bonding tool 4, and then bonding tool 4 is removed. Then, as shown in FIG. 24, indentation 28 is generated on front surface 23e1 of second joint portion 23e of second connection terminal 23b.

[0125] The indentation 28 is formed by transferring an assembly of projections and recesses of a plurality of protrusions 52 included in the bonding tip 50 of the bonding tool 4 to the front surface 23e1 of the second bonding portion 23e of the second connecting terminal 23b. Although not shown, the indentation portion where the indentation 28 is transferred to the second bonding portion 23e is recessed with respect to the front surface 23e1 of the second bonding portion 23e of the second connecting terminal 23b as described above, and is located lower than the front surface 23e1. In a plan view, the indentation 28 includes an indentation tip edge 28a3, an indentation side edge 28a4, an indentation rear end edge 28a5, and an indentation side edge 28a6.

[0126] The indentation tip edge 28a3 is on one end side (+Y direction side, center side of unit storage section 21f) of the indentation 28 and is flush with the joint tip edge 23e3 of the second connection terminal 23b (second joint portion 23e). The length of the indentation tip edge 28a3 in the ±X directions is the same as the joint tip edge 23e3 of the second joint portion 23e.

[0127] The indentation sides 28a4 and 28a6 are connected to the ±X direction ends of the indentation tip side 28a3 and are perpendicular to the indentation tip side 28a3. The indentation sides 28a4 and 28a6 are flush with the joining sides 23e4 and 23e6 of the second joining terminal 23b (second joining portion 23e). The indentation sides 28a4 and 28a6 have the same length (±Y direction).

[0128] The indentation rear end side 28a5 is connected to the indentation side sides 28a4 and 28a6. The indentation rear end side 28a5 further includes a central portion 28a7 and side portions 28a8 and 28a9. The central portion 28a7 is the center portion of the indentation rear end side 28a5 and is parallel to the indentation front end side 28a3. The length in the ±X direction of the central portion 28a7 is shorter than the length in the same direction of the joining rear end side 23e5 of the second connection terminal 23b (second joining portion 23e). In addition, the central portion 28a7 is closer to the joining rear end side 23e5 of the second joining portion 23e than the ends in the -Y direction of the indentation side sides 28a4 and 28a6. That is, the central portion 28a7 of the indentation rear end side 28a5 protrudes to the opposite side to the indentation front end side 28a3.

[0129] The side portions 28a8 and 28a9 connect both ends of the central portion 28a7 in the ±X direction to the ends of the indentation sides 28a4 and 28a6 in the -Y direction. The lengths of the side portions 28a8 and 28a9 correspond to the degree of protrusion of the central portion 28a7 and are equal. The connection angles of the side portions 28a8 and 28a9 to the central portion 28a7 are each less than 90°.

[0130] In the heat cycle test, the cracks generated at the corners C1 and C2 of the front surface 23e1 of the second joint 23e propagate from the corners C1 and C2 along the arrows. However, in this case, the length of the pressing central portion 51d1 of the pressing rear end side 51d facing the pressing front end side 51b is shorter than the length of the joining rear end side 23e5 of the other end of the second joint 23e, so that the stress related to the corners C1 and C2 is dispersed in two directions (arrows F1 and F2 in FIG. 23). Therefore, as in the first embodiment, it is possible to delay the extension of the cracks in each direction. In addition, the length (length of the indentation rear end side 28a5) until the second joint 23e breaks after the crack propagates and connects between the joining side sides 23e4 and 23e6 of the second joint 23e is longer than the length between the corners C1 and C2 of the second joint 23e in the reference example of FIG. 20. Therefore, even if a heat cycle test is performed on the semiconductor device of the second embodiment, the propagation of the crack can be delayed, and the breakage of the second connecting terminal 23b (the second connecting portion 23e) can be delayed. As a result, the deterioration of the service life of the semiconductor device of the second embodiment can be prevented, and the long-term reliability can be improved.

[0131] The shape of the bonding tip 50 (bonding base 51) of the bonding tool 4 in the second embodiment may be any shape capable of forming the hexagonal indentation 28 shown in Fig. 24. Therefore, the pressing side edges 51a, 51c and the pressing tip edge 51b of the bonding base 51 do not have to form edges as in Fig. 23, and may be, for example, arc-shaped.

[0132] [Third embodiment] In the third embodiment, a method for manufacturing a semiconductor device 1 using a bonding tip 50 of a bonding tool 4 having a shape different from that of the first embodiment will be described with reference to Fig. 25. Fig. 25 is a plan view (during bonding) showing a wiring process included in the method for manufacturing a semiconductor device of the third embodiment. In Fig. 25, the position of a bonding base 51 is indicated by a dashed circle.

[0133] The semiconductor device of the third embodiment can also be manufactured according to the flowchart of Fig. 6. However, in the third embodiment, the shape of the bonding base 51 of the bonding tip portion 50 of the bonding tool 4 in a plan view is different from that in the first embodiment.

[0134] The bonded base 51 of the third embodiment includes an arc-shaped portion on the outer periphery in a plan view. Such a bonded base 51 may be, for example, elliptical (including circular). Alternatively, the bonded base 51 may be, for example, rectangular, with one of its four sides forming an arc-shaped portion that protrudes outward, so long as the bonded base 51 includes an arc-shaped portion on the outer periphery. Alternatively, in the bonded base 51 of the first embodiment, the pressed rear end side 51d may be formed into an arc-shaped portion.

[0135] In the third embodiment, the bonding base 51 is described as having a circular shape. The bonding base 51 of the bonding tool 4 is circular. Here, the diameter of the bonding base 51 is longer than the length of the bonding tip side 23e3 of the second bonding portion 23e of the second bonding terminal 23b. Also in this case, the multiple protrusions 52 are uniformly formed on the entire tip surface 51e of the bonding base 51. Also in the third embodiment, the multiple protrusions 52 have approximately the same height. This height is the height from the tip surface 51e to the pressing surface 52e of the protrusion 52. The pressing surfaces 52e of the multiple protrusions 52 form the same plane.

[0136] Such a bonding tool 4 is used to perform bonding in the wiring process of step S3 in Fig. 6. A bonding tip portion 50 of the bonding tool 4 of the third embodiment is set on the front surface 23e1 of the second bonding portion 23e, as shown in Fig. 25. In this case, the bonding base 51 is set so that its arc-shaped portion crosses the ±X-direction length of the second bonding portion 23e of the second bonding terminal 23b.

[0137] In this state, second joint portion 23e of second connection terminal 23b is pressed toward wiring board 11b3 of insulating circuit board 11 by joint tip portion 50 of bonding tool 4 while being vibrated at a predetermined vibration frequency.

[0138] Then, the bonding tip 50 of the bonding tool 4 penetrates into the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b. In this case, although not shown, burrs B are generated from the portions of the bonding sides 23e4, 23e6 of the second connection terminal 23b (second bonding portion 23e) that contact the bonding tip 50 (bonding base 51).

[0139] In this manner, second joint portion 23e of second connection terminal 23b can be joined to wiring board 11b3 of insulating circuit board 11. The state after joining in this manner will be described with reference to FIG. 26. FIG. 26 is a plan view of a main portion (after joining) showing a wiring step included in the manufacturing method of the semiconductor device according to the third embodiment. Note that FIG. 26 corresponds to the case in FIG. 25 where bonding tool 4 has been removed.

[0140] After bonding second joint portion 23e of second connection terminal 23b to wiring board 11b3 of insulating circuit board 11 using bonding tool 4, bonding tool 4 is removed. Then, as shown in FIG. 26, an indentation 28 is generated on front surface 23e1 of second joint portion 23e of second connection terminal 23b.

[0141] As in the first and second embodiments, the indentation 28 is formed by transferring an assembly of projections and recesses of a plurality of protrusions 52 included in the bonding tip 50 of the bonding tool 4 to the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b. Although not shown, the indentation portion 23e7 where the indentation 28 is transferred to the second bonding portion 23e is recessed with respect to the front surface 23e1 of the second bonding portion 23e of the second connecting terminal 23b as described above, and is located lower than the front surface 23e1. In a plan view, the indentation 28 includes an indentation tip edge 28a3, an indentation side edge 28a4, an indentation rear end edge 28a5, and an indentation side edge 28a6.

[0142] The indentation tip edge 28a3 is on one end side (+Y direction side, center side of unit storage section 21f) of the indentation 28 and is flush with the joint tip edge 23e3 of the second connection terminal 23b (second joint portion 23e). The length of the indentation tip edge 28a3 in the ±X directions is the same as the joint tip edge 23e3 of the second joint portion 23e.

[0143] The indentation sides 28a4 and 28a6 are connected to the ±X direction ends of the indentation tip side 28a3 and are perpendicular to the indentation tip side 28a3. The indentation sides 28a4 and 28a6 are flush with the joining sides 23e4 and 23e6 of the second joining portion 23e of the second joining terminal 23b. The indentation sides 28a4 and 28a6 have the same length (±Y direction).

[0144] The indentation rear end edge 28a5 is connected to the indentation side edges 28a4 and 28a6. The center of the indentation rear end edge 28a5 protrudes in the opposite direction to the indentation front edge 28a3. That is, the indentation rear end edge 28a5 has an arc shape.

[0145] The bonding tip 50 of the bonding tool 4 of the third embodiment presses the front surface 23e1 of the second bonding portion 23e of the second connection terminal 23b. In this case, the bonding tip 50 (bonding base 51) of the bonding tool 4 has an arc-shaped portion on a part of the outer periphery. Therefore, the impression rear end side 28a5 of the impression 28 on the front surface 23e1 of the second bonding portion 23e obtained in this way also has an arc-shaped shape, and the occurrence of cracks is suppressed more than in the first and second embodiments.

[0146] Even if a crack occurs on one of the indentation rear end edges 28a5 of the indentation 28 on the front surface 23e1 of the second bonding portion 23e, the indentation rear end edge 28a5 of the indentation 28 is arc-shaped, so the stress associated with the crack is dispersed in two directions along the arc. Therefore, as in the first and second embodiments, it is possible to delay the propagation of the crack in each direction. Therefore, even if a heat cycle test is performed on the semiconductor device of the third embodiment, it is possible to delay the propagation of the crack and to delay the breakage of the second bonding terminal 23b (second bonding portion 23e). As a result, it is possible to prevent a decrease in the useful life of the semiconductor device of the second embodiment and improve the long-term reliability. [Explanation of symbols]

[0147] 1 Semiconductor device 2. Semiconductor Module 3 Heat sink 4 Bonding tools 10, 10a, 10b, 10c Semiconductor unit 11 Insulated circuit board 11a Insulating plate 11b1,11b2,11b3 Wiring board 11c metal plate 12. Semiconductor Chips 12a Control electrode 12b Main electrode 13a, 13b Lead frame 13a1,13b1 Main electrode junction 13a2, 13b2 First vertical link 13a3, 13b3 Horizontal connection section 13a4, 13b4 Second vertical link 13a5,13b5 Wiring joint 14a, 14b Joining members 20 cases 21 Outer Frame 21a, 21b, 21c, 21d Exterior wall 21e, 21f, 21g Unit storage area 21i fastening hole 22a, 22b, 22c First connection terminal 22b1 1st joint 23a, 23b, 23c Second connection terminal 23e 2nd joint 23e1 Front 23e2 back side 23e3 Joint tip edge 23e4,23e6 Joining side 23e5 Back edge of joint 23e7 Indentation area 23f 2nd Liaison Section 23g 2nd wiring section 24a U phase output terminal 24b V phase output terminal 24c W phase output terminal 24b1 3rd joint 25a, 25b, 25c control terminals 26 Wire 28 Indentation 28a3 Indentation tip 28a4,28a6 Indentation side 28a5 Indentation rear edge 28a7 central part 28a8,28a9 side part 50 Joint tip 51 Bonded substrate 51a, 51c Pressing side 51b Pressing tip 51d Pressing rear end 51d1 Pressing center part 51d2, 51d3 Pressing side 51e Tip surface 52 Protrusion 52a~52d Side 52e Top 53 Gap B Bali

Claims

1. A conductive portion and a terminal are included. the terminal has a flat joint portion whose back surface is joined to the conductive portion and whose front surface is formed with an indentation; An indentation tip edge of one end of the indentation is flush with a joint tip edge of one end of the joint portion, a length of an indentation rear end side of the other end portion opposed to the indentation front end side of the indentation is shorter than a length of a joint rear end side of the other end portion opposed to the joint front end side of the joint portion; Semiconductor device.

2. The indentation further includes a pair of indentation side edges connecting the indentation leading edge and the indentation trailing edge. The semiconductor device according to claim 1 .

3. The length of the indentation tip side of the indentation is shorter than the length of the joint tip side of the joint portion. The semiconductor device according to claim 2 .

4. The indentation has a rectangular shape in a plan view, and the length of the tip side of the indentation is equal to the length of the rear end side of the indentation. The semiconductor device according to claim 3 .

5. The joint portion further includes a pair of joint side edges perpendicular to the joint leading edge and the joint trailing edge, The pair of joining sides are located outside the pair of indentation sides of the indentation. The semiconductor device according to claim 4.

6. The distance from each of the pair of indentation sides of the indentation to each of the pair of joining sides of the joining portion is 1 mm or more. The semiconductor device according to claim 5 .

7. A combined length of the indentation rear end side and the pair of indentation side sides of the indentation is longer than a length of the joint tip side of the joint portion. The semiconductor device according to claim 5 .

8. The rear end side of the indentation protrudes in the opposite direction to the front end side of the indentation.

3. The semiconductor device according to claim 1 or 2.

9. The indentation rear end side of the indentation includes a central portion and a pair of connection portions provided on both sides of the central portion, The length of the central portion of the indentation rear end side is narrower than the length of the joint rear end side of the joint portion, The central portion is the most protruding at the rear end edge of the impression. The semiconductor device according to claim 8.

10. The central portion of the indentation rear end side is parallel to the joining rear end side, and a connection angle of the pair of connection portions with respect to the central portion is less than 90°. The semiconductor device according to claim 9.

11. The bottom surface of the indentation of the joint portion is flat. The semiconductor device according to claim 1 .

12. The indentation of the joint portion is formed by an assembly of projections and recesses, and the tops of a plurality of projections included in the assembly are substantially flush with each other. The semiconductor device according to claim 11.

13. The terminal is a linking portion that is integrally connected to the rear end edge of the front surface of the joint portion and rises upward from the front surface; a wiring portion connected to an end of the linking portion and extending outward beyond the conductive portion in a plan view; having The device further includes a case that houses the conductive portion and fixes the wiring portion of the terminal. The semiconductor device according to claim 1 .

14. A conductive portion and a terminal are included. the terminal has a flat joint portion whose back surface is joined to the conductive portion and whose front surface is formed with an indentation; An indentation tip edge of one end of the indentation is flush with a joint tip edge of one end of the joint portion, The rear end side of the indentation at the other end opposite to the tip end side of the indentation is formed in an arc shape protruding in the opposite direction to the tip end side of the indentation. Semiconductor device.

15. a preparation step of preparing a terminal having a conductive portion and a flat joint portion; a joining process in which a back surface of the joint portion is placed on the conductive portion, and a front surface of the joint portion is pressed while being vibrated with a pressing surface included in a tip of a tool, thereby joining the back surface of the joint portion to the conductive portion; having A pressing tip edge of one end included in the pressing surface of the tool is located outside a joining tip edge of one end of the joining portion, a length of a pressing rear end side of the other end portion opposed to the pressing front end side of the pressing surface is shorter than a length of a joining rear end side of the other end portion opposed to the joining front end side of the joining side; A method for manufacturing a semiconductor device.

16. The pressing surface of the tool further includes a pair of pressing side edges connecting the pressing front edge and the pressing rear edge. The method for manufacturing a semiconductor device according to claim 15.

17. The length of the pressing tip edge of the pressing surface of the tool is shorter than the length of the joining tip edge of the joining portion. The method for manufacturing a semiconductor device according to claim 16.

18. The pressing surface of the tool has a rectangular shape in a plan view, and the length of the pressing tip side is equal to the length of the pressing rear end side. The method for manufacturing a semiconductor device according to claim 17.

19. The joint portion further includes a pair of joint side edges perpendicular to the joint leading edge and the joint trailing edge, The pair of joining sides are located outside the pair of pressing sides of the pressing surface of the tool. The method for manufacturing a semiconductor device according to claim 18.

20. The distances from the pair of pressing sides of the pressing surface of the tool to the pair of joining sides of the joining portion are 1 mm or more. The method for manufacturing a semiconductor device according to claim 19.

21. The pressing rear end edge of the pressing surface of the tool protrudes on the opposite side to the pressing front end edge. The method for manufacturing a semiconductor device according to claim 15.

22. The pressing rear end side of the pressing surface of the tool includes a pressing central portion and a pair of pressing connection portions provided on both sides of the pressing central portion, a length of the pressed central portion of the pressed rear end side is shorter than a length of the joint rear end side of the joint portion, The pressed central portion is the most protruding at the pressed rear end side. The method for manufacturing a semiconductor device according to claim 21 .

23. The pressing surface of the tool is a plane. The method for manufacturing a semiconductor device according to claim 15.

24. The pressing surface of the tool includes a collection of projections and recesses, and the tops of the projections included in the collection are substantially flush with each other. The method for manufacturing a semiconductor device according to claim 23.

25. The terminal is a linking portion that is integrally connected to the rear end edge of the front surface of the joint portion and rises upward from the front surface; a wiring portion connected to an end of the linking portion and extending outward beyond the conductive portion in a plan view; having The device further includes a case that houses the conductive portion and fixes the wiring portion of the terminal. The method for manufacturing a semiconductor device according to claim 15.

26. a preparation step of preparing a terminal having a conductive portion and a flat joint portion; a joining process in which a back surface of the joint portion is placed on the conductive portion, and a front surface of the joint portion is pressed while being vibrated with a pressing surface included in a tip of a tool, thereby joining the back surface of the joint portion to the conductive portion; having A pressing tip edge of one end included in the pressing surface of the tool is located outside a joining tip edge of one end of the joining portion, The pressing rear end side of the pressing surface, which is opposed to the pressing front end side, protrudes to the opposite side from the pressing front end side and forms an arc shape. A method for manufacturing a semiconductor device.

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