Plasma processing apparatus and method for controlling the same
Patent Information
- Application Number
- JP2023135893
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-23
- Publication Date
- 2025-03-07
- Estimated Expiration
- 2043-08-23
AI Technical Summary
【0016】 本発明によれば、上部電極側に生成されるプラズマの形成領域を拡大して処理速度を高めることができる。
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Figure 2025030527000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a plasma processing apparatus, such as a dry etching apparatus, and a method for controlling the same. [Background technology]
[0002] Among vacuum processing apparatuses such as etching apparatuses, vacuum processing apparatuses using a capacitively coupled plasma method are known. For example, Patent Document 1 discloses an apparatus for performing plasma processing by applying a first high-frequency voltage to a lower electrode that supports a processing substrate and applying a second high-frequency voltage to an upper electrode having a gas introduction mechanism to generate a capacitively coupled plasma. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2013-225672 A Summary of the Invention [Problem to be solved by the invention]
[0004] In this type of dual frequency CCP type plasma processing apparatus, the formation region of the plasma generated on the upper electrode side by the second high frequency voltage does not easily extend to the vicinity of the surface of the processing substrate, resulting in a low contribution rate to the processing speed.
[0005] In view of the above circumstances, an object of the present invention is to provide a plasma processing apparatus and a control method thereof capable of increasing the processing speed by expanding the region in which plasma is generated on the upper electrode side. [Means for solving the problem]
[0006] A plasma processing apparatus according to one aspect of the present invention includes a vacuum chamber, a stage for supporting a substrate, a counter electrode, and a resonant circuit. The stage is disposed inside the vacuum chamber and is connected to a first high frequency power circuit that supplies high frequency power of a first frequency. The counter electrode is disposed opposite the stage and is connected to a second high frequency power supply circuit that supplies high frequency power of a second frequency. The resonant circuit passes a high frequency current of the second frequency from the opposing electrode.
[0007] In the plasma processing apparatus, a resonant circuit for passing a high-frequency current of the second frequency from the counter electrode is provided between the electrode supply line and ground potential, so that the impedance of the plasma current flowing from the counter electrode to the stage is reduced, thereby expanding the formation area of the plasma generated on the counter electrode side and increasing the processing speed.
[0008] The resonant circuit may be adjusted so that a resonant frequency between the surface of the substrate on the stage and the ground potential is the second frequency.
[0009] The resonant circuit is, for example, an LC series resonant circuit including a coil and a capacitor.
[0010] The first high frequency power supply circuit may include an impedance matching circuit connected to a first high frequency power supply, a filter circuit for blocking the input of the high frequency power of the second frequency applied to the power supply line, and a voltage measuring unit connected between the impedance matching circuit and the filter circuit for measuring the high frequency voltage output from the impedance matching circuit to the stage. In this case, the resonant circuit is connected to the power supply line between the stage and the filter circuit.
[0011] The capacitor may be a variable capacitor whose capacitance is adjustable. In this case, the plasma processing apparatus further includes a control unit that controls the capacitance of the capacitor so that the voltage value measured by the voltage measurement unit is minimized.
[0012] The plasma processing apparatus may further include an earth shield disposed between a peripheral surface of the counter electrode and an inner wall surface of the vacuum chamber.
[0013] The second frequency may be higher than the first frequency.
[0014] The plasma processing apparatus may further include a gas supply unit that supplies an etching gas or a film-forming gas to the vacuum chamber.
[0015] In one aspect of the present invention, there is provided a method for controlling a plasma processing apparatus, wherein the resonant circuit is an LC series resonant circuit including a coil and a variable capacitor, The high frequency voltage of the first frequency input to the stage is measured, and the capacitance value of the variable capacitor is controlled so that the high frequency voltage is minimized. Effect of the Invention
[0016] According to the present invention, the area where plasma is generated on the upper electrode side can be expanded, thereby increasing the processing speed. [Brief description of the drawings]
[0017] [Figure 1] 1 is a schematic cross-sectional side view showing a configuration of a plasma processing apparatus according to an embodiment of the present invention; [Diagram 2] FIG. 1 is a conceptual diagram illustrating a problem to be solved by the present invention. [Diagram 3] 4 is a block diagram showing a relationship between a first high frequency power circuit and a resonant circuit in the plasma processing apparatus. FIG. [Figure 4] FIG. 4 is a diagram for explaining the operation of the plasma processing apparatus, showing an experimental result showing the relationship between the capacitance value of the resonant circuit and the etching rate and the voltage value of the first frequency. [Diagram 5] FIG. 4 is a diagram for explaining the operation of the plasma processing apparatus, showing an experimental result showing the relationship between the etching rate and the power of the second high frequency power source. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0018] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
[0019] 1 is a schematic side cross-sectional view showing the configuration of a plasma processing apparatus 100 according to one embodiment of the present invention. The plasma processing apparatus 100 of this embodiment is configured as a dual-frequency CCP type dry etching apparatus including a vacuum chamber 10, a stage 20 as a lower electrode, and a counter electrode 30 as an upper electrode.
[0020] The vacuum chamber 10 is an airtight container that is connected to a vacuum pump 42 via an exhaust valve 41 and can maintain a reduced pressure atmosphere inside. The vacuum chamber 10 is made of metal and is connected to a ground potential. An opening 12 for loading and unloading a substrate, which is opened and closed by a gate valve 11, is provided on one side of the vacuum chamber 10.
[0021] The stage 20 is made of metal and is disposed inside the vacuum chamber 10, and in this embodiment, is installed on the bottom of the vacuum chamber 10 via a support member 21 made of an insulating material. The upper surface of the stage 20 is formed as a support surface that supports the substrate W. The substrate W is a processing substrate such as a semiconductor wafer or a glass substrate. Although not shown, the stage 20 may be provided with an electrostatic chuck mechanism that holds the substrate W and a temperature adjustment mechanism that heats or cools the substrate W to a predetermined temperature.
[0022] The stage 20 is connected to a first high frequency power circuit 51 installed outside the vacuum chamber 10. As described later, the first high frequency power circuit 51 includes an impedance matching circuit 511 connected to a first high frequency power source RF1 that generates high frequency power of a first frequency (see FIG. 3). The first high frequency power circuit 51 supplies high frequency power of the first frequency as bias power to the stage 20. The first frequency is not particularly limited and is, for example, 2 MHz. The magnitude of the power is, for example, 500 W to 3000 W.
[0023] The counter electrode 30 is made of metal, is disposed opposite the stage 20, and is installed on the top plate of the vacuum chamber 10 via a support member 31 made of an insulating material. The counter electrode 30 is connected to a gas supply line 43, and functions as a shower plate that sprays a process gas uniformly over the entire surface of the substrate W on the stage 20.
[0024] The gas supply line 43 is connected to a gas supply source 45 via a flow rate control valve. In this embodiment, since the plasma processing apparatus 100 is configured as a dry etching apparatus, a reactive gas for etching (e.g., a fluorine-based or hydrocarbon-based gas) is used as the process gas. Note that the gas supply line 43 is not limited to being connected to the counter electrode 30, and the process gas may be supplied into the vacuum chamber 10 from a part of the side wall of the vacuum chamber 10, etc.
[0025] The counter electrode 30 is connected to a second high frequency power circuit 52 installed outside the vacuum chamber 10. The second high frequency power circuit 52 includes an impedance matching circuit connected to a second high frequency power source RF2 that generates high frequency power of a second frequency. The second high frequency power circuit 52 supplies high frequency power of the second frequency to the counter electrode 30 as discharge power for generating plasma of the process gas. The second frequency is not particularly limited and is, for example, 27 MHz. The magnitude of the power is, for example, 500 W to 4 kW.
[0026] In this embodiment, the plasma processing apparatus 100 introduces a process gas (etching gas) into the vacuum chamber 10 via the gas supply line 43 while maintaining the interior of the vacuum chamber 10 at a predetermined reduced pressure atmosphere, and generates plasma of the process gas (etching gas) between the stage 20 and the counter electrode 30 by applying a high frequency voltage of the second frequency power supply RF2 to the counter electrode 30. Meanwhile, by applying a high frequency voltage of the first frequency power supply RF1 to the stage 20, ions in the plasma are accelerated toward the substrate W on the stage 20. As a result, an etching process is performed on the surface of the substrate W. The processing pressure is, for example, 5 Pa to 30 Pa.
[0027] However, in this type of dual-frequency CCP type plasma processing apparatus, there is a problem in that the formation area of the plasma generated on the upper electrode side by the second high-frequency voltage is difficult to expand to near the surface of the processing substrate, making it difficult to improve the processing speed (etching rate).
[0028] The above problem can be solved by the impedance Z between the upper electrode 130 and the lower electrode 120, as conceptually shown in FIG. A is the impedance Z between the upper electrode 130 and the surrounding vacuum chamber 110. G This is believed to be because, since the RF voltage applied to the upper electrode 130 is much larger than the upper electrode 130, a part of the RF voltage applied to the upper electrode 130 is consumed by the discharge between the upper electrode 130 and the surrounding inner wall of the vacuum chamber 110. As a result, the plasma formed between the upper electrode 130 and the lower electrode 120 does not sufficiently extend to the vicinity of the surface of the substrate, and the etching rate cannot be improved.
[0029] In this embodiment, as shown in Fig. 1, a resonant circuit 53 that passes a high-frequency current of the second frequency from the counter electrode 30 is connected between the power supply line 510 between the stage 20 and the first high-frequency power circuit 51 and the ground potential. By connecting the resonant circuit 53 between the stage 20 and the first high-frequency power circuit 51, the impedance between the counter electrode 30 and the stage 20 (Z A ) decreases, facilitating the flow of plasma current from the counter electrode 30 to the stage 20. This expands the area in which plasma is generated on the counter electrode 30 side, thereby increasing the processing speed (etching rate).
[0030] The resonant circuit 53 is an LC series resonant circuit including a coil L and a capacitor VC1 as described below, and the inductance value of the coil L and the capacitance value of the capacitor VC1 are adjusted so that the resonant frequency between the surface of the substrate W on the stage 20 and the ground potential becomes the second frequency (27 MHz). In other words, the resonant circuit 53 is configured to resonate at the second frequency (27 MHz).
[0031] 1, the plasma processing apparatus 100 of this embodiment further includes an earth shield 61 disposed between the peripheral surface of the counter electrode 30 and the inner side wall surface of the vacuum chamber 10. The earth shield 61 is made of a metallic cylindrical member disposed so as to cover the peripheral surface of the insulating support member 31 which covers the peripheral surface of the counter electrode 30. The earth shield 61 is attached to the vacuum chamber 10 and is connected to a ground potential via the vacuum chamber 10.
[0032] By providing the earth shield 61 around the counter electrode 10 in this manner, the potential difference between the earth shield 61 and the side inner wall surface of the vacuum chamber 10 is eliminated, and the occurrence of discharge between the peripheral surface of the counter electrode 30 and the vacuum chamber 10 can be suppressed. In other words, the impedance (Z G ) appears to be nonexistent, the high frequency voltage of the second frequency (27 MHz) applied to the counter electrode 30 is not consumed in the discharge between the counter electrode 30 and the surrounding vacuum chamber 10. Therefore, all of the high frequency voltage applied to the counter electrode 30 is used to generate plasma between the counter electrode 30 and the stage 20, which can greatly contribute to the expansion of the plasma generation region to the vicinity of the surface of the substrate W.
[0033] If necessary, a similar earth shield may be installed around the stage 20. In this case, discharge between the stage 20 and the surrounding vacuum chamber 10 due to the high frequency voltage of the first frequency (2 MHz) applied to the stage 20 is suppressed. This configuration can also contribute to expanding the plasma generation region near the surface of the substrate W.
[0034] Next, the first high frequency power circuit 51 and the resonant circuit 53 will be described in detail.
[0035] 3 is a block diagram showing the relationship between the first high frequency power circuit 51 and the resonant circuit 53. As shown in the figure, the first high frequency power circuit 51 has an impedance matching circuit (matching circuit) 511, a voltage measuring unit 512, and a filter circuit unit 513.
[0036] The impedance matching circuit 511 is connected to the first high frequency power supply RF1. The impedance matching circuit 511 is a circuit that matches the impedance of the first high frequency power supply RF1, the impedance of the power supply line (transmission line), and the impedance of the stage 20 (load).
[0037] The voltage measuring unit 512 measures the high-frequency voltage output from the impedance matching circuit 511 to the stage 20. The voltage measuring unit 512 is connected between the impedance matching circuit 511 and the filter circuit unit 513, and measures the peak-to-peak value (Vpp) of the high-frequency voltage of the first frequency (2 MHz).
[0038] The filter circuit section 513 is a circuit that blocks the input of high frequency power of the second frequency (27 MHz) applied from the counter electrode 30 to the power supply line 510 via the stage 20. This makes it possible to protect the second high frequency power supply RF2, the impedance matching circuit 511, and the voltage measurement section 512 from the high frequency power of the second frequency (27 MHz). The configuration of the filter circuit section 513 is not particularly limited, and is configured, for example, by a low pass filter or a band pass filter that allows only the high frequency power of the first frequency (2 MHz) to pass.
[0039] The resonant circuit 53 has a resonant frequency that is the same as the frequency (second frequency) of the second high frequency power source RF2 applied to the counter electrode 30. In this embodiment, the resonant circuit 53 is an LC series resonant circuit including a coil L and a capacitor VC1, and the capacitor VC1 is a variable capacitor whose capacitance is adjustable.
[0040] As described above, the resonant circuit 53 is connected between the power supply line 510 between the stage 20 and the first high frequency power circuit 51 and the ground potential. This allows the high frequency power (plasma current) of the second frequency (27 MHz) flowing through the power supply line 510 to flow toward the ground potential without being input to the first high frequency power circuit 51, thereby protecting the first high frequency power circuit 51 and reducing the impedance (ZA ) can be lowered to expand the plasma formation region to the vicinity of the surface of the substrate W.
[0041] Here, the coil L constituting the resonant circuit 53 may include an inductive reactance component of various components constituting the power supply line 510. In this case, depending on the reactance component, the resonant circuit 53 may be formed of an LC parallel resonant circuit in which the coil L is connected in parallel to the capacitor VC1.
[0042] In this embodiment, the capacitance value of the capacitor VC1 is adjusted so that the high-frequency voltage (bias voltage) of the first frequency (2 MHz) applied to the stage 20 is minimized. In this embodiment, the device further includes a control unit 55 that controls the capacitance value of the capacitor VC1 so that the voltage value measured by the voltage measurement unit 512 is minimized.
[0043] 4 shows an experimental result showing the relationship between the capacitance value of the capacitor VC1 constituting the resonant circuit 53, the etching rate, and the voltage value Vpp of the first frequency (2 MHz). As shown in the figure, the maximum etching rate can be obtained by adjusting the capacitance value of the capacitor VC1 so that the voltage value Vpp is minimized. Therefore, by monitoring the voltage value measured by the voltage measurement unit 512 by the control unit 55 and controlling the capacitance value of the capacitor VC1 so that this is always minimized, it is possible to process the substrate W while maintaining the etching rate at its maximum. As an example, when the minimum value of Vpp was about 1550 V, the capacitance value of VC1 was about 35.3 pF and the etching rate was 280 nm / min.
[0044] It has been confirmed that when the voltage value Vpp measured by the voltage measurement unit 512 reaches a minimum value, the capacitance value of the matching element constituting the impedance matching circuit 511 and the capacitance value of the matching element constituting the impedance matching circuit in the second high frequency power circuit 52 both reach extreme values. In other words, it can be said that the voltage value Vpp reaching a minimum value is equivalent to the capacitance values of the matching elements of the high frequency power circuits 51 and 52 reaching extreme values. For this reason, instead of adjusting the capacitance value of the capacitor VC1 so that the voltage value Vpp reaches a minimum value, the capacitance value of the capacitor VC1 may be adjusted so that the capacitance value of the matching element reaches an extreme value.
[0045] According to the plasma processing apparatus of this embodiment configured as described above, resonant circuit 53 having a second resonant frequency (27 MHz) is connected between power supply line 510 connecting stage 20 and first high frequency power supply circuit 51 and ground potential, so that the impedance between counter electrode 30 and stage 20 is reduced and plasma current flows more easily from counter electrode 30 to stage 20. As a result, the formation area of plasma generated on the counter electrode 30 side is expanded and the processing speed (etching rate) can be increased.
[0046] 5 shows an experimental result showing the relationship between the etching rate and the power of the second high frequency power supply RF2 (27 MHz), comparing the case with and without the resonant circuit 53. In each of the above cases, the experiment was performed using an apparatus equipped with an earth shield 61, with a power range of 500 W to 4 kW and a processing pressure of 10 Pa. As shown in the figure, according to this embodiment equipped with the resonant circuit 53, the rate of increase in the etching rate relative to an increase in the input power can be increased compared to the case without the resonant circuit 53. In other words, it shows that the installation of the resonant circuit 53 expands the plasma formation region to the vicinity of the surface of the substrate W, thereby increasing the contribution rate to the processing speed.
[0047] Furthermore, according to this embodiment, the high-frequency voltage of the first frequency (2 MHz) input to the stage 20 is measured, and the capacitance value of the capacitor VC1 of the resonant circuit 53 is controlled so that the high-frequency voltage is minimized, so that the etching process of the substrate W can be continued while maintaining the maximum etching rate.
[0048] Although the embodiment of the present invention has been described above, the present invention is not limited to the above-mentioned embodiment, and various modifications can be made thereto.
[0049] For example, in the above embodiment, the frequency (first frequency) of the high frequency voltage input to the stage 20 is 2 MHz, and the frequency (second frequency) of the high frequency voltage input to the counter electrode 30 is 27 MHz, but they are not limited to this. For example, the first frequency may be lower than 13.56 MHz, and the second frequency may be 13.56 MHz or higher. In this case as well, the reactance value of the coil L and / or the capacitance value of the capacitor VC1 are set so that the resonant frequency of the resonant circuit 53 becomes the above-mentioned second frequency.
[0050] In the above embodiment, the high frequency voltage Vpp of the first frequency input to the stage 20 is monitored, and the capacitance value of the capacitor VC1 in the resonant circuit 53 is adjusted so that the voltage Vpp is minimized, but instead, a variable coil with an adjustable inductance value may be used as the coil L, and the inductance value of the coil L may be adjusted so that the bias voltage Vpp is minimized. With such a configuration, the same effects as those described above can be obtained.
[0051] Furthermore, in the above embodiment, an etching apparatus has been described as an example of a plasma processing apparatus, but instead, the present invention can be applied to a film forming apparatus such as a CVD apparatus or a sputtering apparatus. In this case, a process gas for film formation (reactive gas, or argon gas for sputtering) is supplied from the gas supply line 43 into the vacuum chamber 10, and the capacitance value of the resonant circuit 53 is adjusted so that the bias voltage is minimized, thereby maximizing the amount of ions incident on the substrate on which the film is to be formed, and improving the coverage of the hole filling film formation. [Explanation of symbols]
[0052] 10…Vacuum chamber 20…Stage 30...Counter electrode 43…Gas supply line 51...1st high frequency power supply circuit 52…Second high frequency power supply circuit 55…Control unit 61…Earth Shield 100...plasma processing apparatus 510…Power supply line 511...Impedance matching circuit 512…Voltage measurement section 513…Resonant circuit
Claims
1. A vacuum chamber; a stage for supporting a substrate, the stage being disposed inside the vacuum chamber and connected to a first high frequency power supply circuit that supplies high frequency power of a first frequency; a counter electrode disposed opposite the stage and connected to a second high frequency power supply circuit that supplies high frequency power of a second frequency; a resonant circuit connected between a power supply line connecting the stage and the first high frequency power supply circuit and a ground potential, the resonant circuit passing a high frequency current of the second frequency from the opposing electrode; A plasma processing apparatus comprising:
2. 2. The plasma processing apparatus according to claim 1, The resonant circuit is adjusted so that a resonant frequency between the surface of the substrate on the stage and the ground potential is the second frequency. Plasma processing equipment.
3. 3. The plasma processing apparatus according to claim 1, The resonant circuit is an LC series resonant circuit including a coil and a capacitor. Plasma processing equipment.
4. 4. The plasma processing apparatus according to claim 3, The first high frequency power supply circuit includes: an impedance matching circuit connected to the first high frequency power supply; a filter circuit that blocks an input of the high frequency power of the second frequency applied to the power supply line; a voltage measurement unit connected between the impedance matching circuit and the filter circuit and measuring a high-frequency voltage output from the impedance matching circuit to the stage, The resonant circuit is connected to the power supply line between the stage and the filter circuit. Plasma processing equipment.
5. 5. The plasma processing apparatus according to claim 4, the capacitor is a variable capacitor whose capacitance is adjustable, The plasma processing apparatus further includes a control unit that controls a capacitance value of the capacitor so that a voltage value measured by the voltage measuring unit is minimized. Plasma processing equipment.
6. 2. The plasma processing apparatus according to claim 1, The vacuum chamber further includes an earth shield disposed between a peripheral surface of the counter electrode and an inner wall surface of the vacuum chamber. Plasma processing equipment.
7. 2. The plasma processing apparatus according to claim 1, The second frequency is higher than the first frequency. Plasma processing equipment.
8. 2. The plasma processing apparatus according to claim 1, The vacuum chamber further includes a gas supply line for supplying an etching gas or a film forming gas to the vacuum chamber. Plasma processing equipment.
9. 2. A method for controlling a plasma processing apparatus according to claim 1, comprising: the resonant circuit is an LC series resonant circuit including a coil and a variable capacitor, A high frequency voltage of the first frequency input to the stage is measured, and a capacitance value of the variable capacitor is controlled so that the high frequency voltage is minimized. A method for controlling a plasma processing apparatus.
Citation Information
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