Semiconductor device and method for manufacturing the same
Patent Information
- Application Number
- JP2023136637
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-24
- Publication Date
- 2025-03-07
AI Technical Summary
【0009】 上記の態様によれば、反りを低減可能なCSP構造を有する半導体装置、及び半導体装置を製造する方法が提供される。
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Figure 2025030926000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a semiconductor device and a method for fabricating a semiconductor device. [Background technology]
[0002] Patent Document 1 discloses minimizing bending of a semiconductor device obtained by dividing a wafer. This manufacturing method includes a first bonding step, a thinning step, a dividing step, a second bonding step, and a peeling step. In the first bonding step, a support plate is bonded to a first main surface of the wafer on which an integrated circuit is formed. In the thinning step, the second main surface of the wafer is polished or ground after the first bonding step to thin the wafer. In the dividing step, the wafer is divided into a plurality of chip body parts after the thinning step. In the second bonding step, a reinforcing layer is bonded to the second main surfaces of the plurality of chip body parts after the dividing step. In the peeling step, the support plate is peeled off after the second bonding step. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2016-146395 A Summary of the Invention [Problem to be solved by the invention]
[0004] In a manufacturing method of a semiconductor device for a CSP structure (chip size package, or chip scale package), warpage of a wafer during the manufacturing process can become an obstacle in various processes.
[0005] In the past, attention was focused on reducing warpage in large semiconductor chips in the CSP structure, but warpage is related not only to the size of the semiconductor chip but also to the size of the electrodes related to the CSP structure in the semiconductor chip and the thickness of the coating resin body.
[0006] An object of the present invention is to provide a semiconductor device having a CSP structure capable of reducing warpage, and a method for manufacturing the semiconductor device. [Means for solving the problem]
[0007] A semiconductor device according to a first aspect of the present invention comprises a support having a first main surface and a second main surface opposite to the first main surface, and one or more semiconductor elements, at least one thin-film metal electrode provided on the first main surface of the support, a thick-film metal body provided on the thin-film metal electrode, and a resin structure provided on the support, wherein the thickness of the thick-film metal body is greater than the thickness of the thin-film metal electrode, and the resin structure includes a first resin body covering a side surface of the thick-film metal body on the first main surface of the support, and the resin structure has at least one of the following Structure 1 and Structure 2: Structure 1: the resin structure further includes a second resin body provided on the second main surface of the support, and Structure 2: the resin structure provides the first resin body with a first region and a second region thicker than the first region on the first main surface of the support.
[0008] A method for fabricating a semiconductor device according to a second aspect of the present invention includes: preparing a base substrate including a semiconductor, the base substrate having a first main surface and a second main surface opposite to the first main surface, and an array of a plurality of sections including semiconductor elements on the first main surface; forming a thin film metal electrode on the first main surface in each of the sections of the base substrate; forming a thick metal film on the first main surface in each of the sections of the base substrate to form a wafer product, the thick metal film being located on the thin film metal electrode; and forming a resin body including at least one thick resin film on the base substrate of the wafer product, the thick metal film having a thickness greater than a thickness of the thin film metal electrode, The resin body includes a first resin thick film covering at least the side surfaces of the metal thick film on the first main surface of the base substrate, and the resin body has at least one of the following Structure 1 and Structure 2: Structure 1: the resin body further includes a second resin thick film provided on the second main surface of the base substrate, and Structure 2: the resin body provides the first resin thick film with a first region constituting at least one of a recess and a groove, and a second region thicker than the first region, on the first main surface of the base substrate. Effect of the Invention
[0009] According to the above aspects, a semiconductor device having a CSP structure capable of reducing warpage and a method for manufacturing the semiconductor device are provided. [Brief description of the drawings]
[0010] [Figure 1] FIG. 1 is a perspective view that illustrates a schematic configuration of a semiconductor device according to the present embodiment. [Diagram 2] FIG. 2 is a plan view that illustrates the semiconductor device according to the present embodiment. [Diagram 3] FIG. 3 is a diagram showing the semiconductor device according to the present embodiment in a cross section taken along the line II-II shown in FIG. [Figure 4] FIG. 4 is a diagram showing the semiconductor device according to the present embodiment in a cross section taken along the line III-III shown in FIG. [Diagram 5] FIG. 5 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 6] FIG. 6 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 7] FIG. 7 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 8] FIG. 8 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 9]FIG. 9 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 10] FIG. 10 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 11] FIG. 11 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 12] FIG. 12 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 13] FIG. 13 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 14] FIG. 14 is a cross-sectional view showing a step in a method for manufacturing a semiconductor device according to this embodiment. [Figure 15] FIG. 15 is a diagram showing main steps in a method for manufacturing a semiconductor device according to this embodiment. [Figure 16] FIG. 16 is a plan view showing a wafer product and exemplary half-cut lines according to this embodiment. [Figure 17] FIG. 17 is a plan view showing a wafer product according to this embodiment. [Figure 18] FIG. 18 is a plan view showing a wafer product and a resin molding die according to this embodiment. [Figure 19] FIG. 19 is a diagram showing exemplary steps in a method for fabricating a semiconductor device according to this embodiment. [Figure 20] FIG. 20 is a diagram showing exemplary steps in a method for fabricating a semiconductor device according to this embodiment. [Figure 21] FIG. 21 is a diagram showing exemplary steps in a method for fabricating a semiconductor device according to this embodiment. [Figure 22] 22(a) to 22(d) are diagrams showing the size of an exemplary cavity of a resin molding die in the production method according to this embodiment. [Diagram 23]23(a) and 23(b) are diagrams showing an exemplary width of a half-cut region in the method for fabricating a semiconductor device according to this embodiment, and a separation region width for separating a partition array in a wafer product. [Figure 24] 24(a) to 24(h) are drawings showing an exemplary layout of the first and second regions of a semiconductor device fabricated by the manufacturing method according to this embodiment. [Diagram 25] 25(a), 25(b), 25(c), and 25(d) are schematic diagrams showing a CSP assembly produced by the manufacturing method according to this embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0011] Hereinafter, each embodiment for carrying out the present invention will be described with reference to the drawings. In the following description, the same or similar parts are designated by the same or similar reference numerals, and duplicated description will be omitted.
[0012] Fig. 1 is a diagram showing a schematic structure of a semiconductor device according to the present embodiment. Fig. 2 is a plan view showing the semiconductor device according to the present embodiment. Fig. 3 is a diagram showing the semiconductor device according to the present embodiment in a cross section taken along line II-II shown in Fig. 2. Fig. 4 is a diagram showing the semiconductor device according to the present embodiment in a cross section taken along line III-III shown in Fig. 2. Hatching in the cross sections of Figs. 3 and 4 is omitted.
[0013] 1 and 2, the semiconductor device 11 includes a support 13, at least one thick-film metal body 17, an element structure 14, and a resin structure 24 including at least a first resin body 19. The support 13 may include a semiconductor (e.g., a VI group semiconductor such as silicon). The support 13 has a first main surface 13b and a second main surface 13c opposite to the first main surface 13b. The support 13 has an edge 13k that defines the first main surface 13b of the support 13.
[0014] The resin structure 24 is provided on the support 13 so as not to cover the side surface 13s of the edge 13k of the support 13. The resin structure 24 includes a first resin body 19 that covers at least the side surface of the thick film metal body 17 on the first main surface 13b of the support 13.
[0015] 1, the resin structure 24 of the semiconductor device 11 is provided with a first resin body 19 and a second resin body 25. However, the semiconductor device 11 is not limited to this.
[0016] The resin structure 24 can have at least one of the following Structure 1 and Structure 2. Structure 1: The resin structure 24 further includes a second resin body 25 provided on the second main surface 13c of the support 13. Structure 2: The resin structure 24 provides the first resin body 19 with a first region 19b and a second region 19c that is thicker than the first region 19b on the first main surface 13b of the support 13.
[0017] According to the semiconductor device 11, when the second resin body 25 is provided on the second main surface 13c of the support 13, warping of the support 13 is reduced in the semiconductor device 11 including the first resin body 19 and the thick-film metal body 17 on the first main surface 13c of the support 13. The support 13 can be provided between the first resin body 19 and the second resin body 25. Furthermore, when the first resin body 19 is provided with the first region 19b and the second region 19c on the first main surface 13b of the support 13, the thin first region 19b separates the thick second region 19c from each other, facilitating stress relaxation.
[0018] Specifically, the semiconductor device 11 can have several forms.
[0019] First embodiment: In an exemplary semiconductor device 11, the resin structure 24 includes a first resin body 19 and a second resin body 25. The first resin body 19 and the second resin body 25 are separated from each other without covering the side surface 13s of the edge 13k of the support 13. The first resin body 19 includes a first region 19b and a second region 19c. According to this semiconductor device 11, the support 13 is provided between the first resin body 19 and the second resin body 25, and the support 13 receives stress from both the resin bodies (19, 25) on the first main surface 13b and the second main surface 13c. At least a part of the stress from both the resin bodies (19, 25) cancels each other out at the support 13. In addition, the thin first region 19b and the thick second region 19c of the first resin body 19 act to disperse the stress.
[0020] Second embodiment: In an exemplary semiconductor device 11, the resin structure 24 includes a first resin body 19 and a second resin body 25. The first resin body 19 and the second resin body 25 are separated from each other without covering the side surface 13s of the edge 13k of the support 13. The first resin body 19 does not include the first region 19b and the second region 19c. The first region 19b is removed from the semiconductor device 11 shown in FIG. 1 to FIG. 4. According to this semiconductor device 11, the support 13 is provided between the first resin body 19 and the second resin body 25, and the support 13 receives stress from both the resin bodies (19, 25) on the first main surface 13b and the second main surface 13c. At least a part of the stress from both the resin bodies (19, 25) cancels each other out in the support 13.
[0021] Third embodiment: In an exemplary semiconductor device 11, the resin structure 24 includes the first resin body 19 but does not include the second resin body 25. The second resin body 25 is omitted from the semiconductor device 11 shown in Figs. 1 to 4. The first resin body 19 includes a first region 19b and a second region 19c. According to this semiconductor device 11, the thin first region 19b and the thick second region 19c of the first resin body 19 act to disperse stress.
[0022] According to the first and third embodiments of the semiconductor device 11, the difference in resin thickness between the first region 19b and the second region 19c prevents the first resin body 19 from applying stress to the support 13 as a lump of resin. Also, the first region 19b and the second region 19c having different thicknesses reduce the resin volume of the first resin body 19. The difference in resin thickness between the first region 19b and the second region 19c is provided by, for example, half-cutting with a dicing saw and molding resin processing using a resin molding die.
[0023] In the CSP structure, the resin structure 24 is provided on the semiconductor chip. Specifically, the first resin body 19 is provided on the semiconductor chip, specifically on the front surface of the semiconductor chip. The second resin body 25 is provided on the semiconductor chip, specifically on the back surface of the semiconductor chip. The thickness of the second resin body 25 can be made smaller than the thickness of the first resin body 19, and the formation area of the second resin body 25 can be made smaller than the formation area of the first resin body 19. The first resin body 19 causes warpage of the wafer product, while the second resin body 25 alleviates the warpage of the wafer product. Accordingly, the volume of the second resin body 25 can be made approximately the same as the volume of the first resin body 19.
[0024] 1 and 2, the first region 19b of the semiconductor device 11 is provided along the four edges 13k. However, the first region 19b can be provided along at least a portion of the four edges 13k or along a portion of the edge 13k of the support 13, i.e., partially on the edge 13k. The second region 19c is adjacent to the first region 19b.
[0025] According to the semiconductor device 11, when the first region 19b is partially provided on the edge 13k of the support 13, the thickness of the first resin body 19 (e.g., epoxy resin) is thinned from the inner area of the semiconductor device 11 to the scribe area. In the manufacturing process, the thick second regions 19c of adjacent sections (the sections are semiconductor chips including the support 13) are separated by the thin first regions 19b between the sections, and stress is relieved. In this state, the adjacent sections are separated to form a semiconductor chip. In the semiconductor device 11, stress in the chip size package (CSP) structure is relieved.
[0026] 1 and 2, the exemplary semiconductor device 11 provides a support 13 with a first edge 13k1, a second edge 13k2, a third edge 13k3, and a fourth edge 13k4. The first edge 13k1 and the second edge 13k2 extend in a first direction (X-axis of the coordinate system CS), and the third edge 13k3 and the fourth edge 13k4 extend in a second direction (Y-axis of the coordinate system CS) intersecting the first direction. The exemplary first main surface 13b is defined by a plurality of edges, such as the first edge 13k1, the second edge 13k2, the third edge 13k3, and the fourth edge 13k4.
[0027] In the exemplary semiconductor device 11, the first region 19b of the first resin body 19 is provided along all of the first edge 13k1, the second edge 13k2, the third edge 13k3, and the fourth edge 13k4. The first region 19b has a closed shape so as to surround the second region 19c. According to this semiconductor device 11, when the first region 19b has a closed shape so as to surround the second region 19c along the edge 13k of the support 13, the second region 19c is surrounded by the first region 19b, and the stress in the second region 19c decreases toward any edge 13k.
[0028] The first region 19b may be provided along any one of the first edge 13k1, the second edge 13k2, the third edge 13k3, and the fourth edge 13k4. The first region 19b may be provided on at least two edges 13k (e.g., two adjacent edges 13k, or two edges 13k spaced apart) of the first edge 13k1, the second edge 13k2, the third edge 13k3, and the fourth edge 13k4. The first region 19b may be provided on at least three edges of the first edge 13k1, the second edge 13k2, the third edge 13k3, and the fourth edge 13k4.
[0029] 3 and 4, the semiconductor device 11 has a CSP structure. Specifically, the semiconductor device 11 further includes a support 13, at least one thin-film metal electrode 15, at least one thick-film metal body 17, an insulating layer 21, and a resin structure 24.
[0030] The thin-film metal electrode 15 is provided on the first main surface 13b of the support 13. The thick-film metal body 17 is located on the thin-film metal electrode 15 and may include, for example, a metal film. The thickness of the thick-film metal body 17 is greater than the thickness of the thin-film metal electrode 15. The resin structure 24 includes at least one of a first resin body 19 and a second resin body 25. The second resin body 25 is provided on the second main surface 13c of the support 13, and in this embodiment, is provided over the entire second main surface 13c.
[0031] The semiconductor device 11 may have one or more semiconductor elements 31 (e.g., active elements such as transistors) provided in the support 13. The semiconductor device 11 may also include an insulating structure 33 provided between the thin-film metal electrodes 15 and the semiconductor elements 31. At least one of the semiconductor elements 31 may be electrically connected to at least one thick-film metal body 17 through an opening in the insulating structure 33. The insulating structure 33 may include, for example, one or more insulating films, which may include a silicon-based inorganic insulating film or a resin film.
[0032] In the support 13, the first main surface 13b has an element area 13d and a peripheral area 13e. The element area 13d includes a semiconductor element 31, and also carries a first resin body 19, a thin-film metal electrode 15, and a thick-film metal body 17. The peripheral area 13e carries the first resin body 19. The thin-film metal electrode 15 and the thick-film metal body 17 are spaced apart from the peripheral area 13e. The peripheral area 13e surrounds the element area 13d.
[0033] Thin-film metal electrode 15 is provided on first main surface 13b of support 13, and specifically, can be electrically connected to at least one semiconductor element 31. Thin-film metal electrode 15 can include, for example, aluminum.
[0034] The thick film metal body 17 is located on the thin film metal electrode 15 and the insulating layer 21. The thick film metal body 17 may include a metal film comprising copper. The thick film metal body 17 may include, for example, a copper plating film and a seed layer for plating.
[0035] The thickness of the first region 19b of the first resin body 19 is smaller than the thickness of the thick film metal body 17. The first resin body 19 reaches the edge 13k of the support body 13. In addition, the second resin body 25 can be configured to reach the edge 13k of the support body 13.
[0036] The first resin body 19 is provided on the first main surface 13b of the support 13, and covers the side surface 17b of the thick-film metal body 17. The first resin body 19 may contain an epoxy resin, and the second resin body 25 may contain an epoxy resin.
[0037] The insulating layer 21 has one or more first openings 22b, 22c, each of the first openings (22b, 22c) located on the thin-film metal electrode 15. In one embodiment, the insulating layer 21 can cover the edge 16b of the thin-film metal electrode 15, preventing the thick-film metal body 17 from reaching the underlying structure of the thin-film metal electrode 15 in the element area 13d. The insulating layer 21 can include a resin body such as a polyimide resin. The insulating layer 21 is a single connected region in which the total area of the openings 22b of the insulating layer 21 is greater than the total area of the top surface of the insulating layer 21.
[0038] The support 13, the thin-film metal electrode 15, and the thick-film metal body 17 are disposed in the direction of the first axis Ax1. The upper surface 17c of the thick-film metal body 17 and the upper surface 19d of the first resin body 19 can extend along a reference plane REF intersecting the first axis Ax1, and there is substantially no level difference between the upper surface 17c of the thick-film metal body 17 and the upper surface 19d of the first resin body 19.
[0039] The second inorganic insulating film 23 can be provided on at least a portion of the first main surface 13b of the support 13, and the second inorganic insulating film 23 can be provided between the first resin body 19 and the insulating layer 21. The second inorganic insulating film 23 is a single connected region in which the total area of the second openings 23b of the second inorganic insulating film 23 is larger than the total area of the upper surface of the second inorganic insulating film 23. In this embodiment, the second inorganic insulating film 23 can extend outward beyond the boundary between the peripheral area 13e and the element area 13d and reach the edge of the first main surface 13b of the support 13.
[0040] The second inorganic insulating film 23 may include a silicon-based inorganic oxide film and / or a silicon-based inorganic oxynitride film that can be deposited at a film formation temperature that does not exceed the heat resistance temperature of the underlying structure, and may include an inorganic insulator containing silicon and nitrogen, such as SiN.
[0041] The resin structure 24 may include one or both of a first resin body 19 and a second resin body 25. In the element area 13d, the first resin body 19 is separated from the support 13 and the insulating layer 21 by the second inorganic insulating film 23.
[0042] The second resin body 25 of the resin structure 24 can be provided on at least a portion of the second main surface 13c of the support 13. The exemplary second resin body 25 can extend outward beyond the boundary between the element area 13d and the peripheral area 13e on the second main surface 13c and reach the edge of the second main surface 13c of the support 13.
[0043] In this embodiment, the second resin body 25 can extend from the edge or the vicinity of the edge of the second main surface 13c, for example, from a position away from the edge along the second main surface 13c toward the center of the second main surface 13c. According to this semiconductor device 11, the second resin body 25 extends along the second main surface 13c of the support 13 and acts to maintain the coplanarity of the support 13.
[0044] The second resin body 25 extends along the second main surface 13c of the support 13. In this embodiment, the second resin body 25 is provided over the entire second main surface 13c, however, this embodiment is not limited to this arrangement and the second resin body 25 can be provided over a major portion of the second main surface 13c.
[0045] As shown in FIG. 3, the thickness D17 of the thick film metal body 17 is greater than the thickness D15 of the thin film metal electrode 15, and as shown in FIG.
[0046] According to the semiconductor device 11, the thickness D17 of the thick-film metal body 17 is larger than the thickness D15 of the thin-film metal electrode 15, and the thickness D19 of the first resin body 19 is larger than the thickness D21 of the insulating layer 21. In this semiconductor device 11, the upper surface 17c of the thick-film metal body 17 and the upper surface 19d of the first resin body 19 extend along the reference plane REF, and a structure for chip size packaging (for example, a CSP structure) can be provided. In this structure, the resin structure 24 including the first resin body 19 having the first region 19b and the second region 19c can reduce warping of the support 13 due to stress from the thick-film metal body 17 and the first resin body 19. In addition, the resin structure 24 including the first resin body 19 and the second resin body 25 can reduce warping of the support 13 due to stress from the thick-film metal body 17 and the first resin body 19.
[0047] In the resin structure 24, specifically, the second inorganic insulating film 23 has a second opening 23b, and the second opening 23b is located above the first openings 22b, 22c of the insulating layer 21 and the thin-film metal electrode 15. The thick-film metal body 17 is connected to the thin-film metal electrode 15 via the second opening 23b of the second inorganic insulating film 23, and in this embodiment, the thick-film metal body 17 is located above the thin-film metal electrode 15 and the insulating layer 21. The second inorganic insulating film 23 extends between the support 13 and the first resin body 19 from the edge of the second opening 23b of the second inorganic insulating film 23 toward the edge 13k of the support 13.
[0048] According to this semiconductor device 11, the second inorganic insulating film 23 extends along the support 13 from the edge of the second opening 23b of the second inorganic insulating film 23 toward the edge 13h of the support 13, and is arranged to surround the bottom of the thick film metal body 17.
[0049] 1 and 2, four thick-film metal bodies 17 are provided with a first resin body 19 between them to provide a CSP structure. In the exemplary semiconductor device 11, each of the thick-film metal bodies 17 is connected to the underlying thin-film metal electrode 15 via a single first opening 22b and a single second opening 23b. In the exemplary semiconductor device 11, the potential stress applied by the thick-film metal body 17 to the support 13 is related to the volume of the thick-film metal body 17 as well as the area of the top surface 17c of the thick-film metal body 17. The proportion of the thick-film metal body 17 in the support 13 (hereinafter referred to as the "filling factor") can be specified, for example, in a wafer product in a wafer process or in a semiconductor chip.
[0050] By some estimates, conventional semiconductor chips have a fill factor of 20 to 30 percent. Higher fill factors can be expected in wafer production during wafer processing and in semiconductor chips from the finished wafer production.
[0051] 3 and 4, the thin-film metal electrode 15 may include one or more pad electrodes. The thick-film metal body 17 may include one or more metal pillars connected to the pad electrodes of the thin-film metal electrode 15. The first main surface 13b of the support 13 includes a first area 13f and a second area 13g, in which the first area 13f carries the metal pillars of the thick-film metal body 17 and the second area 13g carries the thick-film resin body. In this embodiment, the area of the first area 13f is larger than the area of the second area 13g.
[0052] In this semiconductor device 11, since the area of the first area 13f is larger than the area of the second area 13g, the semiconductor device 11 has a structure in which the support 13 receives stress from the thick-film metal body 17 in the first area 13f. The first resin body 19 is provided so as to cover the side surface 17b of the thick-film metal body 17 in the second area 13g of the support 13. In this structure, the support 13 receives stress from the first resin body 19 in the second area 13g.
[0053] 4, the second main surface 13c has a third area 13i and a fourth area 13j. The third area 13i and the fourth area 13j are defined to correspond to the first area 13f and the second area 13g of the first main surface 13b, respectively, and to be associated with the second main surface 13c.
[0054] The second resin body 25 can be provided at least on the third area 13i, and supports the support 13 against the thick film metal body 17. The second resin body 25 can extend outward (onto the fourth area 13j) beyond the boundary between the third area 13i and the fourth area 13j, and supports the support 13 against the thick film metal body 17 and the first resin body 19. The second resin body 25 can be separated from the edge 13k of the support 13.
[0055] 3 and 4, the thin-film metal electrode 15 is located directly below the thick-film metal body 17. The first openings 22b, 22c of the insulating layer 21 are located above the thin-film metal electrode 15. The thick-film metal body 17 covers the entire upper surface of the thin-film metal electrode 15 in the first openings 22b, 22c of the insulating layer 21, and extends onto the upper surface of the insulating layer 21 beyond the edge of the insulating layer 21.
[0056] The area of the top surface of thin-film metal electrode 15 (size W15) is larger than the area of the top surface of insulating layer 21 (size W21).
[0057] According to this semiconductor device 11, the thick film metal body 17 is bonded to the thin film metal electrode 15 provided on the first main surface 13b of the support 13 through the first openings 22b, 22c of the insulating layer 21. The insulating layer 21 is provided on the first main surface 13b of the support 13 so as to avoid bonding between the thin film metal electrode 15 and the thick film metal body 17, and provides a planarized surface on the first main surface 13b of the support 13. The planarized surface is provided as an underlying layer for the second inorganic insulating film 23, and a potential increase in thermal stress due to bending or steps in the underlying layers of the first resin body 19 and / or the thick film metal body 17 is avoided.
[0058] The thick-film metal body 17 covers the entire upper surface of the thin-film metal electrode 15 at the first openings 22b, 22c of the insulating layer 21. The insulating layer 21 is a single connected region in which the total area of the first openings 22b, 22c of the insulating layer 21 is greater than the total area of the upper surface of the insulating layer 21.
[0059] In this semiconductor device 11, the insulating layer 21 is provided on the first main surface 13b of the support 13 so as to avoid bonding between the thick film metal body 17 and the thin film metal electrode 15, and the total area of the first openings 22b, 22c of the insulating layer 21 is larger than the total area of the upper surface of the insulating layer 21. By forming the insulating layer 21 as a single connected region, the insulating layer 21 can be provided so as to cover a larger portion of the first main surface 13b of the support 13, and a planarized base can be provided for the second inorganic insulating film 23.
[0060] Similarly, the first resin body 19 is provided on the first main surface 13b of the support 13 so as to avoid bonding between the thick film metal body 17 and the thin film metal electrode 15. The first resin body 19 is a single connected region in which the total area of the openings of the first resin body 19 is larger than the total area of the upper surface of the first resin body 19.
[0061] 3, the insulating layer 21 has an inner edge 22f that defines the first openings 22b, 22c of the insulating layer 21, and an outer edge 22g that defines the size of the insulating layer 21. The outer edge 22g of the insulating layer 21 is spaced apart from the edge 13k of the support 13, while the first resin body 19 reaches the edge 13k of the support 13. According to this semiconductor device 11, the insulating layer 21 can be provided up to the vicinity of the edge 13k of the support 13, for example, up to the edge of the scribe region of the support 13.
[0062] Figures 5 to 14 are cross-sectional views showing major steps in a method for manufacturing a semiconductor device according to the present embodiment. Each of Figures 5 to 14 shows the progress of a wafer product during manufacture in a cross section corresponding to line III-III shown in Figure 3. Hatching has been omitted in each cross section of Figures 5 to 14. Figure 15 is a flow diagram showing major steps in a method for fabricating a semiconductor device according to the embodiment. In the following description, for the purpose of facilitating understanding, reference symbols already used in the above description will be used, where possible, for the same or similar parts.
[0063] In the first step shown in FIG. 5 (for example, S101 in FIG. 15), a base substrate 41 formed, for example, by processing a semiconductor wafer is prepared. The base substrate 41 may include a semiconductor, for example, silicon. A semiconductor region of the base substrate 41 has a first main surface 42b and a second main surface 42c opposite to the first main surface 42b. The base substrate 41 has an arrangement (for example, a one-dimensional or two-dimensional array) of a plurality of sections (40 in FIG. 5) on the first main surface 42b. Each of the sections 40 includes a semiconductor element 43. In FIG. 5 to FIG. 14, one section is depicted. The semiconductor element 43 is formed in the semiconductor region. The semiconductor element 43 includes elements, for example, transistors, electrodes, and interconnection wiring, and these elements can be created by applying a plurality of semiconductor processes to a semiconductor substrate, such as a wafer.
[0064] In a second step, an insulating structure 33 is formed to cover the base substrate 41 to obtain a wafer product 40a. The insulating structure 33 can include at least one of an inorganic insulator and an organic insulator, and specifically, the insulating structure 33 covers the region of the semiconductor element 43.
[0065] 6 (e.g., S102 in FIG. 15), a thin-film metal electrode 15 is formed in each of the sections 40 to obtain a wafer product 40b. The thin-film metal electrode 15 is formed on the first main surface 42b of the base substrate 41, specifically on the insulating structure 33, and can be connected to the semiconductor element 43 in the section 40 through an opening in the insulating structure 33. Semiconductor processes such as metal layer deposition, photolithography, and etching are used to form the thin-film metal electrode 15. The thin-film metal electrode 15 can comprise, for example, aluminum.
[0066] 7 (e.g., S103 in FIG. 15), an insulating layer 21 is formed on the first main surface 42b in each of the sections 40 to obtain a wafer product 40c. The insulating layer 21 has a first opening 22b located on the thin-film metal electrode 15 and covers the edge 16b of the thin-film metal electrode 15. The insulating layer 21 is formed using semiconductor processes such as coating an organic substance, baking, photolithography, and etching. The insulating layer 21 may include, for example, a polyimide resin.
[0067] In a fifth step (for example, S104 in FIG. 15) shown in FIG. 8, a resin structure 24 is formed. In this step, a second inorganic insulating film 23 is formed to obtain a wafer product 40d. The second inorganic insulating film 23 is formed on the insulating layer 21 on the first main surface 42b of the base substrate 41. The second inorganic insulating film 23 has a second opening 23b on the thin-film metal electrode 15, and the second opening 23b is aligned with the first opening 22b. In this embodiment, the size of the second opening 23b is larger than the size of the first opening 22b. The second inorganic insulating film 23 may include a silicon-based inorganic nitride such as SiN.
[0068] 9 (for example, S105 in FIG. 15), a thick metal film 18 is formed on the first main surface 42b in each of the sections 40 to obtain a wafer product 40e. The thick metal film 18 may include copper. The thick metal film 18 is located on the thin-film metal electrode 15 and is connected to the thin-film metal electrode 15 through the first opening 22b of the insulating layer 21. The thick metal film 18 has a thickness greater than that of the thick-film metal body 17. For example, a plating method is used to form the thick metal film 18, and specifically, a semiconductor process such as deposition of a seed layer (pattern formation, if necessary), formation of an electrolytic plating film, and removal of a sheet layer, if necessary, is used.
[0069] Other examples of the resin structure 24, specifically, the formation of a resin for the second resin body 25, will be described later.
[0070] 10 (e.g., S106 in FIG. 15), at least one thick resin film 20 is formed on the wafer product 40e to obtain a wafer product 40f. The exemplary thick resin film 20 is formed on the first main surface 42b in each of the sections 40 so as to cover the upper and side surfaces of the thick metal film 18. The thick resin film 20 has a thickness greater than that of the first resin body 19. Also, the thick resin film 20 has a thickness greater than that of the thick metal film 18.
[0071] Forming the resin structure 24 including the resin thick film 20 on the base substrate 41 includes performing a heat treatment of the resin.
[0072] 10, in this embodiment, the resin thick film 20 as an example of the resin structure 24 is formed by, for example, coating, specifically, a semiconductor process such as coating, baking, and processing with a dicing saw. The resin thick film 20 may contain, for example, an epoxy resin. However, the formation of the resin thick film 20 is not limited to this. The resin thick film 20 may be formed by, for example, molded resin processing using a resin molding die.
[0073] As shown in Fig. 11, a resin is applied onto a wafer product 40e (see Fig. 9) to obtain a wafer product 40f0. The wafer product 40f0 has a first resin thick film 26 formed on the first main surface 42b in each of the sections 40. The first resin thick film 26 can be formed on the thick metal film 18 to a thickness approximately equal to that of the thick metal film 18. The first resin thick film 26 can be formed to a thickness approximately twice as thick as the thick metal film 18 at the side portions of the first resin thick film 26 formed so as to cover the side surfaces of the thick metal film 18.
[0074] When the surface of the wafer product 40f0 is not processed, the first resin thick film 26 shown in FIG.
[0075] The surface of the wafer product 40f0 may be processed. Specifically, as shown in Fig. 10, the surface of the first thick resin film 26 of the wafer product 40f0 is processed to form a thick resin film 20. The thick resin film 20 has a structure 28, for example, at least one of a depression and a groove, on its surface. The structure 28, such as a depression or a groove, may be formed using, for example, a dicing saw.
[0076] Specifically, the structure 28 can be formed by half-cutting the first resin thick film 26 using a dicing saw. The half-cutting of the first resin thick film 26 can be performed at the boundary between adjacent sections 40 of the base substrate 41 on which the first resin thick film 26 is mounted. Also, the half-cutting of the first resin thick film 26 can be performed along at least one of the boundaries of the sections 40. Furthermore, the half-cutting of the first resin thick film 26 can be performed for each boundary of the sections 40. The depth of the depression by the dicing saw does not reach the wafer product 40e. An exemplary depth can be about half the thickness of the resin formed on the front surface of the wafer product 40e. The depth of the half-cut can be specified so as to reduce the magnitude of the warpage.
[0077] The thick resin film 20 has a thin first region 26b including a structure 28 formed in the first thick resin film 26, and a second region 26c thicker than the first region 26b. The structure 28 provides the first region 19b in the semiconductor device 11, and the second region 19c is adjacent to the first region 19b. Surface features such as depressions and grooves are formed by the thin resin portion formed by half-cutting and the thick resin portion not half-cut. After the structure 28 is formed in the first thick resin film 26, the first thick resin film 26 can be heat-treated to form the thick resin film 20.
[0078] In the exemplary wafer product 40f, at least one thick resin film 20 is formed on a base substrate 41 by forming structures 28 in a first thick resin film 26. The exemplary wafer product 40f has reduced warpage.
[0079] In an eighth step shown in FIG. 12 (for example, S107 in FIG. 15), the thick resin film 20 and the thick metal film 18 are ground to form a first resin body 19 and a thick metal body 17 from the thick resin film 20 and the thick metal film 18, respectively, to obtain a wafer product 40g. Prior to grinding, the wafer product 40f is fixed to a support plate 45. Specifically, the support plate 45 is attached to the second main surface 42c, and is separated from the wafer product 40g after grinding. The warpage of the wafer product 40f is reduced. In grinding, it becomes easy to attach the wafer product to the support plate 45 (see FIG. 12). Furthermore, the ground wafer product exhibits good in-plane uniformity.
[0080] In the wafer product 40g, in each of the sections 40, the side surface 17b of the thick-film metal body 17 is covered with the first resin body 19, and the thick-film metal body 17 is housed in the opening of the first resin body 19.
[0081] The base substrate 41, the thin-film metal electrode 15, and the thick-film metal body 17 are disposed in the direction of the first axis Ax1. The upper surface 17c of the thick-film metal body 17 and the upper surface 17c of the first resin body 19 can extend along a reference plane REF intersecting the first axis Ax1, and there is substantially no level difference between the upper surface 17c of the thick-film metal body 17 and the upper surface 17c of the first resin body 19.
[0082] According to this manufacturing method, the thickness of the thick-film metal body 17 is greater than the thickness of the thin-film metal electrode 15, and the thickness of the first resin body 19 is greater than the thickness of the insulating layer 21. In this semiconductor device 11, the upper surface 17c of the thick-film metal body 17 and the upper surface 19d of the first resin body 19 extend along the reference plane REF, thereby providing a structure for a chip size package. In this structure, the resin structure 24 can reduce warping of the base substrate 41 due to stress from the thick-film metal body 17 and the first resin body 19 in each section 40.
[0083] 13 (for example, S108 in FIG. 15), the array of sections 40 in the wafer product 40g is separated to obtain a plurality of semiconductor devices 11. Each semiconductor device 11 has the form of a semiconductor chip.
[0084] According to the above manufacturing method, the semiconductor device 11 and the wafer product 40g having reduced warpage are provided.
[0085] The manufacturing method of the semiconductor device 11 may include a tenth step shown in FIG. 13. In the tenth step, another exemplary resin structure 24 is formed. Specifically, a second resin thick film 30 is formed on at least a portion of the second main surface 42c of any of the wafer product 40e, the wafer product 40f0, or the wafer product 40f to provide a wafer product 40h. Referring to FIG. 14, the wafer product 40h is formed, for example, from the wafer product 40f0. The second resin thick film 30 is formed as a resin film for the second resin body 25. Alternatively, the second resin thick film 30 can be formed on at least a portion of the second main surface 42c of the wafer product 40f. Alternatively, the second resin thick film 30 can be formed on at least a portion of the second main surface 42c of the wafer product 40e.
[0086] In this embodiment, the resin thick film 20 including the second resin thick film 30 is formed by, for example, coating, specifically, a semiconductor process such as coating of coating and baking. The second resin thick film 30 of the resin thick film 20 may include, for example, an epoxy resin. After the second resin thick film 30 is formed, the second resin thick film 30 may be heat-treated to form the resin thick film 20.
[0087] However, the formation of the second resin thick film 30 is not limited to this. The second resin thick film 30 can be formed by, for example, a mold resin process using a resin molding die.
[0088] In this embodiment, an exemplary resin thick film 20 includes a first resin thick film 26 and a second resin thick film 30, and a base substrate 41 is provided between the first resin thick film 26 and the second resin thick film 30 to reduce warping of a wafer product 40h including the first resin thick film 26 and the second resin thick film 30.
[0089] 12, the thick resin film 20 and the thick metal film 18 of the wafer product 40h are ground to form a first resin body 19 and a thick metal body 17 from the thick resin film 20 and the thick metal film 18, respectively. The subsequent processes are applied to this wafer product in the same manner as for the wafer product 40g.
[0090] 12 and 13, it can be seen that each of the sections 40 includes a device area 44b and half of an isolation area 44c. The wafer product 40g (and base substrate 41) comprises a two-dimensional array of sections 40.
[0091] The wafer product 40g (and the base substrate 41) includes a lattice-like arrangement (two-dimensional arrangement) of the element areas 44b, and lattice-shaped separation areas 44c that define the arrangement of the element areas 44b. The separation area 44c runs between any one of the element areas 44b in the lattice-like arrangement and an element area 44b adjacent to that element area 44b.
[0092] According to this manufacturing method, the warpage of base substrate 41 can be reduced without reducing the shot rate in photolithography.
[0093] The wafer product 40g includes a base substrate 41 and includes element areas 44b in the sections 40 arranged in a lattice pattern and lattice-patterned separation areas 44c running along the boundaries of the sections 40. The wafer product 40g further includes at least one thin-film metal electrode 15 provided on the first main surface 42b in each section 40 or at least one section 40, and at least one thick-film metal body 17 provided on the first main surface 42b. The wafer product 40g also includes a first resin body 19 provided on the first main surface 42b across the sections 40 and filling spaces between the thick-film metal bodies 17. The wafer product 40g further includes a resin structure 24 provided on the base substrate 41.
[0094] The resin structure 24 has a first resin thick film 26 on the first main surface 42b of the base substrate 41. Furthermore, the resin structure 24 can have at least one of the following Structure 1 and Structure 2. the resin structure 24 further includes a second resin thick film 30 provided on the second main surface 42c of the base substrate 41; and The resin structure 24 provides the first resin thick film 26 with a first region 26b that is thin on the first main surface 42b of the base substrate 41, and a second region 26c that is thicker than the first region 26b.
[0095] The resin structure 24 is formed in a step prior to the eighth step (e.g., S107 in FIG. 15) shown in Fig. 12. The first resin thick film 26 is formed after the step of forming the thick metal film 18. Furthermore, the first region 26b and the second region 26c can be formed in the first resin thick film 26 prior to the formation of the second resin thick film 30 or after the formation of the second resin thick film 30.
[0096] Wafer product 40g is provided with the above features and, as previously described, wafer product 40g has a large fill factor.
[0097] Referring again to FIG. 15, the method 100 for manufacturing the semiconductor device 11 provides a method for fabricating some exemplary structures. The method 100 may include a sixth step (step S106). The method 100 may further include an eighth step (step S107). The method 100 may further include a ninth step (step S108). The method 100 may further include at least one of steps S101 to S105. The individual steps are described below. In step S101, a base substrate 41 is prepared. In step S102, a thin-film metal electrode 15 is formed. In step S103, an insulating layer 21 is formed. In step S104, a second inorganic insulating film 23 is formed. In step S105, a metal thick film 18 is formed. In step S106, at least one resin thick film 20 for the resin structure 24 is formed. In step S107, the thick metal film 18 and the thick resin film 20 are ground to form the thick film metal body 17 and the first resin body 19 from the thick metal film 18 and the thick resin film 20, respectively. In step S108, the array of sections 40 in the wafer product 40g is separated to obtain a plurality of semiconductor devices 11 (semiconductor chips and packages). According to the above method 100, the semiconductor device 11 and the wafer product 40g are provided.
[0098] According to the present embodiment, a semiconductor device 11 having a CSP structure capable of reducing warpage and a method 100 for manufacturing the semiconductor device are provided.
[0099] 16 is a plan view showing a wafer product and an exemplary half-cut line according to the present embodiment. The wafer product 40f0 can be half-cut along, for example, dicing lines (D0 to D15) for each separation region (for example, scribe region) of the section 40 in the X-axis direction of the coordinate system CS. The wafer product 40f0 can also be half-cut along, for example, dicing lines (D16 and D17) for every other separation region of the section 40 in the Y-axis direction of the coordinate system CS. Furthermore, the wafer product 40f0 is half-cut along, for example, dicing lines (D18 and D19) for every third separation region of the section 40 in the Y-axis direction of the coordinate system CS.
[0100] Fig. 17 is a plan view showing a wafer product according to this embodiment. Referring to Fig. 17, a wafer product 40e includes sections 40 arranged two-dimensionally.
[0101] 18 is a plan view showing a wafer product and a resin molding die according to this embodiment. As shown in FIG 18, a wafer product 40e is placed in a resin molding die 51 prepared when forming a thick resin film in step S106 in FIG 15.
[0102] Molding resin is injected into resin molding die 51 as shown by arrow RIN, and excess of the injected molding resin is discharged as shown by arrows ROUT1, ROUT2, and ROUT3.
[0103] A product having substantially the same size as a wafer is resin-molded in one batch using a resin molding die 51. The resin structure 24 of this product can include at least one of a first resin thick film 26 and a second resin thick film 30. The first resin thick film 26 (or the second resin thick film 30) formed by resin molding can be half-cut by dicing.
[0104] 19, 20, and 21 are diagrams showing exemplary steps in a method for fabricating a semiconductor device according to this embodiment. The fabrication methods shown in FIGS. 19, 20, and 21 each use a resin molding die 51 (53, 55, 57). The resin molding die 51 (53, 55, 57) has at least one cavity CVTY. The resin molding die 51 (53, 55, 57) has a cavity CVTY on the upper side of the wafer product, and may also have a cavity on the lower side of the wafer product.
[0105] Specifically, when forming the thick resin film 20, a resin body can be formed on the first main surface 42b of the base substrate 41 in the resin molding die 51 (53, 55, 57). Also, when forming the thick resin film 20, a resin body can be formed on the second main surface 42c of the base substrate 41 in the resin molding die 51 (53, 55, 57). Thereby, forming a resin body on the base substrate 41 using the resin molding die 51 (53, 55, 57) makes it possible to form the first thick resin film 26 (and the second thick resin film 30) on the base substrate 41.
[0106] Forming the resin structure 24 on the base substrate 41, specifically the wafer product 40e, may include the following steps. The wafer product 40e is placed in the resin molding mold 51 (53, 55, 57). Forming a resin structure 24 on the wafer product 40e using a resin molding die 51 (53, 55, 57).
[0107] The resin molding mold (53, 55, 57) has hanging walls (53b, 55b, 57b) aligned with the boundaries of the compartments 40 in the base substrate 41 of the wafer product 40e arranged in the resin molding mold 51 (53, 55, 57). The hanging walls (53b, 55b, 57b) define a cavity CVTY. The hanging walls (53b, 55b, 57b) are also configured to provide a structure 28, such as a depression or groove, in the resin structure 24. The structure 28 can extend in at least one of a first direction (e.g., X direction) and a second direction (e.g., Y direction) associated with the arrangement of the compartments 40.
[0108] As shown in FIG. 19, a cavity CVTY can be provided for each section 40 shown in FIG.
[0109] In step S201, the wafer product 40e is placed in the resin molding die 53 (51). In step S202, molten resin is injected into the resin molding die 53 (51) to form at least one of the first resin thick film 26 and the second resin thick film 30, in this embodiment, the first resin thick film 26, on the base substrate 41. In step S203, the molded product is removed from the resin molding die 53 (51) to obtain the wafer product 40i.
[0110] As shown in FIG. 20, the cavity CVTY can be provided to receive adjacent ones of the compartments 40 shown in FIG.
[0111] In step S301, the wafer product 40e is placed in the resin molding die 55 (51). In step S302, molten resin is injected into the resin molding die 53 (51) to form at least one of the first resin thick film 26 and the second resin thick film 30, in this embodiment, the first resin thick film 26, on the base substrate 41. In step S303, the molded product is removed from the resin molding die 55 (51) to obtain the wafer product 40i.
[0112] As shown in FIG. 21, the cavity CVTY can have a ceiling that is aligned to the height of the thick metal film in each of the compartments 40 shown in FIG.
[0113] In step S401, the wafer product 40e is placed in the resin molding die 57 (51). In step S402, molten resin is injected into the resin molding die 57 (51) to form at least one of the first resin thick film 26 and the second resin thick film 30, in this embodiment, the first resin thick film 26, on the base substrate 41. In step S403, the molded product is removed from the resin molding die 55 (51) to obtain the wafer product 40i.
[0114] Each of Figs. 22(a) to 22(d) is a drawing showing the size of the cavity of an exemplary resin molding die 51 (53, 55, 57) in the production method according to this embodiment.
[0115] As shown in Fig. 22(a), the cavity CVTY can be defined to receive two adjacent compartments 40. A resin flow can be provided in the alignment direction of the adjacent compartments 40. In the two adjacent compartments 40, the stress of the resin is relieved.
[0116] As shown in Fig. 22(b), it can be defined to receive four adjacent compartments 40. In the four adjacent compartments 40, the stress of the resin is relieved.
[0117] As shown in Fig. 22(c), it can be defined to receive nine adjacent compartments 40. In the nine adjacent compartments 40, the stress of the resin is relieved.
[0118] As shown in Fig. 22(d), the mold can be defined to receive a plurality of compartments 40 arranged in one direction. A resin flow can be provided in the arrangement direction. In the compartments 40 that are aligned in a row, stress in the resin is relieved.
[0119] 23(a) and 23(b) are diagrams showing an exemplary width of a half-cut region in the method for fabricating a semiconductor device according to the present embodiment and a width of a separation region for separating a partition array in a wafer product. Referring to FIG. 23(a), the width WHC of the half-cut region is smaller than the separation region width WSP. In the semiconductor device 11 fabricated in this manner, the first region 19b is not left. However, reduced stress remains in the semiconductor device 11. Referring to FIG. 23(b), the width WHC of the half-cut region is smaller than the separation region width WSP. In the semiconductor device 11 fabricated in this manner, the first region 19b is provided. And reduced stress remains in the semiconductor device 11.
[0120] 24(a) to 24(h) are drawings showing an exemplary layout of the first and second regions of a semiconductor device fabricated by the manufacturing method according to this embodiment.
[0121] 24(a), in the semiconductor device 11 manufactured by the above method, the first region 19b surrounds the second region 19c, thereby preventing the second region 19c from extending in two directions.
[0122] Referring to FIG. 24(b), in the semiconductor device 11 manufactured by the above method, the first region 19b is provided on two opposing edges 13k, which can provide resin flow in two directions while preventing the extension of the second region 19c in one direction.
[0123] 24(c), in the semiconductor device 11 manufactured by the above method, the first region 19b is provided on three adjacent edges 13k and is adjacent to the second region 19c on three sides, thereby preventing the second region 19c from extending in two directions.
[0124] 24(d), in the semiconductor device 11 manufactured by the above method, the first region 19b is provided on two adjacent edges 13k and is adjacent to the second region 19c on two side surfaces, thereby preventing the second region 19c from extending in two directions.
[0125] 24(e), in the semiconductor device 11 manufactured by the above method, the first region 19b is partially provided on two opposing edges 13k and is adjacent to the second region 19c on two opposing side surfaces, thereby preventing the second region 19c from extending too wide in one direction.
[0126] 24(f), in the semiconductor device 11 manufactured by the above method, the first region 19b is provided partially partitioned on two opposing edges 13k, sandwiching the second region 19c, which makes it possible to prevent the extension of the second region 19c in one section and to provide routes for resin flow in two directions.
[0127] 24(g), in the semiconductor device 11 manufactured by the above method, the first regions 19b are provided at the four corners so as to be separated from each other and sandwich the second region 19c, which prevents the extension of the second region 19c in one section and provides routes for the resin flow in two directions.
[0128] Referring to Fig. 24(h), the semiconductor device 11 does not include the first region 19b, but only includes the second region 19c. The semiconductor device 11 of this form can be provided from a molding completed product using a resin molding die having a cavity as shown in Fig. 22(c), and is fabricated by performing separation as shown in Fig. 23(a). The semiconductor device 11 has reduced stress.
[0129] 25(a), 25(b), 25(c), and 25(d) are diagrams according to this embodiment. 1 is a schematic diagram of various CSP assemblies produced by the manufacturing method.
[0130] 13, wafer product 40g is subjected to separation of the array of sections 40 to form CSP assemblies, thereby producing CSP assemblies 46.
[0131] 25(a) to 25(d), the semiconductor device 11 includes a CSP assembly 46. In the CSP assembly 46, a resin structure 24 is provided on a semiconductor chip. A first resin body 19 is provided on the semiconductor chip, specifically on the front surface of the semiconductor chip. A second resin body 25 is provided on the semiconductor chip, specifically on the back surface of the semiconductor chip.
[0132] 25(a) to 25(d), the CSP assembly 46 includes a semiconductor chip 47 including a semiconductor element in the compartment 40, and a resin package 49 provided on the semiconductor chip 47. The resin package 49 includes a resin structure 24 provided on the semiconductor chip 47 so as not to cover the side surface 13s of the edge 13k of the support 13 of the semiconductor chip 47.
[0133] The resin package 49 may include a first package resin body 49b that covers the semiconductor elements on the front surface of the semiconductor chip 47. The resin package 49 may include a second package resin body 49c that covers the back surface of the semiconductor chip 47.
[0134] With reference to Figures 25(a) and 25(c), the first package resin body 49b includes the first region 19b as shown in Figures 24(a) to 24(g). With reference to Figures 25(b) and 25(d), the first package resin body 49b does not include the first region 19b as shown in Figure 24(h).
[0135] As can be understood from the above description, the first package resin body 49b in Figures 25(a) to 25(d) can be formed from the first thick resin film 26. The second package resin body 49c in Figures 25(b) and 25(c) can be formed from the second thick resin film 30.
[0136] As shown in FIGS. 25(b) and 25(c), the semiconductor chip 47 is provided between a first package resin body 49b and a second package resin body 49c.
[0137] The present embodiment can have various aspects as described below.
[0138] The semiconductor device of a first side according to this embodiment includes a support having a first main surface and a second main surface opposite to the first main surface, and one or more semiconductor elements, at least one thin-film metal electrode provided on the first main surface of the support, a thick-film metal body provided on the thin-film metal electrode, and a resin structure provided on the support, wherein the thickness of the thick-film metal body is greater than the thickness of the thin-film metal electrode, and the resin structure includes a first resin body covering a side surface of the thick-film metal body on the first main surface of the support, and the resin structure has at least one of the following Structure 1 and Structure 2: Structure 1: the resin structure further includes a second resin body provided on the second main surface of the support, and Structure 2: the resin structure provides the first resin body with a first region and a second region thicker than the first region on the first main surface of the support.
[0139] In a second aspect according to the first aspect of this embodiment, the support further has an edge that defines the first main surface of the support, the resin structure includes the first resin body and the second resin body, the first resin body includes the first region and the second region, and the first resin body and the second resin body may not cover a side surface of the edge of the support.
[0140] In a third aspect according to the first aspect of this embodiment, the support further has an edge that defines the first main surface of the support, the resin structure includes the first resin body and the second resin body, the first resin body does not include the first region and the second region, and the first resin body and the second resin body may not cover a side surface of the edge of the support.
[0141] In a fourth aspect according to the first aspect of the present embodiment, the resin structure does not include the second resin body, and the first resin body can include the first region and the second region.
[0142] In a fifth side face which corresponds to any one of the first to fourth side faces of this embodiment, the first main surface of the support is defined by a first edge and a second edge extending in a first direction, and a third edge and a fourth edge extending in a second direction intersecting the first direction, and the first region of the first resin body can be provided on at least one of the first edge, the second edge, the third edge, and the fourth edge.
[0143] In a sixth aspect according to any one of the first to fifth aspects of this embodiment, the first region may have a closed shape surrounding the second region.
[0144] A method for fabricating a semiconductor device according to a seventh aspect of this embodiment includes preparing a base substrate including a semiconductor and having a first main surface and a second main surface opposite to the first main surface, and an array of a plurality of sections including semiconductor elements on the first main surface; forming a thin film metal electrode on the first main surface in each of the sections of the base substrate; forming a thick metal film on the first main surface in each of the sections of the base substrate to form a wafer product, the thick metal film being located on the thin film metal electrode; and forming a resin body including at least one thick resin film on the base substrate of the wafer product. and forming the thick metal film on a base substrate, the thickness of the thick metal film being greater than the thickness of the thin-film metal electrode, the resin body including a first thick resin film covering at least a side surface of the thick metal film on the first main surface of the base substrate, the resin body having at least one of the following structures 1 and 2: Structure 1: the resin body further includes a second thick resin film provided on the second main surface of the base substrate; and Structure 2: the resin body provides, in the first thick resin film, a first region constituting at least one of a recess and a groove on the first main surface of the base substrate, and a second region thicker than the first region.
[0145] In the method of the eighth aspect according to the seventh aspect of this embodiment, the recesses and grooves in the resin body can be formed by half-cutting a resin film formed in forming the resin body on the base substrate.
[0146] In the method of the ninth aspect according to the eighth aspect of this embodiment, half-cutting the resin film can be performed at the boundary between the sections of the array.
[0147] In a method of a tenth aspect according to the eighth or ninth aspect of this embodiment, the array has a plurality of boundaries separating adjacent ones of the compartments, and half-cutting the resin film can be performed along at least one of the boundaries to form the groove.
[0148] In the method of the eleventh aspect according to the eighth aspect of this embodiment, forming a resin body on the base substrate of the wafer product may include placing the wafer product in a resin molding mold having at least one cavity, and forming the resin body on the base substrate using the resin molding mold.
[0149] In the method of the twelfth aspect according to the eleventh aspect of this embodiment, the resin molding die has a hanging wall configured to define the cavity, and the hanging wall can form the recess or the groove provided in the first resin thick film.
[0150] In the method of aspect 13 according to aspect 11 or aspect 12 of this embodiment, the cavity may be configured to receive adjacent ones of the sections of the array.
[0151] In the method of the fourteenth aspect according to the eleventh or twelfth aspect of this embodiment, the cavity may be provided for each of the sections of the array.
[0152] In the method of aspect 15 according to any one of the eleventh to fourteenth aspects of this embodiment, the resin body can be formed on the first main surface of the base substrate within the resin molding die.
[0153] In the method of side 16 according to any one of the 11th to 15th sides of this embodiment, the resin body can be formed on the second main surface of the base substrate within the resin molding die.
[0154] The method of aspect 17 according to any one of aspects 8 to 16 of this embodiment further includes grinding the thick resin film and the thick metal film to form a thick film resin body and a thick film metal body from the thick resin film and the thick metal film, respectively, wherein the thick metal film, the thin-film metal electrode, and the base substrate are arranged in the direction of a first axis, and an upper surface of the thick metal film and an upper surface of the thick resin film can extend along a reference plane that intersects the first axis.
[0155] The method of the 18th aspect according to the 17th aspect of this embodiment further includes grinding the thick resin film and the thick metal film, and then separating the array of the compartments to form a CSP assembly including a semiconductor chip including the semiconductor element in the compartment and a resin package on the semiconductor chip, wherein the resin package includes a resin structure provided on the semiconductor chip so as not to cover the side edges of the edge of the semiconductor chip, and the resin structure includes a first resin body covering at least the side edges of the thick metal film on a first main surface of the semiconductor chip.
[0156] The present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the spirit and scope of the present invention, all of which are included in the technical concept of the present invention. [Explanation of symbols]
[0157] 11... Semiconductor device, 13...Support 13b: first principal surface, 13c...Second principal surface, 13d: element area, 13e... Surrounding area, 13k, 13k1 to 13k4... edges, 13s, 17b...side, 14. Element structure, 15...thin film metal electrode, 17...Thick film metal body, 17c...Top surface, 18...metal thick film, 19...First resin body, 19b...first area, 19c...Second area, 19d...Top surface, 20...Thick resin film, 21: Insulating layer, 22b...opening, 23... second inorganic insulating film, 23b...opening, 24...Resin structure 25...Resin body 26...Thick resin film, 26b...first area, 26c...Second area, 28... Structure, 30...Thick resin film, 31... Semiconductor element, 33 Insulation structure, 40... plots, 40a, 40b to 40i: wafer products; 41... Base substrate, 42b...first principal surface, 42c...second principal surface, 43 Semiconductor element, 45...support plate, 46...CSP assembly, 47 Semiconductor chips, 49...Resin package, 49b: First package resin body, 49c...Second package resin body, 51, 53, 55, 57 ··· resin molding dies, 100 ··· method, Ax1 ··· first axis.
Claims
1. a support having a first major surface and a second major surface opposite the first major surface, and one or more semiconductor elements; at least one thin film metal electrode disposed on the first major surface of the support; a thick-film metal body provided on the thin-film metal electrode; a resin structure provided on the support; Equipped with the thickness of the thick-film metal body is greater than the thickness of the thin-film metal electrode; the resin structure includes a first resin body covering a side surface of the thick-film metal body on the first main surface of the support, The resin structure has at least one of the following Structure 1 and Structure 2: Structure 1: The resin structure further includes a second resin body provided on the second main surface of the support, and Structure 2: the resin structure provides the first resin body with a first region and a second region thicker than the first region on the first main surface of the support; Semiconductor device.
2. the support further has an edge defining the first major surface of the support; the resin structure includes the first resin body and the second resin body, the first resin body includes the first region and the second region, The first resin body and the second resin body do not cover the side surface of the edge of the support body.
2. The semiconductor device according to claim 1.
3. the support further has an edge defining the first major surface of the support; the resin structure includes the first resin body and the second resin body, the first resin body does not include the first region and the second region, The first resin body and the second resin body do not cover the side surface of the edge of the support body.
2. The semiconductor device according to claim 1.
4. the resin structure does not include the second resin body, The first resin body includes the first region and the second region.
2. The semiconductor device according to claim 1.
5. the first main surface of the support is defined by a first edge and a second edge extending in a first direction, and a third edge and a fourth edge extending in a second direction intersecting the first direction; The first region of the first resin body is provided on at least one edge of the first edge, the second edge, the third edge, and the fourth edge.
5. The semiconductor device according to claim 4.
6. The first region has a closed shape surrounding the second region.
5. The semiconductor device according to claim 2 or 4.
7. providing a base substrate including a semiconductor, the base substrate having a first main surface, a second main surface opposite the first main surface, and an array of a plurality of sections including semiconductor elements on the first main surface; forming a thin film metal electrode on the first major surface in each of the sections of the base substrate; forming a thick metal film on the first major surface in each of the sections of the base substrate to form a wafer product, the thick metal film overlying the thin film metal electrode; forming a resin body on the base substrate of the wafer product, the resin body including at least one resin thick film; Equipped with the thickness of the thick metal film is greater than the thickness of the thin metal electrode; the resin body includes a first resin thick film covering at least a side surface of the thick metal film on the first main surface of the base substrate, The resin body has at least one of the following Structure 1 and Structure 2: Structure 1: The resin body further includes a second resin thick film provided on the second main surface of the base substrate; and Structure 2: The resin body provides the first resin thick film with a first region constituting at least one of a recess and a groove on the first main surface of the base substrate, and a second region thicker than the first region; A method for fabricating a semiconductor device.
8. the recess and the groove in the resin body are formed by half-cutting a resin film formed in forming the resin body on the base substrate. A method for fabricating a semiconductor device according to claim 7.
9. The resin film is half-cut at the boundary between the sections of the array. A method for fabricating a semiconductor device according to claim 8.
10. the array has a plurality of boundaries separating adjacent compartments; half-cutting the resin film along at least one of the boundaries to form the groove; A method for fabricating a semiconductor device according to claim 8.
11. Forming a resin body on the base substrate of the wafer product includes: placing the wafer product in a resin mold having at least one cavity; and forming the resin body on the base substrate using the resin molding die; Including, A method for fabricating a semiconductor device according to claim 8.
12. the resin molding die has a hanging wall configured to define the cavity; The hanging wall forms the recess or the groove provided in the first resin thick film. A method for fabricating a semiconductor device according to claim 11.
13. the cavity is adapted to receive adjacent ones of the sections of the array; A method for fabricating a semiconductor device according to claim 11.
14. The cavity is provided for each of the sections of the array. A method for fabricating a semiconductor device according to claim 11.
15. In the resin molding die, the resin body is formed on the first main surface of the base substrate. A method for fabricating a semiconductor device according to claim 11.
16. In the resin molding die, the resin body is formed on the second main surface of the base substrate. A method for fabricating a semiconductor device according to claim 15.
17. grinding the thick resin film and the thick metal film to form a thick film resin body and a thick film metal body from the thick resin film and the thick metal film, respectively; the thick metal film, the thin metal electrode, and the base substrate are arranged in a direction of a first axis; an upper surface of the thick metal film and an upper surface of the thick resin film extend along a reference plane intersecting the first axis; A method for producing a semiconductor device according to any one of claims 8 to 16.
18. and performing separation of the array of the compartments after grinding the resin thick film and the metal thick film to form a CSP assembly including a semiconductor chip including the semiconductor element in the compartment and a resin package on the semiconductor chip; the resin package includes a resin structure provided on the semiconductor chip so as not to cover a side surface of an edge of the semiconductor chip; the resin structure includes a first resin body covering at least a side surface of the thick metal film on a first main surface of the semiconductor chip; A method for fabricating a semiconductor device according to claim 17.
Citation Information
Patent Citations
Method for manufacturing semiconductor device and semiconductor device
JP2016146395A