Electro-optical device and electronic apparatus

JP2025032539APending Publication Date: 2025-03-12SEIKO EPSON CORP
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Patent Information

Application Number
JP2023137856
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-28
Publication Date
2025-03-12

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Abstract

To provide an electro-optical device that improves a numeral aperture and the reliability of electrical connection in a contact hole and suppresses heat generation in the inside of a circuit board, and an electronic apparatus.SOLUTION: A liquid crystal device 100 as an electrical-optical device comprises: a TFT 30; a pixel electrode 11; a first capacitive element 50; a third relay electrode 83 extending in a direction along an axis X; and a common wiring 18 including a body part 18M extending along an axis Y and a protruding part 18P protruding in a -X direction from the body part 18M and electrically connected to the first capacitive element 50 via a third contract hole CNT 13. The third relay electrode 83 and the common wiring 18 respectively include first layers 83a, 18a, and second layers 83b, 18b laminated on the first layers 83a, 18a and having low optical reflectance, with the second layer 18b not provided in at least a section of the body part 18M.SELECTED DRAWING: Figure 8
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Description

[Technical field]

[0001] The present invention relates to an electro-optical device and an electronic device. [Background technology]

[0002] Conventionally, as one type of electro-optical device, an active drive type liquid crystal device has been known in which each pixel is provided with a transistor that controls switching of the pixel electrode. Such liquid crystal devices are provided with contact holes for connecting various wirings and electrodes. For example, Patent Document 1 discloses an electro-optical device having a contact hole for connecting a shield layer and a relay layer for the shield layer, and a contact hole for connecting a third relay electrode and a second relay electrode. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2005-242296 A Summary of the Invention [Problem to be solved by the invention]

[0004] However, the electro-optical device described in Patent Document 1 has a problem in that it is difficult to improve the aperture ratio. More specifically, the shield layer is recessed in a planar manner, and the third relay electrode and the contact hole are disposed therein. The third relay electrode is electrically connected to the pixel electrode via the contact hole. In recent years, in order to further improve the aperture ratio of liquid crystal devices, the wiring tends to be thin and its area is small. Therefore, in the form in which the shield layer is recessed, it is difficult to secure room for arranging the above-mentioned contact hole.

[0005] There was also a problem that it was difficult to improve the reliability of the electrical connection in the contact holes. More specifically, a single-layer structure made of a conductor such as aluminum is adopted for the contact holes for connecting the shield layer and the relay layer for the shield layer, and for connecting the third relay electrode and the second relay electrode. When forming aluminum wiring in these contact holes, the aluminum is easily etched by the stripping solution in the patterning process. The adhesion is easily reduced inside the contact holes, and the aluminum layer tends to become thinner. Therefore, when the aluminum is etched, there is a possibility that the reliability of the electrical connection will be reduced.

[0006] Furthermore, when a laminated structure is adopted over the entire area of ​​each of the contact holes, the shield layer, and the third relay electrode, there is a problem that heat is easily generated inside the substrate due to the high light absorption efficiency of the electrolytic corrosion prevention layer such as titanium nitride. In other words, there has been a demand for an electro-optical device that improves the aperture ratio and the reliability of the electrical connection in the contact holes, while suppressing heat generation inside the substrate. [Means for solving the problem]

[0007] The electro-optical device comprises a transistor, a pixel electrode corresponding to the transistor, a capacitive element corresponding to the pixel electrode, a relay layer having a main body portion extending along a first direction and electrically connected to the transistor via a first contact hole, and a protrusion portion protruding from the main body portion in a second direction intersecting the first direction and electrically connected to the pixel electrode via a second contact hole, and a first wiring in the same layer as the relay layer, the main body portion extending along the second direction, and a protrusion portion protruding from the main body portion in the first direction and electrically connected to the capacitive element via a third contact hole, wherein the relay layer and the first wiring each have a first layer having optical reflectivity, and a second layer stacked on the first layer and having a lower optical reflectivity than the first layer, and the second layer is not provided on at least a portion of the main body portion of the first wiring.

[0008] An electronic device includes the electro-optical device described above. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a schematic plan view showing the configuration of a liquid crystal device according to a first embodiment. [Diagram 2] 2 is a schematic cross-sectional view showing the structure of the liquid crystal device taken along line AA' in FIG. [Diagram 3] FIG. 2 is an equivalent circuit diagram showing the electrical configuration of the liquid crystal device. [Figure 4] FIG. 2 is a schematic plan view showing an arrangement of pixels. [Diagram 5] 5 is a cross-sectional view showing the structure of the element substrate taken along line segment β1-β2 in FIG. 4. [Figure 6] 5 is a cross-sectional view showing the structure of an element substrate taken along line segment α1-α2 in FIG. 4. [Figure 7] 5 is a cross-sectional view showing the structure of an element substrate taken along line segment γ1-γ2 in FIG. 4. [Figure 8] FIG. 4 is a plan view showing the configuration of a common line and a third relay electrode. [Figure 9] FIG. 11 is a plan view showing a configuration of a third relay electrode according to the second embodiment. [Figure 10] 5 is a cross-sectional view showing the structure of the element substrate taken along line segment β1-β2 in FIG. 4. [Figure 11] 5 is a cross-sectional view showing the structure of an element substrate taken along line segment α1-α2 in FIG. 4. [Figure 12] FIG. 11 is a schematic diagram showing the configuration of a projection type display device according to a third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The present invention is not limited to the following embodiment, and various modified examples implemented within the scope of the present invention are also included in the present invention.

[0011] In each of the following figures, XYZ axes, which are mutually orthogonal coordinate axes, are added as necessary, the direction indicated by each arrow is the + direction, and the direction opposite to the + direction is the - direction. The +Z direction is sometimes referred to as the upward direction, and the -Z direction is sometimes referred to as the downward direction. In this specification, the first direction is the direction along the X axis, and the second direction intersecting with the first direction is the direction along the Y axis. In each of the following figures, the scale of each layer and each component is made different from the actual scale in order to make each layer and each component large enough to be recognized.

[0012] In addition, the plane including the X-axis and the Y-axis is also called the XY plane, and the XY plane viewed from the +Z direction is also called a planar view or planar. Furthermore, for example, the description of "on a substrate" refers to a case where the substrate is disposed in contact with the substrate, a case where the substrate is disposed via another structure, or a case where a part of the substrate is disposed in contact with the substrate and a part of the substrate is disposed via another structure.

[0013] 1. First embodiment In this embodiment, an active driving type liquid crystal device 100 having a thin film transistor (hereinafter abbreviated as "TFT") as a transistor for each pixel is exemplified as the electro-optical device. The liquid crystal device 100 is suitable as, for example, a light modulation element (liquid crystal light valve) of a projection type display device as an electronic device described later.

[0014] As shown in Figures 1 and 2, a liquid crystal device 100 as an electro-optical device according to this embodiment has an element substrate 10, a counter substrate 20 arranged opposite the element substrate 10, and a liquid crystal layer 5 containing liquid crystal sandwiched between the element substrate 10 and the counter substrate 20.

[0015] The substrate 10a of the element substrate 10 is, for example, a glass substrate, a quartz substrate, etc. The substrate 20a of the counter substrate 20 is, for example, a transparent substrate such as a glass substrate, a quartz substrate, etc.

[0016] The element substrate 10 is larger than the counter substrate 20 in plan view. The element substrate 10 and the counter substrate 20 are joined via a sealant 6 arranged along the outer edge of the counter substrate 20. A liquid crystal having positive or negative dielectric anisotropy is filled in the gap between the element substrate 10 and the counter substrate 20 to provide a liquid crystal layer 5. In the following description, the element substrate 10 and the counter substrate 20 may be referred to as a pair of substrates.

[0017] For example, an adhesive such as a thermosetting, photosetting, or electron beam curing epoxy resin is used for the sealing material 6. A spacer (not shown) is mixed into the sealing material 6 to keep the gap between the pair of substrates constant.

[0018] A display area E including a plurality of pixels P arranged in a matrix is ​​provided inside the sealant 6. Outside the display area E is a peripheral area F. In the peripheral area F, a parting portion 23 is provided between the sealant 6 and the display area E, surrounding the display area E. For example, a light-shielding metal or metal oxide is used for the parting portion 23.

[0019] Although not shown in the figure, a dummy region is provided around the display region E, and a light-shielding portion is provided in the display region E. The dummy region does not contribute to the display of the liquid crystal device 100. The light-shielding portion is a so-called black matrix, and is provided on the counter substrate 20.

[0020] The element substrate 10 is provided with a terminal section in which a plurality of external connection terminals 43 are arranged. A data line driving circuit 47 is provided between a first side along the terminal section and the sealing material 6. In addition, an inspection circuit 41 is provided between the sealing material 6 and the display area E along a second side opposite to the first side.

[0021] A scanning line driving circuit 45 is provided between the sealant 6 and the display region E along the third and fourth sides that are perpendicular to the first side and face each other. A plurality of wirings 49 connecting the two scanning line driving circuits 45 are provided between the sealant 6 on the second side and the inspection circuit 41.

[0022] The wiring 49 connected to the data line driving circuit 47 and the scanning line driving circuit 45 is electrically connected to a plurality of external connection terminals 43 arranged along the first side. The arrangement of the inspection circuit 41 is not limited to the above, and it may be provided between the sealant 6 along the data line driving circuit 47 and the display area E.

[0023] 2, on the surface of the substrate 10a facing the liquid crystal layer 5, there are provided a light-transmitting pixel electrode 11 provided for each pixel P, a TFT 30 which is a switching element, wiring 49, and an alignment film 12 which covers these. The TFT 30 and the pixel electrode 11 are components of the pixel P. The pixel electrode 11 is provided corresponding to the TFT 30. The element substrate 10 includes the substrate 10a, and the pixel electrode 11, the TFT 30, wiring 49, and alignment film 12 which are provided on the substrate 10a.

[0024] Light L is incident on the liquid crystal device 100 from the counter substrate 20 side. The light L originates from, for example, a laser light source. The direction of incidence of the light L on the liquid crystal device 100 is not limited to the counter substrate 20 side, and may be from the element substrate 10 side. The liquid crystal device 100 may also be configured to include a focusing means such as a microlens that focuses the incident light L for each pixel P.

[0025] On the surface of the substrate 20a facing the liquid crystal layer 5, there are provided a parting portion 23, an insulating layer 25 formed to cover the parting portion 23, a counter electrode 21 provided to cover the insulating layer 25, and an alignment film 22 covering the counter electrode 21. In the liquid crystal device 100, a common electrode is disposed on the counter substrate 20 side as the counter electrode 21, but the present invention is not limited to this configuration.

[0026] As shown in FIG. 1, the scanning line driving circuit 45 and the inspection circuit 41 overlap the parting portion 23 in plan view. The parting portion 23 functions as a light shielding portion. More specifically, the parting portion 23 shields the light L incident from the counter substrate 20 side from entering peripheral circuits such as the scanning line driving circuit 45. That is, the parting portion 23 has a function of preventing malfunction of the peripheral circuits. The parting portion 23 also suppresses the incidence of unnecessary stray light into the display region E. This suppresses a decrease in the contrast of the liquid crystal device 100.

[0027] 2, the insulating layer 25 is provided so as to cover the parting portion 23 and to have a flat surface on the side of the liquid crystal layer 5. The insulating layer 25 is made of, for example, an inorganic material such as silicon oxide having optical transparency.

[0028] The counter electrode 21 covers the insulating layer 25, and is electrically connected to vertical conductive parts 7 provided at the four corners of the counter substrate 20. The vertical conductive parts 7 are electrically connected to a common wiring 18 on the element substrate 10 side, which will be described later.

[0029] The pixel electrode 11 and the counter electrode 21 are made of a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide). The alignment film 12 and the alignment film 22 are selected based on the optical design of the liquid crystal device 100. Materials for the alignment films 12 and 22 include inorganic alignment films such as silicon oxide and organic alignment films such as polyimide.

[0030] The liquid crystal device 100 employs optical designs for a normally white mode or a normally black mode. In the normally white mode, the transmittance of the pixel P when no voltage is applied is greater than the transmittance when a voltage is applied, and in the normally black mode, the transmittance of the pixel P when no voltage is applied is less than the transmittance when a voltage is applied. In the liquid crystal device 100, polarizing elements are disposed on both the incident side and the exit side of the light L according to the optical design.

[0031] In the present embodiment, hereinafter, an example will be described in which the above-mentioned inorganic alignment film is used as the alignment films 12 and 22, and liquid crystal having negative dielectric anisotropy is used, and an optical design of a normally black mode is adopted.

[0032] As shown in Fig. 3, the liquid crystal device 100 has scanning lines 13, data lines 16, and common wiring 18 on a substrate 10a of an element substrate 10. The scanning lines 13 extend along the X-axis. The data lines 16 and the common wiring 18 extend along the Y-axis. The common wiring 18 is not limited to extending along the Y-axis. The common wiring 18 is an example of a first wiring of the present invention.

[0033] An area defined by the scanning lines 13 along the X-axis and the data lines 16 along the Y-axis becomes a pixel P. The pixel P includes a pixel electrode 11, a TFT 30, a first capacitance element 50, and a second capacitance element 60. The first capacitance element 50 and the second capacitance element 60 are provided corresponding to the pixel electrode 11.

[0034] The scanning lines 13 are electrically connected to the gates of the TFTs 30, and the data lines 16 are electrically connected to the sources of the TFTs 30. The scanning lines 13 have a function of simultaneously controlling the on / off of the TFTs 30 provided in the same row. The pixel electrodes 11 are electrically connected to the drains of the TFTs 30.

[0035] The data lines 16 are electrically connected to a data line driving circuit 47 and supply image signals D1, D2, ..., Dn supplied from the data line driving circuit 47 to the pixels P. The scanning lines 13 are electrically connected to a scanning line driving circuit 45 and supply scanning signals SC1, SC2, ..., SCm supplied from the scanning line driving circuit 45 to each pixel P.

[0036] The image signals D1 to Dn supplied from the data line driving circuit 47 to the data lines 16 may be supplied line-sequentially in this order, or may be supplied in groups to adjacent data lines 16. The scanning line driving circuit 45 supplies scanning signals SC1 to SCm to the scanning lines 13 in a line-sequential manner in pulse form at a predetermined timing.

[0037] When the scanning signal SC1 is input to the TFT 30, the TFT 30 is turned on for a certain period of time. As a result, the image signal D1 supplied from the data line 16 is written to the pixel electrode 11 at a certain timing. Then, the image signal D1 of a certain level written to the liquid crystal layer 5 via the pixel electrode 11 is held for a certain period of time between the pixel electrode 11 and the counter electrode 21 disposed opposite to the pixel electrode 11 with the liquid crystal layer 5 interposed therebetween.

[0038] In order to prevent leakage of the held image signal D1, a first capacitive element 50 and a second capacitive element 60 are electrically connected in parallel to a liquid crystal capacitance provided between the pixel electrode 11 and the counter electrode 21. One end of the first capacitive element 50 is electrically connected to the drain of the TFT 30 and the pixel electrode 11. The other end of the first capacitive element 50 is electrically connected to a common wiring 18 to which a constant potential is applied. The second capacitive element 60 is connected in the same manner as the first capacitive element 50.

[0039] Although not shown, an inspection circuit 41 is connected to the data lines 16. This makes it possible to detect the image signals D1, D2, ..., Dn during the manufacturing process of the liquid crystal device 100 and check for operational defects of the liquid crystal device 100.

[0040] As shown in Fig. 4, the pixel electrodes 11 are substantially square, and are provided in a matrix shape corresponding to the arrangement of the pixels P. Between adjacent pixel electrodes 11, scanning lines 13 are provided along the X-axis, and data lines 16 and common wiring 18 are provided along the Y-axis. Note that Fig. 4 shows an enlarged view of an area E1, which is a part of the display area E in Fig. 1.

[0041] In the display region E, a light-shielding region SD is provided by dividing a plurality of pixels P in a plane. The light-shielding region SD includes a linear portion including the scanning lines 13 and a linear portion including the data lines 16 and the common wiring 18, and is in a lattice shape as indicated by the dashed lines. Since a light-shielding conductive material is applied to the functional layers and wirings such as the scanning lines 13 and the data lines 16, the light-shielding region SD becomes a so-called non-opening region. That is, in the display region E, the region other than the light-shielding region SD becomes an opening region.

[0042] A second contact hole CNT12 is provided in the light-shielding region SD at the end in the -Y direction corresponding to the pixel electrode 11. The pixel electrode 11 and a third relay electrode 83, which will be described later, are electrically connected via the second contact hole CNT12. That is, the third relay electrode 83 of this embodiment corresponds to the third relay electrode of a conventional electro-optical device.

[0043] In the liquid crystal device 100, the second contact holes CNT12 are provided in the light-shielding region SD. In other words, since the scanning lines 13, the common wiring 18, etc. are not recessed in a planar manner, these wirings can be made thinner, and the aperture ratio can be easily improved. A detailed configuration of the element substrate 10 including the third relay electrodes 83, etc. will be described later.

[0044] 5, 6 and 7, the element substrate 10 of the liquid crystal device 100 includes a substrate 10a, a second capacitance element 60, a scanning line 13, a TFT 30 including a semiconductor layer 31 and a gate electrode 32, a first capacitance element 50, a data line 16, a common wiring 18, a third relay electrode 83, a pixel electrode 11, and a plurality of interlayer insulating layers described below. The third relay electrode 83 is an example of a relay layer of the present invention.

[0045] The element substrate 10 has a structure in which a plurality of functional layers are laminated on a base substrate 10a. In detail, a first conductive layer including a fourth capacitance electrode 62 of the second capacitance element 60, a second conductive layer including a third capacitance electrode 61 of the second capacitance element 60, a third conductive layer including a scanning line 13, a semiconductor layer 31 of the TFT 30, a fourth conductive layer including a gate electrode 32 of the TFT 30, a fifth conductive layer including a second capacitance electrode 52 of the first capacitance element 50, a sixth conductive layer including a first capacitance electrode 51 of the first capacitance element 50, a seventh conductive layer including a data line 16, an eighth conductive layer including a common wiring 18, and a pixel electrode 11 are laminated in this order on the substrate 10a.

[0046] A second dielectric layer 63 is provided between the fourth capacitance electrode 62 of the first conductive layer and the third capacitance electrode 61 of the second conductive layer. A first interlayer insulating layer 71 is provided between the second conductive layer and the third conductive layer. A second interlayer insulating layer 72 is provided between the third conductive layer and the semiconductor layer 31. A gate insulating layer 33 is provided between the semiconductor layer 31 and the gate electrode 32 of the fourth conductive layer. A third interlayer insulating layer 73 as a second insulating layer is provided between the fourth conductive layer and the fifth conductive layer.

[0047] A first dielectric layer 53 is provided between the fifth conductive layer and the sixth conductive layer. A fourth interlayer insulating layer 74 serving as a first insulating layer is provided between the sixth conductive layer and the seventh conductive layer. A fifth interlayer insulating layer 75 is provided between the seventh conductive layer and the eighth conductive layer. A sixth interlayer insulating layer 76 is provided between the eighth conductive layer and the pixel electrode 11.

[0048] Examples of materials for these interlayer insulating layers include silicon oxide (Non-doped Silicate Glass: NSG), silicon nitride, etc. In this embodiment, silicon oxide is used.

[0049] The second capacitance element 60 is provided on the substrate 10a including the inside of a trench (not shown). In the second capacitance element 60, a fourth capacitance electrode 62, a second dielectric layer 63, and a third capacitance electrode 61 are laminated in this order from the substrate 10a side. An example of the material of the third capacitance electrode 61 and the fourth capacitance electrode 62 is conductive polysilicon. An example of the material of the second dielectric layer 63 is a dielectric material. Examples of the dielectric material include silicon nitride, silicon oxide, hafnium oxide, aluminum oxide, and tantalum oxide, and these layers are used as a single layer or in combination.

[0050] The scanning lines 13 also function as a light-shielding layer, and are provided on the first interlayer insulating layer 71. A known material having light-shielding and electrical conductivity is used for the scanning lines 13. The scanning lines 13 mainly function to block light L incident on the semiconductor layer 31 from below. In this embodiment, tungsten silicide is used as the material for the scanning lines 13.

[0051] The TFT 30 has a semiconductor layer 31 provided on the second interlayer insulating layer 72, a gate insulating layer 33, and a gate electrode 32 provided on the third interlayer insulating layer 73. The gate electrode 32 is electrically connected to the scanning line 13.

[0052] The semiconductor layer 31 of the TFT 30 has an LDD (Lightly Doped Drain) structure. The semiconductor layer 31 is made of, for example, conductive polysilicon. The gate electrode 32 is made of, for example, conductive polysilicon. The semiconductor layer 31 extends along the Y axis.

[0053] The first capacitance element 50 is provided on the third interlayer insulating layer 73. In the first capacitance element 50, a second capacitance electrode 52, a first dielectric layer 53, and a first capacitance electrode 51 are laminated in this order from the substrate 10a side. An example of a material for the first capacitance electrode 51 and the second capacitance electrode 52 is conductive polysilicon. A dielectric material similar to that of the second capacitance element 60 is used as a material for the first dielectric layer 53.

[0054] The data line 16 is provided on the fourth interlayer insulating layer 74 and extends along the Y-axis. The material of the data line 16 is not particularly limited as long as it is a conductive low-resistance wiring material, and examples of the material include metals such as aluminum and titanium, and metal compounds thereof. The data line 16 is electrically connected to the source-drain region of the semiconductor layer 31.

[0055] The common wiring 18 and the third relay electrode 83 are provided in the same layer on the fifth interlayer insulating layer 75. The common wiring 18 and the third relay electrode 83 are electrically connected to the counter electrode 21 described above and are given a common potential. Examples of materials for the common wiring 18 and the third relay electrode 83 include metals such as aluminum and titanium, and metal compounds thereof. In the liquid crystal device 100, a laminated structure is adopted for the common wiring 18 and the third relay electrode 83.

[0056] In detail, the common wiring 18 has a first layer 18a having optical reflectivity, and a second layer 18b that is laminated on the first layer 18a and has a lower optical reflectivity than the first layer 18a. The third relay electrode 83 has a first layer 83a having optical reflectivity, and a second layer 83b that is laminated on the first layer 83a and has a lower optical reflectivity than the first layer 83a.

[0057] The first layers 18a, 83a contain aluminum, and the second layers 18b, 83b contain titanium nitride. Specifically, in this embodiment, aluminum is used as the first layers 18a, 83a, and titanium nitride is used as the second layers 18b, 83b. Titanium nitride has the effect of suppressing electrolytic corrosion and oxidation of the aluminum of the first layers 18a, 83a, and the effect of protecting the first layers 18a, 83a from the stripping solution used in the manufacturing process. On the other hand, aluminum has good electrical conductivity, and has a higher light reflectance than titanium nitride, so that in areas where the above effect is not required, the second layers 18b, 83b are omitted to reflect light L, and has the effect of suppressing heat generation inside the element substrate 10.

[0058] Here, when a film is formed by sputtering, the optical reflectance of aluminum is about 90% and that of titanium nitride is about 25% at a wavelength of 550 nm in the visible range. The optical reflectance of such materials can be measured using a spectrophotometer or the like. In this specification, having optical reflectivity means that the optical reflectance is approximately 50% or more. This actively reflects light to prevent light absorption, thereby suppressing heat generation from the liquid crystal device 100.

[0059] When the element substrate 10 is viewed in plan, the area of ​​the second layers 18b, 83b is smaller than the area of ​​the corresponding first layers 18a, 83a. That is, the second layers 18b, 83b are laminated on a part of the corresponding first layers 18a, 83a, rather than on the entirety of the first layers 18a, 83a. The common wiring 18 and the third relay electrode 83 will be described in detail later.

[0060] The pixel electrodes 11 are provided on the sixth interlayer insulating layer 76. Although not shown in the figure, an alignment film 12 is provided to cover the pixel electrodes 11. The alignment film 12 of the element substrate 10 and the alignment film 22 of the counter substrate 20 described above are made of an aggregate of columns formed by depositing an inorganic material such as silicon oxide from a predetermined direction, such as an oblique direction, and growing the material into a columnar shape.

[0061] As shown in FIG. 5, the second capacitance electrode 52 of the first capacitance element 50 is electrically connected to a fifth relay electrode 85 arranged on the fourth conductive layer, and the fifth relay electrode 85 is electrically connected to the fourth capacitance electrode 62 of the second capacitance element 60.

[0062] The second layer 18b is not provided in the range of the line segment β1-β2 of the common wiring 18. The light L incident from above is reflected by the first layer 18a in the region where the second layer 18b is not laminated. Therefore, heat generation due to absorption of the light L is suppressed in the above region.

[0063] 6, the common wiring 18 and the first capacitance electrode 51 of the first capacitance element 50 are electrically connected via a first relay electrode 81 arranged on a seventh conductive layer. The first relay electrode 81 is further electrically connected to a second relay electrode 82 arranged on a fourth conductive layer.

[0064] The third relay electrode 83 is electrically connected to a fourth relay electrode 84 disposed on a seventh conductive layer, and the fourth relay electrode 84 is electrically connected to the second capacitance electrode 52 of the first capacitance element 50.

[0065] In particular, in the third relay electrode 83, the first layer 83a is covered with the second layer 83b in a region including the region overlapping with the first contact hole CNT11, including the inside of the first contact hole CNT11. As a result, the first layer 83a is protected by the second layer 83b in the manufacturing process of patterning the third relay electrode 83. Therefore, etching of the first layer 83a is suppressed, and the reliability of the electrical connection is improved. As shown in Figures 6 and 7, the first capacitance electrode 51 of the first capacitance element 50 and the third capacitance electrode 61 of the second capacitance element 60 are electrically connected to the common wiring 18 via a first relay electrode 81 arranged on the seventh conductive layer and a second relay electrode 82 arranged on the fourth conductive layer.

[0066] In particular, in the common wiring 18, the second layer 18b is laminated on the first layer 18a only in the inside and periphery of the third contact hole CNT13 in a region including the region overlapping with the third contact hole CNT13. As a result, the first layer 18a is protected by the second layer 18b in the manufacturing process of patterning the common wiring 18. Therefore, etching of the first layer 18a is suppressed and the reliability of the electrical connection is improved. Also, in the +X direction of the third contact hole CNT13, the second layer 18b is not laminated on the first layer 18a. Therefore, the light L is reflected by the first layer 18a, and heat generation inside the element substrate 10 is suppressed.

[0067] As shown in FIG. 7, the second relay electrode 82 is electrically connected to the third capacitance electrode 61 of the second capacitance element 60. Although not shown in detail, the third capacitance electrode 61 includes a protruding portion 61a that protrudes in a planar manner. The second relay electrode 82 is electrically connected to this protruding portion 61a. The second capacitance electrode 52 of the first capacitance element 50 and the fourth capacitance electrode 62 of the second capacitance element 60 are electrically connected to the pixel electrode 11 and the drain 31d of the TFT 30. Note that, instead of the first capacitance element 50, a relay electrode for electrically connecting the fourth capacitance electrode 62 of the second capacitance element 60 and the drain 31d of the TFT 30 may be used.

[0068] The pixel electrode 11 is electrically connected to the third relay electrode 83 disposed on the eighth conductive layer. In particular, the pixel electrode 11 is electrically connected to the third relay electrode 83 via the second contact hole CNT12. In the third relay electrode 83, a second layer 83b is coated on the first layer 83a in a region including a region where the third relay electrode 83 overlaps with the second contact hole CNT12. In other words, the second layer 83b is interposed between the pixel electrode 11 and the first layer 83a.

[0069] Here, when aluminum and ITO are electrically connected directly, electrolytic corrosion is likely to occur between the two, which may result in disconnection of the aluminum or insulation due to the generation of alumina, etc. In contrast, in this embodiment, titanium nitride and ITO are connected, so that the occurrence of electrolytic corrosion in the region including the second contact hole CNT12 is suppressed, improving the reliability of the electrical connection.

[0070] The signal lines such as the scanning lines 13 and the common lines 18, the TFTs 30, and the first relay electrodes 81 that constitute the functional layer described above are provided in the light-shielding region SD that partitions a plurality of pixels P in a plan view.

[0071] The element substrate 10 can be manufactured by using known methods that are applied to known semiconductor processes, such as low-pressure CVD (Chemical Vapor Deposition), atmospheric CVD, plasma CVD, photolithography, sputtering, etching, and CMP (Chemical Mechanical Planarization).

[0072] As shown in Fig. 8, the common wirings 18 are arranged in stripes along the Y axis. The element substrate 10 includes a common wiring 18 as a first wiring in the center of Fig. 8, and common wirings 18 as second wirings adjacent to each other in the direction along the X axis. In a plan view, a third relay electrode 83 is provided between the common wirings 18 adjacent to each other.

[0073] 8 shows the area corresponding to that in FIG. 4. In addition, in the common wiring 18, the area to which the laminated structure consisting of the first layer 18a and the second layer 18b is applied is shown by hatching. Similarly, in the third relay electrode 83, the area to which the laminated structure consisting of the first layer 83a and the second layer 83b is applied is shown by hatching. Furthermore, the boundary between the main body portion 18M and the protruding portion 18P described later is shown by a dashed line.

[0074] The common wiring 18 has a main body 18M and a protruding portion 18P. The main body 18M extends in the direction along the Y axis. The protruding portion 18P protrudes from the main body 18M in the -X direction.

[0075] The first layer 18a and the second layer 18b are provided in the protruding portion 18P in a region including a region that overlaps in plan with the third contact hole CNT13. In detail, the third contact hole CNT13 is disposed in the protruding portion 18P in a region including a region that overlaps in plan with the vicinity of the end portion in the -X direction.

[0076] The common line 18 is electrically connected to the first capacitance electrode 51 of the first capacitance element 50 described above through the third contact hole CNT13.

[0077] The second layer 18b is not provided in at least a portion of the main body portion 18M. That is, in this embodiment, the second layer 18b is not provided over the entire area of ​​the main body portion 18M in plan view. Also, the second layer 18b is not provided in a portion of 18P in the +X direction on the common wiring 18 side.

[0078] The above arrangement is suitable when the interval between adjacent common wirings 18 along the X-axis is relatively wide. In other words, since the interval is relatively wide, the function of the second layer 18b is fully exerted around the third contact hole CNT13 even if the area of ​​the second layer 18b is relatively small. This reduces the excess second layer 18b around the third contact hole CNT13. Therefore, while improving the reliability of the electrical connection around the third contact hole CNT13, the area where the first layer 18a is exposed is increased, and heat generation inside the element substrate 10 is further suppressed.

[0079] The third relay electrode 83 has a main body portion 83M and a protruding portion 83P. The main body portion 83M is island-shaped and extends in the direction along the X-axis. The protruding portion 83P protrudes from the main body portion 83M in the +Y direction.

[0080] The third relay electrode 83 has a first layer 83a and a second layer 83b in a region including a region overlapping with the first contact hole CNT11 and the second contact hole CNT12 in a plan view. In detail, the first contact hole CNT11 is arranged in a region including a region overlapping with the -X direction end of the main body 83M in a plan view. The second contact hole CNT12 is arranged in a region including a region overlapping with the protruding portion 83P in a plan view. In the third relay electrode 83, the entire first layer 83a is covered with the second layer 83b in a plan view.

[0081] The protrusion 83P is electrically connected to the above-mentioned pixel electrode 11 through the second contact hole CNT12. The main body 83M is electrically connected to the above-mentioned TFT 30 through the first contact hole CNT11.

[0082] The first layers 18a, 83a and the second layers 18b, 83b may be formed by known techniques such as sputtering. In the direction along the Z axis, the first layers 18a, 83a have a thickness of, for example, 0.35 μm, and the second layers 18b, 83b have a thickness of, for example, 0.15 μm.

[0083] According to this embodiment, the following effects can be obtained.

[0084] The aperture ratio and the reliability of the electrical connections in the first contact hole CNT11, the second contact hole CNT12, and the third contact hole CNT13 are improved, and heat generation inside the element substrate 10 can be suppressed. In more detail, the third relay electrode 83 and the pixel electrode 11 are electrically connected through the second contact hole CNT12 arranged in a region including a region overlapping with the protrusion 83P in a plan view. Therefore, it is possible to make the main body 83M thinner in a plan view and smaller in area than when the second contact hole CNT12 is arranged in a region including a region overlapping with the main body 83M of the third relay electrode 83 in a plan view. This can improve the aperture ratio.

[0085] The protrusions 18P, 83P are formed by laminating aluminum and titanium nitride. Therefore, the first contact hole CNT11 and the third contact hole CNT13 also have a laminated structure. Therefore, when patterning the third relay electrode 83 and the common wiring 18, the first layers 18a, 83a are protected by the second layers 18b, 83b, and etching of the first layers 18a, 83a is suppressed. This improves the reliability of the electrical connection via the first contact hole CNT11 and the third contact hole CNT13.

[0086] The second layer 18b is not provided in at least a portion of the common wiring 18, i.e., a portion of the main body 18M and the protruding portion 18P. Since the first layer 18a reflects the light L more easily than the second layer 18b, heat generation inside the element substrate 10 due to absorption of the light L is suppressed.

[0087] The second contact hole CNT12 is provided in a region overlapping with the protruding portion 83P of the third relay electrode 83 having a laminated structure. Therefore, the second layer 83b is interposed between the first layer 83a and the pixel electrode 11, so that the occurrence of electrolytic corrosion can be suppressed.

[0088] As a result, the aperture ratio and the reliability of the electrical connection between the first contact hole CNT11 and the third contact hole CNT13 are improved, and it is possible to provide a liquid crystal device 100 in which heat generation inside the element substrate 10 is suppressed.

[0089] 2. Second embodiment A liquid crystal device as an electro-optical device according to this embodiment will be described with reference to Fig. 9 to Fig. 11. The liquid crystal device of the second embodiment is a liquid crystal device 100 of the above embodiment, in which the region where the second layer 18b of the common wiring 18 is provided is changed. Therefore, the same reference numerals are used for the same components as those of the first embodiment, and duplicated descriptions will be omitted.

[0090] 9 shows the area corresponding to FIG. 4, as in FIG. 8. In addition, the area to which the laminated structure consisting of the first layer 18a and the second layer 18b is applied in the common wiring 18 is hatched. Similarly, in the third relay electrode 83, the area to which the laminated structure consisting of the first layer 83a and the second layer 83b is applied is hatched.

[0091] 9, the second layer 18b is not provided on at least a portion of the main body portion 18M. That is, in this embodiment, the second layer 18b is provided on the entire area of ​​the protruding portion 18P and a portion of the area of ​​the main body portion 18M in a planar manner along the X-axis.

[0092] More specifically, as shown in Fig. 10, in the cross section of line segment β1-β2, the second layer 18b is laminated on a part of the first layer 18a. Fig. 10 shows the area corresponding to Fig. 5. Also, as shown in Fig. 11, in the cross section of line segment α1-α2, the entire area of ​​the first layer 18a is covered with the second layer 18b. Fig. 11 shows the area corresponding to Fig. 6.

[0093] The above arrangement is suitable when the interval along the X-axis between adjacent common wirings 18 is relatively narrow. In other words, since the interval is relatively narrow, the area of ​​the second layer 18b is made relatively large around the third contact hole CNT13, so that the function of the second layer 18b is fully exerted.

[0094] According to this embodiment, it is possible to obtain the same effects as those of the above embodiment.

[0095] 3. Third embodiment In this embodiment, the electronic device is exemplified as a projection display device 1000. The projection display device 1000 according to this embodiment is equipped with a liquid crystal device 100 as the electro-optical device of the above embodiment. The projection display device 1000 is a liquid crystal projector.

[0096] As shown in FIG. 12, the projection display device 1000 includes a polarized lighting device 1100 arranged along the system optical axis LS, two dichroic mirrors 1104 and 1105 as light separation elements, three reflective mirrors 1106, 1107, and 1108, five relay lenses 1201, 1202, 1203, 1204, and 1205, three transmissive liquid crystal light valves 1210, 1220, and 1230 as light modulation elements, a cross dichroic prism 1206 as a light combining element, and a projection lens 1207.

[0097] The polarized illumination device 1100 is generally composed of a lamp unit 1101 serving as a light source formed from a white light source such as an extra-high pressure mercury lamp or a halogen lamp, an integrator lens 1102 , and a polarization conversion element 1103 .

[0098] Dichroic mirror 1104 reflects red light (R) and transmits green light (G) and blue light (B) of the polarized light beam emitted from polarized illumination device 1100. The other dichroic mirror 1105 reflects the green light (G) that has transmitted through dichroic mirror 1104 and transmits the blue light (B).

[0099] Red light (R) reflected by dichroic mirror 1104 is reflected by reflecting mirror 1106 and then enters liquid crystal light valve 1210 via relay lens 1205. Green light (G) reflected by dichroic mirror 1105 enters liquid crystal light valve 1220 via relay lens 1204. Blue light (B) transmitted through dichroic mirror 1105 enters liquid crystal light valve 1230 via a light guide system consisting of three relay lenses 1201, 1202, and 1203 and two reflecting mirrors 1107 and 1108.

[0100] The liquid crystal light valves 1210, 1220, and 1230 are disposed to face the respective color light entrance surfaces of the cross dichroic prism 1206. The color light entering the liquid crystal light valves 1210, 1220, and 1230 is modulated based on video information (video signal) and emitted toward the cross dichroic prism 1206.

[0101] In the cross dichroic prism 1206, four right-angle prisms are bonded together, and a dielectric multilayer film that reflects red light and a dielectric multilayer film that reflects blue light are arranged in a cross shape on their inner surfaces. These dielectric multilayer films combine the three color lights to combine light that represents a color image. The combined light is projected onto a screen 1300 by a projection lens 1207, which is a projection optical system, and the image is enlarged and displayed.

[0102] The above-mentioned liquid crystal device 100 is applied to the liquid crystal light valve 1210. The other liquid crystal light valves 1220 and 1230 are similar.

[0103] According to such a projection type display device 1000, since the liquid crystal device 100 of the first embodiment is provided, the reliability of the electrical connection is improved in the region including the first contact hole CNT11, the second contact hole CNT12, and the third contact hole CNT13 of the element substrate 10. In addition, it is possible to suppress heat generation inside the element substrate 10. Note that the same effect can be obtained even if the liquid crystal device of the second embodiment is adopted as the liquid crystal light valves 1210, 1220, and 1230.

[0104] In addition to the projection display device 1000, the liquid crystal device 100 may be installed in various electronic devices such as an EVF (Electrical View Finder), a mobile mini projector, a head-up display, a smartphone, a mobile phone, a mobile computer, a digital camera, a digital video camera, a display, an in-vehicle device, an audio device, an exposure device, and a lighting device. [Explanation of symbols]

[0105] 11...pixel electrode, 18...common wiring as first wiring or second wiring, 18a, 83a...first layer, 18b, 83b...second layer, 18M, 83M...main body portion, 18P, 83P...protruding portion, 30...TFT as transistor, 50...first capacitance element, 60...second capacitance element, 83...third relay electrode as relay layer, 100...liquid crystal device as electro-optical device, 1000...projection display device as electronic device, CNT11...first contact hole, CNT12...second contact hole, CNT13...third contact hole

Claims

1. A transistor and a pixel electrode provided corresponding to the transistor; a capacitance element provided corresponding to the pixel electrode; a relay layer including a main body portion extending along a first direction and electrically connected to the transistor through a first contact hole, and a protruding portion protruding from the main body portion in a second direction intersecting the first direction and electrically connected to the pixel electrode through a second contact hole; a first wiring provided in the same layer as the relay layer, the first wiring having a main body portion extending along the second direction and a protruding portion protruding from the main body portion in the first direction and electrically connected to the capacitive element via a third contact hole; the relay layer and the first wiring each have a first layer having optical reflectivity and a second layer laminated on the first layer and having an optical reflectivity lower than that of the first layer; The electro-optical device, wherein the second layer is not provided on at least a portion of the main body of the first wiring.

2. a second wiring adjacent to the first wiring, The electro-optical device according to claim 1 , wherein the relay layer is provided between the first wiring and the second wiring in a plan view.

3. The electro-optical device according to claim 1 , wherein the second layer is not provided on a portion of the protruding portion of the first wiring on the side of the main body portion of the first wiring.

4. The electro-optical device according to claim 1 , wherein the second layer is provided along the first direction on the protruding portion of the first wiring and on a part of the main body portion of the first wiring.

5. the relay layer includes the first layer and the second layer in a region overlapping with the first contact hole and the second contact hole in a plan view, The electro-optical device according to claim 1 , wherein the first layer and the second layer are provided in the protruding portion of the first wiring in a region that overlaps with the third contact hole in a plan view.

6. the first layer comprises aluminum; The electro-optic device of claim 1 , wherein the second layer comprises titanium nitride.

7. 7. An electronic device comprising the electro-optical device according to claim 1.

Citation Information

Patent Citations

  • Optoelectronic device, method of manufacturing the same, and electronic equipment

    JP2005242296A