Insulation type flyback converter

JP2025033056APending Publication Date: 2025-03-13MEIDENSHA CORP
View PDF 2 Cites 0 Cited by

Patent Information

Application Number
JP2023138545
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-29
Publication Date
2025-03-13

AI Technical Summary

Benefits of technology

【0017】 本発明によれば、パワー半導体素子のゲート駆動回路の電源を生成する絶縁型フライバックコンバータにおいて、ロードレギュレーションを改善することが可能となる。

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025033056000001_ABST
    Figure 2025033056000001_ABST
Patent Text Reader

Abstract

To provide an insulation type flyback converter generating a power supply in a gate driving circuit of a power semiconductor element, capable of improving a load regulation.SOLUTION: A voltage of a first capacitor C1 is used as a power supply of a gate driving circuit. A switching controller 1 controls a first switching element S1 on the basis of a feedback voltage VFB output from a second diode D2. A buffer circuit 7 is connected to a feedback voltage terminal, and is constructed by a complementary circuit formed by second and third switching elements S2 and S3. A capacitance load C3 is connected to an output of the buffer circuit 7. The control part 3 outputs an on / off command signal to the second and third switching elements S2 and S3 of the buffer circuit 7, and charges and discharges the capacitance load C3.SELECTED DRAWING: Figure 3
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] The present invention relates to an isolated flyback converter that generates power to be supplied to the gate of a power semiconductor element. [Background technology]

[0002] Power supplies for driving the gates of power semiconductor elements used in power conversion devices and the like are mainly composed of isolated flyback converters. Isolated flyback converters are disclosed in Section 2.2 of Non-Patent Document 2 and Patent Document 1. Figure 1 shows the operating principle of an isolated flyback converter.

[0003] 1, the voltage induced in the tertiary winding Tr3 of the transformer Tr (hereinafter referred to as the feedback voltage VFB) is monitored and compared with a reference voltage VREF in the switching controller 1 to change the switching duty of the first switching element S1 and control the output voltage (power supply voltage of the gate drive circuit) VCC2 to a constant value. Details of the internal operation of the switching controller 1 are disclosed in Chapter 6 of Non-Patent Document 1.

[0004] Also, a configuration example of a gate drive circuit for a power semiconductor element is disclosed in Patent Document 2. E2 in Fig. 1 of Patent Document 2 corresponds to the output voltage VCC. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] WO2017 / 204115 issue [Patent Document 2] Japanese Patent Application Publication No. 2-63317 [Non-patent literature]

[0006] [Non-Patent Document 1] "Tech Web Handbook: Fundamentals of Switching Regulators," ROHM Co., Ltd., 2021 [Retrieved August 2, 2023], Internet<URL:https: / / pages.rohm.com / Tech_download20.html> [Non-Patent Document 2] "Tech Web Handbook: Fundamentals and Design Procedures of AC / DC Converters", ROHM Co., Ltd., 2021 [Retrieved August 2, 2023], Internet<URL:https: / / pages.rohm.com / Tech_download22.html> Summary of the Invention [Problem to be solved by the invention]

[0007] However, the voltage control of the output voltage VCC2 is not performed by directly monitoring the output voltage VCC2, but is performed indirectly by monitoring the feedback voltage VFB.

[0008] Therefore, there is a problem that the voltage of the output voltage VCC2 goes up and down due to the increase and decrease in the current consumption of the load resistor R1 (corresponding to "a gate drive circuit that receives an on-off control command and generates a gate voltage that turns the power semiconductor element on and off"), which is affected by the voltage drop that occurs between the secondary winding Tr2 and the tertiary winding Tr3 of the transformer Tr. Note that the "on-off control command" corresponds to the input signal of the photocoupler PC in Figure 1 of Patent Document 2.

[0009] Specifically, as shown in Figure 2, when the current consumption of the load resistor R1 increases, the voltage of the output voltage VCC2 decreases, and when the current consumption of the load resistor R1 decreases, the voltage of the output voltage VCC2 increases, in an inversely proportional relationship. The amount of change in the output voltage VCC2 in response to changes in the load current is called load regulation.

[0010] Fluctuations in this output voltage VVC2 affect the switching speed and switching loss of the power semiconductor elements. To ensure stable operation of a power conversion device (for example, an inverter), it is desirable for the fluctuations in the output voltage VCC2 to be small.

[0011] In the case of a power supply for driving the gate of a power semiconductor element, the current consumption of the load resistor R1 is characterized by being roughly proportional to the switching frequency of the power semiconductor element, because the majority of the total power consumption of the gate drive circuit is consumed by the power consumption during the switching operation of the power semiconductor element.

[0012] For the reasons described above, improving the load regulation in an isolated flyback converter that generates power for a gate drive circuit of a power semiconductor element is an issue to be addressed. [Means for solving the problem]

[0013] The present invention has been devised in view of the above-mentioned problems in the related art, and one aspect thereof is an isolated flyback converter that generates a power supply for a gate drive circuit of a power semiconductor element, comprising: a transformer having one end of a primary winding connected to an input voltage source and having a secondary winding and a tertiary winding; a first switching element connected to the other end of the primary winding of the transformer; a first diode having an anode connected to one end of the secondary winding of the transformer; a first capacitor connected between the cathode of the first diode and the other end of the secondary winding of the transformer; a second diode having an anode connected to one end of the tertiary winding of the transformer and a cathode connected to a feedback voltage terminal; the gate drive circuit includes a second capacitor connected between the cathode of the second diode and the other end of the tertiary winding of the transformer; a switching controller that controls the first switching element based on a feedback voltage output from the second diode; a buffer circuit that is connected to the feedback voltage terminal and is configured as a complementary circuit consisting of second and third switching elements; a capacitive load connected to the output of the buffer circuit; and a control unit that outputs an on / off command signal to the second and third switching elements of the buffer circuit to charge and discharge the capacitive load, and the voltage of the first capacitor is used as a power supply voltage for the gate drive circuit.

[0014] In one aspect, the switching controller is characterized by including an error amplifier that subtracts a reference voltage from the feedback voltage and outputs the differential voltage, and a PWM generator that determines a pulse width based on a comparison between a triangular wave and the differential voltage to generate a gate signal for the first switching element.

[0015] In one aspect, the frequency of the on / off command signal for the second and third switching elements output by the control unit is set to the same frequency as the frequency of the on / off control command for the power semiconductor element.

[0016] In one aspect, the on / off command signal for the second and third switching elements output by the control unit and the on / off control command for the power semiconductor element are common to each other. Effect of the Invention

[0017] According to the present invention, it is possible to improve the load regulation in an isolated flyback converter that generates power for a gate drive circuit of a power semiconductor element. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 is a block diagram showing an example of a conventional isolated flyback converter. [Diagram 2] FIG. 1 is a diagram showing load regulation in a conventional isolated flyback converter. [Diagram 3] FIG. 1 is a block diagram showing an isolated flyback converter according to an embodiment. [Figure 4] FIG. 4 is a diagram showing load regulation in the isolated flyback converter according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] An embodiment of an isolated flyback converter according to the present invention will now be described in detail with reference to FIGS.

[0020] [Embodiment] The configuration of an isolated flyback converter according to this embodiment is shown in Fig. 3. In this embodiment, a power supply for driving the gate of a power semiconductor element is assumed.

[0021] The transformer Tr includes a primary winding Tr1, a secondary winding Tr2, and a tertiary winding Tr3. One end of the primary winding Tr1 of the transformer Tr is connected to an input voltage source VCC1. The other end of the primary winding Tr1 of the transformer Tr is connected to a first switching element S1. The first switching element S1 is controlled by a switching controller 1.

[0022] A snubber circuit 2 is connected in parallel to the primary winding Tr1 of the transformer Tr. The snubber circuit 2 connected in parallel to the primary winding Tr1 of the transformer Tr is used to suppress surge voltages due to switching of the first switching element S1. If the surge voltage is below an allowable value, the snubber circuit 2 may be omitted.

[0023] The anode of a first diode D1 is connected to one end of a secondary winding Tr2 of the transformer Tr. A first capacitor C1 is connected between the cathode of the first diode D1 and the other end of the secondary winding Tr2 of the transformer Tr. The voltage of the first capacitor C1 becomes an output voltage VCC2, which is applied to a load resistor R1 (corresponding to a gate drive circuit that receives an on / off control command and generates a gate voltage that turns a power semiconductor element on and off).

[0024] The anode of the second diode D2 is connected to one end of the tertiary winding Tr3 of the transformer Tr. The cathode of the second diode D2 is connected to the feedback voltage terminal and outputs the feedback voltage VFB. A second capacitor C2 is connected between the cathode of the second diode D2 and the other end of the tertiary winding Tr3 of the transformer Tr.

[0025] The feedback voltage VFB output from the cathode of the second diode D2 is input to the switching controller 1. The switching controller 1 controls the first switching element S1 based on the feedback voltage VFB. More specifically, in the switching controller 1, the error amplifier 4 compares the feedback voltage VFB with a reference voltage VREF, and outputs a differential voltage obtained by subtracting the reference voltage VREF from the feedback voltage VFB. The triangular wave generator 5 outputs a triangular wave. The PWM generator 6 determines the pulse width of a PWM signal based on the comparison between the triangular wave and the differential voltage, and outputs a gate signal for the first switching element S1.

[0026] In addition to this configuration, this embodiment includes a buffer circuit 7 (hereinafter referred to as CMOS) configured as a complementary circuit consisting of second and third switching elements (e.g., MOSFETs) S2 and S3, a capacitive load C3 connected to the output of the CMOS 7, and a microcontroller (controller) 3 that outputs gate signals (on / off command signals) to the second and third switching elements S2 and S3 of the CMOS 7. The CMOS 7 is configured by connecting a P-channel second switching element S2 and an N-channel third switching element S3 in series.

[0027] A power supply terminal (the drain of the P-channel second switching element S2) of the CMOS 7 is connected to a feedback voltage terminal on the cathode side of the second diode D2. A capacitive load C3 is connected between the connection point (output) of the second and third switching elements S2 and S3 and the ground GND1.

[0028] Next, the operation of the isolated flyback converter of this embodiment will be described.

[0029] When the first switching element S1 is turned ON, current flows through the primary winding Tr1 of the transformer Tr and energy is stored. At this time, the first diode D1 is OFF. When the first switching element S1 is turned OFF, the energy stored in the primary winding Tr1 of the transformer Tr is output from the secondary winding Tr2 of the transformer Tr through the first diode D1 and charged into the first capacitor C1. The DC voltage charged in the first capacitor C1 is applied to the load resistor R1 as the output voltage VCC2.

[0030] At this time, the energy stored in the primary winding Tr1 of the transformer Tr is output from the tertiary winding Tr3 of the transformer Tr through the second diode D2 to charge the second capacitor C2. The feedback voltage VFB output from the second diode D2 is output to the switching controller 1. The switching controller 1 controls the first switching element S1 based on this feedback voltage VFB.

[0031] CMOS7 is driven by a square wave signal (on / off command signal) sent from the microcontroller 3, and charges and discharges the capacitive load C3. When the charging current of the capacitive load C3 flows through CMOS7, a current component of this current also flows through the second diode D2. Furthermore, the larger the current flow, the larger the conduction on voltage of the second diode D2 becomes. Therefore, a voltage drop due to the current component flowing through CMOS7 occurs at the power supply terminal of CMOS7 (the cathode terminal of the second diode D2).

[0032] When the capacitive load C3 is charged, the second switching element S2 is turned on. When the capacitive load C3 is discharged, the third switching element S3 is turned on. Since the power supply terminal of the CMOS 7 is connected to the feedback voltage terminal, the current that flows when the capacitive load C3 is charged reduces the feedback voltage VFB.

[0033] Then, the switching controller 1 operates to increase the switching-on duty of the first switching element S1 in order to recover from the voltage drop of the feedback voltage VFB, and the output voltage VCC2 rises, thereby improving the load regulation.

[0034] Here, the square wave signal (on / off command signal) transmitted from the microcontroller 3 has the same frequency as the gate signal (on / off control command) of the power semiconductor element. The square wave signal (on / off command signal) transmitted from the microcontroller 3 may be a signal synchronized (common signal) with the gate signal (on / off control command) of the power semiconductor element, or a signal having the same frequency as the gate signal (on / off control command) of the power semiconductor element may be generated separately. When a synchronized signal (common signal) is used, the square wave signal (on / off command signal) and the gate signal (on / off control command) can be used together, which has the effect of simplifying the control circuit.

[0035] As mentioned above, the current consumption of the load resistor R1 is characterized by being approximately proportional to the switching frequency of the power semiconductor element. By making the frequency of the square wave signal (on / off command signal) output from the microcontroller 3 the same as the switching frequency of the power semiconductor element, the charging current of the capacitive load C3 per unit time is also proportional to the current consumption, making it possible to perform voltage drop compensation approximately proportional to the current consumption of the load resistor R1.

[0036] 4 shows the load regulation (simulation results) when this embodiment is applied. The fluctuation value of the output voltage VCC2 is reduced compared to the prior art, and the load regulation can be improved. In addition, the reduction in the fluctuation of the output voltage VCC2 allows the power conversion device to be operated stably.

[0037] Although the present invention has been described in detail above only with respect to the specific examples, it will be apparent to those skilled in the art that various modifications and variations are possible within the scope of the technical concept of the present invention, and it is natural that such modifications and variations fall within the scope of the claims. [Explanation of symbols]

[0038] Tr...transformer Tr1, Tr2, Tr3...Primary winding, secondary winding, tertiary winding S1, S2, S3...First, second, and third switching elements 1. Switching controller 2. Snubber circuit R1: Load resistor 3...Microcontroller (control unit) 4. Error amplifier 5...Triangle wave generator 6...PWM generator 7...Buffer circuit (CMOS) C1, C2: 1st and 2nd capacitors C3…capacitive load

Claims

1. An isolated flyback converter that generates a power supply for a gate drive circuit of a power semiconductor element, a transformer having a primary winding connected to an input voltage source at one end and a secondary winding and a tertiary winding; a first switching element connected to the other end of the primary winding of the transformer; a first diode having an anode connected to one end of the secondary winding of the transformer; a first capacitor connected between the cathode of the first diode and the other end of the secondary winding of the transformer; a second diode having an anode connected to one end of the tertiary winding of the transformer and a cathode connected to a feedback voltage terminal; a second capacitor connected between the cathode of the second diode and the other end of the tertiary winding of the transformer; a switching controller that controls the first switching element based on a feedback voltage output from the second diode; a buffer circuit connected to the feedback voltage terminal and configured as a complementary circuit including second and third switching elements; a capacitive load connected to an output of the buffer circuit; a control unit that outputs an on / off command signal to the second and third switching elements of the buffer circuit to charge and discharge the capacitive load; a voltage of the first capacitor being used as a power supply voltage for the gate drive circuit.

2. The switching controller includes: an error amplifier that subtracts a reference voltage from the feedback voltage and outputs the difference voltage; a PWM generator that determines a pulse width based on a comparison between a triangular wave and the differential voltage to generate a gate signal for the first switching element; 2. The isolated flyback converter according to claim 1, further comprising:

3. 2. The isolated flyback converter according to claim 1, wherein a frequency of the on / off command signal for the second and third switching elements output by the control unit is the same as a frequency of an on / off control command for the power semiconductor elements.

4. 4. The isolated flyback converter according to claim 3, wherein the on / off command signal for the second and third switching elements outputted from the control section is common to the on / off control command for the power semiconductor element.

Citation Information

Patent Citations

  • Gate driving circuit for field effect transistor

    JP1990063317A

  • Switching power supply circuit

    WO2017204115A1